Cleanups and version bump for 0.128u4.

This commit is contained in:
Aaron Giles 2008-11-24 04:10:18 +00:00
parent c1374de9c3
commit 1d05ea6089
90 changed files with 692 additions and 692 deletions

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@ -260,12 +260,12 @@ typedef struct
RX_CALLBACK sport_rx_callback;
TX_CALLBACK sport_tx_callback;
ADSP2100_TIMER_CALLBACK timer_fired_func;
/* Memory spaces */
const address_space *program;
const address_space *data;
const address_space *io;
} adsp2100_state;
@ -574,11 +574,11 @@ static adsp2100_state *adsp21xx_init(const device_config *device, int index, int
/* set the IRQ callback */
adsp->irq_callback = irqcallback;
adsp->device = device;
adsp->program = cpu_get_address_space(device, ADDRESS_SPACE_PROGRAM);
adsp->data = cpu_get_address_space(device, ADDRESS_SPACE_DATA);
adsp->io = cpu_get_address_space(device, ADDRESS_SPACE_IO);
/* set up ALU register pointers */

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@ -38,7 +38,7 @@ typedef struct
UINT8 waiting;
UINT8 watchdog;
const device_config *device;
const address_space *program;
const address_space *data;

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@ -5,15 +5,15 @@
/*
RCA COSMAC Series Microprocessors
RCA COSMAC Series Microprocessors
Type Internal ROM Internal RAM Timer
-----------------------------------------------------
CDP1802 none none no
CDP1803 ? ? ?
CDP1804 2 KB 64 bytes yes
CDP1805 none 64 bytes yes
CDP1806 none none yes
Type Internal ROM Internal RAM Timer
-----------------------------------------------------
CDP1802 none none no
CDP1803 ? ? ?
CDP1804 2 KB 64 bytes yes
CDP1805 none 64 bytes yes
CDP1806 none none yes
*/

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@ -19,7 +19,7 @@
Binary:
Data Flow: A -> T7:4
RAM(B) -> T3:0
RAM(B) -> T3:0
Description: Copy A, RAM to T
@ -38,7 +38,7 @@ INSTRUCTION( camt )
Binary:
Data Flow: T7:4 -> RAM(B)
T3:0 -> A
T3:0 -> A
Description: Copy T to RAM, A

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@ -13,8 +13,8 @@
TODO:
- COP413/COP414/COP415/COP405
- get rid of LBIOps/InstLen
- COP413/COP414/COP415/COP405
- get rid of LBIOps/InstLen
- run interrupt test suite
- run production test suite
- run microbus test suite

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@ -13,7 +13,7 @@
TODO:
- get rid of LBIOps/InstLen
- get rid of LBIOps/InstLen
- when is the microbus int cleared?
- CKO sync input
- save internal RAM when CKO is RAM power supply pin

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@ -13,11 +13,11 @@
TODO:
- rename this file to cop444.c
- COP440/COP441/COP442 (new registers: 4-bit H, 8-bit R; some new opcodes, 2Kx8 ROM, 160x4 RAM)
- COP404 emulation configuration inputs
- RAM bus width
- get rid of LBIOps/InstLen
- rename this file to cop444.c
- COP440/COP441/COP442 (new registers: 4-bit H, 8-bit R; some new opcodes, 2Kx8 ROM, 160x4 RAM)
- COP404 emulation configuration inputs
- RAM bus width
- get rid of LBIOps/InstLen
- when is the microbus int cleared?
- CKO sync input
- save internal RAM when CKO is RAM power supply pin

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@ -127,7 +127,7 @@ typedef struct
void (*dac_w)(UINT16 data);
UINT16 *sound_data;
const device_config *device;
const address_space *program;
} cquestsnd_state;
@ -166,7 +166,7 @@ typedef struct
UINT8 wc;
UINT8 rc;
UINT8 clkcnt;
const device_config *device;
const address_space *program;
} cquestrot_state;
@ -210,7 +210,7 @@ typedef struct
UINT8 *ptr_ram;
UINT32 *e_stack;
UINT32 *o_stack;
const device_config *device;
const address_space *program;
@ -352,7 +352,7 @@ static CPU_INIT( cquestsnd )
cquestsnd.dac_w = _config->dac_w;
cquestsnd.sound_data = (UINT16*)memory_region(device->machine, _config->sound_data_region);
cquestsnd.device = device;
cquestsnd.program = memory_find_address_space(device, ADDRESS_SPACE_PROGRAM);

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@ -309,7 +309,7 @@ const drcbe_interface drcbe_c_be_interface =
static drcbe_state *drcbec_alloc(drcuml_state *drcuml, drccache *cache, const device_config *device, UINT32 flags, int modes, int addrbits, int ignorebits)
{
int spacenum;
/* allocate space in the cache for our state */
drcbe_state *drcbe = drccache_memory_alloc(cache, sizeof(*drcbe));
if (drcbe == NULL)

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@ -545,7 +545,7 @@ ADDRESS_MAP_END
CPU_GET_INFO( h8_3002 )
{
h83xx_state *h8 = (device != NULL) ? device->token : NULL;
h83xx_state *h8 = (device != NULL) ? device->token : NULL;
switch(state) {
// Interface functions and variables

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@ -47,11 +47,11 @@ INLINE void h8_mem_write16(h83xx_state *h8, offs_t address, UINT16 data)
INLINE UINT32 h8_mem_read32(h83xx_state *h8, offs_t address)
{
UINT32 result = memory_read_byte(h8->program, address) << 24;
result |= memory_read_byte(h8->program, address+1) << 16;
result |= memory_read_byte(h8->program, address+2) << 8;
result |= memory_read_byte(h8->program, address+1) << 16;
result |= memory_read_byte(h8->program, address+2) << 8;
result |= memory_read_byte(h8->program, address+3);
return result;
return result;
}
INLINE void h8_mem_write32(h83xx_state *h8, offs_t address, UINT32 data)
@ -521,7 +521,7 @@ ADDRESS_MAP_END
CPU_GET_INFO( h8_3334 )
{
h83xx_state *h8 = (device != NULL) ? device->token : NULL;
h83xx_state *h8 = (device != NULL) ? device->token : NULL;
switch(state) {
// Interface functions and variables

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@ -468,7 +468,7 @@ static void h8itu_3007_timer_expire(h83xx_state *h8, int tnum)
{
int base = 0x68 + (tnum*8);
UINT16 count;
count = (h8->per_regs[base + 0x2]<<8) | h8->per_regs[base + 0x3];
count++;

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@ -16,7 +16,7 @@ struct _h83xx_state
UINT32 h8err;
UINT32 regs[8];
UINT32 pc, ppc;
UINT32 h8_IRQrequestH, h8_IRQrequestL;
INT32 cyccnt;

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@ -12,7 +12,7 @@ HNZVC
*/
#define OP_HANDLER(_name) INLINE void _name (m68_state_t *m68_state)
#define OP_HANDLER(_name) INLINE void _name (m68_state_t *m68_state)
OP_HANDLER( illegal )
{

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@ -134,16 +134,16 @@ struct _m68_state_t
const device_config *device;
int icount;
PAIR ea; /* effective address */
/* Memory spaces */
const address_space *program;
UINT8 int_state; /* SYNC and CWAI flags */
UINT8 nmi_state;
UINT8 dummy_byte;
UINT8 *regTable[4];
UINT8 const *cycle_counts_page0;
UINT8 const *cycle_counts_page01;
UINT8 const *cycle_counts_page11;
@ -184,7 +184,7 @@ INLINE void fetch_effective_address( m68_state_t *m68_state );
#define pW m68_state->w
/* #define pQ m68_state->q */
/* #define pZ m68_state->z */
/* #define pZ m68_state->z */
#define PPC m68_state->ppc.w.l
#define PC m68_state->pc.w.l
@ -512,7 +512,7 @@ static STATE_POSTLOAD( hd6309_postload )
{
const device_config *device = param;
m68_state_t *m68_state = device->token;
UpdateState(m68_state);
}
@ -523,14 +523,14 @@ static STATE_POSTLOAD( hd6309_postload )
static CPU_INIT( hd6309 )
{
m68_state_t *m68_state = device->token;
m68_state->irq_callback = irqcallback;
m68_state->device = device;
m68_state->program = cpu_get_address_space(device, ADDRESS_SPACE_PROGRAM);
/* setup regtable */
m68_state->regTable[0] = &(CC);
m68_state->regTable[1] = &(A);
m68_state->regTable[2] = &(B);
@ -558,7 +558,7 @@ static CPU_INIT( hd6309 )
static CPU_RESET( hd6309 )
{
m68_state_t *m68_state = device->token;
m68_state->int_state = 0;
m68_state->nmi_state = CLEAR_LINE;
m68_state->irq_state[0] = CLEAR_LINE;
@ -642,7 +642,7 @@ static void set_irq_line(m68_state_t *m68_state, int irqline, int state)
static CPU_EXECUTE( hd6309 ) /* NS 970908 */
{
m68_state_t *m68_state = device->token;
m68_state->icount = cycles - m68_state->extra_cycles;
m68_state->extra_cycles = 0;
@ -1229,7 +1229,7 @@ INLINE void fetch_effective_address( m68_state_t *m68_state )
static CPU_SET_INFO( hd6309 )
{
m68_state_t *m68_state = device->token;
switch (state)
{
/* --- the following bits of info are set as 64-bit signed integers --- */

View File

@ -103,14 +103,14 @@
*****************************************************************************/
/*
Chip RAM ROM
---- --- ---
Chip RAM ROM
---- --- ---
8041 128 1k (ROM)
8741 128 1k (EPROM)
8042 256 2k (ROM)
8742 256 2k (EPROM)
http://cpucharts.wallsoferyx.net/icmatrix0.html
http://cpucharts.wallsoferyx.net/icmatrix0.html
*/
@ -839,7 +839,7 @@ static const UINT8 i8x41_cycles[] = {
static CPU_INIT( i8x41 )
{
upi41_state_t *upi41_state = device->token;
upi41_state->irq_callback = irqcallback;
upi41_state->device = device;
upi41_state->program = memory_find_address_space(device, ADDRESS_SPACE_PROGRAM);
@ -882,7 +882,7 @@ static CPU_INIT( i8042 )
static CPU_RESET( i8x41 )
{
upi41_state_t *upi41_state = device->token;
upi41_state->ppc = 0;
upi41_state->pc = 0;
upi41_state->timer = 0;
@ -891,7 +891,7 @@ static CPU_RESET( i8x41 )
upi41_state->psw = 0;
upi41_state->state = 0;
upi41_state->enable = 0;
ENABLE = IBFI | TCNTI;
DBBI = 0xff;
DBBO = 0xff;
@ -1103,7 +1103,7 @@ ADDRESS_MAP_END
static CPU_SET_INFO( i8x41 )
{
upi41_state_t *upi41_state = device->token;
switch (state)
{
/* --- the following bits of info are set as 64-bit signed integers --- */
@ -1195,7 +1195,7 @@ static CPU_SET_INFO( i8x41 )
CPU_GET_INFO( i8041 )
{
upi41_state_t *upi41_state = (device != NULL) ? device->token : NULL;
switch (state)
{
/* --- the following bits of info are returned as 64-bit signed integers --- */

File diff suppressed because it is too large Load Diff

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@ -361,7 +361,7 @@ static CPU_SET_CONTEXT( jaguar )
static void init_tables(void)
{
int i, j;
/* if we're not the first, skip */
if (table_refcount++ != 0)
{
@ -405,7 +405,7 @@ static STATE_POSTLOAD( jaguar_postload )
{
const device_config *device = param;
jaguar_state *jaguar = device->token;
update_register_banks(jaguar);
check_irqs(jaguar);
}
@ -498,7 +498,7 @@ static CPU_EXECUTE( jaguargpu )
do
{
UINT32 op;
/* debugging */
//if (jaguar->PC < 0xf03000 || jaguar->PC > 0xf04000) { fatalerror("GPU: jaguar->PC = %06X (ppc = %06X)", jaguar->PC, jaguar->ppc); }
jaguar->ppc = jaguar->PC;
@ -539,7 +539,7 @@ static CPU_EXECUTE( jaguardsp )
do
{
UINT32 op;
/* debugging */
//if (jaguar->PC < 0xf1b000 || jaguar->PC > 0xf1d000) { fatalerror(stderr, "DSP: jaguar->PC = %06X", jaguar->PC); }
jaguar->ppc = jaguar->PC;

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@ -312,7 +312,7 @@ INLINE void m37710i_interrupt_software(m37710i_cpu_struct *m37710i_cpu, uint vec
m37710i_set_flag_i(m37710i_cpu, IFLAG_SET);
REG_PB = 0;
m37710i_jump_16(m37710i_cpu, m37710i_read_16_normal(m37710i_cpu, vector));
}
}
/* ======================================================================== */
/* ========================== EFFECTIVE ADDRESSES ========================= */
@ -504,7 +504,7 @@ INLINE uint EA_DLIY(m37710i_cpu_struct *m37710i_cpu) {return OPER_24_D(m37710i_
INLINE uint EA_AXI(m37710i_cpu_struct *m37710i_cpu) {return read_16_AXI(MAKE_UINT_16(OPER_16_IMM(m37710i_cpu) + REG_X));}
INLINE uint EA_S(m37710i_cpu_struct *m37710i_cpu) {return MAKE_UINT_16(REG_S + OPER_8_IMM(m37710i_cpu));}
INLINE uint EA_SIY(m37710i_cpu_struct *m37710i_cpu) {return MAKE_UINT_16(read_16_SIY(REG_S + OPER_8_IMM(m37710i_cpu)) + REG_Y) | REG_DB;}
/* ======================================================================== */
/* =========================== OPERATION MACROS =========================== */

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@ -94,7 +94,7 @@ static void default_wdmem_id(const address_space *space, offs_t address, UINT8 d
static CPU_INIT( m65ce02 )
{
m65ce02_Regs *m65ce02 = device->token;
m65ce02->rdmem_id = default_rdmem_id;
m65ce02->wrmem_id = default_wdmem_id;
m65ce02->irq_callback = irqcallback;

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@ -13,7 +13,7 @@ HNZVC
*/
#define OP_HANDLER(_name) INLINE void _name (m68_state_t *m68_state)
#define OP_HANDLER(_name) INLINE void _name (m68_state_t *m68_state)
//OP_HANDLER( illegal )
OP_HANDLER( illegal )
@ -431,7 +431,7 @@ OP_HANDLER( mul )
{
UINT16 t;
t=A*B;
CLR_C;
CLR_C;
if(t&0x80) SEC;
D=t;
}
@ -1172,7 +1172,7 @@ OP_HANDLER( lda_di )
/* $97 STA direct -**0- */
OP_HANDLER( sta_di )
{
CLR_NZV;
CLR_NZV;
SET_NZ8(A);
DIRECT;
WM(EAD,A);
@ -1346,7 +1346,7 @@ OP_HANDLER( lda_ix )
/* $a7 STA indexed -**0- */
OP_HANDLER( sta_ix )
{
CLR_NZV;
CLR_NZV;
SET_NZ8(A);
INDEXED;
WM(EAD,A);
@ -1544,8 +1544,8 @@ OP_HANDLER( adca_ex )
UINT16 t,r;
EXTBYTE(t);
r = A+t+(CC&0x01);
CLR_HNZVC;
SET_FLAGS8(A,t,r);
CLR_HNZVC;
SET_FLAGS8(A,t,r);
SET_H(A,t,r);
A = r;
}
@ -1554,9 +1554,9 @@ OP_HANDLER( adca_ex )
OP_HANDLER( ora_ex )
{
UINT8 t;
EXTBYTE(t);
EXTBYTE(t);
A |= t;
CLR_NZV;
CLR_NZV;
SET_NZ8(A);
}
@ -1564,10 +1564,10 @@ OP_HANDLER( ora_ex )
OP_HANDLER( adda_ex )
{
UINT16 t,r;
EXTBYTE(t);
EXTBYTE(t);
r = A+t;
CLR_HNZVC;
SET_FLAGS8(A,t,r);
CLR_HNZVC;
SET_FLAGS8(A,t,r);
SET_H(A,t,r);
A = r;
}
@ -1581,7 +1581,7 @@ OP_HANDLER( cmpx_ex )
d = X;
r = d - b.d;
CLR_NZV;
SET_NZ16(r);
SET_NZ16(r);
SET_V16(d,b.d,r);
}
@ -1593,7 +1593,7 @@ OP_HANDLER( cpx_ex )
EXTWORD(b);
d = X;
r = d - b.d;
CLR_NZVC;
CLR_NZVC;
SET_FLAGS16(d,b.d,r);
}
@ -1626,9 +1626,9 @@ OP_HANDLER( sts_ex )
OP_HANDLER( subb_im )
{
UINT16 t,r;
IMMBYTE(t);
IMMBYTE(t);
r = B-t;
CLR_NZVC;
CLR_NZVC;
SET_FLAGS8(B,t,r);
B = r;
}
@ -1637,9 +1637,9 @@ OP_HANDLER( subb_im )
OP_HANDLER( cmpb_im )
{
UINT16 t,r;
IMMBYTE(t);
IMMBYTE(t);
r = B-t;
CLR_NZVC;
CLR_NZVC;
SET_FLAGS8(B,t,r);
}
@ -1647,9 +1647,9 @@ OP_HANDLER( cmpb_im )
OP_HANDLER( sbcb_im )
{
UINT16 t,r;
IMMBYTE(t);
IMMBYTE(t);
r = B-t-(CC&0x01);
CLR_NZVC;
CLR_NZVC;
SET_FLAGS8(B,t,r);
B = r;
}
@ -1671,9 +1671,9 @@ OP_HANDLER( addd_im )
OP_HANDLER( andb_im )
{
UINT8 t;
IMMBYTE(t);
IMMBYTE(t);
B &= t;
CLR_NZV;
CLR_NZV;
SET_NZ8(B);
}
@ -1681,7 +1681,7 @@ OP_HANDLER( andb_im )
OP_HANDLER( bitb_im )
{
UINT8 t,r;
IMMBYTE(t);
IMMBYTE(t);
r = B&t;
CLR_NZV;
SET_NZ8(r);
@ -1699,9 +1699,9 @@ OP_HANDLER( ldb_im )
/* $c7 STB immediate -**0- */
OP_HANDLER( stb_im )
{
CLR_NZV;
CLR_NZV;
SET_NZ8(B);
IMM8;
IMM8;
WM(EAD,B);
}
@ -1709,9 +1709,9 @@ OP_HANDLER( stb_im )
OP_HANDLER( eorb_im )
{
UINT8 t;
IMMBYTE(t);
IMMBYTE(t);
B ^= t;
CLR_NZV;
CLR_NZV;
SET_NZ8(B);
}
@ -1719,10 +1719,10 @@ OP_HANDLER( eorb_im )
OP_HANDLER( adcb_im )
{
UINT16 t,r;
IMMBYTE(t);
IMMBYTE(t);
r = B+t+(CC&0x01);
CLR_HNZVC;
SET_FLAGS8(B,t,r);
CLR_HNZVC;
SET_FLAGS8(B,t,r);
SET_H(B,t,r);
B = r;
}
@ -1731,9 +1731,9 @@ OP_HANDLER( adcb_im )
OP_HANDLER( orb_im )
{
UINT8 t;
IMMBYTE(t);
IMMBYTE(t);
B |= t;
CLR_NZV;
CLR_NZV;
SET_NZ8(B);
}
@ -1741,10 +1741,10 @@ OP_HANDLER( orb_im )
OP_HANDLER( addb_im )
{
UINT16 t,r;
IMMBYTE(t);
IMMBYTE(t);
r = B+t;
CLR_HNZVC;
SET_FLAGS8(B,t,r);
CLR_HNZVC;
SET_FLAGS8(B,t,r);
SET_H(B,t,r);
B = r;
}
@ -1788,9 +1788,9 @@ OP_HANDLER( stx_im )
OP_HANDLER( subb_di )
{
UINT16 t,r;
DIRBYTE(t);
DIRBYTE(t);
r = B-t;
CLR_NZVC;
CLR_NZVC;
SET_FLAGS8(B,t,r);
B = r;
}
@ -1799,9 +1799,9 @@ OP_HANDLER( subb_di )
OP_HANDLER( cmpb_di )
{
UINT16 t,r;
DIRBYTE(t);
DIRBYTE(t);
r = B-t;
CLR_NZVC;
CLR_NZVC;
SET_FLAGS8(B,t,r);
}
@ -1809,9 +1809,9 @@ OP_HANDLER( cmpb_di )
OP_HANDLER( sbcb_di )
{
UINT16 t,r;
DIRBYTE(t);
DIRBYTE(t);
r = B-t-(CC&0x01);
CLR_NZVC;
CLR_NZVC;
SET_FLAGS8(B,t,r);
B = r;
}
@ -1833,9 +1833,9 @@ OP_HANDLER( addd_di )
OP_HANDLER( andb_di )
{
UINT8 t;
DIRBYTE(t);
DIRBYTE(t);
B &= t;
CLR_NZV;
CLR_NZV;
SET_NZ8(B);
}
@ -1843,9 +1843,9 @@ OP_HANDLER( andb_di )
OP_HANDLER( bitb_di )
{
UINT8 t,r;
DIRBYTE(t);
DIRBYTE(t);
r = B&t;
CLR_NZV;
CLR_NZV;
SET_NZ8(r);
}
@ -1853,16 +1853,16 @@ OP_HANDLER( bitb_di )
OP_HANDLER( ldb_di )
{
DIRBYTE(B);
CLR_NZV;
CLR_NZV;
SET_NZ8(B);
}
/* $d7 STB direct -**0- */
OP_HANDLER( stb_di )
{
CLR_NZV;
CLR_NZV;
SET_NZ8(B);
DIRECT;
DIRECT;
WM(EAD,B);
}
@ -1870,9 +1870,9 @@ OP_HANDLER( stb_di )
OP_HANDLER( eorb_di )
{
UINT8 t;
DIRBYTE(t);
DIRBYTE(t);
B ^= t;
CLR_NZV;
CLR_NZV;
SET_NZ8(B);
}
@ -1880,10 +1880,10 @@ OP_HANDLER( eorb_di )
OP_HANDLER( adcb_di )
{
UINT16 t,r;
DIRBYTE(t);
DIRBYTE(t);
r = B+t+(CC&0x01);
CLR_HNZVC;
SET_FLAGS8(B,t,r);
CLR_HNZVC;
SET_FLAGS8(B,t,r);
SET_H(B,t,r);
B = r;
}
@ -1892,9 +1892,9 @@ OP_HANDLER( adcb_di )
OP_HANDLER( orb_di )
{
UINT8 t;
DIRBYTE(t);
DIRBYTE(t);
B |= t;
CLR_NZV;
CLR_NZV;
SET_NZ8(B);
}
@ -1902,10 +1902,10 @@ OP_HANDLER( orb_di )
OP_HANDLER( addb_di )
{
UINT16 t,r;
DIRBYTE(t);
DIRBYTE(t);
r = B+t;
CLR_HNZVC;
SET_FLAGS8(B,t,r);
CLR_HNZVC;
SET_FLAGS8(B,t,r);
SET_H(B,t,r);
B = r;
}
@ -1948,9 +1948,9 @@ OP_HANDLER( stx_di )
OP_HANDLER( subb_ix )
{
UINT16 t,r;
IDXBYTE(t);
IDXBYTE(t);
r = B-t;
CLR_NZVC;
CLR_NZVC;
SET_FLAGS8(B,t,r);
B = r;
}
@ -1959,9 +1959,9 @@ OP_HANDLER( subb_ix )
OP_HANDLER( cmpb_ix )
{
UINT16 t,r;
IDXBYTE(t);
IDXBYTE(t);
r = B-t;
CLR_NZVC;
CLR_NZVC;
SET_FLAGS8(B,t,r);
}
@ -1969,9 +1969,9 @@ OP_HANDLER( cmpb_ix )
OP_HANDLER( sbcb_ix )
{
UINT16 t,r;
IDXBYTE(t);
IDXBYTE(t);
r = B-t-(CC&0x01);
CLR_NZVC;
CLR_NZVC;
SET_FLAGS8(B,t,r);
B = r;
}
@ -1993,9 +1993,9 @@ OP_HANDLER( addd_ix )
OP_HANDLER( andb_ix )
{
UINT8 t;
IDXBYTE(t);
IDXBYTE(t);
B &= t;
CLR_NZV;
CLR_NZV;
SET_NZ8(B);
}
@ -2003,9 +2003,9 @@ OP_HANDLER( andb_ix )
OP_HANDLER( bitb_ix )
{
UINT8 t,r;
IDXBYTE(t);
IDXBYTE(t);
r = B&t;
CLR_NZV;
CLR_NZV;
SET_NZ8(r);
}
@ -2013,16 +2013,16 @@ OP_HANDLER( bitb_ix )
OP_HANDLER( ldb_ix )
{
IDXBYTE(B);
CLR_NZV;
CLR_NZV;
SET_NZ8(B);
}
/* $e7 STB indexed -**0- */
OP_HANDLER( stb_ix )
{
CLR_NZV;
CLR_NZV;
SET_NZ8(B);
INDEXED;
INDEXED;
WM(EAD,B);
}
@ -2030,9 +2030,9 @@ OP_HANDLER( stb_ix )
OP_HANDLER( eorb_ix )
{
UINT8 t;
IDXBYTE(t);
IDXBYTE(t);
B ^= t;
CLR_NZV;
CLR_NZV;
SET_NZ8(B);
}
@ -2040,10 +2040,10 @@ OP_HANDLER( eorb_ix )
OP_HANDLER( adcb_ix )
{
UINT16 t,r;
IDXBYTE(t);
IDXBYTE(t);
r = B+t+(CC&0x01);
CLR_HNZVC;
SET_FLAGS8(B,t,r);
CLR_HNZVC;
SET_FLAGS8(B,t,r);
SET_H(B,t,r);
B = r;
}
@ -2052,9 +2052,9 @@ OP_HANDLER( adcb_ix )
OP_HANDLER( orb_ix )
{
UINT8 t;
IDXBYTE(t);
IDXBYTE(t);
B |= t;
CLR_NZV;
CLR_NZV;
SET_NZ8(B);
}
@ -2062,10 +2062,10 @@ OP_HANDLER( orb_ix )
OP_HANDLER( addb_ix )
{
UINT16 t,r;
IDXBYTE(t);
IDXBYTE(t);
r = B+t;
CLR_HNZVC;
SET_FLAGS8(B,t,r);
CLR_HNZVC;
SET_FLAGS8(B,t,r);
SET_H(B,t,r);
B = r;
}
@ -2082,10 +2082,10 @@ OP_HANDLER( ldd_ix )
OP_HANDLER( adcx_im )
{
UINT16 t,r;
IMMBYTE(t);
IMMBYTE(t);
r = X+t+(CC&0x01);
CLR_HNZVC;
SET_FLAGS8(X,t,r);
CLR_HNZVC;
SET_FLAGS8(X,t,r);
SET_H(X,t,r);
X = r;
}
@ -2120,9 +2120,9 @@ OP_HANDLER( stx_ix )
OP_HANDLER( subb_ex )
{
UINT16 t,r;
EXTBYTE(t);
EXTBYTE(t);
r = B-t;
CLR_NZVC;
CLR_NZVC;
SET_FLAGS8(B,t,r);
B = r;
}
@ -2131,9 +2131,9 @@ OP_HANDLER( subb_ex )
OP_HANDLER( cmpb_ex )
{
UINT16 t,r;
EXTBYTE(t);
EXTBYTE(t);
r = B-t;
CLR_NZVC;
CLR_NZVC;
SET_FLAGS8(B,t,r);
}
@ -2141,9 +2141,9 @@ OP_HANDLER( cmpb_ex )
OP_HANDLER( sbcb_ex )
{
UINT16 t,r;
EXTBYTE(t);
EXTBYTE(t);
r = B-t-(CC&0x01);
CLR_NZVC;
CLR_NZVC;
SET_FLAGS8(B,t,r);
B = r;
}
@ -2192,9 +2192,9 @@ OP_HANDLER( ldb_ex )
/* $f7 STB extended -**0- */
OP_HANDLER( stb_ex )
{
CLR_NZV;
CLR_NZV;
SET_NZ8(B);
EXTENDED;
EXTENDED;
WM(EAD,B);
}
@ -2202,9 +2202,9 @@ OP_HANDLER( stb_ex )
OP_HANDLER( eorb_ex )
{
UINT8 t;
EXTBYTE(t);
EXTBYTE(t);
B ^= t;
CLR_NZV;
CLR_NZV;
SET_NZ8(B);
}
@ -2214,8 +2214,8 @@ OP_HANDLER( adcb_ex )
UINT16 t,r;
EXTBYTE(t);
r = B+t+(CC&0x01);
CLR_HNZVC;
SET_FLAGS8(B,t,r);
CLR_HNZVC;
SET_FLAGS8(B,t,r);
SET_H(B,t,r);
B = r;
}
@ -2224,9 +2224,9 @@ OP_HANDLER( adcb_ex )
OP_HANDLER( orb_ex )
{
UINT8 t;
EXTBYTE(t);
EXTBYTE(t);
B |= t;
CLR_NZV;
CLR_NZV;
SET_NZ8(B);
}
@ -2234,10 +2234,10 @@ OP_HANDLER( orb_ex )
OP_HANDLER( addb_ex )
{
UINT16 t,r;
EXTBYTE(t);
EXTBYTE(t);
r = B+t;
CLR_HNZVC;
SET_FLAGS8(B,t,r);
CLR_HNZVC;
SET_FLAGS8(B,t,r);
SET_H(B,t,r);
B = r;
}

View File

@ -113,12 +113,12 @@ struct _m68_state_t
cpu_irq_callback irq_callback;
const device_config *device;
/* Memory spaces */
const address_space *program;
const address_space *data;
const address_space *io;
int extra_cycles; /* cycles used for interrupts */
void (* const * insn)(m68_state_t *); /* instruction table */
const UINT8 *cycles; /* clock cycle of instruction table */
@ -581,19 +581,19 @@ static void m6800_check_irq2(m68_state_t *m68_state)
/* check the IRQ lines for pending interrupts */
INLINE void CHECK_IRQ_LINES(m68_state_t *m68_state)
{
if( !(CC & 0x10) )
{
if( m68_state->irq_state[M6800_IRQ_LINE] != CLEAR_LINE )
{ /* standard IRQ */
enter_interrupt(m68_state, "M6800#%d take IRQ1n",0xfff8);
if( m68_state->irq_callback )
(void)(*m68_state->irq_callback)(m68_state->device, M6800_IRQ_LINE);
}
else
m6800_check_irq2(m68_state);
}
INLINE void CHECK_IRQ_LINES(m68_state_t *m68_state)
{
if( !(CC & 0x10) )
{
if( m68_state->irq_state[M6800_IRQ_LINE] != CLEAR_LINE )
{ /* standard IRQ */
enter_interrupt(m68_state, "M6800#%d take IRQ1n",0xfff8);
if( m68_state->irq_callback )
(void)(*m68_state->irq_callback)(m68_state->device, M6800_IRQ_LINE);
}
else
m6800_check_irq2(m68_state);
}
}
/* check OCI or TOI */
@ -627,8 +627,8 @@ static void check_timer_event(m68_state_t *m68_state)
}
INLINE void increment_counter(m68_state_t *m68_state, int amount)
{
m68_state->icount -= amount;
{
m68_state->icount -= amount;
CTD += amount;
if( CTD >= timer_next)
check_timer_event(m68_state);
@ -736,7 +736,7 @@ static TIMER_CALLBACK(m6800_tx_tick)
static TIMER_CALLBACK(m6800_rx_tick)
{
m68_state_t *m68_state =ptr;
cpu_push_context(m68_state->device);
if (m68_state->trcsr & M6800_TRCSR_RE)
{
@ -901,7 +901,7 @@ static CPU_INIT( m6800 )
static CPU_RESET( m6800 )
{
m68_state_t *m68_state = device->token;
SEI; /* IRQ disabled */
PCD = RM16(m68_state, 0xfffe );
@ -953,7 +953,7 @@ static CPU_GET_CONTEXT( m6800 )
static CPU_SET_CONTEXT( m6800 )
{
m68_state_t *m68_state = src;
CHECK_IRQ_LINES(m68_state); /* HJB 990417 */
}
@ -1706,7 +1706,7 @@ static CPU_INIT( m6808 )
m68_state->cycles = cycles_6800;
m68_state->irq_callback = irqcallback;
m68_state->device = device;
m68_state->program = cpu_get_address_space(device, ADDRESS_SPACE_PROGRAM);
m68_state->data = cpu_get_address_space(device, ADDRESS_SPACE_DATA);
m68_state->io = cpu_get_address_space(device, ADDRESS_SPACE_IO);

View File

@ -28,7 +28,7 @@ enum
/* are set to the value returned by a read from the same port. If you need to */
/* know the DDR for e.g. port 1, do m6803_internal_registers_r(M6801_DDR1) */
enum
enum
{
M6803_DDR1 = 0x00,
M6803_DDR2 = 0x01,

View File

@ -600,7 +600,7 @@ struct _m68ki_cpu_core
m68k_memory_interface memory;
offs_t encrypted_start;
offs_t encrypted_end;
/* save state data */
UINT16 save_sr;
UINT8 save_stopped;

View File

@ -13,9 +13,9 @@ HNZC
*/
#define OP_HANDLER(_name) INLINE void _name (void /*m68_state_t *m68_state*/)
#define OP_HANDLER(_name) INLINE void _name (void /*m68_state_t *m68_state*/)
#define OP_HANDLER_BIT(_name) INLINE void _name (/*m68_state_t *m68_state,*/ UINT8 bit)
#define OP_HANDLER_BIT(_name) INLINE void _name (/*m68_state_t *m68_state,*/ UINT8 bit)
OP_HANDLER( illegal )
{
@ -221,9 +221,9 @@ OP_HANDLER( neg_di )
OP_HANDLER( com_di )
{
UINT8 t;
DIRBYTE(t);
DIRBYTE(t);
t = ~t;
CLR_NZ;
CLR_NZ;
SET_NZ8(t);
SEC;
WM(EAD,t);

View File

@ -395,7 +395,7 @@ static void (*const m6809_main[0x100])(m68_state_t *) = {
/* 0x9X */ suba_di,cmpa_di,sbca_di,subd_di,anda_di,bita_di,lda_di, sta_di,
eora_di,adca_di,ora_di, adda_di,cmpx_di,jsr_di, ldx_di, stx_di,
/* 0xAX */ suba_ix,cmpa_ix,sbca_ix,subd_ix,anda_ix,bita_ix,lda_ix, sta_ix,
/* 0xAX */ suba_ix,cmpa_ix,sbca_ix,subd_ix,anda_ix,bita_ix,lda_ix, sta_ix,
eora_ix,adca_ix,ora_ix, adda_ix,cmpx_ix,jsr_ix, ldx_ix, stx_ix,
/* 0xBX */ suba_ex,cmpa_ex,sbca_ex,subd_ex,anda_ex,bita_ex,lda_ex, sta_ex,

View File

@ -95,13 +95,13 @@ struct _m68_state_t
UINT8 cc;
UINT8 ireg; /* First opcode */
UINT8 irq_state[2];
int extra_cycles; /* cycles used up by interrupts */
cpu_irq_callback irq_callback;
const device_config *device;
const m6809_config *config;
int icount;
PAIR ea; /* effective address */
PAIR ea; /* effective address */
/* Memory spaces */
const address_space *program;

View File

@ -45,7 +45,7 @@ typedef struct
UINT32 gpr[16];
UINT32 extport[0x30];
const device_config *device;
const address_space *program;

View File

@ -94,7 +94,7 @@ struct _mcs48_state
cpu_irq_callback irq_callback;
const device_config *device;
int icount;
/* Memory spaces */
const address_space *program;
const address_space *data;

View File

@ -287,7 +287,7 @@ struct _mcs51_state_t
const address_space *program;
const address_space *data;
const address_space *io;
/* Serial Port TX/RX Callbacks */
// TODO: Move to special port r/w
void (*serial_tx_callback)(int data); //Call back funciton when sending data out of serial port
@ -2060,7 +2060,7 @@ static CPU_INIT( mcs51 )
mcs51_state->program = cpu_get_address_space(device, ADDRESS_SPACE_PROGRAM);
mcs51_state->data = cpu_get_address_space(device, ADDRESS_SPACE_DATA);
mcs51_state->io = cpu_get_address_space(device, ADDRESS_SPACE_IO);
mcs51_state->features = FEATURE_NONE;
mcs51_state->ram_mask = 0x7F; /* 128 bytes of ram */
mcs51_state->num_interrupts = 5; /* 5 interrupts */
@ -2068,7 +2068,7 @@ static CPU_INIT( mcs51 )
mcs51_state->sfr_write = mcs51_sfr_write;
/* Save states */
state_save_register_item("mcs51", device->tag, 0, mcs51_state->ppc);
state_save_register_item("mcs51", device->tag, 0, mcs51_state->pc);
state_save_register_item("mcs51", device->tag, 0, mcs51_state->rwm );

View File

@ -1622,7 +1622,7 @@ static void mips_state_register( const char *type, const device_config *device )
static CPU_INIT( psxcpu )
{
psxcpu_state *psxcpu = device->token;
// psxcpu->intf = (psxcpu_interface *) device->static_config;
// psxcpu->intf = (psxcpu_interface *) device->static_config;
psxcpu->irq_callback = irqcallback;
psxcpu->device = device;

View File

@ -693,7 +693,7 @@ INLINE void handle_cop3(r3000_state *r3000, UINT32 op)
static CPU_EXECUTE( r3000 )
{
r3000_state *r3000 = device->token;
/* count cycles and interrupt cycles */
r3000->icount = cycles;
r3000->icount -= r3000->interrupt_cycles;

View File

@ -140,8 +140,8 @@ typedef struct
} memory_interface;
typedef struct _nec_state_t nec_state_t;
struct _nec_state_t
typedef struct _nec_state_t nec_state_t;
struct _nec_state_t
{
necbasicregs regs;
UINT16 sregs[4];
@ -1090,7 +1090,7 @@ static void set_poll_line(nec_state_t *nec_state, int state)
static CPU_DISASSEMBLE( nec )
{
nec_state_t *nec_state = device->token;
return necv_dasm_one(buffer, pc, oprom, nec_state->config);
}
@ -1220,7 +1220,7 @@ static CPU_EXECUTE( necv )
static CPU_INIT( v20 )
{
nec_state_t *nec_state = device->token;
nec_init(device, index, clock, irqcallback, 0);
configure_memory_8bit(nec_state);
nec_state->chip_type=V20;
@ -1233,7 +1233,7 @@ static CPU_INIT( v20 )
static CPU_INIT( v30 )
{
nec_state_t *nec_state = device->token;
nec_init(device, index, clock, irqcallback, 1);
configure_memory_16bit(nec_state);
nec_state->chip_type=V30;
@ -1247,7 +1247,7 @@ static CPU_INIT( v30 )
static CPU_INIT( v33 )
{
nec_state_t *nec_state = device->token;
nec_init(device, index, clock, irqcallback, 2);
nec_state->chip_type=V33;
nec_state->prefetch_size = 6; /* ???? */
@ -1266,7 +1266,7 @@ static CPU_INIT( v33 )
static CPU_SET_INFO( nec )
{
nec_state_t *nec_state = device->token;
switch (state)
{
/* --- the following bits of info are set as 64-bit signed integers --- */

View File

@ -420,7 +420,7 @@ typedef struct
/* 1 for 16-line sequence break system, 0 for default break system */
int type_20_sbs;
const device_config *device;
const address_space *program;
}

View File

@ -8,13 +8,13 @@ static int y;
INLINE void ea (void)
{
/* while (1)
{
if (ib == 0)
return;
ib = (READ_PDP_18BIT (y) >> 12) & 1;
y = READ_PDP_18BIT (y) & 07777;
}*/
/* while (1)
{
if (ib == 0)
return;
ib = (READ_PDP_18BIT (y) >> 12) & 1;
y = READ_PDP_18BIT (y) & 07777;
}*/
}
#define IN if (ib) sprintf(buffer+strlen(buffer)," i")

View File

@ -73,7 +73,7 @@ typedef struct
void (*sel_handler)(void);
/* called when reset line is pulsed: IO devices should reset */
void (*io_reset_callback)(void);
const device_config *device;
const address_space *program;
}
@ -145,7 +145,7 @@ static void tx0_init_common(int is_64kw, const device_config *device, int index,
tx0.address_mask = is_64kw ? ADDRESS_MASK_64KW : ADDRESS_MASK_8KW;
tx0.ir_mask = is_64kw ? 03 : 037;
tx0.device = device;
tx0.program = memory_find_address_space(device, ADDRESS_SPACE_PROGRAM);
}

View File

@ -38,7 +38,7 @@ struct _s2650_regs {
UINT8 ir; /* instruction register */
UINT16 ras[8]; /* 8 return address stack entries */
UINT8 irq_state;
int icount;
cpu_irq_callback irq_callback;
const device_config *device;
@ -760,7 +760,7 @@ static void BRA_EA(void) _BRA_EA()
static CPU_INIT( s2650 )
{
s2650_regs *s2650c = device->token;
s2650c->irq_callback = irqcallback;
s2650c->device = device;
s2650c->program = memory_find_address_space(device, ADDRESS_SPACE_PROGRAM);
@ -783,7 +783,7 @@ static CPU_INIT( s2650 )
static CPU_RESET( s2650 )
{
s2650_regs *s2650c = device->token;
s2650c->ppc = 0;
s2650c->page = 0,
s2650c->iar = 0;
@ -860,7 +860,7 @@ static int s2650_get_sense(s2650_regs *s2650c)
static CPU_EXECUTE( s2650 )
{
s2650_regs *s2650c = device->token;
s2650c->icount = cycles;
do
{
@ -1479,7 +1479,7 @@ static CPU_EXECUTE( s2650 )
static CPU_SET_INFO( s2650 )
{
s2650_regs *s2650c = device->token;
switch (state)
{
/* --- the following bits of info are set as 64-bit signed integers --- */

View File

@ -52,7 +52,7 @@ typedef struct
int carry, zero;
struct { int t2ms, t512ms; int count;} timer;
const device_config *device;
const address_space *program;
} SC61860_Regs;

View File

@ -49,7 +49,7 @@ struct _ssp1601_state_t
PAIR ppc;
int g_cycles;
const device_config *device;
const address_space *program;
const address_space *io;
@ -503,7 +503,7 @@ static UINT32 ptr2_read(ssp1601_state_t *ssp1601_state, int op)
static CPU_INIT( ssp1601 )
{
ssp1601_state_t *ssp1601_state = device->token;
state_save_register_item(CHIP_NAME, device->tag, 0, rX);
state_save_register_item(CHIP_NAME, device->tag, 0, rY);
state_save_register_item(CHIP_NAME, device->tag, 0, rA32);

View File

@ -92,7 +92,7 @@ typedef struct /* Page 3-6 shows all registers */
/********************** Status data ****************************/
PAIR opcode;
int INTF; /* Pending Interrupt flag */
const device_config *device;
const address_space *program;
const address_space *data;
@ -730,7 +730,7 @@ static CPU_INIT( tms32010 )
state_save_register_item("tms32010", device->tag, 0, R.STACK[3]);
state_save_register_item("tms32010", device->tag, 0, R.INTF);
state_save_register_item("tms32010", device->tag, 0, R.opcode.d);
R.device = device;
R.program = memory_find_address_space(device, ADDRESS_SPACE_PROGRAM);
R.data = memory_find_address_space(device, ADDRESS_SPACE_DATA);

View File

@ -1290,8 +1290,8 @@ WRITE16_HANDLER( tms34010_io_register_w )
break;
}
// if (LOG_CONTROL_REGS)
// logerror("CPU#%d@%08X: %s = %04X (%d)\n", cpunum, cpu_get_pc(space->cpu), ioreg_name[offset], IOREG(tms, offset), video_screen_get_vpos(tms->screen));
// if (LOG_CONTROL_REGS)
// logerror("CPU#%d@%08X: %s = %04X (%d)\n", cpunum, cpu_get_pc(space->cpu), ioreg_name[offset], IOREG(tms, offset), video_screen_get_vpos(tms->screen));
}
@ -1327,8 +1327,8 @@ WRITE16_HANDLER( tms34020_io_register_w )
oldreg = IOREG(tms, offset);
IOREG(tms, offset) = data;
// if (LOG_CONTROL_REGS)
// logerror("CPU#%d@%08X: %s = %04X (%d)\n", cpunum, cpu_get_pc(space->cpu), ioreg020_name[offset], IOREG(tms, offset), video_screen_get_vpos(tms->screen));
// if (LOG_CONTROL_REGS)
// logerror("CPU#%d@%08X: %s = %04X (%d)\n", cpunum, cpu_get_pc(space->cpu), ioreg020_name[offset], IOREG(tms, offset), video_screen_get_vpos(tms->screen));
switch (offset)
{
@ -1486,8 +1486,8 @@ READ16_HANDLER( tms34010_io_register_r )
tms34010_state *tms = space->cpu->token;
int result, total;
// if (LOG_CONTROL_REGS)
// logerror("CPU#%d@%08X: read %s\n", cpunum, cpu_get_pc(space->cpu), ioreg_name[offset]);
// if (LOG_CONTROL_REGS)
// logerror("CPU#%d@%08X: read %s\n", cpunum, cpu_get_pc(space->cpu), ioreg_name[offset]);
switch (offset)
{
@ -1529,8 +1529,8 @@ READ16_HANDLER( tms34020_io_register_r )
tms34010_state *tms = space->cpu->token;
int result, total;
// if (LOG_CONTROL_REGS)
// logerror("CPU#%d@%08X: read %s\n", cpunum, cpu_get_pc(space->cpu), ioreg_name[offset]);
// if (LOG_CONTROL_REGS)
// logerror("CPU#%d@%08X: read %s\n", cpunum, cpu_get_pc(space->cpu), ioreg_name[offset]);
switch (offset)
{

View File

@ -63,7 +63,7 @@ struct _cpu_class_data
{
/* this item must remain first */
cpu_class_header header; /* header containing public data */
/* core interface */
int * icount; /* pointer to the icount */
@ -78,7 +78,7 @@ struct _cpu_class_data
UINT8 nexteatcycles; /* pending value */
INT32 trigger; /* pending trigger to release a trigger suspension */
INT32 inttrigger; /* interrupt trigger index */
/* clock and timing information */
UINT64 totalcycles; /* total CPU cycles executed */
attotime localtime; /* local time, relative to the timer system's global time */
@ -131,7 +131,7 @@ static void register_save_states(const device_config *device);
***************************************************************************/
/*-------------------------------------------------
get_safe_classtoken - makes sure that the
get_safe_classtoken - makes sure that the
passed in device is, in fact, a CPU, and
return the class token
-------------------------------------------------*/
@ -186,7 +186,7 @@ const device_config *cpuexec_create_cpu_device(const cpu_config *config)
device->class = DEVICE_CLASS_CPU_CHIP;
device->inline_config = (void *)config;
device->static_config = config->reset_param;
return device;
}
@ -214,10 +214,10 @@ void cpuexec_init(running_machine *machine)
/* allocate memory for our class state */
classdata = auto_malloc(sizeof(*classdata));
memset(classdata, 0, sizeof(*classdata));
/* fill in the header */
classdata->header = *cputype_get_header_template(cputype);
/* make the device run */
device->started = FALSE;
device->machine = machine;
@ -226,7 +226,7 @@ void cpuexec_init(running_machine *machine)
device->token = auto_malloc(cputype_get_context_size(cputype));
memset(device->token, 0, cputype_get_context_size(cputype));
device->classtoken = classdata;
/* fill in the input states and IRQ callback information */
for (line = 0; line < ARRAY_LENGTH(classdata->input); line++)
{
@ -235,15 +235,15 @@ void cpuexec_init(running_machine *machine)
inputline->curstate = CLEAR_LINE;
inputline->qindex = 0;
}
/* fill in the suspend states */
classdata->suspend = SUSPEND_REASON_RESET;
classdata->inttrigger = cpunum + TRIGGER_INT;
/* fill in the clock and timing information */
classdata->clock = (UINT64)config->clock * classdata->header.clock_multiplier / classdata->header.clock_divider;
classdata->clockscale = 1.0;
/* allocate timers if we need them */
if (config->vblank_interrupts_per_frame > 1)
classdata->partial_frame_timer = timer_alloc(trigger_partial_frame_interrupt, device);
@ -266,7 +266,7 @@ void cpuexec_init(running_machine *machine)
inputline->curvector = inputline->vector;
}
update_clock_information(device);
/* if no state registered for saving, we can't save */
if (num_regs == 0)
{
@ -447,7 +447,7 @@ void cpuexec_timeslice(running_machine *machine)
/*-------------------------------------------------
cpuexec_boost_interleave - temporarily boosts
cpuexec_boost_interleave - temporarily boosts
the interleave factor
-------------------------------------------------*/
@ -461,18 +461,18 @@ void cpuexec_boost_interleave(running_machine *machine, attotime timeslice_time,
/*-------------------------------------------------
cputag_get_cpu - return a pointer to the given
cputag_get_cpu - return a pointer to the given
CPU by tag
-------------------------------------------------*/
const device_config *cputag_get_cpu(running_machine *machine, const char *tag)
{
int cpunum;
for (cpunum = 0; cpunum < ARRAY_LENGTH(machine->cpu); cpunum++)
if (machine->cpu[cpunum] != NULL && strcmp(tag, machine->cpu[cpunum]->tag) == 0)
return machine->cpu[cpunum];
return NULL;
}
@ -490,11 +490,11 @@ const device_config *cputag_get_cpu(running_machine *machine, const char *tag)
void cpu_suspend(const device_config *device, int reason, int eatcycles)
{
cpu_class_data *classdata = get_safe_classtoken(device);
/* set the suspend reason and eat cycles flag */
classdata->nextsuspend |= reason;
classdata->nexteatcycles = eatcycles;
/* if we're active, synchronize */
if (device == device->machine->activecpu)
cpu_abort_timeslice(device);
@ -528,7 +528,7 @@ void cpu_resume(const device_config *device, int reason)
int cpu_is_suspended(const device_config *device, int reason)
{
cpu_class_data *classdata = get_safe_classtoken(device);
/* return true if the given reason is indicated */
return ((classdata->nextsuspend & reason) != 0);
}
@ -658,7 +658,7 @@ void cpu_eat_cycles(const device_config *device, int cycles)
/*-------------------------------------------------
cpu_adjust_icount - apply a +/- to the current
cpu_adjust_icount - apply a +/- to the current
icount
-------------------------------------------------*/
@ -702,7 +702,7 @@ void cpu_abort_timeslice(const device_config *device)
***************************************************************************/
/*-------------------------------------------------
cpu_yield - yield the given CPU until the end
cpu_yield - yield the given CPU until the end
of the current timeslice
-------------------------------------------------*/
@ -762,7 +762,7 @@ void cpu_spinuntil_time(const device_config *device, attotime duration)
/* suspend until the given trigger fires */
suspend_until_trigger(device, TRIGGER_SUSPENDTIME + timetrig, TRUE);
/* then set a timer for it */
cpuexec_triggertime(device->machine, TRIGGER_SUSPENDTIME + timetrig, duration);
timetrig = (timetrig + 1) % 256;
@ -790,7 +790,7 @@ void cpuexec_trigger(running_machine *machine, int trigger)
for (cpunum = 0; cpunum < ARRAY_LENGTH(machine->cpu) && machine->cpu[cpunum] != NULL; cpunum++)
{
cpu_class_data *classdata = machine->cpu[cpunum]->classtoken;
/* see if this is a matching trigger */
if (classdata->suspend != 0 && classdata->trigger == trigger)
{
@ -820,7 +820,7 @@ void cpuexec_triggertime(running_machine *machine, int trigger, attotime duratio
void cpu_triggerint(const device_config *device)
{
cpu_class_data *classdata = get_safe_classtoken(device);
/* signal this CPU's interrupt trigger */
cpuexec_trigger(device->machine, classdata->inttrigger);
}
@ -832,8 +832,8 @@ void cpu_triggerint(const device_config *device)
***************************************************************************/
/*-------------------------------------------------
cpu_set_input_line - set the logical state
(ASSERT_LINE/CLEAR_LINE) of an input line
cpu_set_input_line - set the logical state
(ASSERT_LINE/CLEAR_LINE) of an input line
on a CPU
-------------------------------------------------*/
@ -846,8 +846,8 @@ void cpu_set_input_line(const device_config *device, int line, int state)
/*-------------------------------------------------
cpu_set_input_line_vector - set the vector to
be returned during a CPU's interrupt
cpu_set_input_line_vector - set the vector to
be returned during a CPU's interrupt
acknowledge cycle
-------------------------------------------------*/
@ -864,8 +864,8 @@ void cpu_set_input_line_vector(const device_config *device, int line, int vector
/*-------------------------------------------------
cpu_set_input_line_and_vector - set the logical
state (ASSERT_LINE/CLEAR_LINE) of an input
cpu_set_input_line_and_vector - set the logical
state (ASSERT_LINE/CLEAR_LINE) of an input
line on a CPU and its associated vector
-------------------------------------------------*/
@ -1236,7 +1236,7 @@ static TIMER_CALLBACK( triggertime_callback )
/*-------------------------------------------------
empty_event_queue - empty a CPU's event queue
empty_event_queue - empty a CPU's event queue
for a specific input line
-------------------------------------------------*/
@ -1375,7 +1375,7 @@ static void register_save_states(const device_config *device)
{
cpu_class_data *classdata = device->classtoken;
int line;
state_save_register_item("cpu", device->tag, 0, classdata->suspend);
state_save_register_item("cpu", device->tag, 0, classdata->nextsuspend);
state_save_register_item("cpu", device->tag, 0, classdata->eatcycles);

View File

@ -201,8 +201,8 @@ void cpu_set_irq_callback(const device_config *cpu, cpu_irq_callback callback);
***************************************************************************/
/*-------------------------------------------------
cputag_set_input_line - set the logical state
(ASSERT_LINE/CLEAR_LINE) of an input line
cputag_set_input_line - set the logical state
(ASSERT_LINE/CLEAR_LINE) of an input line
on a CPU specified by machine/tag
-------------------------------------------------*/
@ -213,8 +213,8 @@ INLINE void cputag_set_input_line(running_machine *machine, const char *tag, int
/*-------------------------------------------------
cputag_set_input_line_and_vector - set the
logical state (ASSERT_LINE/CLEAR_LINE) of an
cputag_set_input_line_and_vector - set the
logical state (ASSERT_LINE/CLEAR_LINE) of an
input line on a CPU and its associated vector
-------------------------------------------------*/

View File

@ -392,12 +392,12 @@ int debug_command_parameter_cpu(running_machine *machine, const char *param, con
{
UINT64 cpunum;
EXPRERR err;
/* first look for a tag match */
*result = cputag_get_cpu(machine, param);
if (*result != NULL)
return TRUE;
/* then evaluate as an expression; on an error assume it was a tag */
err = expression_evaluate(param, debug_cpu_get_visible_symtable(machine), &debug_expression_callbacks, machine, &cpunum);
if (err != EXPRERR_NONE)
@ -405,14 +405,14 @@ int debug_command_parameter_cpu(running_machine *machine, const char *param, con
debug_console_printf("Unable to find CPU '%s'\n", param);
return FALSE;
}
/* if out of range, complain */
if (cpunum >= ARRAY_LENGTH(machine->cpu) || machine->cpu[cpunum] == NULL)
{
debug_console_printf("Invalid CPU index %d\n", (UINT32) ((FPTR)*result));
return FALSE;
}
*result = machine->cpu[cpunum];
return TRUE;
}
@ -907,7 +907,7 @@ static void execute_observe(running_machine *machine, int ref, int params, const
{
if (buflen == 0)
buflen += sprintf(&buffer[buflen], "Currently observing CPU %d", cpunum);
else
else
buflen += sprintf(&buffer[buflen], ",%d", cpunum);
}
}
@ -2140,7 +2140,7 @@ static void execute_symlist(running_machine *machine, int ref, int params, const
/* validate parameters */
if (params > 0 && !debug_command_parameter_cpu(machine, param[0], &cpu))
return;
if (cpu != NULL)
{
symtable = debug_cpu_get_symtable(cpu);

View File

@ -104,7 +104,7 @@ static void debug_comment_free(void);
int debug_comment_init(running_machine *machine)
{
int numcpu;
for (numcpu = 0; numcpu < ARRAY_LENGTH(machine->cpu); numcpu++)
if (machine->cpu[numcpu] == NULL)
break;

View File

@ -195,7 +195,7 @@ void debug_cpu_init(running_machine *machine)
const device_config *cpu = machine->cpu[cpunum];
cpu_class_header *classheader = cpu->classtoken;
cpu_debug_data *info;
/* allocate some information */
info = auto_malloc(sizeof(*info));
memset(info, 0, sizeof(*info));
@ -287,7 +287,7 @@ void debug_cpu_init(running_machine *machine)
spaceinfo->logbytemask = ((spaceinfo->logaddrmask << spaceinfo->addr2byte_lshift) | ((1 << spaceinfo->addr2byte_lshift) - 1)) >> spaceinfo->addr2byte_rshift;
}
}
/* first CPU is visible by default */
global->visiblecpu = machine->cpu[0];
@ -300,8 +300,8 @@ void debug_cpu_init(running_machine *machine)
/*-------------------------------------------------
debug_cpu_flush_traces - flushes all traces;
this is useful if a trace is going on when we
debug_cpu_flush_traces - flushes all traces;
this is useful if a trace is going on when we
fatalerror
-------------------------------------------------*/
@ -325,7 +325,7 @@ void debug_cpu_flush_traces(running_machine *machine)
***************************************************************************/
/*-------------------------------------------------
cpu_get_visible_cpu - return the visible CPU
cpu_get_visible_cpu - return the visible CPU
device (the one that commands should apply to)
-------------------------------------------------*/
@ -364,7 +364,7 @@ int debug_cpu_is_stopped(running_machine *machine)
***************************************************************************/
/*-------------------------------------------------
debug_cpu_get_global_symtable - return the
debug_cpu_get_global_symtable - return the
global symbol table
-------------------------------------------------*/
@ -375,7 +375,7 @@ symbol_table *debug_cpu_get_global_symtable(running_machine *machine)
/*-------------------------------------------------
debug_cpu_get_visible_symtable - return the
debug_cpu_get_visible_symtable - return the
locally-visible symbol table
-------------------------------------------------*/
@ -386,7 +386,7 @@ symbol_table *debug_cpu_get_visible_symtable(running_machine *machine)
/*-------------------------------------------------
debug_cpu_get_symtable - return a specific
debug_cpu_get_symtable - return a specific
CPU's symbol table
-------------------------------------------------*/
@ -759,8 +759,8 @@ void debug_cpu_single_step(running_machine *machine, int numsteps)
/*-------------------------------------------------
debug_cpu_single_step_over - single step the
visible over the requested number of
debug_cpu_single_step_over - single step the
visible over the requested number of
instructions
-------------------------------------------------*/
@ -926,7 +926,7 @@ void debug_cpu_next_cpu(running_machine *machine)
***************************************************************************/
/*-------------------------------------------------
debug_cpu_breakpoint_set - set a new
debug_cpu_breakpoint_set - set a new
breakpoint, returning its index
-------------------------------------------------*/
@ -962,7 +962,7 @@ int debug_cpu_breakpoint_set(const device_config *device, offs_t address, parsed
/*-------------------------------------------------
debug_cpu_breakpoint_clear - clear a
debug_cpu_breakpoint_clear - clear a
breakpoint by index
-------------------------------------------------*/
@ -1004,7 +1004,7 @@ int debug_cpu_breakpoint_clear(running_machine *machine, int bpnum)
/*-------------------------------------------------
debug_cpu_breakpoint_enable - enable/disable
debug_cpu_breakpoint_enable - enable/disable
a breakpoint by index
-------------------------------------------------*/
@ -1037,7 +1037,7 @@ int debug_cpu_breakpoint_enable(running_machine *machine, int bpnum, int enable)
***************************************************************************/
/*-------------------------------------------------
debug_cpu_watchpoint_set - set a new
debug_cpu_watchpoint_set - set a new
watchpoint, returning its index
-------------------------------------------------*/
@ -1072,7 +1072,7 @@ int debug_cpu_watchpoint_set(const address_space *space, int type, offs_t addres
/*-------------------------------------------------
debug_cpu_watchpoint_clear - clear a
debug_cpu_watchpoint_clear - clear a
watchpoint by index
-------------------------------------------------*/
@ -1115,7 +1115,7 @@ int debug_cpu_watchpoint_clear(running_machine *machine, int wpnum)
/*-------------------------------------------------
debug_cpu_watchpoint_enable - enable/disable a
debug_cpu_watchpoint_enable - enable/disable a
watchpoint by index
-------------------------------------------------*/
@ -1149,14 +1149,14 @@ int debug_cpu_watchpoint_enable(running_machine *machine, int wpnum, int enable)
***************************************************************************/
/*-------------------------------------------------
debug_cpu_source_script - specifies a debug
debug_cpu_source_script - specifies a debug
command script to execute
-------------------------------------------------*/
void debug_cpu_source_script(running_machine *machine, const char *file)
{
debugcpu_private *global = machine->debugcpu_data;
/* close any existing source file */
if (global->source_file != NULL)
{
@ -1216,7 +1216,7 @@ void debug_cpu_trace(const device_config *device, FILE *file, int trace_over, co
/*-------------------------------------------------
debug_cpu_trace_printf - output data into the
debug_cpu_trace_printf - output data into the
given CPU's tracefile, if tracing
-------------------------------------------------*/
@ -1254,7 +1254,7 @@ void debug_cpu_set_instruction_hook(const device_config *device, debug_instructi
/*-------------------------------------------------
debug_cpu_hotspot_track - enable/disable
debug_cpu_hotspot_track - enable/disable
tracking of hotspots
-------------------------------------------------*/
@ -1884,7 +1884,7 @@ static void compute_debug_flags(const device_config *device)
cpu_debug_data *info = cpu_get_debug_data(device);
running_machine *machine = device->machine;
debugcpu_private *global = machine->debugcpu_data;
/* clear out all global flags by default */
machine->debug_flags = DEBUG_FLAG_ENABLED;

View File

@ -1476,14 +1476,14 @@ static void prepare_machine(running_machine *machine)
static void destroy_machine(running_machine *machine)
{
int cpunum;
assert(machine == Machine);
/* temporary: free the fake CPU devices */
for (cpunum = 0; cpunum < ARRAY_LENGTH(machine->cpu); cpunum++)
if (machine->cpu[cpunum] != NULL)
free((void *)machine->cpu[cpunum]);
if (machine->driver_data != NULL)
free(machine->driver_data);
if (machine->config != NULL)

View File

@ -253,7 +253,7 @@ struct _subtable_data
struct _memory_private
{
const address_space * spacelist; /* list of address spaces */
UINT8 * bank_ptr[STATIC_COUNT]; /* array of bank pointers */
UINT8 * bankd_ptr[STATIC_COUNT]; /* array of decrypted bank pointers */
void * shared_ptr[MAX_SHARED_POINTERS];/* array of shared pointers */
@ -405,7 +405,7 @@ INLINE void adjust_addresses(address_space *space, offs_t *start, offs_t *end, o
INLINE int bank_references_space(const bank_info *bank, const address_space *space)
{
bank_reference *ref;
for (ref = bank->reflist; ref != NULL; ref = ref->next)
if (ref->space == space)
return TRUE;
@ -421,7 +421,7 @@ INLINE int bank_references_space(const bank_info *bank, const address_space *spa
INLINE void add_bank_reference(bank_info *bank, const address_space *space)
{
bank_reference **refptr;
/* make sure we don't already have a reference to the bank */
for (refptr = &bank->reflist; *refptr != NULL; refptr = &(*refptr)->next)
if ((*refptr)->space == space)
@ -697,7 +697,7 @@ void memory_init(running_machine *machine)
memory_private *memdata;
add_exit_callback(machine, memory_exit);
/* allocate our private data */
memdata = machine->memory_data = auto_malloc(sizeof(*machine->memory_data));
memset(memdata, 0, sizeof(*memdata));
@ -723,8 +723,8 @@ void memory_init(running_machine *machine)
/*-------------------------------------------------
memory_find_address_space - find an address
space in our internal list; for faster access
memory_find_address_space - find an address
space in our internal list; for faster access
use cpu_get_address_space()
-------------------------------------------------*/
@ -732,7 +732,7 @@ const address_space *memory_find_address_space(const device_config *cpu, int spa
{
memory_private *memdata = cpu->machine->memory_data;
const address_space *space;
for (space = memdata->spacelist; space != NULL; space = space->next)
if (space->cpu == cpu && space->spacenum == spacenum)
return space;
@ -890,7 +890,7 @@ int memory_set_direct_region(const address_space *space, offs_t byteaddress)
entry = spacerw->readlookup[LEVEL1_INDEX(byteaddress)];
if (entry >= SUBTABLE_BASE)
entry = spacerw->readlookup[LEVEL2_INDEX(entry,byteaddress)];
/* keep track of current entry */
spacerw->direct.entry = entry;
@ -931,8 +931,8 @@ int memory_set_direct_region(const address_space *space, offs_t byteaddress)
/*-------------------------------------------------
memory_get_read_ptr - return a pointer the
memory byte provided in the given address
memory_get_read_ptr - return a pointer the
memory byte provided in the given address
space, or NULL if it is not mapped to a bank
-------------------------------------------------*/
@ -958,9 +958,9 @@ void *memory_get_read_ptr(const address_space *space, offs_t byteaddress)
/*-------------------------------------------------
memory_get_write_ptr - return a pointer the
memory byte provided in the given address
space, or NULL if it is not mapped to a
memory_get_write_ptr - return a pointer the
memory byte provided in the given address
space, or NULL if it is not mapped to a
writeable bank
-------------------------------------------------*/
@ -1014,7 +1014,7 @@ void memory_configure_bank(running_machine *machine, int banknum, int startentry
/* fill in the requested bank entries */
for (entrynum = startentry; entrynum < startentry + numentries; entrynum++)
bank->entry[entrynum] = (UINT8 *)base + (entrynum - startentry) * stride;
/* if we have no bankptr yet, set it to the first entry */
if (memdata->bank_ptr[banknum] == NULL)
memdata->bank_ptr[banknum] = bank->entry[0];
@ -1045,7 +1045,7 @@ void memory_configure_bank_decrypted(running_machine *machine, int banknum, int
/* fill in the requested bank entries */
for (entrynum = startentry; entrynum < startentry + numentries; entrynum++)
bank->entryd[entrynum] = (UINT8 *)base + (entrynum - startentry) * stride;
/* if we have no bankptr yet, set it to the first entry */
if (memdata->bankd_ptr[banknum] == NULL)
memdata->bankd_ptr[banknum] = bank->entryd[0];
@ -1053,7 +1053,7 @@ void memory_configure_bank_decrypted(running_machine *machine, int banknum, int
/*-------------------------------------------------
memory_set_bank - select one pre-configured
memory_set_bank - select one pre-configured
entry to be the new bank base
-------------------------------------------------*/
@ -1138,9 +1138,9 @@ void memory_set_bankptr(running_machine *machine, int banknum, void *base)
***************************************************************************/
/*-------------------------------------------------
_memory_install_handler - install a new memory
handler into the given address space,
returning a pointer to the memory backing it,
_memory_install_handler - install a new memory
handler into the given address space,
returning a pointer to the memory backing it,
if present
-------------------------------------------------*/
@ -1227,9 +1227,9 @@ UINT64 *_memory_install_handler64(const address_space *space, offs_t addrstart,
/*-------------------------------------------------
_memory_install_device_handler - install a new
device memory handler into the given address
space, returning a pointer to the memory
_memory_install_device_handler - install a new
device memory handler into the given address
space, returning a pointer to the memory
backing it, if present
-------------------------------------------------*/
@ -1248,7 +1248,7 @@ void *_memory_install_device_handler(const address_space *space, const device_co
/*-------------------------------------------------
_memory_install_device_handler8 - same as above
_memory_install_device_handler8 - same as above
but explicitly for 8-bit handlers
-------------------------------------------------*/
@ -1265,7 +1265,7 @@ UINT8 *_memory_install_device_handler8(const address_space *space, const device_
/*-------------------------------------------------
_memory_install_device_handler16 - same as
_memory_install_device_handler16 - same as
above but explicitly for 16-bit handlers
-------------------------------------------------*/
@ -1282,7 +1282,7 @@ UINT16 *_memory_install_device_handler16(const address_space *space, const devic
/*-------------------------------------------------
_memory_install_device_handler32 - same as
_memory_install_device_handler32 - same as
above but explicitly for 32-bit handlers
-------------------------------------------------*/
@ -1299,7 +1299,7 @@ UINT32 *_memory_install_device_handler32(const address_space *space, const devic
/*-------------------------------------------------
_memory_install_device_handler64 - same as
_memory_install_device_handler64 - same as
above but explicitly for 64-bit handlers
-------------------------------------------------*/
@ -1342,8 +1342,8 @@ const char *memory_get_handler_string(const address_space *space, int read0_or_w
/*-------------------------------------------------
memory_enable_read_watchpoints - enable/disable
read watchpoint tracking for a given address
memory_enable_read_watchpoints - enable/disable
read watchpoint tracking for a given address
space
-------------------------------------------------*/
@ -1358,8 +1358,8 @@ void memory_enable_read_watchpoints(const address_space *space, int enable)
/*-------------------------------------------------
memory_enable_write_watchpoints - enable/disable
write watchpoint tracking for a given address
memory_enable_write_watchpoints - enable/disable
write watchpoint tracking for a given address
space
-------------------------------------------------*/
@ -1410,7 +1410,7 @@ int memory_get_log_unmap(const address_space *space)
/*-------------------------------------------------
memory_dump - dump the internal memory tables
memory_dump - dump the internal memory tables
to the given file
-------------------------------------------------*/
@ -1475,7 +1475,7 @@ static void memory_init_spaces(running_machine *machine)
address_space *space = malloc_or_die(sizeof(*space));
int accessorindex;
int entrynum;
/* determine the address and data bits */
memset(space, 0, sizeof(*space));
space->machine = machine;
@ -1492,13 +1492,13 @@ static void memory_init_spaces(running_machine *machine)
space->accessors = memory_accessors[accessorindex][(space->endianness == CPU_IS_LE) ? 0 : 1];
space->map = NULL;
space->log_unmap = TRUE;
/* allocate subtable information; we malloc this manually because it will be realloc'ed */
space->read.subtable = auto_malloc(sizeof(*space->read.subtable) * SUBTABLE_COUNT);
memset(space->read.subtable, 0, sizeof(*space->read.subtable) * SUBTABLE_COUNT);
space->write.subtable = auto_malloc(sizeof(*space->write.subtable) * SUBTABLE_COUNT);
memset(space->write.subtable, 0, sizeof(*space->write.subtable) * SUBTABLE_COUNT);
/* allocate the handler table */
space->read.handlers[0] = auto_malloc(sizeof(*space->read.handlers[0]) * ARRAY_LENGTH(space->read.handlers));
memset(space->read.handlers[0], 0, sizeof(*space->read.handlers[0]) * ARRAY_LENGTH(space->read.handlers));
@ -1544,7 +1544,7 @@ static void memory_init_spaces(running_machine *machine)
space->direct.max = 0;
space->direct.entry = STATIC_UNMAP;
space->directupdate = NULL;
/* link us in */
*nextptr = space;
nextptr = (address_space **)&space->next;
@ -1797,7 +1797,7 @@ static void memory_init_allocate(running_machine *machine)
/*-------------------------------------------------
memory_init_locate - find all the requested
memory_init_locate - find all the requested
pointers into the final allocated memory
-------------------------------------------------*/
@ -1876,7 +1876,7 @@ static void memory_exit(running_machine *machine)
memdata->memory_block_list = block->next;
free(block);
}
/* free all the bank references */
for (banknum = 0; banknum < STATIC_COUNT; banknum++)
{
@ -2194,7 +2194,7 @@ static void space_map_range(address_space *space, read_or_write readorwrite, int
space->writelookup = space->write.table;
if (reset_read)
space->readlookup = space->read.table;
/* recompute any direct access on this space if it is a read modification */
if (readorwrite == ROW_READ && entry == space->direct.entry)
{
@ -2206,7 +2206,7 @@ static void space_map_range(address_space *space, read_or_write readorwrite, int
/*-------------------------------------------------
space_find_backing_memory - return a pointer to
space_find_backing_memory - return a pointer to
the base of RAM associated with the given CPU
and offset
-------------------------------------------------*/
@ -2244,8 +2244,8 @@ static void *space_find_backing_memory(const address_space *space, offs_t bytead
/*-------------------------------------------------
space_needs_backing_store - return whether a
given memory map entry implies the need of
space_needs_backing_store - return whether a
given memory map entry implies the need of
allocating and registering memory
-------------------------------------------------*/
@ -2850,7 +2850,7 @@ static void *block_allocate(const address_space *space, offs_t bytestart, offs_t
break;
}
}
/* if we didn't find a match, register */
if (region == NULL)
{

View File

@ -1047,8 +1047,8 @@ INLINE void memory_write_qword_masked(const address_space *space, offs_t byteadd
/*-------------------------------------------------
memory_decrypted_read_byte/word/dword/qword -
read a value from the specified address space
memory_decrypted_read_byte/word/dword/qword -
read a value from the specified address space
using the direct addressing mechanism and
the decrypted base pointer
-------------------------------------------------*/
@ -1090,8 +1090,8 @@ INLINE UINT64 memory_decrypted_read_qword(const address_space *space, offs_t byt
/*-------------------------------------------------
memory_raw_read_byte/word/dword/qword -
read a value from the specified address space
memory_raw_read_byte/word/dword/qword -
read a value from the specified address space
using the direct addressing mechanism and
the raw base pointer
-------------------------------------------------*/

View File

@ -137,7 +137,7 @@ static void okim6258_update(void *param, stream_sample_t **inputs, stream_sample
/* Compute the new amplitude and update the current step */
int nibble = (chip->data_in >> nibble_shift) & 0xf;
/* Output to the buffer */
/* Output to the buffer */
INT16 sample = clock_adpcm(chip, nibble);
nibble_shift ^= 4;
@ -186,7 +186,7 @@ static void okim6258_state_save_register(struct okim6258 *info, const char *tag)
static SND_START( okim6258 )
{
const okim6258_interface *intf = config;
struct okim6258 *info;
struct okim6258 *info;
info = auto_malloc(sizeof(*info));
memset(info, 0, sizeof(*info));
@ -239,7 +239,7 @@ void okim6258_set_divider(int which, int val)
{
struct okim6258 *info = sndti_token(SOUND_OKIM6258, which);
int divider = dividers[val];
info->divider = dividers[val];
stream_set_sample_rate(info->stream, info->master_clock / divider);
}

View File

@ -209,7 +209,7 @@ READ8_DEVICE_HANDLER( mc6845_register_r )
case 0x0f: ret = (mc6845->cursor_addr >> 0) & 0xff; break;
case 0x10: ret = (mc6845->light_pen_addr >> 8) & 0xff; mc6845->light_pen_latched = FALSE; break;
case 0x11: ret = (mc6845->light_pen_addr >> 0) & 0xff; mc6845->light_pen_latched = FALSE; break;
case 0x1f:
case 0x1f:
if (supports_transparent[mc6845->device_type] && MODE_TRANSPARENT(mc6845))
{
mc6845->update_addr++;
@ -252,12 +252,12 @@ WRITE8_DEVICE_HANDLER( mc6845_register_w )
case 0x0f: mc6845->cursor_addr = ((data & 0xff) << 0) | (mc6845->cursor_addr & 0xff00); break;
case 0x10: /* read-only */ break;
case 0x11: /* read-only */ break;
case 0x12:
case 0x12:
if (supports_transparent[mc6845->device_type])
{
mc6845->update_addr = ((data & 0x3f) << 8) | (mc6845->update_addr & 0x00ff);
call_on_update_address(device, 0);
}
}
break;
case 0x13:
if (supports_transparent[mc6845->device_type])
@ -266,7 +266,7 @@ WRITE8_DEVICE_HANDLER( mc6845_register_w )
call_on_update_address(device, 0);
}
break;
case 0x1f:
case 0x1f:
if (supports_transparent[mc6845->device_type] && MODE_TRANSPARENT(mc6845))
{
mc6845->update_addr++;

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@ -77,9 +77,9 @@ struct _mc6845_interface
/* if specified, this gets called for every change of the VSYNC pin (pin 40) */
mc6845_on_vsync_changed_func on_vsync_changed;
/* Called whenenever the update address changes
* For vblank/hblank timing strobe indicates the physical update.
* vblank/hblank timing not supported yet! */
/* Called whenenever the update address changes
* For vblank/hblank timing strobe indicates the physical update.
* vblank/hblank timing not supported yet! */
mc6845_on_update_addr_changed_func on_update_addr_changed;
};

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@ -2239,7 +2239,7 @@ static int preprocess_stage_1(running_machine *machine, UINT16 data)
static TIMER_CALLBACK( s2_ack_callback )
{
const address_space *space = cpu_get_address_space(dcs.cpu, ADDRESS_SPACE_PROGRAM);
/* if the output is full, stall for a usec */
if (IS_OUTPUT_FULL())
{

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@ -280,7 +280,7 @@ static SOUND_RESET( mario )
{
mario_state *state = machine->driver_data;
const address_space *space = cpu_get_address_space(machine->cpu[1], ADDRESS_SPACE_PROGRAM);
#if USE_8039
set_ea(machine, 1);
#endif

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@ -123,8 +123,8 @@ static UINT16 defender_sensor,shutter_sensor;
static READ16_HANDLER( drill_io_r )
{
// if(offset*2 == 0x4)
// popmessage("PC=%08x %04x %04x %04x %04x %04x %04x %04x %04x",cpu_get_pc(space->cpu),iodata[0/2],iodata[2/2],iodata[4/2],iodata[6/2],iodata[8/2],iodata[0xa/2],iodata[0xc/2],iodata[0xe/2]);
// if(offset*2 == 0x4)
// popmessage("PC=%08x %04x %04x %04x %04x %04x %04x %04x %04x",cpu_get_pc(space->cpu),iodata[0/2],iodata[2/2],iodata[4/2],iodata[6/2],iodata[8/2],iodata[0xa/2],iodata[0xc/2],iodata[0xe/2]);
switch(offset)
{
@ -142,7 +142,7 @@ static READ16_HANDLER( drill_io_r )
}
case 0x4/2: return (defender_sensor) | (shutter_sensor);
case 0xe/2: return input_port_read(space->machine, "IN2");//coins
// default: printf("PC=%08x [%04x] -> %04x R\n",cpu_get_pc(space->cpu),offset*2,iodata[offset]);
// default: printf("PC=%08x [%04x] -> %04x R\n",cpu_get_pc(space->cpu),offset*2,iodata[offset]);
}
return 0xffff;
@ -162,23 +162,23 @@ static WRITE16_HANDLER( drill_io_w )
break;
}
// if(data != 0 && offset != 8)
// printf("PC=%08x [%04x] <- %04x W\n",cpu_get_pc(space->cpu),offset*2,data);
// if(data != 0 && offset != 8)
// printf("PC=%08x [%04x] <- %04x W\n",cpu_get_pc(space->cpu),offset*2,data);
}
/*
PORT_DIPNAME( 0x0100, 0x0000, DEF_STR( Unknown ) )//up sensor <- shutter
PORT_DIPSETTING( 0x0000, DEF_STR( Off ) )
PORT_DIPSETTING( 0x0100, DEF_STR( On ) )
PORT_DIPNAME( 0x0200, 0x0000, DEF_STR( Unknown ) )//down sensor
PORT_DIPSETTING( 0x0000, DEF_STR( Off ) )
PORT_DIPSETTING( 0x0200, DEF_STR( On ) )
PORT_DIPNAME( 0x0400, 0x0000, DEF_STR( Unknown ) )//left sensor <-defender
PORT_DIPSETTING( 0x0000, DEF_STR( Off ) )
PORT_DIPSETTING( 0x0400, DEF_STR( On ) )
PORT_DIPNAME( 0x0800, 0x0000, DEF_STR( Unknown ) )//right sensor
PORT_DIPSETTING( 0x0000, DEF_STR( Off ) )
PORT_DIPSETTING( 0x0800, DEF_STR( On ) )
PORT_DIPNAME( 0x0100, 0x0000, DEF_STR( Unknown ) )//up sensor <- shutter
PORT_DIPSETTING( 0x0000, DEF_STR( Off ) )
PORT_DIPSETTING( 0x0100, DEF_STR( On ) )
PORT_DIPNAME( 0x0200, 0x0000, DEF_STR( Unknown ) )//down sensor
PORT_DIPSETTING( 0x0000, DEF_STR( Off ) )
PORT_DIPSETTING( 0x0200, DEF_STR( On ) )
PORT_DIPNAME( 0x0400, 0x0000, DEF_STR( Unknown ) )//left sensor <-defender
PORT_DIPSETTING( 0x0000, DEF_STR( Off ) )
PORT_DIPSETTING( 0x0400, DEF_STR( On ) )
PORT_DIPNAME( 0x0800, 0x0000, DEF_STR( Unknown ) )//right sensor
PORT_DIPSETTING( 0x0000, DEF_STR( Off ) )
PORT_DIPSETTING( 0x0800, DEF_STR( On ) )
*/
#ifdef UNUSED_FUNCTION
static TIMER_CALLBACK( shutter_req )
@ -450,7 +450,7 @@ static DRIVER_INIT( drill )
// rearrange gfx roms to something we can decode, two of the roms form 4bpp of the graphics, the third forms another 2bpp but is in a different format
UINT32 *src = (UINT32*)memory_region( machine, "gfx2" );
UINT32 *dst = (UINT32*)memory_region( machine, "gfx1" );// + 0x400000;
// UINT8 *rom = memory_region( machine, "main" );
// UINT8 *rom = memory_region( machine, "main" );
int i;
for (i=0; i< 0x400000/4; i++)
@ -461,10 +461,10 @@ static DRIVER_INIT( drill )
}
//enable some kind of debug mode (ignore errors)
// rom[0x7fffb]=0;
// rom[0x7fffc]=0;
// rom[0x7fffd]=0;
// rom[0x7fffe]=0;
// rom[0x7fffb]=0;
// rom[0x7fffc]=0;
// rom[0x7fffd]=0;
// rom[0x7fffe]=0;
}
GAME( 1993, 2mindril, 0, drill, drill, drill, ROT0, "Taito", "Two Minute Drill", GAME_NOT_WORKING | GAME_IMPERFECT_GRAPHICS )

View File

@ -345,7 +345,7 @@ GFXDECODE_END
static MACHINE_RESET( crballoon )
{
const address_space *space = cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_IO);
pc3092_reset();
port_sound_w(space, 0, 0);
port_music_w(space, 0, 0);

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@ -335,10 +335,10 @@ static PALETTE_INIT( cultures )
b = ((c & 0x08) >> 1) | ((c & 0x80) >> 4) | i;
/*
r = ((c & 0x0c) >> 0) | i;
g = ((c & 0x30) >> 2) | i;
b = ((c & 0xc0) >> 4) | i;
*/
r = ((c & 0x0c) >> 0) | i;
g = ((c & 0x30) >> 2) | i;
b = ((c & 0xc0) >> 4) | i;
*/
x = ((c >> 4) & 0x0f);

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@ -290,7 +290,7 @@ static READ16_HANDLER ( dlbewing_prot_r )
case 0x532: return dblwings_580_data;
}
// printf("dblewing prot r %08x, %04x, %04x\n",cpu_get_pc(space->cpu), offset*2, mem_mask);
// printf("dblewing prot r %08x, %04x, %04x\n",cpu_get_pc(space->cpu), offset*2, mem_mask);
if ((offset*2)==0x0f8) return 0; // dblwings_080_data;
if ((offset*2)==0x104) return 0;
@ -309,8 +309,8 @@ static READ16_HANDLER ( dlbewing_prot_r )
static WRITE16_HANDLER( dblewing_prot_w )
{
// if(offset*2 != 0x380)
// printf("dblewing prot w %08x, %04x, %04x %04x\n",cpu_get_pc(space->cpu), offset*2, mem_mask,data);
// if(offset*2 != 0x380)
// printf("dblewing prot w %08x, %04x, %04x %04x\n",cpu_get_pc(space->cpu), offset*2, mem_mask,data);
switch(offset*2)
{
@ -411,7 +411,7 @@ static WRITE16_HANDLER( dblewing_prot_w )
return; // p2 inputs select screen OK
}
// printf("dblewing prot w %08x, %04x, %04x %04x\n",cpu_get_pc(space->cpu), offset*2, mem_mask,data);
// printf("dblewing prot w %08x, %04x, %04x %04x\n",cpu_get_pc(space->cpu), offset*2, mem_mask,data);
if ((offset*2)==0x008) { dblwings_008_data = data; return; }
if ((offset*2)==0x080) { dblwings_080_data = data; return; } // p3 3rd boss?
@ -434,10 +434,10 @@ static ADDRESS_MAP_START( dblewing_map, ADDRESS_SPACE_PROGRAM, 16 )
/* protection */
// AM_RANGE(0x280104, 0x280105) AM_WRITE(SMH_NOP) // ??
// AM_RANGE(0x2800ac, 0x2800ad) AM_READ_PORT("DSW") // dips
// AM_RANGE(0x280298, 0x280299) AM_READ_PORT("SYSTEM") // vbl
// AM_RANGE(0x280506, 0x280507) AM_READ_PORT("UNK")
// AM_RANGE(0x2802B4, 0x2802B5) AM_READ_PORT("P1_P2") // inverted?
// AM_RANGE(0x2800ac, 0x2800ad) AM_READ_PORT("DSW") // dips
// AM_RANGE(0x280298, 0x280299) AM_READ_PORT("SYSTEM") // vbl
// AM_RANGE(0x280506, 0x280507) AM_READ_PORT("UNK")
// AM_RANGE(0x2802B4, 0x2802B5) AM_READ_PORT("P1_P2") // inverted?
// AM_RANGE(0x280330, 0x280331) AM_READ(SMH_NOP) // sound?
// AM_RANGE(0x280380, 0x280381) AM_WRITE(SMH_NOP) // sound

View File

@ -116,7 +116,7 @@ static READ8_HANDLER( vga_hvretrace_r )
h = video_screen_get_height(space->machine->primary_screen);
w = video_screen_get_width(space->machine->primary_screen);
// popmessage("%d %d",h,w);
// popmessage("%d %d",h,w);
if (video_screen_get_hpos(space->machine->primary_screen) > h)
res|= 1;
@ -365,7 +365,7 @@ static WRITE8_HANDLER( disk_iobank_w )
*/
int newbank = 0;
// printf("bank %d set to %02X\n", offset,data);
// printf("bank %d set to %02X\n", offset,data);
if (data == 0xF0)
{
@ -383,7 +383,7 @@ static WRITE8_HANDLER( disk_iobank_w )
newbank = 3;
}
// printf("newbank = %d\n", newbank);
// printf("newbank = %d\n", newbank);
if (newbank != bank)
{
@ -460,8 +460,8 @@ static READ8_DEVICE_HANDLER( port_c_r )
static WRITE8_DEVICE_HANDLER( port_b_w )
{
port_b_data = data;
// hc55516_digit_w(0, data);
// popmessage("%02x",data);
// hc55516_digit_w(0, data);
// popmessage("%02x",data);
}
static WRITE8_DEVICE_HANDLER( wss_1_w )
@ -511,7 +511,7 @@ static UINT8 status;
static READ8_HANDLER( fdc765_status_r )
{
static UINT8 tmp,clr_status;
// popmessage("Read FDC status @ PC=%05x",cpu_get_pc(space->cpu));
// popmessage("Read FDC status @ PC=%05x",cpu_get_pc(space->cpu));
tmp = status | 0x80;
clr_status++;
if(clr_status == 0x10)
@ -680,7 +680,7 @@ static ADDRESS_MAP_START( filetto_io, ADDRESS_SPACE_IO, 8 )
AM_RANGE(0x0070, 0x007f) AM_READWRITE(mc146818_port_r,mc146818_port_w)
AM_RANGE(0x0080, 0x0087) AM_READWRITE(dma_page_select_r,dma_page_select_w)
AM_RANGE(0x00a0, 0x00af) AM_DEVREADWRITE(PIC8259, "pic8259_2", pic8259_r, pic8259_w )
// AM_RANGE(0x0200, 0x020f) AM_RAM //game port
// AM_RANGE(0x0200, 0x020f) AM_RAM //game port
AM_RANGE(0x0201, 0x0201) AM_READ_PORT("COIN") //game port
AM_RANGE(0x0278, 0x027f) AM_RAM //printer (parallel) port latch
AM_RANGE(0x02f8, 0x02ff) AM_RAM //Modem port

View File

@ -2,7 +2,7 @@
Gals Panic 3
(c) Kaneko 1995
Driver by David Haywood
Driver by David Haywood
Original Skeleton driver by David Haywood
Early Progress by Sebastien Volpe
@ -233,8 +233,8 @@ static VIDEO_UPDATE(galpani3)
else
{
/* this isn't right, but the registers have something to do with
alpha / mixing, and bit 0x8000 of the palette is DEFINITELY alpha
enable -- see fading in intro */
alpha / mixing, and bit 0x8000 of the palette is DEFINITELY alpha
enable -- see fading in intro */
if (dat1 && galpani3_framebuffer1_enable)
{
UINT16 pen = dat1+0x4000;
@ -298,28 +298,28 @@ static VIDEO_UPDATE(galpani3)
}
/*
else if (pridat==0x2f) // area outside of the girl
{
//dst[0] = mame_rand(screen->machine)&0x3fff;
}
else if (pridat==0x2f) // area outside of the girl
{
//dst[0] = mame_rand(screen->machine)&0x3fff;
}
else if (pridat==0x00) // the initial line / box that gets drawn
{
//dst[0] = mame_rand(screen->machine)&0x3fff;
}
else if (pridat==0x30) // during the 'gals boxes' on the intro
{
//dst[0] = mame_rand(screen->machine)&0x3fff;
}
else if (pridat==0x0c) // 'nice' at end of level
{
//dst[0] = mame_rand(screen->machine)&0x3fff;
}
else
{
//printf("%02x, ",pridat);
}
*/
else if (pridat==0x00) // the initial line / box that gets drawn
{
//dst[0] = mame_rand(screen->machine)&0x3fff;
}
else if (pridat==0x30) // during the 'gals boxes' on the intro
{
//dst[0] = mame_rand(screen->machine)&0x3fff;
}
else if (pridat==0x0c) // 'nice' at end of level
{
//dst[0] = mame_rand(screen->machine)&0x3fff;
}
else
{
//printf("%02x, ",pridat);
}
*/
}
}
}

View File

@ -104,7 +104,7 @@ static WRITE32_HANDLER( flash_reg_w )
{
case 0:
//if((flash_regs[offset] & 0xff) != 0x60)
// printf("%08x\n",flash_regs[offset]);
// printf("%08x\n",flash_regs[offset]);
break;
case 1:
break;
@ -323,7 +323,7 @@ static WRITE32_HANDLER( lcd_control_w )
static READ32_HANDLER( io_port_r )
{
// printf("%08x\n",offset*4);
// printf("%08x\n",offset*4);
switch(offset)
{
@ -349,7 +349,7 @@ static READ32_HANDLER( io_port_r )
static WRITE32_HANDLER( io_port_w )
{
COMBINE_DATA(&io_port[offset]);
// printf("[%08x] <- %08x\n",offset*4,data);
// printf("[%08x] <- %08x\n",offset*4,data);
}
@ -483,7 +483,7 @@ static INTERRUPT_GEN( bballoon_interrupt )
cpu_set_input_line(device, ARM7_IRQ_LINE, HOLD_LINE);
//cpu_set_input_line(device, ARM7_FIRQ_LINE, HOLD_LINE);
// irq_en = 0;
// irq_en = 0;
}
static MACHINE_DRIVER_START( bballoon )
@ -500,8 +500,8 @@ static MACHINE_DRIVER_START( bballoon )
MDRV_SCREEN_FORMAT(BITMAP_FORMAT_RGB32)
MDRV_SCREEN_SIZE(320, 256)
MDRV_SCREEN_VISIBLE_AREA(0, 320-1, 0, 256-1)
// MDRV_SCREEN_SIZE(1024, 1024)
// MDRV_SCREEN_VISIBLE_AREA(0, 1023, 0, 1023)
// MDRV_SCREEN_SIZE(1024, 1024)
// MDRV_SCREEN_VISIBLE_AREA(0, 1023, 0, 1023)
MDRV_PALETTE_LENGTH(256)

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@ -1015,7 +1015,7 @@ static DRIVER_INIT( gladiatr )
swap_block(rom + 0x22000, rom + 0x28000, 0x2000);
swap_block(rom + 0x26000, rom + 0x2c000, 0x2000);
swap_block(rom + 0x24000, rom + 0x28000, 0x4000);
/* make sure bank is valid in cpu-reset */
rom = memory_region(machine, "audio") + 0x10000;
memory_set_bankptr(machine, 2,rom);

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@ -3,8 +3,8 @@
Jackie Chan in Fists of Fire
(c) Kaneko 1995
Driver by David Haywood
based on work by Sebastien Volpe
Driver by David Haywood
based on work by Sebastien Volpe
started: May 12 2004
@ -644,7 +644,7 @@ static INPUT_PORTS_START( jchan2 )
PORT_MODIFY("DSW")
PORT_DIPUNUSED( 0x4000, IP_ACTIVE_LOW ) /* only read in the "test mode" ("Input Test" screen) */
// PORT_DIPNAME( 0x8000, 0x8000, "Buttons Layout" ) /* impacts $20011e.l once! -> impacts reading of controls at 0x0002a9b2 */
// PORT_DIPNAME( 0x8000, 0x8000, "Buttons Layout" ) /* impacts $20011e.l once! -> impacts reading of controls at 0x0002a9b2 */
INPUT_PORTS_END

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@ -74,7 +74,7 @@ TODO:
is expected - the MCU computes 0x89, but the main CPU expects 0x5d.
The game works anyway, it never gives the usual Taito "BAD HW" message
(because there is no test at 0x033b after call at routine at 0xde1d).
***************************************************************************/

View File

@ -2569,7 +2569,7 @@ GAME( 1981, kickc, kick, mcr_90009, kickc, kick, ROT90,
GAME( 1981, shollow, 0, mcr_90010, shollow, mcr_90010, ROT90, "Bally Midway", "Satan's Hollow (set 1)", GAME_SUPPORTS_SAVE )
GAME( 1981, shollow2, shollow, mcr_90010, shollow, mcr_90010, ROT90, "Bally Midway", "Satan's Hollow (set 2)", GAME_SUPPORTS_SAVE )
GAME( 1982, tron, 0, mcr_90010, tron, mcr_90010, ROT90, "Bally Midway", "Tron (8/9)", GAME_SUPPORTS_SAVE )
GAME( 1982, tron2, tron, mcr_90010, tron, mcr_90010, ROT90, "Bally Midway", "Tron (6/25?)", GAME_SUPPORTS_SAVE )
GAME( 1982, tron2, tron, mcr_90010, tron, mcr_90010, ROT90, "Bally Midway", "Tron (6/25)", GAME_SUPPORTS_SAVE )
GAME( 1982, tron3, tron, mcr_90010, tron, mcr_90010, ROT90, "Bally Midway", "Tron (6/17)", GAME_SUPPORTS_SAVE )
GAME( 1982, tron4, tron, mcr_90010, tron, mcr_90010, ROT90, "Bally Midway", "Tron (6/15)", GAME_SUPPORTS_SAVE )
GAME( 1982, domino, 0, mcr_90010, domino, mcr_90010, ROT0, "Bally Midway", "Domino Man", GAME_SUPPORTS_SAVE )

View File

@ -488,12 +488,12 @@ static INPUT_PORTS_START( minferno )
PORT_DIPSETTING( 0x10, "20s" )
PORT_DIPSETTING( 0x20, "40s" )
PORT_DIPSETTING( 0x30, "60s" )
/* PORT_DIPNAME( 0x40, 0x00, DEF_STR( Unused ) )
PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
PORT_DIPSETTING( 0x40, DEF_STR( On ) )
PORT_DIPNAME( 0x80, 0x00, DEF_STR( Unused ) )
PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
PORT_DIPSETTING( 0x80, DEF_STR( On ) ) */
/* PORT_DIPNAME( 0x40, 0x00, DEF_STR( Unused ) )
PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
PORT_DIPSETTING( 0x40, DEF_STR( On ) )
PORT_DIPNAME( 0x80, 0x00, DEF_STR( Unused ) )
PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
PORT_DIPSETTING( 0x80, DEF_STR( On ) ) */
INPUT_PORTS_END

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@ -3490,10 +3490,10 @@ ROM_START( soldam )
ROM_REGION( 0x040000, "oki1", 0 ) /* Samples */
ROM_LOAD( "10ver1.bin", 0x000000, 0x040000, CRC(8d5613bf) SHA1(eee217dd2ab64d86b7f5eda55a3c331d862c079e) )
ROM_REGION( 0x040000, "oki2", 0 ) /* Samples */
ROM_LOAD( "8ver1.bin", 0x000000, 0x040000, CRC(fcd36019) SHA1(f4edb55bd62b697c5a73c461008e764c2f16956b) )
ROM_REGION( 0x0200, "proms", 0 ) /* Priority PROM */
ROM_LOAD( "pr-91023.m14", 0x0000, 0x0200, CRC(8914e72d) SHA1(80a664471f14c8ed8544a5e226fdca425ab3c657) )
ROM_END
@ -3524,7 +3524,7 @@ ROM_START( soldamj )
ROM_REGION( 0x040000, "oki1", 0 ) /* Samples */
ROM_LOAD( "10ver1.bin", 0x000000, 0x040000, CRC(8d5613bf) SHA1(eee217dd2ab64d86b7f5eda55a3c331d862c079e) )
ROM_REGION( 0x040000, "oki2", 0 ) /* Samples */
ROM_LOAD( "8ver1.bin", 0x000000, 0x040000, CRC(fcd36019) SHA1(f4edb55bd62b697c5a73c461008e764c2f16956b) )
@ -4056,7 +4056,7 @@ static DRIVER_INIT( rodlandj )
static DRIVER_INIT( soldamj )
{
astyanax_rom_decode(machine, "main");
/* Sprite RAM is mirrored */
memory_install_readwrite16_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x8c000, 0x8cfff, 0, 0, soldamj_spriteram16_r, soldamj_spriteram16_w);
}
@ -4064,7 +4064,7 @@ static DRIVER_INIT( soldamj )
static DRIVER_INIT( soldam )
{
phantasm_rom_decode(machine, "main");
/* Sprite RAM is mirrored */
memory_install_readwrite16_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x8c000, 0x8cfff, 0, 0, soldamj_spriteram16_r, soldamj_spriteram16_w);
}

View File

@ -167,10 +167,10 @@ static INPUT_PORTS_START( mnchmobl )
PORT_DIPSETTING( 0x10, DEF_STR( 2C_1C ) )
PORT_DIPSETTING( 0x16, DEF_STR( 3C_2C ) )
PORT_DIPSETTING( 0x00, DEF_STR( 1C_1C ) )
// PORT_DIPSETTING( 0x1e, DEF_STR( 1C_1C ) )
// PORT_DIPSETTING( 0x1c, DEF_STR( 1C_1C ) )
// PORT_DIPSETTING( 0x1a, DEF_STR( 1C_1C ) )
// PORT_DIPSETTING( 0x18, DEF_STR( 1C_1C ) )
// PORT_DIPSETTING( 0x1e, DEF_STR( 1C_1C ) )
// PORT_DIPSETTING( 0x1c, DEF_STR( 1C_1C ) )
// PORT_DIPSETTING( 0x1a, DEF_STR( 1C_1C ) )
// PORT_DIPSETTING( 0x18, DEF_STR( 1C_1C ) )
PORT_DIPSETTING( 0x12, DEF_STR( 2C_3C ) )
PORT_DIPSETTING( 0x02, DEF_STR( 1C_2C ) )
PORT_DIPSETTING( 0x04, DEF_STR( 1C_3C ) )
@ -243,13 +243,13 @@ static INPUT_PORTS_START( mnchmobl )
PORT_DIPSETTING( 0x82, "50k 150k" )
PORT_DIPSETTING( 0xa2, "60k 160k" )
PORT_DIPSETTING( 0xc2, "70k 170k" )
// PORT_DIPSETTING( 0x13, "10k" ) /* duplicated setting */
// PORT_DIPSETTING( 0x33, "20k" ) /* duplicated setting */
// PORT_DIPSETTING( 0x53, "30k" ) /* duplicated setting */
// PORT_DIPSETTING( 0x73, "40k" ) /* duplicated setting */
// PORT_DIPSETTING( 0x93, "50k" ) /* duplicated setting */
// PORT_DIPSETTING( 0xb3, "60k" ) /* duplicated setting */
// PORT_DIPSETTING( 0xd3, "70k" ) /* duplicated setting */
// PORT_DIPSETTING( 0x13, "10k" ) /* duplicated setting */
// PORT_DIPSETTING( 0x33, "20k" ) /* duplicated setting */
// PORT_DIPSETTING( 0x53, "30k" ) /* duplicated setting */
// PORT_DIPSETTING( 0x73, "40k" ) /* duplicated setting */
// PORT_DIPSETTING( 0x93, "50k" ) /* duplicated setting */
// PORT_DIPSETTING( 0xb3, "60k" ) /* duplicated setting */
// PORT_DIPSETTING( 0xd3, "70k" ) /* duplicated setting */
PORT_DIPSETTING( 0x03, "10k" )
PORT_DIPSETTING( 0x23, "20k" )
PORT_DIPSETTING( 0x43, "30k" )

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@ -526,7 +526,7 @@ static int transfer_dword( running_machine *machine, UINT32 dest, UINT32 source
namcona1_gfxram_w(space, (dest-0xf40000)/2, data, 0xffff );
}
else if( dest>=0xff0000 && dest<0xffc000 )
{
{
namcona1_videoram_w(space, (dest-0xff0000)/2, data, 0xffff );
}
else if( dest>=0xfff000 && dest<0x1000000 )

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@ -4,12 +4,12 @@
Hardware: * R4650 (MIPS III with IDT special instructions) main CPU.
133 MHz for Gorgon, 166 MHz for System 23 and Super System 23, and
200 MHz for Super System 23 Evolution 2.
200 MHz for Super System 23 Evolution 2.
* H8/3002 MCU for sound/inputs
* Custom polygon hardware
* 1 text tilemap
Gorgon and System 23 use an I/O board based on the Namco C78, which is a Renesas H8/3334 MCU
Gorgon and System 23 use an I/O board based on the Namco C78, which is a Renesas H8/3334 MCU
(8-bit version of the H8/3002).
Super System 23 uses a PIC16Cxx-based I/O board. In both cases the I/O boards' MCUs apparently are connected
@ -1513,7 +1513,7 @@ ROM_START( motoxgo )
ROM_REGION( 0x1000000, "c352", ROMREGION_ERASEFF ) /* C352 PCM samples */
ROM_LOAD( "mg1wavel.2c", 0x000000, 0x800000, CRC(f78b1b4d) SHA1(47cd654ec0a69de0dc81b8d83692eebf5611228b) )
ROM_LOAD( "mg1waveh.2a", 0x800000, 0x800000, CRC(8cb73877) SHA1(2e2b170c7ff889770c13b4ab7ac316b386ada153) )
ROM_LOAD( "mg1waveh.2a", 0x800000, 0x800000, CRC(8cb73877) SHA1(2e2b170c7ff889770c13b4ab7ac316b386ada153) )
ROM_END
ROM_START( timecrs2 )

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@ -283,7 +283,7 @@ Easter eggs:
- Ms. Pac-Man has a hidden message at the very end of ROM memory 0x97d0-0x97ff:
000097d0: 4745 4e45 5241 4c20 434f 4d50 5554 4552 GENERAL COMPUTER
000097e0: 2020 434f 5250 4f52 4154 494f 4e20 2020 CORPORATION
000097e0: 2020 434f 5250 4f52 4154 494f 4e20 2020 CORPORATION
000097f0: 4865 6c6c 6f2c 204e 616b 616d 7572 6121 Hello, Nakamura!
Masaya Nakamura is the founder of Namco who originally produced Pac-Man in Japan.
@ -939,7 +939,7 @@ static ADDRESS_MAP_START( mspacman_map, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x5080, 0x5080) AM_MIRROR(0xaf3f) AM_READ_PORT("DSW1") /* DSW1 */
AM_RANGE(0x50c0, 0x50c0) AM_MIRROR(0xaf3f) AM_READ_PORT("DSW2") /* DSW2 */
/* overlay decode enable/disable on top */
/* overlay decode enable/disable on top */
AM_RANGE(0x0038, 0x003f) AM_READWRITE(mspacman_disable_decode_r_0x0038,mspacman_disable_decode_w)
AM_RANGE(0x03b0, 0x03b7) AM_READWRITE(mspacman_disable_decode_r_0x03b0,mspacman_disable_decode_w)
AM_RANGE(0x1600, 0x1607) AM_READWRITE(mspacman_disable_decode_r_0x1600,mspacman_disable_decode_w)

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@ -315,7 +315,7 @@ static void handle_lightpen( const device_config *device )
int y_val = input_port_read_safe(device->machine, "TOUCH_Y",0x00);
const rectangle *vis_area = video_screen_get_visible_area(device->machine->primary_screen);
int xt, yt;
xt = x_val * (vis_area->max_x - vis_area->min_x) / 1024 + vis_area->min_x;
yt = y_val * (vis_area->max_y - vis_area->min_y) / 1024 + vis_area->min_y;
@ -334,7 +334,7 @@ static WRITE8_DEVICE_HANDLER( peplus_crtc_display_w )
videoram[vid_address] = data;
palette_ram[vid_address] = io_port[1];
tilemap_mark_tile_dirty(bg_tilemap, vid_address);
/* An access here triggers a device read !*/
(void) mc6845_register_r(device, 0);
}

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@ -1235,7 +1235,7 @@ static DRIVER_INIT( kram3 )
The encryption algorithm is only partially understood.
We are currently using two incomplete 2048-nibble tables to get a address
dependant xor.
dependant xor.
One important thing to note is that for 6809 instructions that take two
opcodes (that is, 10 xx and 11 xx) only the first opcode is encrypted, not the

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@ -168,7 +168,7 @@ static INPUT_PORTS_START( scotrsht )
PORT_DIPSETTING( 0xb0, DEF_STR( 1C_5C ) )
PORT_DIPSETTING( 0xa0, DEF_STR( 1C_6C ) )
PORT_DIPSETTING( 0x90, DEF_STR( 1C_7C ) )
// PORT_DIPSETTING( 0x00, "Disable All Coin Slots" )
// PORT_DIPSETTING( 0x00, "Disable All Coin Slots" )
PORT_START("DSW2") /* $3100 -> $196f */
PORT_DIPNAME( 0x03, 0x02, DEF_STR( Lives ) )

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@ -2506,14 +2506,14 @@ static MACHINE_START( stv )
state_save_register_global_pointer(smpc_ram, 0x80);
state_save_register_global_pointer(stv_scu, 0x100/4);
state_save_register_global_pointer(scsp_regs, 0x1000/2);
// state_save_register_global(stv_vblank);
// state_save_register_global(stv_hblank);
// state_save_register_global(stv_vblank);
// state_save_register_global(stv_hblank);
state_save_register_global(stv_enable_slave_sh2);
state_save_register_global(NMI_reset);
state_save_register_global(en_68k);
state_save_register_global(timer_0);
state_save_register_global(timer_1);
// state_save_register_global(scanline);
// state_save_register_global(scanline);
state_save_register_global(IOSEL1);
state_save_register_global(IOSEL2);
state_save_register_global(EXLE1);
@ -2608,8 +2608,8 @@ static TIMER_CALLBACK( hblank_in_irq )
{
int scanline = param;
// h = video_screen_get_height(machine->primary_screen);
// w = video_screen_get_width(machine->primary_screen);
// h = video_screen_get_height(machine->primary_screen);
// w = video_screen_get_width(machine->primary_screen);
TIMER_0_IRQ;
HBLANK_IN_IRQ;
@ -2652,7 +2652,7 @@ static TIMER_CALLBACK( vblank_in_irq )
/*V-Blank-OUT event*/
static INTERRUPT_GEN( stv_interrupt )
{
// scanline = 0;
// scanline = 0;
h_sync = video_screen_get_height(device->machine->primary_screen)/2;//horz
v_sync = video_screen_get_width(device->machine->primary_screen)-2;//vert

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@ -2538,7 +2538,7 @@ ROM_START( pbobble2 )
ROM_REGION(0x2000, "extra", 0)
ROM_LOAD("e10-21.bin", 0x000000, 0x117, CRC(458499b7) SHA1(0c49aaf75539587d1f5367b3dc72799003824544) )
// ROM_LOAD("e10-21.jed", 0x000000, 0xc2b, CRC(8e9fa5d6) SHA1(5fb120d80f7ceee96a2fad863cf61a1f0b02877f) )
// ROM_LOAD("e10-21.jed", 0x000000, 0xc2b, CRC(8e9fa5d6) SHA1(5fb120d80f7ceee96a2fad863cf61a1f0b02877f) )
ROM_END

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@ -186,12 +186,12 @@ static WRITE8_HANDLER( vendetta_eeprom_w )
/********************************************/
static READ8_HANDLER( vendetta_K052109_r )
{
return K052109_r( space, offset + 0x2000 );
static READ8_HANDLER( vendetta_K052109_r )
{
return K052109_r( space, offset + 0x2000 );
}
//static WRITE8_HANDLER( vendetta_K052109_w ) { K052109_w( machine, offset + 0x2000, data ); }
static WRITE8_HANDLER( vendetta_K052109_w )
static WRITE8_HANDLER( vendetta_K052109_w )
{
// *************************************************************************************
// * Escape Kids uses 052109's mirrored Tilemap ROM bank selector, but only during *

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@ -933,10 +933,10 @@ static const ppi8255_interface zaxxon_ppi_intf =
};
static READ8_DEVICE_HANDLER( sound_latch_r )
static READ8_DEVICE_HANDLER( sound_latch_r )
{
const address_space *space = cpu_get_address_space(device->machine->cpu[0], ADDRESS_SPACE_PROGRAM);
return soundlatch_r(space, offset);
return soundlatch_r(space, offset);
}

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@ -78,7 +78,7 @@ struct _naomibd_config
MDRV_DEVICE_REMOVE(_tag, NAOMI_BOARD)
/*#define MDRV_NAOMIBD_TMU_MEMORY(_tmu, _tmumem) \
MDRV_DEVICE_CONFIG_DATA32(naomibd_config, tmumem##_tmu, _tmumem)*/
MDRV_DEVICE_CONFIG_DATA32(naomibd_config, tmumem##_tmu, _tmumem)*/
/***************************************************************************

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@ -329,7 +329,7 @@ static void amiga_m68k_reset(const device_config *device)
MACHINE_RESET( amiga )
{
// const address_space *space = cpu_get_address_space(Machine->cpu[0], ADDRESS_SPACE_PROGRAM);
// const address_space *space = cpu_get_address_space(Machine->cpu[0], ADDRESS_SPACE_PROGRAM);
/* set m68k reset function */
cpu_set_info_fct(machine->cpu[0], CPUINFO_PTR_M68K_RESET_CALLBACK, (genf *)amiga_m68k_reset);

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@ -135,7 +135,7 @@ void s24_fd1094_machine_init(void)
cpu_set_info_fct(Machine->cpu[1], CPUINFO_PTR_M68K_CMPILD_CALLBACK, (genf *)s24_fd1094_cmp_callback);
cpu_set_info_fct(Machine->cpu[1], CPUINFO_PTR_M68K_RTE_CALLBACK, (genf *)s24_fd1094_rte_callback);
cpu_set_irq_callback(Machine->cpu[1], s24_fd1094_int_callback);
cpu_reset(Machine->cpu[1]);
}

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@ -174,10 +174,10 @@ WRITE8_HANDLER( hunchbks_mirror_w )
memory_write_byte(space, 0x1000+offset,data);
}
static WRITE8_DEVICE_HANDLER( sound_latch_w )
static WRITE8_DEVICE_HANDLER( sound_latch_w )
{
const address_space *space = cpu_get_address_space(device->machine->cpu[0], ADDRESS_SPACE_PROGRAM);
soundlatch_w(space, offset, data);
soundlatch_w(space, offset, data);
}
const ppi8255_interface scramble_ppi_0_intf =

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@ -231,7 +231,7 @@ WRITE16_HANDLER(brival_protection_w)
void darkedge_fd1149_vblank(const device_config *device)
{
const address_space *space = cpu_get_address_space(device, ADDRESS_SPACE_PROGRAM);
memory_write_word(space, 0x20f072, 0);
memory_write_word(space, 0x20f082, 0);

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@ -65,9 +65,9 @@ READ16_HANDLER( demonwld_dsp_r )
UINT16 input_data = 0;
switch (main_ram_seg) {
case 0xc00000: mainspace = cpu_get_address_space(space->machine->cpu[0], ADDRESS_SPACE_PROGRAM);
cpu_push_context(mainspace->cpu);
input_data = memory_read_word(mainspace, main_ram_seg + dsp_addr_w);
cpu_pop_context();
cpu_push_context(mainspace->cpu);
input_data = memory_read_word(mainspace, main_ram_seg + dsp_addr_w);
cpu_pop_context();
break;
default: logerror("DSP PC:%04x Warning !!! IO reading from %08x (port 1)\n",cpu_get_previouspc(space->cpu),main_ram_seg + dsp_addr_w);
}
@ -84,7 +84,7 @@ WRITE16_HANDLER( demonwld_dsp_w )
switch (main_ram_seg) {
case 0xc00000: if ((dsp_addr_w < 3) && (data == 0)) dsp_execute = 1;
mainspace = cpu_get_address_space(space->machine->cpu[0], ADDRESS_SPACE_PROGRAM);
cpu_push_context(mainspace->cpu);
cpu_push_context(mainspace->cpu);
memory_write_word(mainspace, main_ram_seg + dsp_addr_w, data);
cpu_pop_context(); break;
default: logerror("DSP PC:%04x Warning !!! IO writing to %08x (port 1)\n",cpu_get_previouspc(space->cpu),main_ram_seg + dsp_addr_w);

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@ -141,7 +141,7 @@ static CDP1869_ON_PRD_CHANGED(cidelsa_prd_changed)
// PRD is inverted
cputag_set_input_line(device->machine, "main", INPUT_LINE_IRQ0, !prd);
cputag_set_input_line(device->machine, "main", INPUT_LINE_IRQ0, !prd);
state->cdp1869_prd = !prd;
}

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@ -303,7 +303,7 @@ WRITE32_HANDLER( stv_vdp1_regs_w )
/* needed by pblbeach, it doesn't clear local coordinates in its sprite list...*/
//if ( !strcmp(space->machine->gamedrv->name, "pblbeach") )
//{
// stvvdp1_local_x = stvvdp1_local_y = 0;
// stvvdp1_local_x = stvvdp1_local_y = 0;
//}
}
}

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@ -5440,15 +5440,15 @@ static void stv_vdp2_dynamic_res_change(running_machine *machine)
case 6: horz_res = 640; vert_res = 480; break;
case 7: horz_res = 704; vert_res = 480; break;
}
// horz_res+=1;
// vert_res*=2;
// horz_res+=1;
// vert_res*=2;
if(old_vres != vert_res || old_hres != horz_res)
{
timer_set(video_screen_get_time_until_pos(machine->primary_screen, 0, 0), NULL, 0, dyn_res_change);
old_vres = vert_res;
old_hres = horz_res;
}
// video_screen_set_visarea(machine->primary_screen, 0*8, horz_res-1,0*8, vert_res-1);
// video_screen_set_visarea(machine->primary_screen, 0*8, horz_res-1,0*8, vert_res-1);
//if(LOG_VDP2) popmessage("%04d %04d",horz_res-1,vert-1);
}

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@ -152,7 +152,7 @@ struct _debugwin_info
int last_history;
HWND otherwnd[MAX_OTHER_WND];
running_machine * machine;
};
@ -540,7 +540,7 @@ static debugwin_info *debug_window_create(running_machine *machine, LPCSTR title
info->handle_command = global_handle_command;
info->handle_key = global_handle_key;
strcpy(info->edit_defstr, "");
info->machine = machine;
// hook us in

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@ -78,7 +78,7 @@ struct _win_window_info
// drawing data
void * drawdata;
running_machine * machine;
};

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@ -9,4 +9,4 @@
***************************************************************************/
const char build_version[] = "0.128u3 ("__DATE__")";
const char build_version[] = "0.128u4 ("__DATE__")";