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https://github.com/holub/mame
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More nuon (nw)
This commit is contained in:
Olivier Galibert
parent
7220b3a19d
commit
1d31c19472
@ -69,6 +69,12 @@
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f110 10cc crrr rrrr [ecu] bra cc1, pc + r/7s << 1
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f110 11rr rrrr rrrr [ecu] bra pc + r/10s<< 1
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f111 0000 0000 0001 [ecu] halt
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f111 00cc ccc1 0000 [ecu] rts cc
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f111 00cc ccc1 0001 [ecu] rts cc, nop
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f111 00cc ccc1 0010 [ecu] rti cc, (rzi1)
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f111 00cc ccc1 0011 [ecu] rti cc, (rzi1), nop
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f111 00cc ccc1 0100 [ecu] rti cc, (rzi2)
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f111 00cc ccc1 0101 [ecu] rti cc, (rzi2), nop
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f111 01mm mmmn n0ab [rcu] addr rm, rx
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f111 01vv vvvn n1ab [rcu] addr #v/5s << 16, rx
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f111 1001 0000 01ab [rcu] dec_only
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@ -78,6 +84,7 @@
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1000 1xxx xxxx xxxx . xxxx xxxx xxxx xxxx . 0000 01ww wwwn nnnn [alu] add #xw/32s, rn
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1000 1xxx xxxx xxxx . xxxx xxxx xxxx xxxx . 0010 00ww wwwn nnnn [alu] cmp #xw/32s, rn
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1000 1xxx xxxx xxxx . xxxx xxxx xxxx xxxx . f101 11nn nnnw wwww [mem] mv_s #xw/32s, rn
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1000 1xxx xxxx xxxx . xxxx xxxx xxxx x0CC . f110 10cc cvvv vvvv [ecu] bra cC, pc + #xv/31s << 1 (asm only wants 28 bits?)
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1000 1xxx xxxx xxxx . xxxx xxxx xxxx x1CC . f110 10cc cvvv vvvv [ecu] bra cC, pc + #xv/31s << 1, nop (asm only wants 28 bits?)
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1000 1xxx xxxx xxxx . vvvv vvvv vvvv vvvv . f111 01ww wwwn n1ab [rcu] addr #xwv/32s, rx
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@ -95,21 +102,33 @@
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1000 1xxx xxxx xxxx . xxxx xxxx xxxx xxxx . 1001 10nn nnnv vvvv . 1011 1110 1000 0000 [alu] cmpwc rn, #xv/32s
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1001 00cc cccv vvvv . 101f 000w wwww wwww [ecu] bra cc, pc + wv/14s << 1
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1001 00cc cccv vvvv . 101f 0010 0www wwww [ecu] jmp cc, 20200000 + wv/12u << 1
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1001 00cc cccv vvvv . 101f 0011 0www wwww [ecu] jmp cc, 20300000 + wv/12u << 1
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1001 00cc cccv vvvv . 101f 0100 0www wwww [ecu] jsr cc, 20200000 + wv/12u << 1
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1001 00cc cccv vvvv . 101f 0101 0www wwww [ecu] jsr cc, 20300000 + wv/12u << 1
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1001 00cc cccn nnnn . 101f 0110 8000 0000 [ecu] jmp cc, (rn)
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1001 00cc cccn nnnn . 101f 0111 0000 0000 [ecu] jsr cc, (rn)
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1001 00cc cccv vvvv . 101f 100w wwww wwww [ecu] bra cc, pc + wv/14s << 1, nop
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1001 00cc cccv vvvv . 101f 1010 0www wwww [ecu] jmp cc, 20200000 + wv/12u << 1, nop
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1001 00cc cccv vvvv . 101f 1011 0www wwww [ecu] jmp cc, 20300000 + wv/12u << 1, nop
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1001 00cc cccv vvvv . 101f 1100 0www wwww [ecu] jsr cc, 20200000 + wv/12u << 1, nop
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1001 00cc cccv vvvv . 101f 1101 0www wwww [ecu] jsr cc, 20300000 + wv/12u << 1, nop
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1001 00cc cccn nnnn . 101f 1110 8000 0000 [ecu] jmp cc, (rn)
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1001 00cc cccn nnnn . 101f 1111 0000 0000 [ecu] jsr cc, (rn), nop
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1001 01mm mmmn nnnn . 101f 0010 00oo oooo [mem] ld_s 20000000 + om/11u, rn
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1001 01mm mmmn nnnn . 101f 0010 01oo oooo [mem] ld_s 20100000 + om/11u, rn
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1001 01mm mmmn nnnn . 101f 0010 10oo oooo [mem] ld_s 20500000 + om/11u, rn
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1001 01mm mmmn nnnn . 101f 0010 00oo oooo [mem] ld_s 20000000 + om/11u << 2, rn
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1001 01mm mmmn nnnn . 101f 0010 01oo oooo [mem] ld_s 20100000 + om/11u << 2, rn
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1001 01mm mmmn nnnn . 101f 0010 10oo oooo [mem] ld_s 20500000 + om/11u << 2, rn
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1001 0100 000n nnnn . 101f 0100 0000 101u [mem] ld_s (xy), rn
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1001 01mm mmmn nnnn . 101f 1010 00oo oooo [mem] st_s rn, 20000000 + om/11u
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1001 01mm mmmn nnnn . 101f 1010 01oo oooo [mem] st_s rn, 20100000 + om/11u
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1001 01mm mmmn nnnn . 101f 1010 10oo oooo [mem] st_s rn, 20500000 + om/11u
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1001 01nn nnnv vvvv . 101f 0110 0www wwww [mem] mv_s #wv/12s, rn
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1001 01mm mmmn nnnn . 101f 1010 00oo oooo [mem] st_s rn, 20000000 + om/11u << 2
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1001 01mm mmmn nnnn . 101f 1010 01oo oooo [mem] st_s rn, 20100000 + om/11u << 2
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1001 01mm mmmn nnnn . 101f 1010 10oo oooo [mem] st_s rn, 20500000 + om/11u << 2
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1001 01mm mmmm nn01 . 101f 1011 00oo oooo [mem] st_v vn, 20000000 + om/11u << 4
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1001 01mm mmmm nn01 . 101f 1011 01oo oooo [mem] st_v vn, 20100000 + om/11u << 4
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1001 01mm mmmm nn01 . 101f 1011 10oo oooo [mem] st_v vn, 20500000 + om/11u << 4
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1001 0100 000n nnnn . 101f 1100 0000 101u [mem] st_s rn, (xy)
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1001 01nn nnnm mm00 . 101f 1100 0001 0000 [mem] st_v vm, (rn)
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1001 0100 000n nn00 . 101f 1100 0001 001u [mem] st_v vn, (xy)
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1001 01mm mmmv vvvv . 101f 111o ooow wwww [mem] st_s #wv/10u, 20500000 + om/9 << 4
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1001 10oo ooom mmmm . 1011 0000 000n nnnn [alu] add ro, rm, rn
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1001 10vv vvvm mmmm . 1011 0000 001n nnnn [alu] add #v/5u, rm, rn
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@ -147,10 +166,17 @@
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1001 10mm mmmn nnnn . 1011 1110 101d dddd [alu] cmpwc rm, >>#d/5s, rn
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1001 11oo ooom mm00 . 101f 1100 000n nnnn [mul] dotp ro, vm, >>svshift, rn
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1001 11mm mmmo oooo . 101f 1110 100n nnnn [mul] addm ro, rm, rn
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*/
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const nuon_disassembler::reginfo nuon_disassembler::reginfos[] = {
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{ 0x205001e0, "rc0" },
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{ 0x205001f0, "rc1" },
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{ 0x20500200, "rx" },
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{ 0x20500210, "ry" },
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{ 0x20500500, "odmactl" },
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{ 0x20500510, "omdacptr" },
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};
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u32 nuon_disassembler::opcode_alignment() const
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{
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return 2;
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@ -262,6 +288,34 @@ u32 nuon_disassembler::b(u16 val, int start, int count, int target)
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std::string nuon_disassembler::reg(u32 adr) const
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{
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const unsigned int reg_count = sizeof(reginfos) / sizeof(reginfo);
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const unsigned int last_index = reg_count - 1;
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const unsigned int fill1 = last_index | (last_index >> 1);
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const unsigned int fill2 = fill1 | (fill1 >> 2);
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const unsigned int fill4 = fill2 | (fill2 >> 4);
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const unsigned int fill8 = fill4 | (fill4 >> 8);
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const unsigned int fill16 = fill8 | (fill8 >> 16);
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const unsigned int ppow2 = fill16 - (fill16 >> 1);
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unsigned int slot = ppow2;
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unsigned int step = ppow2;
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while(step) {
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if(slot > last_index)
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slot = slot ^ (step | (step >> 1));
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else {
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u32 radr = reginfos[slot].adr;
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if(adr == radr)
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return reginfos[slot].name;
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if(adr > radr)
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slot = slot | (step >> 1);
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else
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slot = slot ^ (step | (step >> 1));
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}
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step = step >> 1;
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}
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if(reginfos[slot].adr == adr)
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return reginfos[slot].name;
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return util::string_format("0x%08x", adr);
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}
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@ -291,6 +345,8 @@ std::string nuon_disassembler::parse_packet(const data_buffer &opcodes, offs_t &
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// 16-bits normal non-alu
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cont = !(opc1 & 0x8000);
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pc += 2;
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// 16-bits mem
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if(m(opc1, 0x7c00, 0x4800)) return util::string_format("ld_s (r%d), r%d", b(opc1, 5, 5, 0), b(opc1, 0, 5, 0));
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if(m(opc1, 0x7c00, 0x4c00)) return util::string_format("st_s r%d, (r%d)", b(opc1, 0, 5, 0), b(opc1, 5, 5, 0));
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if(m(opc1, 0x7c00, 0x5000)) return util::string_format("ld_s %s, r%d", reg(0x20500000 | b(opc1, 5, 5, 4)), b(opc1, 0, 5, 0));
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@ -299,7 +355,17 @@ std::string nuon_disassembler::parse_packet(const data_buffer &opcodes, offs_t &
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if(m(opc1, 0x7c00, 0x5c00)) return util::string_format("mv_s #%s, (r%d)", u2x(b(opc1, 0, 5, 0), 5), b(opc1, 5, 5, 0));
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if(m(opc1, 0x7c00, 0x6800)) return util::string_format("bra %s%s", cc(b(opc1, 7, 3, 2), true), reg(bpc + s2i(b(opc1, 0, 7, 1), 8)));
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if(m(opc1, 0x7c00, 0x6c00)) return util::string_format("bra %s%s", cc(b(opc1, 7, 3, 2), true), reg(bpc + s2i(b(opc1, 0, 7, 1), 8)));
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// 16-bits ecu
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if(m(opc1, 0x7fff, 0x7001)) return util::string_format("halt");
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if(m(opc1, 0x7c1f, 0x7010)) return util::string_format("rts%s", cc(b(opc1, 5, 5, 0), false));
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if(m(opc1, 0x7c1f, 0x7011)) return util::string_format("rts %snop", cc(b(opc1, 5, 5, 0), true));
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if(m(opc1, 0x7c1f, 0x7012)) return util::string_format("rti %s(rzi1)", cc(b(opc1, 5, 5, 0), true));
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if(m(opc1, 0x7c1f, 0x7013)) return util::string_format("rti %s(rzi1), nop", cc(b(opc1, 5, 5, 0), true));
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if(m(opc1, 0x7c1f, 0x7014)) return util::string_format("rti %s(rzi2)", cc(b(opc1, 5, 5, 0), true));
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if(m(opc1, 0x7c1f, 0x7015)) return util::string_format("rti %s(rzi2), nop", cc(b(opc1, 5, 5, 0), true));
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// 16-bits rcu
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if(m(opc1, 0x7c04, 0x7400)) return dec(opc1, util::string_format("addr r%d, %s", b(opc1, 5, 5, 0), rx(b(opc1, 3, 2, 0))));
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if(m(opc1, 0x7c04, 0x7404)) return dec(opc1, util::string_format("addr %s << 16, %s", u2x(b(opc1, 5, 5, 0), 5), rx(b(opc1, 3, 2, 0))));
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if(m(opc1, 0x7ffc, 0x7904)) return dec(opc1);
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@ -325,23 +391,35 @@ std::string nuon_disassembler::parse_packet(const data_buffer &opcodes, offs_t &
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// 32-bit ecu instructions
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if(m(opc1, 0xfc00, 0x9000) && m(opc2, 0xee00, 0xa000)) return util::string_format("bra %s%s", cc(b(opc1, 5, 5, 0), true), reg(bpc + s2i(b(opc2, 0, 9, 6) | b(opc1, 0, 5, 1), 15)));
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if(m(opc1, 0xfc00, 0x9000) && m(opc2, 0xef80, 0xa400)) return util::string_format("jsr %s%s", cc(b(opc1, 5, 5, 0), true), reg(0x20200000 | b(opc2, 0, 7, 5) | b(opc1, 0, 5, 0)));
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if(m(opc1, 0xfc00, 0x9000) && m(opc2, 0xef80, 0xa500)) return util::string_format("jsr %s%s", cc(b(opc1, 5, 5, 0), true), reg(0x20300000 | b(opc2, 0, 7, 5) | b(opc1, 0, 5, 0)));
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if(m(opc1, 0xfc00, 0x9000) && m(opc2, 0xef80, 0xa200)) return util::string_format("jmp %s%s", cc(b(opc1, 5, 5, 0), true), reg(0x20200000 | b(opc2, 0, 7, 6) | b(opc1, 0, 5, 1)));
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if(m(opc1, 0xfc00, 0x9000) && m(opc2, 0xef80, 0xa300)) return util::string_format("jmp %s%s", cc(b(opc1, 5, 5, 0), true), reg(0x20300000 | b(opc2, 0, 7, 6) | b(opc1, 0, 5, 1)));
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if(m(opc1, 0xfc00, 0x9000) && m(opc2, 0xef80, 0xa400)) return util::string_format("jsr %s%s", cc(b(opc1, 5, 5, 0), true), reg(0x20200000 | b(opc2, 0, 7, 6) | b(opc1, 0, 5, 1)));
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if(m(opc1, 0xfc00, 0x9000) && m(opc2, 0xef80, 0xa500)) return util::string_format("jsr %s%s", cc(b(opc1, 5, 5, 0), true), reg(0x20300000 | b(opc2, 0, 7, 6) | b(opc1, 0, 5, 1)));
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if(m(opc1, 0xfc00, 0x9000) && m(opc2, 0xefff, 0xa680)) return util::string_format("jmp %s(r%d)", cc(b(opc1, 5, 5, 0), true), b(opc1, 0, 5, 0));
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if(m(opc1, 0xfc00, 0x9000) && m(opc2, 0xefff, 0xa700)) return util::string_format("jsr %s(r%d)", cc(b(opc1, 5, 5, 0), true), b(opc1, 0, 5, 0));
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if(m(opc1, 0xfc00, 0x9000) && m(opc2, 0xee00, 0xa800)) return util::string_format("bra %s%s, nop", cc(b(opc1, 5, 5, 0), true), reg(bpc + s2i(b(opc2, 0, 9, 6) | b(opc1, 0, 5, 1), 15)));
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if(m(opc1, 0xfc00, 0x9000) && m(opc2, 0xef80, 0xaa00)) return util::string_format("jsr %s%s, nop", cc(b(opc1, 5, 5, 0), true), reg(0x20200000 | b(opc2, 0, 7, 5) | b(opc1, 0, 5, 0)));
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if(m(opc1, 0xfc00, 0x9000) && m(opc2, 0xef80, 0xad00)) return util::string_format("jsr %s%s, nop", cc(b(opc1, 5, 5, 0), true), reg(0x20300000 | b(opc2, 0, 7, 5) | b(opc1, 0, 5, 0)));
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if(m(opc1, 0xfc00, 0x9000) && m(opc2, 0xef80, 0xaa00)) return util::string_format("jmp %s%s, nop", cc(b(opc1, 5, 5, 0), true), reg(0x20200000 | b(opc2, 0, 7, 6) | b(opc1, 0, 5, 1)));
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if(m(opc1, 0xfc00, 0x9000) && m(opc2, 0xef80, 0xab00)) return util::string_format("jmp %s%s, nop", cc(b(opc1, 5, 5, 0), true), reg(0x20300000 | b(opc2, 0, 7, 6) | b(opc1, 0, 5, 1)));
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if(m(opc1, 0xfc00, 0x9000) && m(opc2, 0xef80, 0xac00)) return util::string_format("jsr %s%s, nop", cc(b(opc1, 5, 5, 0), true), reg(0x20200000 | b(opc2, 0, 7, 6) | b(opc1, 0, 5, 1)));
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if(m(opc1, 0xfc00, 0x9000) && m(opc2, 0xef80, 0xad00)) return util::string_format("jsr %s%s, nop", cc(b(opc1, 5, 5, 0), true), reg(0x20300000 | b(opc2, 0, 7, 6) | b(opc1, 0, 5, 1)));
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if(m(opc1, 0xfc00, 0x9000) && m(opc2, 0xefff, 0xae80)) return util::string_format("jmp %s(r%d), nop", cc(b(opc1, 5, 5, 0), true), b(opc1, 0, 5, 0));
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if(m(opc1, 0xfc00, 0x9000) && m(opc2, 0xefff, 0xaf00)) return util::string_format("jsr %s(r%d), nop", cc(b(opc1, 5, 5, 0), true), b(opc1, 0, 5, 0));
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// 32-bit mem instructions
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if(m(opc1, 0xfc00, 0x9400) && m(opc2, 0xefc0, 0xa200)) return util::string_format("ld_s %s, r%d", reg(0x20000000 | b(opc2, 0, 6, 5) | b(opc1, 5, 5, 0)), b(opc1, 0, 5, 0));
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if(m(opc1, 0xfc00, 0x9400) && m(opc2, 0xefc0, 0xa240)) return util::string_format("ld_s %s, r%d", reg(0x20100000 | b(opc2, 0, 6, 5) | b(opc1, 5, 5, 0)), b(opc1, 0, 5, 0));
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if(m(opc1, 0xfc00, 0x9400) && m(opc2, 0xefc0, 0xa280)) return util::string_format("ld_s %s, r%d", reg(0x20500000 | b(opc2, 0, 6, 5) | b(opc1, 5, 5, 0)), b(opc1, 0, 5, 0));
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if(m(opc1, 0xfc00, 0x9400) && m(opc2, 0xefc0, 0xa200)) return util::string_format("ld_s %s, r%d", reg(0x20000000 | b(opc2, 0, 6, 7) | b(opc1, 5, 5, 2)), b(opc1, 0, 5, 0));
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if(m(opc1, 0xfc00, 0x9400) && m(opc2, 0xefc0, 0xa240)) return util::string_format("ld_s %s, r%d", reg(0x20100000 | b(opc2, 0, 6, 7) | b(opc1, 5, 5, 2)), b(opc1, 0, 5, 0));
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if(m(opc1, 0xfc00, 0x9400) && m(opc2, 0xefc0, 0xa280)) return util::string_format("ld_s %s, r%d", reg(0x20500000 | b(opc2, 0, 6, 7) | b(opc1, 5, 5, 2)), b(opc1, 0, 5, 0));
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if(m(opc1, 0xffe0, 0x9400) && m(opc2, 0xeffe, 0xa40a)) return util::string_format("ld_s %s, r%d", xy(b(opc2, 0, 1, 0)), b(opc1, 0, 5, 0));
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if(m(opc1, 0xfc00, 0x9400) && m(opc2, 0xefc0, 0xaa00)) return util::string_format("st_s r%d, %s", b(opc1, 0, 5, 0), reg(0x20000000 | b(opc2, 0, 6, 5) | b(opc1, 5, 5, 0)));
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if(m(opc1, 0xfc00, 0x9400) && m(opc2, 0xefc0, 0xaa40)) return util::string_format("st_s r%d, %s", b(opc1, 0, 5, 0), reg(0x20100000 | b(opc2, 0, 6, 5) | b(opc1, 5, 5, 0)));
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if(m(opc1, 0xfc00, 0x9400) && m(opc2, 0xefc0, 0xaa80)) return util::string_format("st_s r%d, %s", b(opc1, 0, 5, 0), reg(0x20500000 | b(opc2, 0, 6, 5) | b(opc1, 5, 5, 0)));
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if(m(opc1, 0xfc00, 0x9400) && m(opc2, 0xef80, 0xa600)) return util::string_format("mv_s #%s, %s", s2x(b(opc2, 0, 7, 5) | b(opc1, 0, 5, 0), 12), b(opc1, 5, 5, 0));
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if(m(opc1, 0xfc00, 0x9400) && m(opc2, 0xefc0, 0xaa00)) return util::string_format("st_s r%d, %s", b(opc1, 0, 5, 0), reg(0x20000000 | b(opc2, 0, 6, 7) | b(opc1, 5, 5, 2)));
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if(m(opc1, 0xfc00, 0x9400) && m(opc2, 0xefc0, 0xaa40)) return util::string_format("st_s r%d, %s", b(opc1, 0, 5, 0), reg(0x20100000 | b(opc2, 0, 6, 7) | b(opc1, 5, 5, 2)));
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if(m(opc1, 0xfc00, 0x9400) && m(opc2, 0xefc0, 0xaa80)) return util::string_format("st_s r%d, %s", b(opc1, 0, 5, 0), reg(0x20500000 | b(opc2, 0, 6, 7) | b(opc1, 5, 5, 2)));
|
||||
if(m(opc1, 0xffe0, 0x9400) && m(opc2, 0xeffe, 0xac0a)) return util::string_format("st_s r%d, %s", b(opc1, 0, 5, 0), xy(b(opc2, 0, 1, 0)));
|
||||
if(m(opc1, 0xfc03, 0x9401) && m(opc2, 0xefc0, 0xab00)) return util::string_format("st_v v%d, %s", b(opc1, 2, 3, 0), reg(0x20000000 | b(opc2, 0, 6, 9) | b(opc1, 5, 5, 4)));
|
||||
if(m(opc1, 0xfc03, 0x9401) && m(opc2, 0xefc0, 0xab40)) return util::string_format("st_v v%d, %s", b(opc1, 2, 3, 0), reg(0x20100000 | b(opc2, 0, 6, 9) | b(opc1, 5, 5, 4)));
|
||||
if(m(opc1, 0xfc03, 0x9401) && m(opc2, 0xefc0, 0xab80)) return util::string_format("st_v v%d, %s", b(opc1, 2, 3, 0), reg(0x20500000 | b(opc2, 0, 6, 9) | b(opc1, 5, 5, 4)));
|
||||
if(m(opc1, 0xfc03, 0x9400) && m(opc2, 0xefff, 0xac10)) return util::string_format("st_v v%d, (r%d)", b(opc1, 2, 3, 0), b(opc1, 5, 5, 0));
|
||||
if(m(opc1, 0xffe3, 0x9400) && m(opc2, 0xeffe, 0xac12)) return util::string_format("st_v v%d, %s", b(opc1, 2, 3, 0), xy(b(opc2, 0, 1, 0)));
|
||||
if(m(opc1, 0xfc00, 0x9400) && m(opc2, 0xee00, 0xae00)) return util::string_format("st_s #%s, %s", u2x(b(opc2, 0, 5, 5) | b(opc1, 0, 5, 0), 10), reg(0x20500000 | b(opc2, 5, 4, 9) | b(opc1, 5, 5, 4)));
|
||||
|
||||
// 32-bit alu instructions
|
||||
@ -396,8 +474,14 @@ std::string nuon_disassembler::parse_packet(const data_buffer &opcodes, offs_t &
|
||||
// 32+16-bits alu
|
||||
cont = false;
|
||||
pc += 6;
|
||||
if(m(opc3, 0xfc00, 0x0400)) return util::string_format("add #%s, r%d", s2x(b(opc1, 0, 11, 21) | b(opc2, 0, 16, 5) | b(opc3, 5, 5, 0), 32), b(opc1, 0, 5, 0));
|
||||
if(m(opc3, 0xfc00, 0x2000)) return util::string_format("cmp #%s, r%d", s2x(b(opc1, 0, 11, 21) | b(opc2, 0, 16, 5) | b(opc3, 5, 5, 0), 32), b(opc1, 0, 5, 0));
|
||||
if(m(opc3, 0xfc00, 0x0400))
|
||||
return util::string_format("add #%s, r%d",
|
||||
s2x(b(opc1, 0, 11, 21) | b(opc2, 0, 16, 5) | b(opc3, 5, 5, 0), 32),
|
||||
b(opc1, 0, 5, 0));
|
||||
if(m(opc3, 0xfc00, 0x2000))
|
||||
return util::string_format("cmp #%s, r%d",
|
||||
s2x(b(opc1, 0, 11, 21) | b(opc2, 0, 16, 5) | b(opc3, 5, 5, 0), 32),
|
||||
b(opc1, 0, 5, 0));
|
||||
|
||||
return util::string_format("?%04x %04x %04x", opc1, opc2, opc3);
|
||||
}
|
||||
@ -407,6 +491,11 @@ std::string nuon_disassembler::parse_packet(const data_buffer &opcodes, offs_t &
|
||||
cont = !(opc3 & 0x8000);
|
||||
pc += 6;
|
||||
|
||||
// 32+16-bits mem
|
||||
if(m(opc3, 0x7c00, 0x5c00))
|
||||
return util::string_format("mv_s #%s, r%d",
|
||||
s2x(b(opc1, 0, 11, 21) | b(opc2, 0, 16, 5) | b(opc3, 0, 5, 0), 32),
|
||||
b(opc3, 5, 5, 0));
|
||||
// 32+16-bits ecu
|
||||
if(m(opc3, 0x7c00, 0x6800) && m(opc2, 0x0004, 0x0000))
|
||||
return util::string_format("bra %s%s",
|
||||
|
||||
@ -18,6 +18,13 @@ public:
|
||||
virtual offs_t disassemble(std::ostream &stream, offs_t pc, const data_buffer &opcodes, const data_buffer ¶ms) override;
|
||||
|
||||
private:
|
||||
struct reginfo {
|
||||
u32 adr;
|
||||
const char *name;
|
||||
};
|
||||
|
||||
static const reginfo reginfos[];
|
||||
|
||||
std::string s2x(s32 val, int bits) const;
|
||||
std::string u2x(u32 val, int bits) const;
|
||||
s32 s2i(u32 val, int bits) const;
|
||||
|
||||
Loading…
Reference in New Issue
Block a user