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https://github.com/holub/mame
synced 2025-06-05 04:16:28 +03:00
New systems marked not working
------------------------------ Motorola MVME327A [Bitsavers]
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@ -2565,6 +2565,8 @@ if (BUSES["VME"]~=null) then
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MAME_DIR .. "src/devices/bus/vme/vme_mvme180.h",
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MAME_DIR .. "src/devices/bus/vme/vme_mvme181.cpp",
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MAME_DIR .. "src/devices/bus/vme/vme_mvme181.h",
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MAME_DIR .. "src/devices/bus/vme/vme_mvme327a.cpp",
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MAME_DIR .. "src/devices/bus/vme/vme_mvme327a.h",
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}
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end
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129
src/devices/bus/vme/vme_mvme327a.cpp
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129
src/devices/bus/vme/vme_mvme327a.cpp
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// license:BSD-3-Clause
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// copyright-holders:Patrick Mackinlay
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/*
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* Motorola MVME327A VMEbus To SCSI Bus Adapter
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*
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* Sources:
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* - MVME327A VMEbus To SCSI Bus Adapter And MVME717 Transition Module User's Manual (MVME327A/D1)
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*
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* TODO:
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* - skeleton only
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*/
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#include "emu.h"
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#include "vme_mvme327a.h"
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#include "bus/nscsi/hd.h"
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#include "bus/nscsi/cd.h"
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#define VERBOSE 0
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#include "logmacro.h"
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DEFINE_DEVICE_TYPE(VME_MVME327A, vme_mvme327a_device, "mvme327a", "Motorola MVME327A")
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vme_mvme327a_device::vme_mvme327a_device(machine_config const &mconfig, char const *tag, device_t *owner, u32 clock)
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: device_t(mconfig, VME_MVME327A, tag, owner, clock)
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, device_vme_card_interface(mconfig, *this)
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, m_cpu(*this, "cpu")
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, m_pit(*this, "pit")
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, m_bim(*this, "bim")
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, m_fdc(*this, "fdc")
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, m_scsi(*this, "scsi:7:wd33c93a")
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, m_boot(*this, "boot")
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{
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}
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ROM_START(mvme327a)
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ROM_REGION16_BE(0x20000, "eprom", 0)
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ROM_SYSTEM_BIOS(0, "v27", "327A 2.7 4/17/95")
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ROMX_LOAD("5527c29a.u34", 0x0001, 0x10000, CRC(2ef4cc9a) SHA1(0e80e208756995cb34c006d2f1e84a5978ad17d6), ROM_SKIP(1) | ROM_BIOS(0))
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ROMX_LOAD("5527c30a.u42", 0x0000, 0x10000, CRC(7be983d0) SHA1(ec5fc0709d8e91119d39231ace66f4fcbdb457e9), ROM_SKIP(1) | ROM_BIOS(0))
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ROM_END
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static INPUT_PORTS_START(mvme327a)
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INPUT_PORTS_END
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const tiny_rom_entry *vme_mvme327a_device::device_rom_region() const
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{
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return ROM_NAME(mvme327a);
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}
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ioport_constructor vme_mvme327a_device::device_input_ports() const
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{
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return INPUT_PORTS_NAME(mvme327a);
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}
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void vme_mvme327a_device::device_start()
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{
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}
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void vme_mvme327a_device::device_reset()
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{
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m_boot.select(0);
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}
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static void scsi_devices(device_slot_interface &device)
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{
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device.option_add("cdrom", NSCSI_CDROM);
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device.option_add("harddisk", NSCSI_HARDDISK);
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device.option_add("wd33c93a", WD33C93A);
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}
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void vme_mvme327a_device::device_add_mconfig(machine_config &config)
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{
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M68010(config, m_cpu, 20_MHz_XTAL / 2);
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m_cpu->set_addrmap(AS_PROGRAM, &vme_mvme327a_device::cpu_mem);
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m_cpu->set_addrmap(m68000_base_device::AS_CPU_SPACE, &vme_mvme327a_device::cpu_int);
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MC68153(config, m_bim, 0);
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PIT68230(config, m_pit, 0);
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WD37C65C(config, m_fdc, 0);
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NSCSI_BUS(config, "scsi", 0);
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NSCSI_CONNECTOR(config, "scsi:0", scsi_devices, nullptr, false);
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NSCSI_CONNECTOR(config, "scsi:1", scsi_devices, nullptr, false);
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NSCSI_CONNECTOR(config, "scsi:2", scsi_devices, nullptr, false);
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NSCSI_CONNECTOR(config, "scsi:3", scsi_devices, nullptr, false);
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NSCSI_CONNECTOR(config, "scsi:4", scsi_devices, nullptr, false);
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NSCSI_CONNECTOR(config, "scsi:5", scsi_devices, nullptr, false);
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NSCSI_CONNECTOR(config, "scsi:6", scsi_devices, nullptr, false);
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NSCSI_CONNECTOR(config, "scsi:7").option_set("wd33c93a", WD33C93A).machine_config(
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[this](device_t *device)
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{
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wd33c9x_base_device &wd33c93(downcast<wd33c9x_base_device &>(*device));
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wd33c93.set_clock(10000000);
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//wd33c93.irq_cb().set(*this, ...);
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//wd33c93.drq_cb().set(*this, ...);
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});
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}
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void vme_mvme327a_device::cpu_mem(address_map &map)
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{
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map(0x00'0000, 0x01'ffff).view(m_boot);
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m_boot[0](0x00'0000, 0x01'ffff).rom().region("eprom", 0);
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m_boot[1](0x00'0000, 0x01'ffff).ram();
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//map(0x04'0000, 0x04'0001).rw(m_scsi, FUNC(wd33c93a_device))
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//map(0x07'0000, 0x07'0003).m(m_fdc, &wd37c65c_device::map).umask16(0x00ff);
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map(0x0b'0000, 0x0b'003f).rw(m_pit, FUNC(pit68230_device::read), FUNC(pit68230_device::write)).mirror(0xffc0).umask16(0x00ff);
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map(0x0c'0000, 0x0c'000f).rw(m_bim, FUNC(bim68153_device::read), FUNC(bim68153_device::write)).mirror(0xfff0).umask16(0x00ff);
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map(0x10'0000, 0x11'ffff).rom().region("eprom", 0);
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map(0x10'0000, 0x10'0003).lw16([this](u32 data) { m_boot.select(1); }, "ram_enable");
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// 0x80'0000-0xff'ffff VMEbus access
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}
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void vme_mvme327a_device::cpu_int(address_map &map)
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{
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map(0xfffff3, 0xfffff3).lr8(NAME([]() { return m68000_base_device::autovector(1); }));
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map(0xfffff5, 0xfffff5).lr8(NAME([]() { return m68000_base_device::autovector(2); }));
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map(0xfffff7, 0xfffff7).lr8(NAME([]() { return m68000_base_device::autovector(3); }));
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map(0xfffff9, 0xfffff9).lr8(NAME([]() { return m68000_base_device::autovector(4); }));
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map(0xfffffb, 0xfffffb).lr8(NAME([]() { return m68000_base_device::autovector(5); }));
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map(0xfffffd, 0xfffffd).lr8(NAME([]() { return m68000_base_device::autovector(6); }));
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map(0xffffff, 0xffffff).lr8(NAME([]() { return m68000_base_device::autovector(7); }));
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}
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48
src/devices/bus/vme/vme_mvme327a.h
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48
src/devices/bus/vme/vme_mvme327a.h
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@ -0,0 +1,48 @@
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// license:BSD-3-Clause
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// copyright-holders:Patrick Mackinlay
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#ifndef MAME_BUS_VME_MVME327A_H
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#define MAME_BUS_VME_MVME327A_H
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#pragma once
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#include "cpu/m68000/m68010.h"
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#include "machine/68230pit.h"
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#include "machine/68153bim.h"
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#include "machine/wd33c9x.h"
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#include "machine/upd765.h"
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#include "bus/vme/vme.h"
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class vme_mvme327a_device
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: public device_t
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, public device_vme_card_interface
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{
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public:
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vme_mvme327a_device(machine_config const &mconfig, char const *tag, device_t *owner, u32 clock);
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protected:
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virtual const tiny_rom_entry *device_rom_region() const override;
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virtual void device_add_mconfig(machine_config &config) override;
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virtual ioport_constructor device_input_ports() const override;
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virtual void device_start() override;
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virtual void device_reset() override;
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private:
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void cpu_mem(address_map &map);
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void cpu_int(address_map &map);
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required_device<m68010_device> m_cpu;
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required_device<pit68230_device> m_pit;
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required_device<bim68153_device> m_bim;
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required_device<wd37c65c_device> m_fdc;
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required_device<wd33c93a_device> m_scsi;
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memory_view m_boot;
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};
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DECLARE_DEVICE_TYPE(VME_MVME327A, vme_mvme327a_device)
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#endif // MAME_BUS_VME_MVME327A_H
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