From c468f15762cb398fd2ceb9ada6e8705b43a64380 Mon Sep 17 00:00:00 2001
From: Damian Rogers <damian@sudden-desu.net>
Date: Wed, 6 May 2020 20:56:40 +0900
Subject: [PATCH] Add partial support for all IAC messages

---
 src/devices/cpu/i960/i960.cpp | 21 +++++++++++++++++++++
 1 file changed, 21 insertions(+)

diff --git a/src/devices/cpu/i960/i960.cpp b/src/devices/cpu/i960/i960.cpp
index 10409923b15..abf2c089cb2 100644
--- a/src/devices/cpu/i960/i960.cpp
+++ b/src/devices/cpu/i960/i960.cpp
@@ -91,6 +91,27 @@ void i960_cpu_device::send_iac(uint32_t adr)
 	iac[3] = m_program->read_dword(adr+12);
 
 	switch(iac[0]>>24) {
+	case 0x40:  // generate irq
+		break;
+	case 0x41:  // test for pending interrupts
+		// check_irqs() seems to take care of this
+		// though it may not be entirely accurate
+		check_irqs();
+		break;
+	case 0x80:  // store SAT & PRCB in memory
+		m_program->write_dword(iac[1], m_SAT);
+		m_program->write_dword(iac[1]+4, m_PRCB);
+		break;
+	case 0x89:  // invalidate internal instruction cache
+		// we do not emulate the instruction cache, so this is safe to ignore
+		break;
+	case 0x8F:  // enable/disable breakpoints
+		// processor breakpoints are not emulated, safe to ignore
+		break;
+	case 0x91:  // stop processor
+		break;
+	case 0x92:  // continue initialization
+		break;
 	case 0x93: // reinit
 		m_SAT  = iac[1];
 		m_PRCB = iac[2];