Added PPC405GP to PPC cpu core [Lukasz Markowski]

Added custom DCR read/write handlers to PPC cpu core [Miodrag Milanovic]
This commit is contained in:
Miodrag Milanovic 2012-05-12 13:46:49 +00:00
parent 6208b1031e
commit 1d8b745188
11 changed files with 160 additions and 14 deletions

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@ -973,6 +973,52 @@ static CPU_EXIT( ppc403 )
}
static CPU_INIT( ppc405 )
{
const ppc_config *configdata = device->static_config();
ppc_init();
/* PPC403 specific opcodes */
ppc.optable31[454] = ppc_dccci;
ppc.optable31[486] = ppc_dcread;
ppc.optable31[262] = ppc_icbt;
ppc.optable31[966] = ppc_iccci;
ppc.optable31[998] = ppc_icread;
ppc.optable31[323] = ppc_mfdcr;
ppc.optable31[451] = ppc_mtdcr;
ppc.optable31[131] = ppc_wrtee;
ppc.optable31[163] = ppc_wrteei;
// !!! why is rfci here !!!
ppc.optable19[51] = ppc_rfci;
ppc.spu.rx_timer = device->machine().scheduler().timer_alloc(FUNC(ppc403_spu_rx_callback));
ppc.spu.tx_timer = device->machine().scheduler().timer_alloc(FUNC(ppc403_spu_tx_callback));
ppc.read8 = ppc403_read8;
ppc.read16 = ppc403_read16;
ppc.read32 = ppc403_read32;
ppc.write8 = ppc403_write8;
ppc.write16 = ppc403_write16;
ppc.write32 = ppc403_write32;
ppc.read16_unaligned = ppc403_read16_unaligned;
ppc.read32_unaligned = ppc403_read32_unaligned;
ppc.write16_unaligned = ppc403_write16_unaligned;
ppc.write32_unaligned = ppc403_write32_unaligned;
ppc.irq_callback = irqcallback;
ppc.device = device;
ppc.program = device->space(AS_PROGRAM);
ppc.pvr = configdata->pvr;
}
static CPU_EXIT( ppc405 )
{
}
static CPU_INIT( ppc603 )
{
const ppc_config *configdata = device->static_config();
@ -1893,6 +1939,32 @@ CPU_GET_INFO( ppc403 )
}
}
CPU_GET_INFO( ppc405 )
{
switch(state)
{
/* --- the following bits of info are returned as 64-bit signed integers --- */
case CPUINFO_INT_INPUT_LINES: info->i = 8; break;
case DEVINFO_INT_ENDIANNESS: info->i = ENDIANNESS_BIG; break;
case CPUINFO_INT_REGISTER + PPC_EXIER: info->i = EXIER; break;
case CPUINFO_INT_REGISTER + PPC_EXISR: info->i = EXISR; break;
/* --- the following bits of info are returned as pointers to data or functions --- */
case CPUINFO_FCT_SET_INFO: info->setinfo = CPU_SET_INFO_NAME(ppc403); break;
case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(ppc403); break;
case CPUINFO_FCT_RESET: info->reset = CPU_RESET_NAME(ppc403); break;
case CPUINFO_FCT_EXIT: info->exit = CPU_EXIT_NAME(ppc403); break;
case CPUINFO_FCT_EXECUTE: info->execute = CPU_EXECUTE_NAME(ppc403); break;
/* --- the following bits of info are returned as NULL-terminated strings --- */
case DEVINFO_STR_NAME: strcpy(info->s, "PPC403"); break;
case CPUINFO_STR_REGISTER + PPC_EXIER: sprintf(info->s, "EXIER: %08X", EXIER); break;
case CPUINFO_STR_REGISTER + PPC_EXISR: sprintf(info->s, "EXISR: %08X", EXISR); break;
default: CPU_GET_INFO_CALL(ppc); break;
}
}
CPU_GET_INFO( ppc603 )
{
switch(state)
@ -2098,6 +2170,8 @@ CPU_GET_INFO( ppc604 )
DEFINE_LEGACY_CPU_DEVICE(PPC403GA, ppc403ga);
DEFINE_LEGACY_CPU_DEVICE(PPC403GCX, ppc403gcx);
DEFINE_LEGACY_CPU_DEVICE(PPC405GP, ppc405gp);
DEFINE_LEGACY_CPU_DEVICE(PPC601, ppc601);
DEFINE_LEGACY_CPU_DEVICE(PPC602, ppc602);
DEFINE_LEGACY_CPU_DEVICE(PPC603, ppc603);

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@ -151,6 +151,8 @@ typedef struct _powerpc_config powerpc_config;
struct _powerpc_config
{
UINT32 bus_frequency;
read32_device_func dcr_read_func;
write32_device_func dcr_write_func;
};
@ -170,6 +172,8 @@ void ppc4xx_spu_receive_byte(device_t *device, UINT8 byteval);
DECLARE_LEGACY_CPU_DEVICE(PPC403GA, ppc403ga);
DECLARE_LEGACY_CPU_DEVICE(PPC403GCX, ppc403gcx);
DECLARE_LEGACY_CPU_DEVICE(PPC405GP, ppc405gp);
DECLARE_LEGACY_CPU_DEVICE(PPC601, ppc601);
DECLARE_LEGACY_CPU_DEVICE(PPC602, ppc602);
DECLARE_LEGACY_CPU_DEVICE(PPC603, ppc603);

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@ -318,6 +318,9 @@ void ppccom_init(powerpc_state *ppc, powerpc_flavor flavor, UINT8 cap, int tb_di
ppc->program = device->space(AS_PROGRAM);
ppc->direct = &ppc->program->direct();
ppc->system_clock = (config != NULL) ? config->bus_frequency : device->clock();
ppc->dcr_read_func = (config != NULL) ? config->dcr_read_func : NULL;
ppc->dcr_write_func = (config != NULL) ? config->dcr_write_func : NULL;
ppc->tb_divisor = (ppc->tb_divisor * device->clock() + ppc->system_clock / 2 - 1) / ppc->system_clock;
ppc->codexor = 0;
if (!(cap & PPCCAP_4XX) && device->space_config()->m_endianness != ENDIANNESS_NATIVE)
@ -1085,10 +1088,14 @@ void ppccom_execute_mfdcr(powerpc_state *ppc)
/* default handling */
mame_printf_debug("DCR %03X read\n", ppc->param0);
if (ppc->param0 < ARRAY_LENGTH(ppc->dcr))
ppc->param1 = ppc->dcr[ppc->param0];
else
ppc->param1 = 0;
if (!ppc->dcr_read_func) {
if (ppc->param0 < ARRAY_LENGTH(ppc->dcr))
ppc->param1 = ppc->dcr[ppc->param0];
else
ppc->param1 = 0;
} else {
ppc->param1 = ppc->dcr_read_func(ppc->device,ppc->param0,0xffffffff);
}
}
@ -1173,8 +1180,12 @@ void ppccom_execute_mtdcr(powerpc_state *ppc)
/* default handling */
mame_printf_debug("DCR %03X write = %08X\n", ppc->param0, ppc->param1);
if (ppc->param0 < ARRAY_LENGTH(ppc->dcr))
ppc->dcr[ppc->param0] = ppc->param1;
if (!ppc->dcr_write_func) {
if (ppc->param0 < ARRAY_LENGTH(ppc->dcr))
ppc->dcr[ppc->param0] = ppc->param1;
} else {
ppc->dcr_write_func(ppc->device,ppc->param0,ppc->param1,0xffffffff);
}
}

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@ -565,6 +565,9 @@ struct _powerpc_state
/* for use by specific implementations */
ppcimp_state * impstate;
read32_device_func dcr_read_func;
write32_device_func dcr_write_func;
};

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@ -441,6 +441,7 @@ INLINE powerpc_state *get_safe_token(device_t *device)
assert(device != NULL);
assert(device->type() == PPC403GA ||
device->type() == PPC403GCX ||
device->type() == PPC405GP ||
device->type() == PPC601 ||
device->type() == PPC602 ||
device->type() == PPC603 ||
@ -4428,6 +4429,41 @@ CPU_GET_INFO( ppc403gcx )
/*-------------------------------------------------
ppc403gcx_init - PowerPC 403GCX-specific
initialization
-------------------------------------------------*/
static CPU_INIT( ppc405gp )
{
ppcdrc_init(PPC_MODEL_405GP, PPCCAP_4XX | PPCCAP_VEA, 1, device, irqcallback);
}
/*-------------------------------------------------
ppc403gcx_get_info - PowerPC 403GCX-specific
information getter
-------------------------------------------------*/
CPU_GET_INFO( ppc405gp )
{
switch (state)
{
/* --- the following bits of info are returned as 64-bit signed integers --- */
/* --- the following bits of info are returned as pointers to data or functions --- */
case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(ppc405gp); break;
case CPUINFO_FCT_SET_INFO: info->setinfo = CPU_SET_INFO_NAME(ppcdrc4xx); break;
/* --- the following bits of info are returned as NULL-terminated strings --- */
case DEVINFO_STR_NAME: strcpy(info->s, "PowerPC 405GP"); break;
/* --- everything else is handled generically --- */
default: CPU_GET_INFO_CALL(ppcdrc4xx); break;
}
}
/***************************************************************************
PPC 6XX VARIANTS
***************************************************************************/
@ -4677,6 +4713,8 @@ CPU_GET_INFO( mpc8240 )
DEFINE_LEGACY_CPU_DEVICE(PPC403GA, ppc403ga);
DEFINE_LEGACY_CPU_DEVICE(PPC403GCX, ppc403gcx);
DEFINE_LEGACY_CPU_DEVICE(PPC405GP, ppc405gp);
DEFINE_LEGACY_CPU_DEVICE(PPC601, ppc601);
DEFINE_LEGACY_CPU_DEVICE(PPC602, ppc602);
DEFINE_LEGACY_CPU_DEVICE(PPC603, ppc603);

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@ -1145,7 +1145,9 @@ INPUT_PORTS_END
static const powerpc_config ppc602_config =
{
33000000 /* Multiplier 2, Bus = 33MHz, Core = 66MHz */
33000000, /* Multiplier 2, Bus = 33MHz, Core = 66MHz */
NULL,
NULL
};
static INTERRUPT_GEN(m2)

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@ -41,7 +41,9 @@ INPUT_PORTS_END
static const powerpc_config ppc603e_config =
{
XTAL_66_6667MHz /* Multiplier 1.5, Bus = 66MHz, Core = 100MHz */
XTAL_66_6667MHz, /* Multiplier 1.5, Bus = 66MHz, Core = 100MHz */
NULL,
NULL
};

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@ -5123,19 +5123,25 @@ static TIMER_DEVICE_CALLBACK(model3_interrupt)
static const powerpc_config model3_10 =
{
/* 603e, Stretch, 1.3 */
66000000 /* Multiplier 1, Bus = 66MHz, Core = 66MHz */
66000000, /* Multiplier 1, Bus = 66MHz, Core = 66MHz */
NULL,
NULL
};
static const powerpc_config model3_15 =
{
/* 603e, Stretch, 1.3 */
66000000 /* Multiplier 1.5, Bus = 66MHz, Core = 100MHz */
66000000, /* Multiplier 1.5, Bus = 66MHz, Core = 100MHz */
NULL,
NULL
};
static const powerpc_config model3_2x =
{
/* 603e-PID7t, Goldeneye, 2.1 */
66000000 /* Multiplier 2.5, Bus = 66MHz, Core = 166MHz */
66000000, /* Multiplier 2.5, Bus = 66MHz, Core = 166MHz */
NULL,
NULL
};
static MACHINE_CONFIG_START( model3_10, model3_state )

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@ -398,7 +398,9 @@ INPUT_PORTS_END
static const powerpc_config ppc603e_config =
{
XTAL_66_6667MHz /* Multiplier 1.5, Bus = 66MHz, Core = 100MHz */
XTAL_66_6667MHz, /* Multiplier 1.5, Bus = 66MHz, Core = 100MHz */
NULL,
NULL
};
static const tlcs900_interface taitopjc_tlcs900_interface =

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@ -401,7 +401,9 @@ static INTERRUPT_GEN( taitotz_vbi )
static const powerpc_config ppc603e_config =
{
XTAL_66_6667MHz /* Multiplier 1.5, Bus = 66MHz, Core = 100MHz */
XTAL_66_6667MHz, /* Multiplier 1.5, Bus = 66MHz, Core = 100MHz */
NULL,
NULL
};
static const tlcs900_interface taitotz_tlcs900_interface =

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@ -1899,7 +1899,9 @@ INPUT_PORTS_END
static const powerpc_config viper_ppc_cfg =
{
100000000
100000000,
NULL,
NULL
};
static INTERRUPT_GEN(viper_vblank)