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Add HD6805U1 type for future use (nw)

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This commit is contained in:
AJR 2019-09-26 19:38:00 -04:00
parent 548dfff0fb
commit 1d8c814c50
2 changed files with 18 additions and 0 deletions
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9
src/devices/cpu/m6805/m68705.cpp
View File

@ -119,6 +119,7 @@ DEFINE_DEVICE_TYPE(M6805R2, m6805r2_device, "m6805r2", "Motorola MC6805R2")
DEFINE_DEVICE_TYPE(M6805R3, m6805r3_device, "m6805r3", "Motorola MC6805R3")
DEFINE_DEVICE_TYPE(M6805U2, m6805u2_device, "m6805u2", "Motorola MC6805U2")
DEFINE_DEVICE_TYPE(M6805U3, m6805u3_device, "m6805u3", "Motorola MC6805U3")
DEFINE_DEVICE_TYPE(HD6805U1, hd6805u1_device, "hd6805u1", "Hitachi HD6805U1")
/****************************************************************************
* M68705 base device
@ -816,6 +817,13 @@ m6805u3_device::m6805u3_device(machine_config const &mconfig, char const *tag, d
m_timer.set_options(m6805_timer::TIMER_PGM);
}
hd6805u1_device::hd6805u1_device(machine_config const &mconfig, char const *tag, device_t *owner, uint32_t clock)
: m6805_mrom_device(mconfig, tag, owner, clock, HD6805U1, 12, 96)
{
// Port D has optional analog comparator but no INT2 (no MISC register, either)
m_timer.set_options(m6805_timer::TIMER_PGM | m6805_timer::TIMER_NPC);
}
void m6805_hmos_device::internal_map(address_map &map)
{
map.unmap_value_high();
@ -857,6 +865,7 @@ void m6805_mrom_device::internal_map(address_map &map)
* 6805S3 0000-007f 0080-00ff 0100-0eff 0f00-0ff7 0ff8-0fff
* 6805U2 0000-007f 0080-00ff 07c0-0f37 0f38-0ff7 0ff8-0fff
* 6805U3 0000-007f 0080-0f37 0f38-0ff7 0ff8-0fff
* 6805U1 0000-007f 0080-00ff 0800-0f7f 0f80-0ff7 0ff8-0fff
*
* This code assumes that dumps are captured contiguously from address 0 to
* the end of the address range, and are not split by range. Register, RAM

9
src/devices/cpu/m6805/m68705.h
View File

@ -15,6 +15,7 @@ DECLARE_DEVICE_TYPE(M6805R3, m6805r3_device)
//DECLARE_DEVICE_TYPE(M6805S3, m6805s3_device) // A/D, SPI, multiple timers
DECLARE_DEVICE_TYPE(M6805U2, m6805u2_device)
DECLARE_DEVICE_TYPE(M6805U3, m6805u3_device)
DECLARE_DEVICE_TYPE(HD6805U1, hd6805u1_device)
DECLARE_DEVICE_TYPE(M68705P3, m68705p3_device)
DECLARE_DEVICE_TYPE(M68705P5, m68705p5_device)
@ -112,6 +113,8 @@ private:
u8 m_tcr;
};
DECLARE_ENUM_BITWISE_OPERATORS(m6805_timer::timer_options);
// abstract device classes
class m6805_hmos_device : public m6805_base_device
{
@ -371,6 +374,12 @@ public:
protected:
};
class hd6805u1_device : public m6805_mrom_device
{
public:
hd6805u1_device(machine_config const &mconfig, char const *tag, device_t *owner, u32 clock);
};
class m68705p3_device : public m68705p_device
{
public: