mirror of
https://github.com/holub/mame
synced 2025-04-16 05:24:54 +03:00
lnw80: used derived class to reduce number of duplicate functions.
This commit is contained in:
Robbbert
parent
92ebbbaee1
commit
1da36f8ce5
@ -3,8 +3,7 @@
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/***************************************************************************
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Memory map
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0000-2fff ROM R D0-D7
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3000-37ff ROM R D0-D7
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0000-37ff ROM R D0-D7
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37de UART status R/W D0-D7
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37df UART data R/W D0-D7
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37e0 for the realtime clock
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@ -79,50 +78,17 @@ To Do / Status:
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*******************************************************************************************************/
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#include "emu.h"
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#include "bus/centronics/ctronics.h"
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#include "cpu/z80/z80.h"
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#include "includes/trs80.h"
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#include "machine/bankdev.h"
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#include "imagedev/cassette.h"
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#include "imagedev/floppy.h"
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#include "imagedev/snapquik.h"
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#include "machine/ay31015.h"
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#include "machine/clock.h"
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#include "bus/rs232/rs232.h"
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#include "machine/buffer.h"
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#include "machine/wd_fdc.h"
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#include "sound/spkrdev.h"
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#include "emupal.h"
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#include "screen.h"
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#include "speaker.h"
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#include "formats/td0_dsk.h"
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#include "formats/trs80_dsk.h"
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class lnw80_state : public driver_device
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class lnw80_state : public trs80_state
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{
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public:
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lnw80_state(const machine_config &mconfig, device_type type, const char *tag)
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: driver_device(mconfig, type, tag)
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, m_maincpu(*this, "maincpu")
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, m_region_maincpu(*this, "maincpu")
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, m_p_chargen(*this, "chargen")
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, m_p_videoram(*this, "videoram")
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: trs80_state(mconfig, type, tag)
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, m_p_gfxram(*this, "gfxram")
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, m_lnw_bank(*this, "lnw_banked_mem")
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, m_centronics(*this, "centronics")
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, m_cent_data_out(*this, "cent_data_out")
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, m_cent_status_in(*this, "cent_status_in")
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, m_uart(*this, "uart")
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, m_uart_clock(*this, "uart_clock")
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, m_fdc(*this, "fdc")
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, m_floppy0(*this, "fdc:0")
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, m_floppy1(*this, "fdc:1")
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, m_floppy2(*this, "fdc:2")
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, m_floppy3(*this, "fdc:3")
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, m_speaker(*this, "speaker")
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, m_cassette(*this, "cassette")
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, m_io_baud(*this, "BAUD")
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, m_io_config(*this, "CONFIG")
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, m_io_keyboard(*this, "LINE%u", 0)
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{ }
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void lnw80(machine_config &config);
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@ -133,66 +99,18 @@ protected:
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private:
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static void floppy_formats(format_registration &fr);
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void port_ff_w(uint8_t data);
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void lnw80_fe_w(uint8_t data);
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void port_ea_w(uint8_t data);
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void port_e8_w(uint8_t data);
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uint8_t lnw80_fe_r();
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uint8_t port_ff_r();
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uint8_t port_ea_r();
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uint8_t port_e8_r();
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uint8_t irq_status_r();
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uint8_t printer_r();
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void printer_w(uint8_t data);
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void motor_w(uint8_t data);
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uint8_t keyboard_r(offs_t offset);
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u8 fdc_r(offs_t offset);
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void fdc_w(offs_t offset, u8 data);
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INTERRUPT_GEN_MEMBER(rtc_interrupt);
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INTERRUPT_GEN_MEMBER(fdc_interrupt);
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TIMER_CALLBACK_MEMBER(cassette_data_callback);
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DECLARE_WRITE_LINE_MEMBER(intrq_w);
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DECLARE_QUICKLOAD_LOAD_MEMBER(quickload_cb);
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void lnw80_palette(palette_device &palette) const;
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uint32_t screen_update_lnw80(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect);
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uint32_t screen_update(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect);
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void lnw80_io(address_map &map);
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void lnw80_mem(address_map &map);
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void lnw_banked_mem(address_map &map);
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bool m_mode;
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uint8_t m_irq;
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uint8_t m_mask;
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bool m_reg_load;
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u8 m_lnw_mode;
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bool m_cassette_data;
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emu_timer *m_cassette_data_timer;
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double m_old_cassette_val;
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uint8_t m_size_store;
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uint16_t m_timeout;
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floppy_image_device *m_floppy;
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required_device<cpu_device> m_maincpu;
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required_memory_region m_region_maincpu;
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required_region_ptr<u8> m_p_chargen;
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required_shared_ptr<u8> m_p_videoram;
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required_shared_ptr<u8> m_p_gfxram;
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required_device<address_map_bank_device> m_lnw_bank;
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required_device<centronics_device> m_centronics;
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required_device<output_latch_device> m_cent_data_out;
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required_device<input_buffer_device> m_cent_status_in;
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required_device<ay31015_device> m_uart;
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required_device<clock_device> m_uart_clock;
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required_device<fd1771_device> m_fdc;
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required_device<floppy_connector> m_floppy0;
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required_device<floppy_connector> m_floppy1;
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required_device<floppy_connector> m_floppy2;
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required_device<floppy_connector> m_floppy3;
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required_device<speaker_sound_device> m_speaker;
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required_device<cassette_image_device> m_cassette;
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required_ioport m_io_baud;
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required_ioport m_io_config;
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required_ioport_array<8> m_io_keyboard;
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};
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@ -363,21 +281,6 @@ static INPUT_PORTS_START( lnw80 )
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PORT_DIPSETTING( 0x07, "19200")
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INPUT_PORTS_END
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#define IRQ_M1_RTC 0x80 /* RTC on Model I */
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#define IRQ_M1_FDC 0x40 /* FDC on Model I */
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TIMER_CALLBACK_MEMBER(lnw80_state::cassette_data_callback)
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{
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double new_val = (m_cassette->input());
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/* Check for HI-LO transition */
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if ( m_old_cassette_val > -0.2 && new_val < -0.2 )
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m_cassette_data = true;
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m_old_cassette_val = new_val;
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}
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/*************************************
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*
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@ -386,98 +289,11 @@ TIMER_CALLBACK_MEMBER(lnw80_state::cassette_data_callback)
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*************************************/
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uint8_t lnw80_state::port_e8_r()
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{
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/* not emulated
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d7 Clear-to-Send (CTS), Pin 5
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d6 Data-Set-Ready (DSR), pin 6
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d5 Carrier Detect (CD), pin 8
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d4 Ring Indicator (RI), pin 22
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d3,d2,d0 Not used
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d1 UART Receiver Input, pin 20 (pin 20 is also DTR) */
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return 0;
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}
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uint8_t lnw80_state::port_ea_r()
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{
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/* UART Status Register
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d7 Data Received ('1'=condition true)
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d6 Transmitter Holding Register empty ('1'=condition true)
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d5 Overrun Error ('1'=condition true)
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d4 Framing Error ('1'=condition true)
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d3 Parity Error ('1'=condition true)
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d2..d0 Not used */
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uint8_t data=7;
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m_uart->write_swe(0);
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data |= m_uart->tbmt_r() ? 0x40 : 0;
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data |= m_uart->dav_r( ) ? 0x80 : 0;
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data |= m_uart->or_r( ) ? 0x20 : 0;
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data |= m_uart->fe_r( ) ? 0x10 : 0;
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data |= m_uart->pe_r( ) ? 0x08 : 0;
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m_uart->write_swe(1);
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return data;
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}
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void lnw80_state::port_e8_w(uint8_t data)
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{
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m_reg_load = BIT(data, 1);
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}
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void lnw80_state::port_ea_w(uint8_t data)
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{
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if (m_reg_load)
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/* d2..d0 not emulated
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d7 Even Parity Enable ('1'=even, '0'=odd)
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d6='1',d5='1' for 8 bits
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d6='0',d5='1' for 7 bits
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d6='1',d5='0' for 6 bits
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d6='0',d5='0' for 5 bits
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d4 Stop Bit Select ('1'=two stop bits, '0'=one stop bit)
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d3 Parity Inhibit ('1'=disable; No parity, '0'=parity enabled)
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d2 Break ('0'=disable transmit data; continuous RS232 'SPACE' condition)
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d1 Request-to-Send (RTS), pin 4
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d0 Data-Terminal-Ready (DTR), pin 20 */
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{
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m_uart->write_cs(0);
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m_uart->write_nb1(BIT(data, 6));
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m_uart->write_nb2(BIT(data, 5));
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m_uart->write_tsb(BIT(data, 4));
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m_uart->write_eps(BIT(data, 7));
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m_uart->write_np(BIT(data, 3));
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m_uart->write_cs(1);
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}
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else
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{
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/* not emulated
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d7,d6 Not used
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d5 Secondary Unassigned, pin 18
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d4 Secondary Transmit Data, pin 14
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d3 Secondary Request-to-Send, pin 19
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d2 Break ('0'=disable transmit data; continuous RS232 'SPACE' condition)
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d1 Data-Terminal-Ready (DTR), pin 20
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d0 Request-to-Send (RTS), pin 4 */
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}
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}
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uint8_t lnw80_state::lnw80_fe_r()
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{
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return m_lnw_mode;
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}
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uint8_t lnw80_state::port_ff_r()
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{
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/* ModeSel and cassette data
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d7 cassette data from tape
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d6 modesel setting */
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return (m_mode ? 0 : 0x40) | (m_cassette_data ? 0x80 : 0) | 0x3f;
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}
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/* lnw80 can switch out all the devices, roms and video ram to be replaced by graphics ram. */
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void lnw80_state::lnw80_fe_w(uint8_t data)
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@ -493,147 +309,6 @@ void lnw80_state::lnw80_fe_w(uint8_t data)
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m_lnw_bank->set_bank(BIT(data, 3));
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}
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void lnw80_state::port_ff_w(uint8_t data)
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{
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/* Standard output port of Model I
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d3 ModeSel bit
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d2 Relay
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d1, d0 Cassette output */
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static const double levels[4] = { 0.0, 1.0, -1.0, 0.0 };
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m_cassette->change_state(BIT(data, 2) ? CASSETTE_MOTOR_ENABLED : CASSETTE_MOTOR_DISABLED, CASSETTE_MASK_MOTOR );
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m_cassette->output(levels[data & 3]);
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m_cassette_data = false;
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m_mode = BIT(data, 3);
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static const double speaker_levels[4] = { 0.0, -1.0, 0.0, 1.0 };
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m_speaker->set_levels(4, speaker_levels);
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m_speaker->level_w(data & 3);
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}
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/*************************************
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*
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* Interrupt handlers.
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*
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*************************************/
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INTERRUPT_GEN_MEMBER(lnw80_state::rtc_interrupt)
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{
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/* This enables the processing of interrupts for the clock and the flashing cursor.
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The OS counts one tick for each interrupt. It is called 40 times per second. */
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m_irq |= IRQ_M1_RTC;
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m_maincpu->set_input_line(0, HOLD_LINE);
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// While we're here, let's countdown the motor timeout too.
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// Let's not... LDOS often freezes
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// if (m_timeout)
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// {
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// m_timeout--;
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// if (m_timeout == 0)
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// if (m_floppy)
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// m_floppy->mon_w(1); // motor off
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// }
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}
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WRITE_LINE_MEMBER(lnw80_state::intrq_w)
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{
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if (state)
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{
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m_irq |= IRQ_M1_FDC;
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m_maincpu->set_input_line(0, HOLD_LINE);
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}
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else
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m_irq &= ~IRQ_M1_FDC;
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}
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/*************************************
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* *
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* Memory handlers *
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* *
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*************************************/
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u8 lnw80_state::fdc_r(offs_t offset)
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{
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if ((offset == 0) && (!BIT(m_io_config->read(), 7)))
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return 0xff;
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else
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return m_fdc->read(offset) ^ 0xff;
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}
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void lnw80_state::fdc_w(offs_t offset, u8 data)
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{
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m_fdc->write(offset, data ^ 0xff);
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}
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uint8_t lnw80_state::printer_r()
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{
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return m_cent_status_in->read();
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}
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void lnw80_state::printer_w(uint8_t data)
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{
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m_cent_data_out->write(data);
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m_centronics->write_strobe(0);
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m_centronics->write_strobe(1);
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}
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uint8_t lnw80_state::irq_status_r()
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{
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/* (trs80l2) Whenever an interrupt occurs, 37E0 is read to see what devices require service.
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d7 = RTC
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d6 = FDC
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d2 = Communications (not emulated)
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All interrupting devices are serviced in a single interrupt. There is a mask byte,
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which is dealt with by the DOS. We take the opportunity to reset the cpu INT line. */
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u8 result = m_irq;
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m_maincpu->set_input_line(0, CLEAR_LINE);
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m_irq = 0;
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return result;
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}
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void lnw80_state::motor_w(uint8_t data)
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{
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m_floppy = nullptr;
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if (BIT(data, 0)) m_floppy = m_floppy0->get_device();
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if (BIT(data, 1)) m_floppy = m_floppy1->get_device();
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if (BIT(data, 2)) m_floppy = m_floppy2->get_device();
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if (BIT(data, 3)) m_floppy = m_floppy3->get_device();
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m_fdc->set_floppy(m_floppy);
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if (m_floppy)
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{
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m_floppy->mon_w(0);
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m_floppy->ss_w(BIT(data, 4));
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m_timeout = 200;
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}
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// switch to fm
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m_fdc->dden_w(1);
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}
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/*************************************
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* Keyboard *
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*************************************/
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uint8_t lnw80_state::keyboard_r(offs_t offset)
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{
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u8 i, result = 0;
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for (i = 0; i < 8; i++)
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if (BIT(offset, i))
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result |= m_io_keyboard[i]->read();
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return result;
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}
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/*************************************
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* Machine *
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@ -671,95 +346,8 @@ void lnw80_state::machine_reset()
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lnw80_fe_w(0);
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}
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/***************************************************************************
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PARAMETERS
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***************************************************************************/
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#define LOG 1
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#define CMD_TYPE_OBJECT_CODE 0x01
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#define CMD_TYPE_TRANSFER_ADDRESS 0x02
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#define CMD_TYPE_END_OF_PARTITIONED_DATA_SET_MEMBER 0x04
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#define CMD_TYPE_LOAD_MODULE_HEADER 0x05
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#define CMD_TYPE_PARTITIONED_DATA_SET_HEADER 0x06
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#define CMD_TYPE_PATCH_NAME_HEADER 0x07
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#define CMD_TYPE_ISAM_DIRECTORY_ENTRY 0x08
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#define CMD_TYPE_END_OF_ISAM_DIRECTORY_ENTRY 0x0a
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#define CMD_TYPE_PDS_DIRECTORY_ENTRY 0x0c
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#define CMD_TYPE_END_OF_PDS_DIRECTORY_ENTRY 0x0e
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#define CMD_TYPE_YANKED_LOAD_BLOCK 0x10
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#define CMD_TYPE_COPYRIGHT_BLOCK 0x1f
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/***************************************************************************
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IMPLEMENTATION
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***************************************************************************/
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QUICKLOAD_LOAD_MEMBER(lnw80_state::quickload_cb)
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{
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address_space &program = m_maincpu->space(AS_PROGRAM);
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uint8_t type, length;
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uint8_t data[0x100];
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uint8_t addr[2];
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void *ptr;
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while (!image.image_feof())
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{
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image.fread( &type, 1);
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image.fread( &length, 1);
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switch (type)
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{
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case CMD_TYPE_OBJECT_CODE: // 01 - block of data
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{
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length -= 2;
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u16 block_length = length ? length : 256;
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image.fread( &addr, 2);
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u16 address = (addr[1] << 8) | addr[0];
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if (LOG) logerror("/CMD object code block: address %04x length %u\n", address, block_length);
|
||||
if (address < 0x3c00)
|
||||
{
|
||||
image.message("Attempting to write outside of RAM");
|
||||
return image_init_result::FAIL;
|
||||
}
|
||||
ptr = program.get_write_ptr(address);
|
||||
image.fread( ptr, block_length);
|
||||
}
|
||||
break;
|
||||
|
||||
case CMD_TYPE_TRANSFER_ADDRESS: // 02 - go address
|
||||
{
|
||||
image.fread( &addr, 2);
|
||||
u16 address = (addr[1] << 8) | addr[0];
|
||||
if (LOG) logerror("/CMD transfer address %04x\n", address);
|
||||
m_maincpu->set_state_int(Z80_PC, address);
|
||||
}
|
||||
return image_init_result::PASS;
|
||||
|
||||
case CMD_TYPE_LOAD_MODULE_HEADER: // 05 - name
|
||||
image.fread( &data, length);
|
||||
if (LOG) logerror("/CMD load module header '%s'\n", data);
|
||||
break;
|
||||
|
||||
case CMD_TYPE_COPYRIGHT_BLOCK: // 1F - copyright info
|
||||
image.fread( &data, length);
|
||||
if (LOG) logerror("/CMD copyright block '%s'\n", data);
|
||||
break;
|
||||
|
||||
default:
|
||||
image.fread( &data, length);
|
||||
logerror("/CMD unsupported block type %u!\n", type);
|
||||
image.message("Unsupported or invalid block type");
|
||||
return image_init_result::FAIL;
|
||||
}
|
||||
}
|
||||
|
||||
return image_init_result::PASS;
|
||||
}
|
||||
|
||||
/* 8-bit video, 64/80 characters per line = lnw80 */
|
||||
uint32_t lnw80_state::screen_update_lnw80(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect)
|
||||
uint32_t lnw80_state::screen_update(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect)
|
||||
{
|
||||
static const uint16_t rows[] = { 0, 0x200, 0x100, 0x300, 1, 0x201, 0x101, 0x301 };
|
||||
uint16_t sy=0,ma=0;
|
||||
@ -996,7 +584,7 @@ void lnw80_state::lnw80(machine_config &config)
|
||||
screen_device &screen(SCREEN(config, "screen", SCREEN_TYPE_RASTER));
|
||||
// LNW80 Theory of Operations gives H and V periods as 15.750kHz and 59.66Hz, probably due to rounding the calculated ~15.7468kHz to 4 figures
|
||||
screen.set_raw(3.579545_MHz_XTAL * 3, 682, 0, 480, 264, 0, 192); // 10.738MHz generated by tank circuit (top left of page 2 of schematics)
|
||||
screen.set_screen_update(FUNC(lnw80_state::screen_update_lnw80));
|
||||
screen.set_screen_update(FUNC(lnw80_state::screen_update));
|
||||
screen.set_palette("palette");
|
||||
PALETTE(config, "palette", FUNC(lnw80_state::lnw80_palette), 8);
|
||||
GFXDECODE(config, "gfxdecode", "palette", gfx_lnw80);
|
||||
|
||||
Loading…
Reference in New Issue
Block a user