mirror of
https://github.com/holub/mame
synced 2025-10-08 09:30:17 +03:00
pci: Add grossly hacked smbus [O. Galibert]
This commit is contained in:
Olivier Galibert
parent
8082e72000
commit
1da9e187ee
@ -3,6 +3,25 @@
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const device_type SMBUS = &device_creator<smbus_device>;
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const device_type SMBUS = &device_creator<smbus_device>;
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DEVICE_ADDRESS_MAP_START(map, 32, smbus_device)
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DEVICE_ADDRESS_MAP_START(map, 32, smbus_device)
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AM_RANGE(0x00, 0x03) AM_READWRITE8 (hst_sts_r, hst_sts_w, 0x000000ff)
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AM_RANGE(0x00, 0x03) AM_READWRITE8 (hst_cnt_r, hst_cnt_w, 0x00ff0000)
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AM_RANGE(0x00, 0x03) AM_READWRITE8 (hst_cmd_r, hst_cmd_w, 0xff000000)
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AM_RANGE(0x04, 0x07) AM_READWRITE8 (xmit_slva_r, xmit_slva_w, 0x000000ff)
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AM_RANGE(0x04, 0x07) AM_READWRITE8 (hst_d0_r, hst_d0_w, 0x0000ff00)
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AM_RANGE(0x04, 0x07) AM_READWRITE8 (hst_d1_r, hst_d1_w, 0x00ff0000)
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AM_RANGE(0x04, 0x07) AM_READWRITE8 (host_block_db_r, host_block_db_w, 0xff000000)
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AM_RANGE(0x08, 0x0b) AM_READWRITE8 (pec_r, pec_w, 0x000000ff)
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AM_RANGE(0x08, 0x0b) AM_READWRITE8 (rcv_slva_r, rcv_slva_w, 0x0000ff00)
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AM_RANGE(0x08, 0x0b) AM_READWRITE16(slv_data_r, slv_data_w, 0xffff0000)
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AM_RANGE(0x0c, 0x0f) AM_READWRITE8 (aux_sts_r, aux_sts_w, 0x000000ff)
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AM_RANGE(0x0c, 0x0f) AM_READWRITE8 (aux_ctl_r, aux_ctl_w, 0x0000ff00)
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AM_RANGE(0x0c, 0x0f) AM_READWRITE8 (smlink_pin_ctl_r, smlink_pin_ctl_w, 0x00ff0000)
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AM_RANGE(0x0c, 0x0f) AM_READWRITE8 (smbus_pin_ctl_r, smbus_pin_ctl_w, 0xff000000)
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AM_RANGE(0x10, 0x13) AM_READWRITE8 (slv_sts_r, slv_sts_w, 0x000000ff)
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AM_RANGE(0x10, 0x13) AM_READWRITE8 (slv_cmd_r, slv_cmd_w, 0x0000ff00)
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AM_RANGE(0x14, 0x17) AM_READ8 (notify_daddr_r, 0x000000ff)
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AM_RANGE(0x14, 0x17) AM_READ8 (notify_dlow_r, 0x00ff0000)
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AM_RANGE(0x14, 0x17) AM_READ8 (notify_dhigh_r, 0xff000000)
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ADDRESS_MAP_END
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ADDRESS_MAP_END
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smbus_device::smbus_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
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smbus_device::smbus_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
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@ -20,4 +39,240 @@ void smbus_device::device_start()
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void smbus_device::device_reset()
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void smbus_device::device_reset()
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{
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{
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pci_device::device_reset();
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pci_device::device_reset();
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hst_sts = 0x00;
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hst_cnt = 0x00;
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hst_cmd = 0x00;
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xmit_slva = 0x00;
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hst_d0 = 0x00;
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hst_d1 = 0x00;
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host_block_db = 0x00;
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pec = 0x00;
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rcv_slva = 0x44;
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slv_data = 0x0000;
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aux_sts = 0x00;
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aux_ctl = 0x00;
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smlink_pin_ctl = 0x00;
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smbus_pin_ctl = 0x00;
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slv_sts = 0x00;
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slv_cmd = 0x00;
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notify_daddr = 0x00;
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notify_dlow = 0x00;
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notify_dhigh = 0x00;
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}
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READ8_MEMBER (smbus_device::hst_sts_r)
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{
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return hst_sts;
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}
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WRITE8_MEMBER (smbus_device::hst_sts_w)
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{
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hst_sts &= ~data;
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logerror("%s: hst_sts = %02x\n", tag(), hst_sts);
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}
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READ8_MEMBER (smbus_device::hst_cnt_r)
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{
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return hst_cnt;
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}
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WRITE8_MEMBER (smbus_device::hst_cnt_w)
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{
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hst_cnt = data;
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logerror("%s: hst_cnt = %02x\n", tag(), hst_cnt);
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if(xmit_slva != 0xa1)
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hst_sts = 4;
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else {
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const UINT8 eeprom[256] = {
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0x80, 0x08, 0x07, 0x0D, 0x0A, 0x02, 0x40, 0x00, 0x04, 0x50, 0x60, 0x00, 0x82, 0x08, 0x00, 0x01,
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0x0E, 0x04, 0x08, 0x01, 0x02, 0x20, 0x00, 0x00, 0x00, 0x00, 0x00, 0x3C, 0x28, 0x3C, 0x28, 0x40,
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0x60, 0x60, 0x40, 0x40, 0x00, 0x00, 0x00, 0x00, 0x00, 0x37, 0x46, 0x28, 0x28, 0x55, 0x00, 0x00,
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0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xCE,
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0x7F, 0x7F, 0x9E, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x56, 0x53, 0x35, 0x31, 0x32, 0x4D, 0x42,
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0x34, 0x30, 0x30, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x00, 0x00, 0x00, 0x00, 0x00,
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0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
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0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
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0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
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0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
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0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
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0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
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0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
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0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
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0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
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0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
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};
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hst_sts = 2;
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hst_d0 = eeprom[hst_cmd];
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}
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}
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READ8_MEMBER (smbus_device::hst_cmd_r)
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{
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return hst_cmd;
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}
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WRITE8_MEMBER (smbus_device::hst_cmd_w)
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{
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hst_cmd = data;
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logerror("%s: hst_cmd = %02x\n", tag(), hst_cmd);
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}
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READ8_MEMBER (smbus_device::xmit_slva_r)
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{
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return xmit_slva;
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}
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WRITE8_MEMBER (smbus_device::xmit_slva_w)
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{
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xmit_slva = data;
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logerror("%s: xmit_slva = %02x\n", tag(), xmit_slva);
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}
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READ8_MEMBER (smbus_device::hst_d0_r)
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{
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return hst_d0;
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}
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WRITE8_MEMBER (smbus_device::hst_d0_w)
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{
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hst_d0 = data;
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logerror("%s: hst_d0 = %02x\n", tag(), hst_d0);
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}
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READ8_MEMBER (smbus_device::hst_d1_r)
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{
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return hst_d1;
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}
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WRITE8_MEMBER (smbus_device::hst_d1_w)
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{
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hst_d1 = data;
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logerror("%s: hst_d1 = %02x\n", tag(), hst_d1);
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}
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READ8_MEMBER (smbus_device::host_block_db_r)
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{
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return host_block_db;
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}
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WRITE8_MEMBER (smbus_device::host_block_db_w)
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{
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host_block_db = data;
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logerror("%s: host_block_db = %02x\n", tag(), host_block_db);
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}
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READ8_MEMBER (smbus_device::pec_r)
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{
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return pec;
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}
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WRITE8_MEMBER (smbus_device::pec_w)
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{
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pec = data;
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logerror("%s: pec = %02x\n", tag(), pec);
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}
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READ8_MEMBER (smbus_device::rcv_slva_r)
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{
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return rcv_slva;
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}
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WRITE8_MEMBER (smbus_device::rcv_slva_w)
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{
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rcv_slva = data;
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logerror("%s: rcv_slva = %02x\n", tag(), rcv_slva);
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}
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READ16_MEMBER (smbus_device::slv_data_r)
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{
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return slv_data;
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}
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WRITE16_MEMBER(smbus_device::slv_data_w)
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{
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slv_data = data;
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logerror("%s: slv_data = %02x\n", tag(), slv_data);
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}
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READ8_MEMBER (smbus_device::aux_sts_r)
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{
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return aux_sts;
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}
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WRITE8_MEMBER (smbus_device::aux_sts_w)
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{
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aux_sts = data;
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logerror("%s: aux_sts = %02x\n", tag(), aux_sts);
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}
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READ8_MEMBER (smbus_device::aux_ctl_r)
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{
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return aux_ctl;
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}
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WRITE8_MEMBER (smbus_device::aux_ctl_w)
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{
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aux_ctl = data;
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logerror("%s: aux_ctl = %02x\n", tag(), aux_ctl);
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}
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READ8_MEMBER (smbus_device::smlink_pin_ctl_r)
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{
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return smlink_pin_ctl;
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}
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WRITE8_MEMBER (smbus_device::smlink_pin_ctl_w)
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{
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smlink_pin_ctl = data;
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logerror("%s: smlink_pin_ctl = %02x\n", tag(), smlink_pin_ctl);
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}
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READ8_MEMBER (smbus_device::smbus_pin_ctl_r)
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{
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return smbus_pin_ctl;
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}
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WRITE8_MEMBER (smbus_device::smbus_pin_ctl_w)
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{
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smbus_pin_ctl = data;
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logerror("%s: smbus_pin_ctl = %02x\n", tag(), smbus_pin_ctl);
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}
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READ8_MEMBER (smbus_device::slv_sts_r)
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{
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return slv_sts;
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}
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WRITE8_MEMBER (smbus_device::slv_sts_w)
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{
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slv_sts = data;
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logerror("%s: slv_sts = %02x\n", tag(), slv_sts);
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}
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READ8_MEMBER (smbus_device::slv_cmd_r)
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{
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return slv_cmd;
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}
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WRITE8_MEMBER (smbus_device::slv_cmd_w)
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{
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slv_cmd = data;
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logerror("%s: slv_cmd = %02x\n", tag(), slv_cmd);
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}
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READ8_MEMBER (smbus_device::notify_daddr_r)
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{
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return notify_daddr;
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}
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READ8_MEMBER (smbus_device::notify_dlow_r)
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{
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return notify_dlow;
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}
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READ8_MEMBER (smbus_device::notify_dhigh_r)
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{
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return notify_dhigh;
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}
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}
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@ -10,12 +10,54 @@ class smbus_device : public pci_device {
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public:
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public:
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smbus_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
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smbus_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
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DECLARE_READ8_MEMBER (hst_sts_r);
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DECLARE_WRITE8_MEMBER (hst_sts_w);
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DECLARE_READ8_MEMBER (hst_cnt_r);
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DECLARE_WRITE8_MEMBER (hst_cnt_w);
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DECLARE_READ8_MEMBER (hst_cmd_r);
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DECLARE_WRITE8_MEMBER (hst_cmd_w);
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DECLARE_READ8_MEMBER (xmit_slva_r);
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DECLARE_WRITE8_MEMBER (xmit_slva_w);
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DECLARE_READ8_MEMBER (hst_d0_r);
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DECLARE_WRITE8_MEMBER (hst_d0_w);
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DECLARE_READ8_MEMBER (hst_d1_r);
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DECLARE_WRITE8_MEMBER (hst_d1_w);
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DECLARE_READ8_MEMBER (host_block_db_r);
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DECLARE_WRITE8_MEMBER (host_block_db_w);
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DECLARE_READ8_MEMBER (pec_r);
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DECLARE_WRITE8_MEMBER (pec_w);
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DECLARE_READ8_MEMBER (rcv_slva_r);
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DECLARE_WRITE8_MEMBER (rcv_slva_w);
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DECLARE_READ16_MEMBER (slv_data_r);
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DECLARE_WRITE16_MEMBER(slv_data_w);
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DECLARE_READ8_MEMBER (aux_sts_r);
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DECLARE_WRITE8_MEMBER (aux_sts_w);
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DECLARE_READ8_MEMBER (aux_ctl_r);
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DECLARE_WRITE8_MEMBER (aux_ctl_w);
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DECLARE_READ8_MEMBER (smlink_pin_ctl_r);
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DECLARE_WRITE8_MEMBER (smlink_pin_ctl_w);
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DECLARE_READ8_MEMBER (smbus_pin_ctl_r);
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DECLARE_WRITE8_MEMBER (smbus_pin_ctl_w);
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DECLARE_READ8_MEMBER (slv_sts_r);
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DECLARE_WRITE8_MEMBER (slv_sts_w);
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DECLARE_READ8_MEMBER (slv_cmd_r);
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DECLARE_WRITE8_MEMBER (slv_cmd_w);
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DECLARE_READ8_MEMBER (notify_daddr_r);
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DECLARE_READ8_MEMBER (notify_dlow_r);
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||||||
|
DECLARE_READ8_MEMBER (notify_dhigh_r);
|
||||||
|
|
||||||
protected:
|
protected:
|
||||||
virtual void device_start();
|
virtual void device_start();
|
||||||
virtual void device_reset();
|
virtual void device_reset();
|
||||||
|
|
||||||
private:
|
private:
|
||||||
DECLARE_ADDRESS_MAP(map, 32);
|
DECLARE_ADDRESS_MAP(map, 32);
|
||||||
|
|
||||||
|
UINT16 slv_data;
|
||||||
|
|
||||||
|
UINT8 hst_sts, hst_cnt, hst_cmd, xmit_slva, hst_d0, hst_d1;
|
||||||
|
UINT8 host_block_db, pec, rcv_slva, aux_sts, aux_ctl;
|
||||||
|
UINT8 smlink_pin_ctl, smbus_pin_ctl, slv_sts, slv_cmd, notify_daddr, notify_dlow, notify_dhigh;
|
||||||
};
|
};
|
||||||
|
|
||||||
extern const device_type SMBUS;
|
extern const device_type SMBUS;
|
||||||
|
|||||||
@ -17,6 +17,7 @@ DEVICE_ADDRESS_MAP_START(config_map, 32, pci_device)
|
|||||||
|
|
||||||
AM_RANGE(0x2c, 0x2f) AM_READ16 (subvendor_r, 0x0000ffff)
|
AM_RANGE(0x2c, 0x2f) AM_READ16 (subvendor_r, 0x0000ffff)
|
||||||
AM_RANGE(0x2c, 0x2f) AM_READ16 (subsystem_r, 0xffff0000)
|
AM_RANGE(0x2c, 0x2f) AM_READ16 (subsystem_r, 0xffff0000)
|
||||||
|
AM_RANGE(0x2c, 0x2f) AM_WRITENOP
|
||||||
|
|
||||||
AM_RANGE(0x34, 0x37) AM_READ8 (capptr_r, 0x000000ff)
|
AM_RANGE(0x34, 0x37) AM_READ8 (capptr_r, 0x000000ff)
|
||||||
ADDRESS_MAP_END
|
ADDRESS_MAP_END
|
||||||
|
|||||||
Loading…
Reference in New Issue
Block a user