mirror of
https://github.com/holub/mame
synced 2025-04-26 18:23:08 +03:00
Generalized the PLS100 into a PLA device of variable amounts of inputs/outputs/terms. [Curt Coder]
This commit is contained in:
Curt Coder
parent
1b2cab76df
commit
1df58104fe
4
.gitattributes
vendored
4
.gitattributes
vendored
@ -1163,8 +1163,8 @@ src/emu/machine/pic8259.c svneol=native#text/plain
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src/emu/machine/pic8259.h svneol=native#text/plain
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src/emu/machine/pit8253.c svneol=native#text/plain
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src/emu/machine/pit8253.h svneol=native#text/plain
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src/emu/machine/pls100.c svneol=native#text/plain
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src/emu/machine/pls100.h svneol=native#text/plain
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src/emu/machine/pla.c svneol=native#text/plain
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src/emu/machine/pla.h svneol=native#text/plain
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src/emu/machine/ram.c svneol=native#text/plain
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src/emu/machine/ram.h svneol=native#text/plain
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src/emu/machine/rescap.h svneol=native#text/plain
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@ -223,17 +223,17 @@ EMUMACHINEOBJS = \
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$(EMUMACHINE)/netlist.o \
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$(EMUMACHINE)/net_lib.o \
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$(EMUMACHINE)/nmc9306.o \
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$(EMUMACHINE)/nscsi_bus.o \
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$(EMUMACHINE)/nscsi_cd.o \
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$(EMUMACHINE)/nscsi_hd.o \
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$(EMUMACHINE)/nscsi_bus.o \
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$(EMUMACHINE)/nscsi_cd.o \
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$(EMUMACHINE)/nscsi_hd.o \
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$(EMUMACHINE)/nvram.o \
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$(EMUMACHINE)/pc16552d.o \
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$(EMUMACHINE)/pci.o \
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$(EMUMACHINE)/pci.o \
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$(EMUMACHINE)/pd4990a.o \
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$(EMUMACHINE)/pic8259.o \
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$(EMUMACHINE)/pit8253.o \
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$(EMUMACHINE)/pls100.o \
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$(EMUMACHINE)/ram.o \
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$(EMUMACHINE)/pla.o \
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$(EMUMACHINE)/ram.o \
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$(EMUMACHINE)/roc10937.o \
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$(EMUMACHINE)/rp5c01.o \
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$(EMUMACHINE)/rp5c15.o \
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@ -293,7 +293,7 @@ EMUVIDEOOBJS = \
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$(EMUVIDEO)/huc6261.o \
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$(EMUVIDEO)/huc6270.o \
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$(EMUVIDEO)/huc6272.o \
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$(EMUVIDEO)/i8275.o \
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$(EMUVIDEO)/i8275.o \
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$(EMUVIDEO)/k053250.o \
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$(EMUVIDEO)/m50458.o \
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$(EMUVIDEO)/mb90082.o \
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@ -302,12 +302,12 @@ EMUVIDEOOBJS = \
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$(EMUVIDEO)/pc_cga.o \
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$(EMUVIDEO)/cgapal.o \
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$(EMUVIDEO)/pc_vga.o \
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$(EMUVIDEO)/poly.o \
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$(EMUVIDEO)/psx.o \
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$(EMUVIDEO)/poly.o \
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$(EMUVIDEO)/psx.o \
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$(EMUVIDEO)/ramdac.o \
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$(EMUVIDEO)/resnet.o \
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$(EMUVIDEO)/rgbutil.o \
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$(EMUVIDEO)/s2636.o \
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$(EMUVIDEO)/s2636.o \
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$(EMUVIDEO)/saa5050.o \
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$(EMUVIDEO)/sed1330.o \
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$(EMUVIDEO)/tlc34076.o \
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@ -315,7 +315,7 @@ EMUVIDEOOBJS = \
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$(EMUVIDEO)/tms9927.o \
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$(EMUVIDEO)/tms9928a.o \
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$(EMUVIDEO)/upd3301.o \
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$(EMUVIDEO)/v9938.o \
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$(EMUVIDEO)/v9938.o \
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$(EMUVIDEO)/vector.o \
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$(EMUVIDEO)/voodoo.o \
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@ -7,8 +7,7 @@
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**********************************************************************/
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#include "emu.h"
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#include "pls100.h"
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#include "pla.h"
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@ -17,6 +16,7 @@
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//**************************************************************************
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const device_type PLS100 = &device_creator<pls100_device>;
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const device_type MOS8721 = &device_creator<mos8721_device>;
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@ -28,32 +28,32 @@ const device_type PLS100 = &device_creator<pls100_device>;
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// parse_fusemap -
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//-------------------------------------------------
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inline void pls100_device::parse_fusemap()
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inline void pla_device::parse_fusemap()
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{
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jed_data jed;
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jedbin_parse(machine().root_device().memregion(tag())->base(), machine().root_device().memregion(tag())->bytes(), &jed);
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UINT32 fusenum = 0;
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m_xor = 0;
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for (int term = 0; term < PAL_TERMS; term++)
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for (int term = 0; term < m_terms; term++)
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{
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m_and_comp[term] = 0;
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m_and_true[term] = 0;
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m_or[term] = 0;
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for (int i = 0; i < PAL_INPUTS; i++)
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for (int i = 0; i < m_inputs; i++)
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{
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m_and_comp[term] |= jed_get_fuse(&jed, fusenum++) << i;
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m_and_true[term] |= jed_get_fuse(&jed, fusenum++) << i;
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}
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for (int f = 0; f < PAL_OUTPUTS; f++)
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for (int f = 0; f < m_outputs; f++)
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{
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m_or[term] |= !jed_get_fuse(&jed, fusenum++) << f;
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}
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}
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for (int f = 0; f < PAL_OUTPUTS; f++)
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for (int f = 0; f < m_outputs; f++)
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{
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m_xor |= jed_get_fuse(&jed, fusenum++) << f;
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}
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@ -64,12 +64,12 @@ inline void pls100_device::parse_fusemap()
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// get_product -
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//-------------------------------------------------
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inline int pls100_device::get_product(int term)
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inline int pla_device::get_product(int term)
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{
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UINT16 input_true = m_and_true[term] | m_i;
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UINT16 input_comp = m_and_comp[term] | (m_i ^ 0xffff);
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UINT32 input_true = m_and_true[term] | m_i;
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UINT32 input_comp = m_and_comp[term] | ~m_i;
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return (input_true & input_comp) == 0xffff;
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return ((input_true & input_comp) & m_output_mask) == m_output_mask;
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}
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@ -77,11 +77,11 @@ inline int pls100_device::get_product(int term)
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// update_outputs -
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//-------------------------------------------------
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inline void pls100_device::update_outputs()
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inline void pla_device::update_outputs()
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{
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m_s = 0;
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for (int term = 0; term < PAL_TERMS; term++)
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for (int term = 0; term < m_terms; term++)
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{
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if (get_product(term))
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{
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@ -97,11 +97,25 @@ inline void pls100_device::update_outputs()
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//**************************************************************************
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//-------------------------------------------------
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// pls100_device - constructor
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// pla_device - constructor
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//-------------------------------------------------
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pla_device::pla_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, int inputs, int outputs, int terms, UINT32 output_mask)
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: device_t(mconfig, type, name, tag, owner, clock),
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m_inputs(inputs),
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m_outputs(outputs),
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m_terms(terms),
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m_output_mask(output_mask)
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{
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}
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pls100_device::pls100_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
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: device_t(mconfig, PLS100, "PLS100", tag, owner, clock)
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: pla_device(mconfig, PLS100, "PLS100", tag, owner, clock, 16, 8, 48, 0xffff)
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{
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}
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mos8721_device::mos8721_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
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: pla_device(mconfig, MOS8721, "MOS8721", tag, owner, clock, 27, 18, 48, 0x7ffffff)
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{
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}
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@ -110,7 +124,7 @@ pls100_device::pls100_device(const machine_config &mconfig, const char *tag, dev
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// device_start - device-specific startup
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//-------------------------------------------------
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void pls100_device::device_start()
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void pla_device::device_start()
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{
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// parse fusemap
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assert(machine().root_device().memregion(tag()) != NULL);
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@ -126,7 +140,7 @@ void pls100_device::device_start()
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// read -
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//-------------------------------------------------
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UINT8 pls100_device::read(UINT16 input)
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UINT32 pla_device::read(UINT32 input)
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{
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m_i = input;
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@ -26,8 +26,8 @@
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#pragma once
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#ifndef __PLS100__
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#define __PLS100__
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#ifndef __PLA__
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#define __PLA__
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#include "emu.h"
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#include "jedparse.h"
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@ -38,9 +38,7 @@
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// MACROS / CONSTANTS
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//**************************************************************************
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#define PAL_INPUTS 16
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#define PAL_OUTPUTS 8
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#define PAL_TERMS 48
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#define MAX_TERMS 512
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@ -51,42 +49,67 @@
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#define MCFG_PLS100_ADD(_tag) \
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MCFG_DEVICE_ADD(_tag, PLS100, 0)
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#define MCFG_MOS8721_ADD(_tag) \
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MCFG_DEVICE_ADD(_tag, MOS8721, 0)
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///*************************************************************************
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// TYPE DEFINITIONS
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///*************************************************************************
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// ======================> pls100_device
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// ======================> pla_device
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class pls100_device : public device_t
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class pla_device : public device_t
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{
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public:
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// construction/destruction
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pls100_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
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pla_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, int inputs, int outputs, int terms, UINT32 output_mask);
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UINT8 read(UINT16 input);
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UINT32 read(UINT32 input);
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protected:
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// device-level overrides
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virtual void device_start();
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private:
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inline void parse_fusemap();
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inline int get_product(int term);
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inline void update_outputs();
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UINT16 m_i;
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UINT8 m_s;
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UINT16 m_and_true[PAL_TERMS];
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UINT16 m_and_comp[PAL_TERMS];
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UINT16 m_or[PAL_TERMS];
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UINT8 m_xor;
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int m_inputs;
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int m_outputs;
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int m_terms;
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UINT32 m_output_mask;
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UINT32 m_i;
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UINT32 m_s;
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UINT32 m_and_true[MAX_TERMS];
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UINT32 m_and_comp[MAX_TERMS];
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UINT32 m_or[MAX_TERMS];
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UINT32 m_xor;
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};
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// ======================> pls100_device
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class pls100_device : public pla_device
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{
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public:
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pls100_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
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};
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// ======================> mos8721_device
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class mos8721_device : public pla_device
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{
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public:
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mos8721_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
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};
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// device type definition
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extern const device_type PLS100;
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extern const device_type MOS8721;
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@ -204,6 +204,21 @@ to use an EEPROM reader, in order to obtain a dump of the whole content.
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#include "includes/c64_legacy.h"
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//**************************************************************************
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// MACROS / CONSTANTS
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//**************************************************************************
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#define A15 BIT(offset, 15)
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#define A14 BIT(offset, 14)
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#define A13 BIT(offset, 13)
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#define A12 BIT(offset, 12)
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#define A11 BIT(offset, 11)
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#define A10 BIT(offset, 10)
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#define VMA5 BIT(vma, 13)
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#define VMA4 BIT(vma, 12)
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/*************************************
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*
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* Main CPU memory handlers
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@ -225,27 +240,55 @@ to use an EEPROM reader, in order to obtain a dump of the whole content.
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* 0xe000-0xffff ram as bank 0
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*/
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void c128_state::bankswitch_pla(offs_t offset, offs_t vma, int ba, int rw, int aec, int z80io, int ms3, int ms2, int ms1, int ms0,
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int *cas, int *gwe, int *rom1, int *rom2, int *rom3, int *rom4, int *charom, int *colorram, int *vic,
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void c128_state::bankswitch_pla(offs_t offset, offs_t ta, offs_t vma, int ba, int rw, int aec, int z80io, int ms3, int ms2, int ms1, int ms0,
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int *sden, int *dir, int *gwe, int *rom1, int *rom2, int *rom3, int *rom4, int *charom, int *colorram, int *vic,
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int *from1, int *romh, int *roml, int *dwe, int *ioacc, int *clrbank, int *iocs, int *casenb)
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{
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//int game = m_exp->game_r(offset, ba, rw, m_hiram);
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//int exrom = m_exp->exrom_r(offset, ba, rw, m_hiram);
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//int vicfix = 0;
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//int _128_256 = 1;
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int _128_256 = 1;
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int dmaack = 1;
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int vicfix = 0;
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int game = m_exp->game_r(ta, ba, rw, m_hiram);
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int exrom = m_exp->exrom_r(ta, ba, rw, m_hiram);
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int clk = 1;
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UINT32 input = clk << 26 | m_va14 << 25 | m_charen << 24 |
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m_hiram << 23 | m_loram << 22 | ba << 21 | VMA5 << 20 | VMA4 << 19 | ms0 << 18 | ms1 << 17 | ms2 << 16 |
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exrom << 15 | game << 14 | rw << 13 | aec << 12 | A10 << 11 | A11 << 10 | A12 << 9 | A13 << 8 |
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A14 << 7 | A15 << 6 | z80io << 5 | m_z80en << 4 | ms3 << 3 | vicfix << 2 | dmaack << 1 | _128_256;
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UINT32 data = m_pla->read(input);
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*sden = BIT(data, 0);
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*rom4 = BIT(data, 1);
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*rom2 = BIT(data, 2);
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*dir = BIT(data, 3);
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*roml = BIT(data, 4);
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*romh = BIT(data, 5);
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*clrbank = BIT(data, 6);
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*from1 = BIT(data, 7);
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*rom3 = BIT(data, 8);
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*rom1 = BIT(data, 9);
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*iocs = BIT(data, 10);
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*dwe = BIT(data, 11);
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*casenb = BIT(data, 12);
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*vic = BIT(data, 13);
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*ioacc = BIT(data, 14);
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*gwe = BIT(data, 15);
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*colorram = BIT(data, 16);
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*charom = BIT(data, 17);
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}
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UINT8 c128_state::read_memory(address_space &space, offs_t offset, offs_t vma, int ba, int aec, int z80io)
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{
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int rw = 1, ms0 = 1, ms1 = 1, ms2 = 1, ms3 = 1, cas0 = 1, cas1 = 1;
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int cas = 1, gwe = 1, rom1 = 1, rom2 = 1, rom3 = 1, rom4 = 1, charom = 1, colorram = 1, vic = 1,
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int sden = 1, dir = 1, gwe = 1, rom1 = 1, rom2 = 1, rom3 = 1, rom4 = 1, charom = 1, colorram = 1, vic = 1,
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from1 = 1, romh = 1, roml = 1, dwe = 1, ioacc = 1, clrbank = 1, iocs = 1, casenb = 1;
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int io1 = 1, io2 = 1;
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offs_t ta = m_mmu->ta_r(offset, aec, &ms0, &ms1, &ms2, &ms3, &cas0, &cas1);
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bankswitch_pla(offset, vma, ba, rw, aec, z80io, ms3, ms2, ms1, ms0,
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&cas, &gwe, &rom1, &rom2, &rom3, &rom4, &charom, &colorram, &vic,
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bankswitch_pla(offset, ta, vma, ba, rw, aec, z80io, ms3, ms2, ms1, ms0,
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&sden, &dir, &gwe, &rom1, &rom2, &rom3, &rom4, &charom, &colorram, &vic,
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&from1, &romh, &roml, &dwe, &ioacc, &clrbank, &iocs, &casenb);
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UINT8 data = 0xff;
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@ -357,14 +400,14 @@ UINT8 c128_state::read_memory(address_space &space, offs_t offset, offs_t vma, i
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void c128_state::write_memory(address_space &space, offs_t offset, offs_t vma, UINT8 data, int ba, int aec, int z80io)
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{
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int rw = 0, ms0 = 1, ms1 = 1, ms2 = 1, ms3 = 1, cas0 = 1, cas1 = 1;
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int cas = 1, gwe = 1, rom1 = 1, rom2 = 1, rom3 = 1, rom4 = 1, charom = 1, colorram = 1, vic = 1,
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int sden = 1, dir = 1, gwe = 1, rom1 = 1, rom2 = 1, rom3 = 1, rom4 = 1, charom = 1, colorram = 1, vic = 1,
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from1 = 1, romh = 1, roml = 1, dwe = 1, ioacc = 1, clrbank = 1, iocs = 1, casenb = 1;
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int io1 = 1, io2 = 1;
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offs_t ta = m_mmu->ta_r(offset, aec, &ms0, &ms1, &ms2, &ms3, &cas0, &cas1);
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bankswitch_pla(offset, vma, ba, rw, aec, z80io, ms3, ms2, ms1, ms0,
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&cas, &gwe, &rom1, &rom2, &rom3, &rom4, &charom, &colorram, &vic,
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bankswitch_pla(offset, ta, vma, ba, rw, aec, z80io, ms3, ms2, ms1, ms0,
|
||||
&sden, &dir, &gwe, &rom1, &rom2, &rom3, &rom4, &charom, &colorram, &vic,
|
||||
&from1, &romh, &roml, &dwe, &ioacc, &clrbank, &iocs, &casenb);
|
||||
|
||||
if (!casenb && !dwe)
|
||||
@ -830,6 +873,8 @@ WRITE_LINE_MEMBER( c128_state::mmu_z80en_w )
|
||||
m_maincpu->set_input_line(INPUT_LINE_HALT, ASSERT_LINE);
|
||||
m_subcpu->set_input_line(INPUT_LINE_HALT, CLEAR_LINE);
|
||||
}
|
||||
|
||||
m_z80en = state;
|
||||
}
|
||||
|
||||
WRITE_LINE_MEMBER( c128_state::mmu_fsdir_w )
|
||||
@ -1063,6 +1108,7 @@ static MACHINE_CONFIG_START( ntsc, c128_state )
|
||||
|
||||
// devices
|
||||
MCFG_MOS8722_ADD(MOS8722_TAG, mmu_intf)
|
||||
MCFG_MOS8721_ADD(MOS8721_TAG)
|
||||
MCFG_MOS6526R1_ADD(MOS6526_1_TAG, VIC6567_CLOCK, 60, c128_cia1_intf)
|
||||
MCFG_MOS6526R1_ADD(MOS6526_2_TAG, VIC6567_CLOCK, 60, c128_cia2_intf)
|
||||
MCFG_QUICKLOAD_ADD("quickload", cbm_c64, "p00,prg", CBM_QUICKLOAD_DELAY_SECONDS)
|
||||
@ -1169,6 +1215,7 @@ static MACHINE_CONFIG_START( pal, c128_state )
|
||||
|
||||
// devices
|
||||
MCFG_MOS8722_ADD(MOS8722_TAG, mmu_intf)
|
||||
MCFG_MOS8721_ADD(MOS8721_TAG)
|
||||
MCFG_MOS6526R1_ADD(MOS6526_1_TAG, VIC6569_CLOCK, 50, c128_cia1_intf)
|
||||
MCFG_MOS6526R1_ADD(MOS6526_2_TAG, VIC6569_CLOCK, 50, c128_cia2_intf)
|
||||
MCFG_QUICKLOAD_ADD("quickload", cbm_c64, "p00,prg", CBM_QUICKLOAD_DELAY_SECONDS)
|
||||
@ -1259,6 +1306,9 @@ ROM_START( c128 )
|
||||
ROM_LOAD( "390059-01.bin", 0x120000, 0x2000, CRC(6aaaafe6) SHA1(29ed066d513f2d5c09ff26d9166ba23c2afb2b3f) ) // Character
|
||||
|
||||
ROM_REGION( 0x10000, M8502_TAG, ROMREGION_ERASEFF )
|
||||
|
||||
ROM_REGION( 0x100, MOS8721_TAG, 0 )
|
||||
ROM_LOAD( "8721r3.u11", 0x000, 0x100, NO_DUMP )
|
||||
ROM_END
|
||||
|
||||
|
||||
@ -1280,6 +1330,9 @@ ROM_START( c128cr )
|
||||
ROM_LOAD( "390059-01.u18", 0x120000, 0x2000, CRC(6aaaafe6) SHA1(29ed066d513f2d5c09ff26d9166ba23c2afb2b3f) ) // Character, "MOS // (C)1985 CBM // 390059-01 // M468613 8547H"
|
||||
|
||||
ROM_REGION( 0x10000, M8502_TAG, ROMREGION_ERASEFF )
|
||||
|
||||
ROM_REGION( 0x100, MOS8721_TAG, 0 )
|
||||
ROM_LOAD( "8721r3.u11", 0x000, 0x100, NO_DUMP )
|
||||
ROM_END
|
||||
|
||||
|
||||
@ -1302,6 +1355,9 @@ ROM_START( c128ger )
|
||||
ROM_LOAD( "390059-01.bin", 0x120000, 0x2000, CRC(6aaaafe6) SHA1(29ed066d513f2d5c09ff26d9166ba23c2afb2b3f) ) // Character
|
||||
|
||||
ROM_REGION( 0x10000, M8502_TAG, ROMREGION_ERASEFF )
|
||||
|
||||
ROM_REGION( 0x100, MOS8721_TAG, 0 )
|
||||
ROM_LOAD( "8721r3.u11", 0x000, 0x100, NO_DUMP )
|
||||
ROM_END
|
||||
|
||||
|
||||
@ -1320,6 +1376,9 @@ ROM_START( c128sfi )
|
||||
ROM_LOAD( "325181-02.u18", 0x120000, 0x2000, BAD_DUMP CRC(7a70d9b8) SHA1(aca3f7321ee7e6152f1f0afad646ae41964de4fb) ) // C128 Char Sw/Fi
|
||||
|
||||
ROM_REGION( 0x10000, M8502_TAG, ROMREGION_ERASEFF )
|
||||
|
||||
ROM_REGION( 0x100, MOS8721_TAG, 0 )
|
||||
ROM_LOAD( "8721r3.u11", 0x000, 0x100, NO_DUMP )
|
||||
ROM_END
|
||||
|
||||
|
||||
@ -1338,6 +1397,9 @@ ROM_START( c128fra )
|
||||
ROM_LOAD( "325167-01.bin", 0x120000, 0x2000, BAD_DUMP CRC(bad36b88) SHA1(9119b27a1bf885fa4c76fff5d858c74c194dd2b8) )
|
||||
|
||||
ROM_REGION( 0x10000, M8502_TAG, ROMREGION_ERASEFF )
|
||||
|
||||
ROM_REGION( 0x100, MOS8721_TAG, 0 )
|
||||
ROM_LOAD( "8721r3.u11", 0x000, 0x100, NO_DUMP )
|
||||
ROM_END
|
||||
|
||||
|
||||
@ -1357,6 +1419,9 @@ ROM_START( c128nor )
|
||||
ROM_LOAD( "char.nor", 0x120000, 0x2000, BAD_DUMP CRC(ba95c625) SHA1(5a87faa457979e7b6f434251a9e32f4483b337b3) )
|
||||
|
||||
ROM_REGION( 0x10000, M8502_TAG, ROMREGION_ERASEFF )
|
||||
|
||||
ROM_REGION( 0x100, MOS8721_TAG, 0 )
|
||||
ROM_LOAD( "8721r3.u11", 0x000, 0x100, NO_DUMP )
|
||||
ROM_END
|
||||
|
||||
|
||||
@ -1374,6 +1439,9 @@ ROM_START( c128d )
|
||||
ROM_LOAD( "390059-01.bin", 0x120000, 0x2000, CRC(6aaaafe6) SHA1(29ed066d513f2d5c09ff26d9166ba23c2afb2b3f) )
|
||||
|
||||
ROM_REGION( 0x10000, M8502_TAG, ROMREGION_ERASEFF )
|
||||
|
||||
ROM_REGION( 0x100, MOS8721_TAG, 0 )
|
||||
ROM_LOAD( "8721r3.u11", 0x000, 0x100, NO_DUMP )
|
||||
ROM_END
|
||||
|
||||
|
||||
@ -1396,6 +1464,9 @@ ROM_START( c128dcr )
|
||||
ROM_LOAD( "390059-01.bin", 0x120000, 0x2000, CRC(6aaaafe6) SHA1(29ed066d513f2d5c09ff26d9166ba23c2afb2b3f) ) // Character
|
||||
|
||||
ROM_REGION( 0x10000, M8502_TAG, ROMREGION_ERASEFF )
|
||||
|
||||
ROM_REGION( 0x100, MOS8721_TAG, 0 )
|
||||
ROM_LOAD( "8721r3.u11", 0x000, 0x100, NO_DUMP )
|
||||
ROM_END
|
||||
|
||||
|
||||
@ -1410,6 +1481,9 @@ ROM_START( c128drde )
|
||||
ROM_LOAD( "315079-01.bin", 0x120000, 0x2000, CRC(fe5a2db1) SHA1(638f8aff51c2ac4f99a55b12c4f8c985ef4bebd3) )
|
||||
|
||||
ROM_REGION( 0x10000, M8502_TAG, ROMREGION_ERASEFF )
|
||||
|
||||
ROM_REGION( 0x100, MOS8721_TAG, 0 )
|
||||
ROM_LOAD( "8721r3.u11", 0x000, 0x100, NO_DUMP )
|
||||
ROM_END
|
||||
|
||||
|
||||
@ -1424,6 +1498,9 @@ ROM_START( c128drsw )
|
||||
ROM_LOAD( "325181-01.bin", 0x120000, 0x2000, CRC(7a70d9b8) SHA1(aca3f7321ee7e6152f1f0afad646ae41964de4fb) )
|
||||
|
||||
ROM_REGION( 0x10000, M8502_TAG, ROMREGION_ERASEFF )
|
||||
|
||||
ROM_REGION( 0x100, MOS8721_TAG, 0 )
|
||||
ROM_LOAD( "8721r3.u11", 0x000, 0x100, NO_DUMP )
|
||||
ROM_END
|
||||
|
||||
|
||||
@ -1441,6 +1518,9 @@ ROM_START( c128drit )
|
||||
ROM_LOAD( "325167-01.bin", 0x120000, 0x2000, BAD_DUMP CRC(bad36b88) SHA1(9119b27a1bf885fa4c76fff5d858c74c194dd2b8) )
|
||||
|
||||
ROM_REGION( 0x10000, M8502_TAG, ROMREGION_ERASEFF )
|
||||
|
||||
ROM_REGION( 0x100, MOS8721_TAG, 0 )
|
||||
ROM_LOAD( "8721r3.u11", 0x000, 0x100, NO_DUMP )
|
||||
ROM_END
|
||||
|
||||
|
||||
@ -1457,6 +1537,9 @@ ROM_START( c128d81 )
|
||||
ROM_LOAD( "390059-01.bin", 0x120000, 0x2000, CRC(6aaaafe6) SHA1(29ed066d513f2d5c09ff26d9166ba23c2afb2b3f) )
|
||||
|
||||
ROM_REGION( 0x10000, M8502_TAG, ROMREGION_ERASEFF )
|
||||
|
||||
ROM_REGION( 0x100, MOS8721_TAG, 0 )
|
||||
ROM_LOAD( "8721r3.u11", 0x000, 0x100, NO_DUMP )
|
||||
ROM_END
|
||||
|
||||
|
||||
|
||||
@ -70,8 +70,8 @@ void c64_state::bankswitch(offs_t offset, offs_t va, int rw, int aec, int ba, in
|
||||
int game = m_exp->game_r(offset, ba, rw, m_hiram);
|
||||
int exrom = m_exp->exrom_r(offset, ba, rw, m_hiram);
|
||||
|
||||
UINT16 input = VA12 << 15 | VA13 << 14 | game << 13 | exrom << 12 | rw << 11 | aec << 10 | ba << 9 | A12 << 8 | A13 << 7 | A14 << 6 | A15 << 5 | m_va14 << 4 | m_charen << 3 | m_hiram << 2 | m_loram << 1 | cas;
|
||||
UINT8 data = m_pla->read(input);
|
||||
UINT32 input = VA12 << 15 | VA13 << 14 | game << 13 | exrom << 12 | rw << 11 | aec << 10 | ba << 9 | A12 << 8 | A13 << 7 | A14 << 6 | A15 << 5 | m_va14 << 4 | m_charen << 3 | m_hiram << 2 | m_loram << 1 | cas;
|
||||
UINT32 data = m_pla->read(input);
|
||||
|
||||
*casram = BIT(data, 0);
|
||||
*basic = BIT(data, 1);
|
||||
|
||||
@ -24,6 +24,7 @@
|
||||
#include "machine/cbmipt.h"
|
||||
#include "machine/mos8722.h"
|
||||
#include "machine/petcass.h"
|
||||
#include "machine/pla.h"
|
||||
#include "machine/ram.h"
|
||||
#include "machine/vcsctrl.h"
|
||||
#include "sound/dac.h"
|
||||
@ -57,6 +58,7 @@ public:
|
||||
m_maincpu(*this, Z80A_TAG),
|
||||
m_subcpu(*this, M8502_TAG),
|
||||
m_mmu(*this, MOS8722_TAG),
|
||||
m_pla(*this, MOS8721_TAG),
|
||||
m_vdc(*this, MOS8563_TAG),
|
||||
m_vic(*this, MOS8564_TAG),
|
||||
m_sid(*this, MOS6581_TAG),
|
||||
@ -80,6 +82,7 @@ public:
|
||||
required_device<legacy_cpu_device> m_maincpu;
|
||||
required_device<legacy_cpu_device> m_subcpu;
|
||||
required_device<mos8722_device> m_mmu;
|
||||
required_device<mos8721_device> m_pla;
|
||||
required_device<mos8563_device> m_vdc;
|
||||
required_device<mos6566_device> m_vic;
|
||||
required_device<sid6581_device> m_sid;
|
||||
@ -96,8 +99,8 @@ public:
|
||||
virtual void machine_start();
|
||||
virtual void machine_reset();
|
||||
|
||||
void bankswitch_pla(offs_t offset, offs_t vma, int ba, int rw, int aec, int z80io, int ms3, int ms2, int ms1, int ms0,
|
||||
int *cas, int *gwe, int *rom1, int *rom2, int *rom3, int *rom4, int *charom, int *colorram, int *vic, int *from1, int *romh, int *roml, int *dwe, int *ioacc, int *clrbank, int *iocs, int *casenb);
|
||||
void bankswitch_pla(offs_t offset, offs_t ta, offs_t vma, int ba, int rw, int aec, int z80io, int ms3, int ms2, int ms1, int ms0,
|
||||
int *sden, int *dir, int *gwe, int *rom1, int *rom2, int *rom3, int *rom4, int *charom, int *colorram, int *vic, int *from1, int *romh, int *roml, int *dwe, int *ioacc, int *clrbank, int *iocs, int *casenb);
|
||||
UINT8 read_memory(address_space &space, offs_t offset, offs_t vma, int ba, int aec, int z80io);
|
||||
void write_memory(address_space &space, offs_t offset, offs_t vma, UINT8 data, int ba, int aec, int z80io);
|
||||
|
||||
@ -171,6 +174,12 @@ public:
|
||||
void bankswitch(int reset);
|
||||
void mmu8722_reset();
|
||||
|
||||
// memory state
|
||||
int m_loram;
|
||||
int m_hiram;
|
||||
int m_charen;
|
||||
int m_va14;
|
||||
int m_va15;
|
||||
const UINT8 *m_rom1;
|
||||
const UINT8 *m_rom2;
|
||||
const UINT8 *m_rom3;
|
||||
|
||||
@ -13,7 +13,7 @@
|
||||
#include "machine/cbmiec.h"
|
||||
#include "machine/cbmipt.h"
|
||||
#include "machine/petcass.h"
|
||||
#include "machine/pls100.h"
|
||||
#include "machine/pla.h"
|
||||
#include "machine/ram.h"
|
||||
#include "machine/vcsctrl.h"
|
||||
#include "sound/dac.h"
|
||||
|
||||
@ -15,7 +15,7 @@
|
||||
#include "machine/cbmipt.h"
|
||||
#include "machine/mos6529.h"
|
||||
#include "machine/petcass.h"
|
||||
#include "machine/pls100.h"
|
||||
#include "machine/pla.h"
|
||||
#include "machine/ram.h"
|
||||
|
||||
#define MOS7501_TAG "u2"
|
||||
|
||||
@ -294,6 +294,10 @@ WRITE8_MEMBER( c128_state::cia2_pa_w )
|
||||
|
||||
m_vicaddr = m_memory + helper[data & 0x03];
|
||||
m_c128_vicaddr = m_memory + helper[data & 0x03] + m_va1617;
|
||||
|
||||
// VIC banking
|
||||
m_va14 = BIT(data, 0);
|
||||
m_va15 = BIT(data, 1);
|
||||
}
|
||||
|
||||
WRITE_LINE_MEMBER( c128_state::cia2_irq_w )
|
||||
@ -994,15 +998,35 @@ READ8_MEMBER( c128_state::vic_dma_read_color )
|
||||
|
||||
WRITE8_MEMBER( c128_state::cpu_w )
|
||||
{
|
||||
/*
|
||||
|
||||
bit description
|
||||
|
||||
P0 LORAM
|
||||
P1 HIRAM
|
||||
P2 CHAREN
|
||||
P3 CASS WRT
|
||||
P4
|
||||
P5 CASS MOTOR
|
||||
P6
|
||||
|
||||
*/
|
||||
|
||||
// memory banking
|
||||
m_loram = BIT(data, 0);
|
||||
m_hiram = BIT(data, 1);
|
||||
m_charen = BIT(data, 2);
|
||||
|
||||
// cassette write
|
||||
m_cassette->write(BIT(data, 3));
|
||||
|
||||
// cassette motor
|
||||
m_cassette->motor_w(BIT(data, 5));
|
||||
|
||||
bankswitch_64(0);
|
||||
|
||||
m_memory[0x000] = m_subcpu->memory().space(AS_PROGRAM)->read_byte(0);
|
||||
m_memory[0x001] = m_subcpu->memory().space(AS_PROGRAM)->read_byte(1);
|
||||
|
||||
}
|
||||
|
||||
READ8_MEMBER( c128_state::cpu_r)
|
||||
|
||||
@ -22,7 +22,7 @@
|
||||
#include "machine/6525tpi.h"
|
||||
#include "machine/c1541.h"
|
||||
#include "machine/cbmipt.h"
|
||||
#include "machine/pls100.h"
|
||||
#include "machine/pla.h"
|
||||
#include "machine/plus4exp.h"
|
||||
|
||||
|
||||
|
||||
Loading…
Reference in New Issue
Block a user