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https://github.com/holub/mame
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indigo.cpp: Hooked up palette setup for LG1 graphics board. [Ryan Holtz]
This commit is contained in:
mooglyguy
parent
349d0be4e9
commit
1e57f272ed
@ -31,10 +31,11 @@
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#include "machine/sgi.h"
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#include "machine/wd33c93.h"
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#include "machine/z80scc.h"
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#include "emupal.h"
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#include "screen.h"
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#include "speaker.h"
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#define ENABLE_ENTRY_GFX (0)
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#define ENABLE_ENTRY_GFX (1)
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#define LOG_UNKNOWN (1 << 0)
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#define LOG_INT (1 << 1)
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@ -67,6 +68,7 @@ public:
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, m_pit(*this, "pit")
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, m_rtc(*this, "rtc")
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, m_dsp_ram(*this, "dspram")
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, m_palette(*this, "palette")
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{
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}
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@ -106,6 +108,8 @@ protected:
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static void cdrom_config(device_t *device);
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void indigo_map(address_map &map);
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uint32_t screen_update(screen_device &device, bitmap_rgb32 &bitmap, const rectangle &cliprect);
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enum
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{
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LOCAL0_FIFO_GIO0 = 0x01,
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@ -125,6 +129,52 @@ protected:
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LOCAL1_RETRACE_GIO2 = 0x80
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};
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enum
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{
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REX15_PAGE0_SET = 0x00000000,
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REX15_PAGE0_GO = 0x00000800,
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REX15_PAGE1_SET = 0x00004790,
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REX15_PAGE1_GO = 0x00004f90,
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REX15_P0REG_COMMAND = 0x00000000,
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REX15_P0REG_XSTARTI = 0x0000000c,
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REX15_P0REG_YSTARTI = 0x0000001c,
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REX15_P0REG_XYMOVE = 0x00000034,
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REX15_P0REG_COLORREDI = 0x00000038,
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REX15_P0REG_COLORGREENI = 0x00000040,
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REX15_P0REG_COLORBLUEI = 0x00000048,
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REX15_P0REG_COLORBACK = 0x0000005c,
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REX15_P0REG_ZPATTERN = 0x00000060,
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REX15_P0REG_XENDI = 0x00000084,
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REX15_P0REG_YENDI = 0x00000088,
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REX15_P1REG_WCLOCKREV = 0x00000054,
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REX15_P1REG_CFGDATA = 0x00000058,
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REX15_P1REG_CFGSEL = 0x0000005c,
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REX15_P1REG_VC1_ADDRDATA = 0x00000060,
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REX15_P1REG_CFGMODE = 0x00000068,
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REX15_P1REG_XYOFFSET = 0x0000006c,
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REX15_OP_NOP = 0x00000000,
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REX15_OP_DRAW = 0x00000001,
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REX15_OP_FLAG_BLOCK = 0x00000008,
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REX15_OP_FLAG_LENGTH32 = 0x00000010,
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REX15_OP_FLAG_QUADMODE = 0x00000020,
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REX15_OP_FLAG_XYCONTINUE = 0x00000080,
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REX15_OP_FLAG_STOPONX = 0x00000100,
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REX15_OP_FLAG_STOPONY = 0x00000200,
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REX15_OP_FLAG_ENZPATTERN = 0x00000400,
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REX15_OP_FLAG_LOGICSRC = 0x00080000,
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REX15_OP_FLAG_ZOPAQUE = 0x00800000,
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REX15_OP_FLAG_ZCONTINUE = 0x01000000,
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REX15_WRITE_ADDR = 0x00,
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REX15_PALETTE_RAM = 0x01,
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REX15_PIXEL_READ_MASK = 0x02,
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REX15_CONTROL = 0x06
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};
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struct hpc_t
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{
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uint8_t m_misc_status;
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@ -146,6 +196,18 @@ protected:
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bool m_scsi0_dma_end;
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};
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struct lg1_t
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{
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uint32_t m_config_sel;
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uint32_t m_write_addr;
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uint32_t m_control;
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uint8_t m_palette_idx;
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uint8_t m_palette_channel;
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uint8_t m_palette_entry[3];
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bool m_waiting_for_palette_addr;
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uint8_t m_pix_read_mask[256];
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};
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enum
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{
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HPC_DMACTRL_RESET = 0x01,
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@ -161,8 +223,10 @@ protected:
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required_device<pit8254_device> m_pit;
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required_device<dp8573_device> m_rtc;
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required_shared_ptr<uint32_t> m_dsp_ram;
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required_device<palette_device> m_palette;
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hpc_t m_hpc;
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lg1_t m_lg1;
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uint8_t m_duart_int_status;
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static char const *const RS232A_TAG;
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@ -233,12 +297,22 @@ void indigo_state::machine_start()
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save_item(NAME(m_hpc.m_scsi0_dma_active));
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save_item(NAME(m_hpc.m_scsi0_dma_end));
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save_item(NAME(m_lg1.m_config_sel));
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save_item(NAME(m_lg1.m_write_addr));
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save_item(NAME(m_lg1.m_control));
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save_item(NAME(m_lg1.m_palette_idx));
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save_item(NAME(m_lg1.m_palette_channel));
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save_item(NAME(m_lg1.m_palette_entry));
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save_item(NAME(m_lg1.m_waiting_for_palette_addr));
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save_item(NAME(m_lg1.m_pix_read_mask));
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save_item(NAME(m_duart_int_status));
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}
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void indigo_state::machine_reset()
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{
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memset(&m_hpc, 0, sizeof(hpc_t));
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memset(&m_lg1, 0, sizeof(lg1_t));
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m_duart_int_status = 0;
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}
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@ -786,17 +860,101 @@ WRITE32_MEMBER(indigo_state::dsp_ram_w)
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READ32_MEMBER(indigo_state::entry_r)
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{
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uint32_t ret = 0;
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#if ENABLE_ENTRY_GFX
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if (offset == 0x0014/4)
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switch (offset)
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{
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case 0x0014/4:
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ret = 0x033c0000;
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#endif
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LOGMASKED(LOG_GFX, "%s: Entry Graphics(?) Read: %08x = %08x & %08x\n", machine().describe_context(), 0x1f3f0000 + offset*4, ret, mem_mask);
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LOGMASKED(LOG_GFX, "%s: LG1 Read: Presence Detect(?) %08x = %08x & %08x\n", machine().describe_context(), 0x1f3f0000 + offset*4, ret, mem_mask);
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break;
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default:
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LOGMASKED(LOG_GFX, "%s: Unknown LG1 Read: %08x = %08x & %08x\n", machine().describe_context(), 0x1f3f0000 + offset*4, ret, mem_mask);
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break;
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}
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return ret;
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}
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WRITE32_MEMBER(indigo_state::entry_w)
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{
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LOGMASKED(LOG_GFX, "%s: Entry Graphics(?) Write: %08x = %08x & %08x\n", machine().describe_context(), 0x1f3f0000 + offset*4, data, mem_mask);
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switch (offset)
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{
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case (REX15_PAGE1_SET+REX15_P1REG_CFGSEL)/4:
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m_lg1.m_config_sel = data;
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switch (data)
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{
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case REX15_WRITE_ADDR:
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LOGMASKED(LOG_GFX, "%s: LG1 ConfigSel Write = %08x (Write Addr)\n", machine().describe_context(), data);
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break;
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case REX15_PALETTE_RAM:
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LOGMASKED(LOG_GFX, "%s: LG1 ConfigSel Write = %08x (Palette RAM)\n", machine().describe_context(), data);
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break;
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case REX15_CONTROL:
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LOGMASKED(LOG_GFX, "%s: LG1 ConfigSel Write = %08x (Control)\n", machine().describe_context(), data);
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break;
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case REX15_PIXEL_READ_MASK:
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LOGMASKED(LOG_GFX, "%s: LG1 ConfigSel Write = %08x (Pixel Read Mask)\n", machine().describe_context(), data);
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break;
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default:
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LOGMASKED(LOG_GFX, "%s: LG1 ConfigSel Write = %08x (Unknown)\n", machine().describe_context(), data);
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break;
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}
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break;
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case (REX15_PAGE1_SET+REX15_P1REG_CFGDATA)/4:
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switch (m_lg1.m_config_sel)
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{
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case REX15_WRITE_ADDR:
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LOGMASKED(LOG_GFX, "%s: LG1 ConfigSel Write: Setting WriteAddr to %08x\n", machine().describe_context(), data);
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m_lg1.m_write_addr = data;
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if (m_lg1.m_control == 0xf)
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{
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LOGMASKED(LOG_GFX, "%s: LG1 about to set palette entry %02x\n", machine().describe_context(), (uint8_t)data);
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m_lg1.m_palette_idx = (uint8_t)data;
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m_lg1.m_palette_channel = 0;
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}
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break;
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case REX15_PALETTE_RAM:
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LOGMASKED(LOG_GFX, "%s: LG1 ConfigSel Write: Setting Palette RAM %02x entry %d to %02x\n", machine().describe_context(),
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m_lg1.m_palette_idx, m_lg1.m_palette_channel, (uint8_t)data);
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m_lg1.m_palette_entry[m_lg1.m_palette_channel++] = (uint8_t)data;
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if (m_lg1.m_palette_channel == 3)
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{
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m_palette->set_pen_color(m_lg1.m_palette_idx, m_lg1.m_palette_entry[0], m_lg1.m_palette_entry[1], m_lg1.m_palette_entry[2]);
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}
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break;
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case REX15_CONTROL:
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LOGMASKED(LOG_GFX, "%s: LG1 ConfigSel Write: Setting Control to %08x\n", machine().describe_context(), data);
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m_lg1.m_control = data;
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break;
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case REX15_PIXEL_READ_MASK:
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LOGMASKED(LOG_GFX, "%s: LG1 ConfigSel Write = %08x (Pixel Read Mask, entry %02x)\n", machine().describe_context(), data, m_lg1.m_palette_idx);
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m_lg1.m_pix_read_mask[m_lg1.m_palette_idx] = (uint8_t)data;
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break;
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default:
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LOGMASKED(LOG_GFX, "%s: LG1 Unknown ConfigData Write = %08x\n", machine().describe_context(), data);
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break;
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}
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break;
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default:
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LOGMASKED(LOG_GFX, "%s: Unknown LG1 Write: %08x = %08x & %08x\n", machine().describe_context(), 0x1f3f0000 + offset*4, data, mem_mask);
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break;
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}
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}
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uint32_t indigo_state::screen_update(screen_device &device, bitmap_rgb32 &bitmap, const rectangle &cliprect)
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{
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const rgb_t *pens = m_palette->palette()->entry_list_raw();
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for (int y = 0; y < 256; y++)
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{
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for (int suby = 0; suby < 3; suby++)
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{
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uint32_t *dst = &bitmap.pix32(y*3 + suby);
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for (int x = 0; x < 1024; x++)
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{
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*dst++ = pens[y];
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}
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}
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}
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return 0;
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}
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void indigo_state::indigo_map(address_map &map)
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@ -837,6 +995,16 @@ void indigo_state::cdrom_config(device_t *device)
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void indigo_state::indigo_base(machine_config &config)
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{
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/* video hardware */
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screen_device &screen(SCREEN(config, "screen", SCREEN_TYPE_RASTER));
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screen.set_refresh_hz(60);
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screen.set_vblank_time(ATTOSECONDS_IN_USEC(2500)); /* not accurate */
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screen.set_size(1024, 768);
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screen.set_visarea(0, 1024-1, 0, 768-1);
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screen.set_screen_update(FUNC(indigo_state::screen_update));
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PALETTE(config, m_palette, 256);
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SPEAKER(config, "mono").front_center();
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SCC8530N(config, m_scc[0], SCC_PCLK);
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