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https://github.com/holub/mame
synced 2025-10-05 08:41:31 +03:00
intelfsh: Eliminate address_space argument from read/write handlers (nw)
This commit is contained in:
parent
348d535738
commit
1ec7d89be7
@ -119,12 +119,12 @@ uint8_t c64_easyflash_cartridge_device::c64_cd_r(address_space &space, offs_t of
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if (!roml)
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{
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offs_t addr = (m_bank << 13) | (offset & 0x1fff);
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data = m_flash_roml->read(space, addr);
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data = m_flash_roml->read(addr);
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}
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else if (!romh)
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{
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offs_t addr = (m_bank << 13) | (offset & 0x1fff);
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data = m_flash_romh->read(space, addr);
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data = m_flash_romh->read(addr);
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}
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else if (!io2)
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{
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@ -144,12 +144,12 @@ void c64_easyflash_cartridge_device::c64_cd_w(address_space &space, offs_t offse
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if (!roml)
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{
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offs_t addr = (m_bank << 13) | (offset & 0x1fff);
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m_flash_roml->write(space, addr, data);
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m_flash_roml->write(addr, data);
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}
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else if (!romh)
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{
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offs_t addr = (m_bank << 13) | (offset & 0x1fff);
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m_flash_romh->write(space, addr, data);
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m_flash_romh->write(addr, data);
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}
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else if (!io1)
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{
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@ -225,7 +225,7 @@ uint8_t c64_ide64_cartridge_device::c64_cd_r(address_space &space, offs_t offset
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{
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offs_t addr = (m_bank << 14) | (offset & 0x3fff);
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data = m_flash_rom->read(space, addr);
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data = m_flash_rom->read(addr);
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}
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else if (!ram_oe)
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{
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@ -259,7 +259,7 @@ void c64_ide64_cartridge_device::c64_cd_w(address_space &space, offs_t offset, u
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if ((offset >= 0x8000 && offset < 0xc000) && !m_wp)
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{
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offs_t addr = (m_bank << 14) | (offset & 0x3fff);
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m_flash_rom->write(space, addr, data);
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m_flash_rom->write(addr, data);
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}
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if (!io1)
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@ -417,13 +417,13 @@ READ32_MEMBER(gba_rom_flash_device::read_ram)
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offset &= m_flash_mask;
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if (mem_mask & 0xff)
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rv |= m_flash->read(space, offset * 4);
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rv |= m_flash->read(offset * 4);
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if (mem_mask & 0xff00)
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rv |= m_flash->read(space, (offset * 4) + 1) << 8;
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rv |= m_flash->read((offset * 4) + 1) << 8;
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if (mem_mask & 0xff0000)
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rv |= m_flash->read(space, (offset * 4) + 2) << 16;
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rv |= m_flash->read((offset * 4) + 2) << 16;
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if (mem_mask & 0xff000000)
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rv |= m_flash->read(space, (offset * 4) + 3) << 24;
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rv |= m_flash->read((offset * 4) + 3) << 24;
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return rv;
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}
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@ -435,16 +435,16 @@ WRITE32_MEMBER(gba_rom_flash_device::write_ram)
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switch (mem_mask)
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{
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case 0xff:
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m_flash->write(space, offset * 4, data & 0xff);
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m_flash->write(offset * 4, data & 0xff);
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break;
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case 0xff00:
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m_flash->write(space, (offset * 4) + 1, (data >> 8) & 0xff);
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m_flash->write((offset * 4) + 1, (data >> 8) & 0xff);
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break;
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case 0xff0000:
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m_flash->write(space, (offset * 4) + 2, (data >> 16) & 0xff);
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m_flash->write((offset * 4) + 2, (data >> 16) & 0xff);
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break;
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case 0xff000000:
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m_flash->write(space, (offset * 4) + 3, (data >> 24) & 0xff);
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m_flash->write((offset * 4) + 3, (data >> 24) & 0xff);
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break;
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default:
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fatalerror("Unknown mem_mask for GBA flash write %x\n", mem_mask);
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@ -464,13 +464,13 @@ READ32_MEMBER(gba_rom_flash1m_device::read_ram)
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offset &= m_flash_mask;
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if (mem_mask & 0xff)
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rv |= m_flash->read(space, offset * 4);
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rv |= m_flash->read(offset * 4);
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if (mem_mask & 0xff00)
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rv |= m_flash->read(space, (offset * 4) + 1) << 8;
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rv |= m_flash->read((offset * 4) + 1) << 8;
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if (mem_mask & 0xff0000)
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rv |= m_flash->read(space, (offset * 4) + 2) << 16;
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rv |= m_flash->read((offset * 4) + 2) << 16;
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if (mem_mask & 0xff000000)
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rv |= m_flash->read(space, (offset * 4) + 3) << 24;
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rv |= m_flash->read((offset * 4) + 3) << 24;
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return rv;
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}
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@ -482,16 +482,16 @@ WRITE32_MEMBER(gba_rom_flash1m_device::write_ram)
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switch (mem_mask)
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{
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case 0xff:
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m_flash->write(space, offset * 4, data & 0xff);
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m_flash->write(offset * 4, data & 0xff);
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break;
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case 0xff00:
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m_flash->write(space, (offset * 4) + 1, (data >> 8) & 0xff);
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m_flash->write((offset * 4) + 1, (data >> 8) & 0xff);
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break;
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case 0xff0000:
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m_flash->write(space, (offset * 4) + 2, (data >> 16) & 0xff);
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m_flash->write((offset * 4) + 2, (data >> 16) & 0xff);
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break;
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case 0xff000000:
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m_flash->write(space, (offset * 4) + 3, (data >> 24) & 0xff);
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m_flash->write((offset * 4) + 3, (data >> 24) & 0xff);
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break;
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default:
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fatalerror("Unknown mem_mask for GBA flash write %x\n", mem_mask);
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@ -148,7 +148,7 @@ uint8_t vic20_final_expansion_3_device::vic20_cd_r(address_space &space, offs_t
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// read from ROM
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if (!blk5)
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{
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data = m_flash_rom->read(space, get_address(0, 3, offset));
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data = m_flash_rom->read(get_address(0, 3, offset));
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m_lockbit = 1;
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}
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@ -170,19 +170,19 @@ uint8_t vic20_final_expansion_3_device::vic20_cd_r(address_space &space, offs_t
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// read from ROM
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if (!blk1 && !BLK1_HIDDEN)
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{
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data = m_flash_rom->read(space, get_address(REG1_BANK, 0, offset));
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data = m_flash_rom->read(get_address(REG1_BANK, 0, offset));
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}
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if (!blk2 && !BLK2_HIDDEN)
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{
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data = m_flash_rom->read(space, get_address(REG1_BANK, 1, offset));
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data = m_flash_rom->read(get_address(REG1_BANK, 1, offset));
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}
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if (!blk3 && !BLK3_HIDDEN)
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{
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data = m_flash_rom->read(space, get_address(REG1_BANK, 2, offset));
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data = m_flash_rom->read(get_address(REG1_BANK, 2, offset));
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}
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if (!blk5 && !BLK5_HIDDEN)
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{
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data = m_flash_rom->read(space, get_address(REG1_BANK, 3, offset));
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data = m_flash_rom->read(get_address(REG1_BANK, 3, offset));
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}
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// read from registers
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@ -298,19 +298,19 @@ uint8_t vic20_final_expansion_3_device::vic20_cd_r(address_space &space, offs_t
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// read from ROM bank 0 or RAM bank 1
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if (!blk1 && !BLK1_HIDDEN)
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{
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data = (m_reg1 & REG1_BLK1) ? m_flash_rom->read(space, get_address(0, 0, offset)) : m_ram[get_address(1, 0, offset)];
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data = (m_reg1 & REG1_BLK1) ? m_flash_rom->read(get_address(0, 0, offset)) : m_ram[get_address(1, 0, offset)];
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}
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if (!blk2 && !BLK2_HIDDEN)
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{
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data = (m_reg1 & REG1_BLK2) ? m_flash_rom->read(space, get_address(0, 1, offset)) : m_ram[get_address(1, 1, offset)];
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data = (m_reg1 & REG1_BLK2) ? m_flash_rom->read(get_address(0, 1, offset)) : m_ram[get_address(1, 1, offset)];
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}
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if (!blk3 && !BLK3_HIDDEN)
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{
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data = (m_reg1 & REG1_BLK3) ? m_flash_rom->read(space, get_address(0, 2, offset)) : m_ram[get_address(1, 2, offset)];
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data = (m_reg1 & REG1_BLK3) ? m_flash_rom->read(get_address(0, 2, offset)) : m_ram[get_address(1, 2, offset)];
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}
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if (!blk5 && !BLK5_HIDDEN)
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{
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data = (m_reg1 & REG1_BLK5) ? m_flash_rom->read(space, get_address(0, 3, offset)) : m_ram[get_address(1, 3, offset)];
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data = (m_reg1 & REG1_BLK5) ? m_flash_rom->read(get_address(0, 3, offset)) : m_ram[get_address(1, 3, offset)];
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}
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// read from registers
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@ -330,19 +330,19 @@ uint8_t vic20_final_expansion_3_device::vic20_cd_r(address_space &space, offs_t
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// read from ROM
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if (!blk1 && !BLK1_HIDDEN)
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{
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data = m_flash_rom->read(space, get_address(REG1_BANK, 0, offset));
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data = m_flash_rom->read(get_address(REG1_BANK, 0, offset));
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}
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if (!blk2 && !BLK2_HIDDEN)
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{
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data = m_flash_rom->read(space, get_address(REG1_BANK, 1, offset));
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data = m_flash_rom->read(get_address(REG1_BANK, 1, offset));
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}
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if (!blk3 && !BLK3_HIDDEN)
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{
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data = m_flash_rom->read(space, get_address(REG1_BANK, 2, offset));
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data = m_flash_rom->read(get_address(REG1_BANK, 2, offset));
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}
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if (!blk5 && !BLK5_HIDDEN)
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{
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data = m_flash_rom->read(space, get_address(REG1_BANK, 3, offset));
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data = m_flash_rom->read(get_address(REG1_BANK, 3, offset));
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}
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// read from registers
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@ -551,19 +551,19 @@ void vic20_final_expansion_3_device::vic20_cd_w(address_space &space, offs_t off
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// write to ROM
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if (!blk1 && !BLK1_HIDDEN)
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{
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m_flash_rom->write(space, get_address(REG1_BANK, 0, offset), data);
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m_flash_rom->write(get_address(REG1_BANK, 0, offset), data);
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}
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if (!blk2 && !BLK2_HIDDEN)
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{
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m_flash_rom->write(space, get_address(REG1_BANK, 1, offset), data);
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m_flash_rom->write(get_address(REG1_BANK, 1, offset), data);
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}
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if (!blk3 && !BLK3_HIDDEN)
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{
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m_flash_rom->write(space, get_address(REG1_BANK, 2, offset), data);
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m_flash_rom->write(get_address(REG1_BANK, 2, offset), data);
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}
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if (!blk5 && !BLK5_HIDDEN)
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{
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m_flash_rom->write(space, get_address(REG1_BANK, 3, offset), data);
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m_flash_rom->write(get_address(REG1_BANK, 3, offset), data);
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}
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// write to registers
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@ -73,7 +73,7 @@ uint8_t* z88_1024k_flash_device::get_cart_base()
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READ8_MEMBER(z88_1024k_flash_device::read)
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{
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return m_flash->read(space, offset & (get_cart_size() - 1));
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return m_flash->read(offset & (get_cart_size() - 1));
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}
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/*-------------------------------------------------
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@ -82,5 +82,5 @@ READ8_MEMBER(z88_1024k_flash_device::read)
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WRITE8_MEMBER(z88_1024k_flash_device::write)
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{
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m_flash->write(space, offset & (get_cart_size() - 1), data);
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m_flash->write(offset & (get_cart_size() - 1), data);
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}
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@ -102,8 +102,8 @@ class intelfsh8_device : public intelfsh_device
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{
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public:
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// public interface
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DECLARE_READ8_MEMBER(read) { return read_full(offset); }
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DECLARE_WRITE8_MEMBER(write) { write_full(offset, data); }
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uint8_t read(offs_t offset) { return read_full(offset); }
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void write(offs_t offset, uint8_t data) { write_full(offset, data); }
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uint8_t read_raw(offs_t offset) { return m_data[offset]; }
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void write_raw(offs_t offset, uint8_t data) { m_data[offset] = data; }
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@ -120,8 +120,8 @@ class intelfsh16_device : public intelfsh_device
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{
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public:
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// public interface
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DECLARE_READ16_MEMBER(read) { return read_full(offset); }
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DECLARE_WRITE16_MEMBER(write) { write_full(offset, data); }
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uint16_t read(offs_t offset) { return read_full(offset); }
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void write(offs_t offset, uint16_t data) { write_full(offset, data); }
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uint16_t read_raw(offs_t offset) { return m_data[offset*2] | (m_data[offset*2+1] << 8); }
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void write_raw(offs_t offset, uint16_t data) { m_data[offset*2] = data; m_data[offset*2+1] = data >> 8; }
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@ -1405,22 +1405,22 @@ READ32_MEMBER(cps3_state::cps3_gfxflash_r)
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if (ACCESSING_BITS_24_31) // GFX Flash 1
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{
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//logerror("read GFX flash chip %s addr %02x\n", chip0->tag(), (offset<<1));
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result |= chip0->read(space, (offset<<1)) << 24;
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result |= chip0->read(offset<<1) << 24;
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}
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if (ACCESSING_BITS_16_23) // GFX Flash 2
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{
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//logerror("read GFX flash chip %s addr %02x\n", chip1->tag(), (offset<<1));
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result |= chip1->read(space, (offset<<1)) << 16;
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result |= chip1->read(offset<<1) << 16;
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}
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if (ACCESSING_BITS_8_15) // GFX Flash 1
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{
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//logerror("read GFX flash chip %s addr %02x\n", chip0->tag(), (offset<<1)+1);
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result |= chip0->read(space, (offset<<1)+0x1) << 8;
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result |= chip0->read((offset<<1)+0x1) << 8;
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}
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if (ACCESSING_BITS_0_7) // GFX Flash 2
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{
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//logerror("read GFX flash chip %s addr %02x\n", chip1->tag(), (offset<<1)+1);
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result |= chip1->read(space, (offset<<1)+0x1) << 0;
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result |= chip1->read((offset<<1)+0x1) << 0;
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}
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//printf("read GFX flash chips addr %02x returning %08x mem_mask %08x crambank %08x gfxbank %08x\n", offset*2, result,mem_mask, m_cram_bank, m_cram_gfxflash_bank );
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@ -1445,25 +1445,25 @@ WRITE32_MEMBER(cps3_state::cps3_gfxflash_w)
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{
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command = (data >> 24) & 0xff;
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//logerror("write to GFX flash chip %s addr %02x cmd %02x\n", chip0->tag(), (offset<<1), command);
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chip0->write(space, (offset<<1), command);
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chip0->write((offset<<1), command);
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}
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if (ACCESSING_BITS_16_23) // GFX Flash 2
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{
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command = (data >> 16) & 0xff;
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//logerror("write to GFX flash chip %s addr %02x cmd %02x\n", chip1->tag(), (offset<<1), command);
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chip1->write(space, (offset<<1), command);
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chip1->write((offset<<1), command);
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}
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if (ACCESSING_BITS_8_15) // GFX Flash 1
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{
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command = (data >> 8) & 0xff;
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//logerror("write to GFX flash chip %s addr %02x cmd %02x\n", chip0->tag(), (offset<<1)+1, command);
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chip0->write(space, (offset<<1)+0x1, command);
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chip0->write((offset<<1)+0x1, command);
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}
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if (ACCESSING_BITS_0_7) // GFX Flash 2
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{
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command = (data >> 0) & 0xff;
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//if ( ((offset<<1)+1) != 0x555) printf("write to GFX flash chip %s addr %02x cmd %02x\n", chip1->tag(), (offset<<1)+1, command);
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chip1->write(space, (offset<<1)+0x1, command);
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chip1->write((offset<<1)+0x1, command);
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}
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/* make a copy in the linear memory region we actually use for drawing etc. having it stored in interleaved flash roms isnt' very useful */
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@ -1496,22 +1496,22 @@ uint32_t cps3_state::cps3_flashmain_r(int which, uint32_t offset, uint32_t mem_m
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if (ACCESSING_BITS_24_31) // Flash 1
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{
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//logerror("read flash chip %d addr %02x\n", base+0, offset*4 );
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result |= (m_simm[which][0]->read(machine().dummy_space(), offset)<<24);
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result |= (m_simm[which][0]->read(offset)<<24);
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}
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if (ACCESSING_BITS_16_23) // Flash 1
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{
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//logerror("read flash chip %d addr %02x\n", base+1, offset*4 );
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result |= (m_simm[which][1]->read(machine().dummy_space(), offset)<<16);
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result |= (m_simm[which][1]->read(offset)<<16);
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}
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if (ACCESSING_BITS_8_15) // Flash 1
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{
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//logerror("read flash chip %d addr %02x\n", base+2, offset*4 );
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result |= (m_simm[which][2]->read(machine().dummy_space(), offset)<<8);
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result |= (m_simm[which][2]->read(offset)<<8);
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}
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if (ACCESSING_BITS_0_7) // Flash 1
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{
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//logerror("read flash chip %d addr %02x\n", base+3, offset*4 );
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result |= (m_simm[which][3]->read(machine().dummy_space(), offset)<<0);
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result |= (m_simm[which][3]->read(offset)<<0);
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}
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// if (base==4) logerror("read flash chips addr %02x returning %08x\n", offset*4, result );
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@ -1552,25 +1552,25 @@ void cps3_state::cps3_flashmain_w(int which, uint32_t offset, uint32_t data, uin
|
||||
{
|
||||
command = (data >> 24) & 0xff;
|
||||
//logerror("write to flash chip %s addr %02x cmd %02x\n", m_simm[which][0]->tag(), offset, command);
|
||||
m_simm[which][0]->write(machine().dummy_space(), offset, command);
|
||||
m_simm[which][0]->write(offset, command);
|
||||
}
|
||||
if (ACCESSING_BITS_16_23) // Flash 2
|
||||
{
|
||||
command = (data >> 16) & 0xff;
|
||||
//logerror("write to flash chip %s addr %02x cmd %02x\n", m_simm[which][1]->tag(), offset, command);
|
||||
m_simm[which][1]->write(machine().dummy_space(), offset, command);
|
||||
m_simm[which][1]->write(offset, command);
|
||||
}
|
||||
if (ACCESSING_BITS_8_15) // Flash 2
|
||||
{
|
||||
command = (data >> 8) & 0xff;
|
||||
//logerror("write to flash chip %s addr %02x cmd %02x\n", m_simm[which][2]->tag(), offset, command);
|
||||
m_simm[which][2]->write(machine().dummy_space(), offset, command);
|
||||
m_simm[which][2]->write(offset, command);
|
||||
}
|
||||
if (ACCESSING_BITS_0_7) // Flash 2
|
||||
{
|
||||
command = (data >> 0) & 0xff;
|
||||
//logerror("write to flash chip %s addr %02x cmd %02x\n", m_simm[which][3]->tag(), offset, command);
|
||||
m_simm[which][3]->write(machine().dummy_space(), offset, command);
|
||||
m_simm[which][3]->write(offset, command);
|
||||
}
|
||||
|
||||
/* copy data into regions to execute from */
|
||||
|
@ -120,9 +120,9 @@ WRITE32_MEMBER ( cxhumax_state::flash_w )
|
||||
{
|
||||
offset *= 2;
|
||||
if(ACCESSING_BITS_0_15)
|
||||
m_flash->write(space, offset, data);
|
||||
m_flash->write(offset, data);
|
||||
if(ACCESSING_BITS_16_31)
|
||||
m_flash->write(space, offset+1, data >> 16);
|
||||
m_flash->write(offset+1, data >> 16);
|
||||
verboselog(*this, 9, "(FLASH) %08X <- %08X\n", 0xF0000000 + (offset << 2), data);
|
||||
}
|
||||
|
||||
@ -131,9 +131,9 @@ READ32_MEMBER ( cxhumax_state::flash_r )
|
||||
uint32_t res = 0;
|
||||
offset *= 2;
|
||||
if(ACCESSING_BITS_0_15)
|
||||
res |= m_flash->read(space, offset);
|
||||
res |= m_flash->read(offset);
|
||||
if(ACCESSING_BITS_16_31)
|
||||
res |= m_flash->read(space, offset+1) << 16;
|
||||
res |= m_flash->read(offset+1) << 16;
|
||||
//if(m_flash->m_flash_mode!=FM_NORMAL) verboselog(*this, 9, "(FLASH) %08X -> %08X\n", 0xF0000000 + (offset << 2), res);
|
||||
return res;
|
||||
}
|
||||
|
@ -434,7 +434,7 @@ READ16_MEMBER(joystand_state::cart_r)
|
||||
{
|
||||
int which = offset / 0x80000;
|
||||
int addr = offset & 0x7ffff;
|
||||
return (m_cart_flash[which * 2 + 0]->read(space, addr) << 8) | m_cart_flash[which * 2 + 1]->read(space, addr);
|
||||
return (m_cart_flash[which * 2 + 0]->read(addr) << 8) | m_cart_flash[which * 2 + 1]->read(addr);
|
||||
}
|
||||
|
||||
WRITE16_MEMBER(joystand_state::cart_w)
|
||||
@ -443,9 +443,9 @@ WRITE16_MEMBER(joystand_state::cart_w)
|
||||
int addr = offset & 0x7ffff;
|
||||
|
||||
if (ACCESSING_BITS_0_7)
|
||||
m_cart_flash[which * 2 + 1]->write(space, addr, data & 0xff);
|
||||
m_cart_flash[which * 2 + 1]->write(addr, data & 0xff);
|
||||
if (ACCESSING_BITS_8_15)
|
||||
m_cart_flash[which * 2 + 0]->write(space, addr, data >> 8);
|
||||
m_cart_flash[which * 2 + 0]->write(addr, data >> 8);
|
||||
|
||||
bg15_tiles_dirty = true;
|
||||
}
|
||||
|
@ -466,8 +466,8 @@ READ16_MEMBER(simpbowl_state::flash_r)
|
||||
{
|
||||
int chip = (m_flash_address >= 0x200000) ? 2 : 0;
|
||||
|
||||
int ret = ( m_flash8[chip]->read(space, m_flash_address & 0x1fffff) & 0xff ) |
|
||||
( m_flash8[chip+1]->read(space, m_flash_address & 0x1fffff) << 8 );
|
||||
int ret = ( m_flash8[chip]->read(m_flash_address & 0x1fffff) & 0xff ) |
|
||||
( m_flash8[chip+1]->read(m_flash_address & 0x1fffff) << 8 );
|
||||
|
||||
m_flash_address++;
|
||||
|
||||
@ -485,8 +485,8 @@ WRITE16_MEMBER(simpbowl_state::flash_w)
|
||||
{
|
||||
case 0:
|
||||
chip = (m_flash_address >= 0x200000) ? 2 : 0;
|
||||
m_flash8[chip]->write(space, m_flash_address & 0x1fffff, data&0xff);
|
||||
m_flash8[chip+1]->write(space, m_flash_address & 0x1fffff, (data>>8)&0xff);
|
||||
m_flash8[chip]->write(m_flash_address & 0x1fffff, data&0xff);
|
||||
m_flash8[chip+1]->write(m_flash_address & 0x1fffff, (data>>8)&0xff);
|
||||
break;
|
||||
|
||||
case 1:
|
||||
|
@ -1823,8 +1823,8 @@ void naomi_state::naomi_port(address_map &map)
|
||||
|
||||
READ64_MEMBER(atomiswave_state::aw_flash_r)
|
||||
{
|
||||
return (uint64_t)m_awflash->read(space, offset*8) | (uint64_t)m_awflash->read(space, (offset*8)+1)<<8 | (uint64_t)m_awflash->read(space, (offset*8)+2)<<16 | (uint64_t)m_awflash->read(space, (offset*8)+3)<<24 |
|
||||
(uint64_t)m_awflash->read(space, (offset*8)+4)<<32 | (uint64_t)m_awflash->read(space, (offset*8)+5)<<40 | (uint64_t)m_awflash->read(space, (offset*8)+6)<<48 | (uint64_t)m_awflash->read(space, (offset*8)+7)<<56;
|
||||
return (uint64_t)m_awflash->read(offset*8) | (uint64_t)m_awflash->read((offset*8)+1)<<8 | (uint64_t)m_awflash->read((offset*8)+2)<<16 | (uint64_t)m_awflash->read((offset*8)+3)<<24 |
|
||||
(uint64_t)m_awflash->read((offset*8)+4)<<32 | (uint64_t)m_awflash->read((offset*8)+5)<<40 | (uint64_t)m_awflash->read((offset*8)+6)<<48 | (uint64_t)m_awflash->read((offset*8)+7)<<56;
|
||||
}
|
||||
|
||||
WRITE64_MEMBER(atomiswave_state::aw_flash_w)
|
||||
@ -1843,7 +1843,7 @@ WRITE64_MEMBER(atomiswave_state::aw_flash_w)
|
||||
|
||||
data >>= (i*8);
|
||||
|
||||
m_awflash->write(space, addr, data);
|
||||
m_awflash->write(addr, data);
|
||||
}
|
||||
|
||||
// TODO: don't we have a common function for this?
|
||||
|
@ -167,11 +167,11 @@ uint8_t pcw16_state::read_bank_data(uint8_t type, uint16_t offset)
|
||||
}
|
||||
if(type < 0x40) // first flash
|
||||
{
|
||||
return m_flash0->read(machine().dummy_space(), ((type & 0x3f)*0x4000)+offset);
|
||||
return m_flash0->read(((type & 0x3f)*0x4000)+offset);
|
||||
}
|
||||
else // second flash
|
||||
{
|
||||
return m_flash1->read(machine().dummy_space(), ((type & 0x3f)*0x4000)+offset);
|
||||
return m_flash1->read(((type & 0x3f)*0x4000)+offset);
|
||||
}
|
||||
}
|
||||
}
|
||||
@ -188,11 +188,11 @@ void pcw16_state::write_bank_data(uint8_t type, uint16_t offset, uint8_t data)
|
||||
return; // first four sectors are write protected
|
||||
if(type < 0x40) // first flash
|
||||
{
|
||||
m_flash0->write(machine().dummy_space(), ((type & 0x3f)*0x4000)+offset, data);
|
||||
m_flash0->write(((type & 0x3f)*0x4000)+offset, data);
|
||||
}
|
||||
else // second flash
|
||||
{
|
||||
m_flash1->write(machine().dummy_space(), ((type & 0x3f)*0x4000)+offset, data);
|
||||
m_flash1->write(((type & 0x3f)*0x4000)+offset, data);
|
||||
}
|
||||
}
|
||||
}
|
||||
|
@ -75,9 +75,9 @@ WRITE8_MEMBER(svmu_state::page_w)
|
||||
READ8_MEMBER(svmu_state::prog_r)
|
||||
{
|
||||
if (m_page == 1)
|
||||
return m_flash->read(space, offset);
|
||||
return m_flash->read(offset);
|
||||
else if (m_page == 2)
|
||||
return m_flash->read(space, 0x10000 + offset);
|
||||
return m_flash->read(0x10000 + offset);
|
||||
else
|
||||
return m_bios[offset];
|
||||
}
|
||||
@ -85,9 +85,9 @@ READ8_MEMBER(svmu_state::prog_r)
|
||||
WRITE8_MEMBER(svmu_state::prog_w)
|
||||
{
|
||||
if (m_page == 1)
|
||||
m_flash->write(space, offset, data);
|
||||
m_flash->write(offset, data);
|
||||
else if (m_page == 2)
|
||||
m_flash->write(space, 0x10000 + offset, data);
|
||||
m_flash->write(0x10000 + offset, data);
|
||||
}
|
||||
|
||||
/*
|
||||
|
@ -460,10 +460,10 @@ WRITE8_MEMBER(taitogn_state::control_w)
|
||||
m_zoom->reset();
|
||||
|
||||
// assume that this also readys the sound flash chips
|
||||
m_pgmflash->write(space, 0, 0xff);
|
||||
m_sndflash[0]->write(space, 0, 0xff);
|
||||
m_sndflash[1]->write(space, 0, 0xff);
|
||||
m_sndflash[2]->write(space, 0, 0xff);
|
||||
m_pgmflash->write(0, 0xff);
|
||||
m_sndflash[0]->write(0, 0xff);
|
||||
m_sndflash[1]->write(0, 0xff);
|
||||
m_sndflash[2]->write(0, 0xff);
|
||||
}
|
||||
}
|
||||
|
||||
@ -595,7 +595,7 @@ READ32_MEMBER(taitogn_state::zsg2_ext_r)
|
||||
{
|
||||
case 0x000000:
|
||||
case 0x100000:
|
||||
case 0x200000: return m_sndflash[offset >> 20]->read(space, offset & 0xfffff) | m_sndflash[offset >> 20]->read(space, (offset & 0xfffff) | 1) << 16;
|
||||
case 0x200000: return m_sndflash[offset >> 20]->read(offset & 0xfffff) | m_sndflash[offset >> 20]->read((offset & 0xfffff) | 1) << 16;
|
||||
|
||||
default:
|
||||
break;
|
||||
|
@ -147,14 +147,14 @@ WRITE16_MEMBER ( ti68k_state::flash_w )
|
||||
{
|
||||
// verification if it is flash memory
|
||||
if (m_flash_mem)
|
||||
m_flash->write(space, offset, data);
|
||||
m_flash->write(offset, data);
|
||||
}
|
||||
|
||||
READ16_MEMBER ( ti68k_state::flash_r )
|
||||
{
|
||||
if (m_flash_mem)
|
||||
{
|
||||
return m_flash->read(space, offset);
|
||||
return m_flash->read(offset);
|
||||
}
|
||||
else
|
||||
{
|
||||
|
@ -599,14 +599,14 @@ WRITE_LINE_MEMBER(bebox_state::bebox_timer0_w)
|
||||
READ8_MEMBER(bebox_state::bebox_flash_r)
|
||||
{
|
||||
offset = (offset & ~7) | (7 - (offset & 7));
|
||||
return m_flash->read(space, offset);
|
||||
return m_flash->read(offset);
|
||||
}
|
||||
|
||||
|
||||
WRITE8_MEMBER(bebox_state::bebox_flash_w)
|
||||
{
|
||||
offset = (offset & ~7) | (7 - (offset & 7));
|
||||
m_flash->write(space, offset, data);
|
||||
m_flash->write(offset, data);
|
||||
}
|
||||
|
||||
/*************************************
|
||||
|
Loading…
Reference in New Issue
Block a user