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https://github.com/holub/mame
synced 2025-05-24 14:56:21 +03:00
fixed access violation caused by passing a NULL pointer into the dma finished code.
This commit is contained in:
parent
c17377e8a9
commit
1f25d3f935
@ -190,7 +190,7 @@ static void dma_interrupt_update( running_machine *machine )
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m_n_dicr &= 0x00ffffff | ( m_n_dicr << 8 );
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m_n_dicr &= 0x00ffffff | ( m_n_dicr << 8 );
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}
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}
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static void dma_finished(const address_space *space, int n_channel)
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static void dma_finished(running_machine *machine, int n_channel)
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{
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{
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if( m_p_n_dmachannelcontrol[ n_channel ] == 0x01000401 && n_channel == 2 )
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if( m_p_n_dmachannelcontrol[ n_channel ] == 0x01000401 && n_channel == 2 )
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{
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{
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@ -224,7 +224,7 @@ static void dma_finished(const address_space *space, int n_channel)
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n_address &= n_adrmask;
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n_address &= n_adrmask;
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n_nextaddress = g_p_n_psxram[ n_address / 4 ];
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n_nextaddress = g_p_n_psxram[ n_address / 4 ];
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n_size = n_nextaddress >> 24;
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n_size = n_nextaddress >> 24;
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m_p_fn_dma_write[ n_channel ]( space->machine, n_address + 4, n_size );
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m_p_fn_dma_write[ n_channel ]( machine, n_address + 4, n_size );
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//FIXME:
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//FIXME:
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// The following conditions will cause an endless loop.
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// The following conditions will cause an endless loop.
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// If stopping the transfer is correct I cannot judge
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// If stopping the transfer is correct I cannot judge
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@ -246,14 +246,13 @@ static void dma_finished(const address_space *space, int n_channel)
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m_p_n_dmachannelcontrol[ n_channel ] &= ~( ( 1L << 0x18 ) | ( 1L << 0x1c ) );
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m_p_n_dmachannelcontrol[ n_channel ] &= ~( ( 1L << 0x18 ) | ( 1L << 0x1c ) );
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m_n_dicr |= 1 << ( 24 + n_channel );
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m_n_dicr |= 1 << ( 24 + n_channel );
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dma_interrupt_update(space->machine);
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dma_interrupt_update(machine);
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dma_stop_timer( n_channel );
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dma_stop_timer( n_channel );
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}
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}
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static TIMER_CALLBACK( dma_finished_callback )
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static TIMER_CALLBACK( dma_finished_callback )
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{
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{
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const address_space *space = NULL;
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dma_finished(machine, param);
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dma_finished(space, param);
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}
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}
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void psx_dma_install_read_handler( int n_channel, psx_dma_read_handler p_fn_dma_read )
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void psx_dma_install_read_handler( int n_channel, psx_dma_read_handler p_fn_dma_read )
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@ -313,7 +312,7 @@ WRITE32_HANDLER( psx_dma_w )
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{
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{
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verboselog( machine, 1, "dma %d read block %08x %08x\n", n_channel, n_address, n_size );
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verboselog( machine, 1, "dma %d read block %08x %08x\n", n_channel, n_address, n_size );
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m_p_fn_dma_read[ n_channel ]( space->machine, n_address, n_size );
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m_p_fn_dma_read[ n_channel ]( space->machine, n_address, n_size );
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dma_finished( space, n_channel );
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dma_finished( machine, n_channel );
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}
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}
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else if( m_p_n_dmachannelcontrol[ n_channel ] == 0x01000200 &&
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else if( m_p_n_dmachannelcontrol[ n_channel ] == 0x01000200 &&
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m_p_fn_dma_read[ n_channel ] != NULL )
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m_p_fn_dma_read[ n_channel ] != NULL )
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@ -326,7 +325,7 @@ WRITE32_HANDLER( psx_dma_w )
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}
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}
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else
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else
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{
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{
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dma_finished( space, n_channel );
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dma_finished( machine, n_channel );
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}
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}
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}
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}
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else if( m_p_n_dmachannelcontrol[ n_channel ] == 0x01000201 &&
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else if( m_p_n_dmachannelcontrol[ n_channel ] == 0x01000201 &&
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@ -334,7 +333,7 @@ WRITE32_HANDLER( psx_dma_w )
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{
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{
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verboselog( machine, 1, "dma %d write block %08x %08x\n", n_channel, n_address, n_size );
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verboselog( machine, 1, "dma %d write block %08x %08x\n", n_channel, n_address, n_size );
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m_p_fn_dma_write[ n_channel ]( space->machine, n_address, n_size );
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m_p_fn_dma_write[ n_channel ]( space->machine, n_address, n_size );
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dma_finished( space, n_channel );
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dma_finished( machine, n_channel );
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}
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}
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else if( m_p_n_dmachannelcontrol[ n_channel ] == 0x11050100 &&
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else if( m_p_n_dmachannelcontrol[ n_channel ] == 0x11050100 &&
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m_p_fn_dma_write[ n_channel ] != NULL )
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m_p_fn_dma_write[ n_channel ] != NULL )
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@ -342,7 +341,7 @@ WRITE32_HANDLER( psx_dma_w )
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/* todo: check this is a write not a read... */
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/* todo: check this is a write not a read... */
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verboselog( machine, 1, "dma %d write block %08x %08x\n", n_channel, n_address, n_size );
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verboselog( machine, 1, "dma %d write block %08x %08x\n", n_channel, n_address, n_size );
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m_p_fn_dma_write[ n_channel ]( space->machine, n_address, n_size );
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m_p_fn_dma_write[ n_channel ]( space->machine, n_address, n_size );
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dma_finished( space, n_channel );
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dma_finished( machine, n_channel );
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}
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}
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else if( m_p_n_dmachannelcontrol[ n_channel ] == 0x11150100 &&
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else if( m_p_n_dmachannelcontrol[ n_channel ] == 0x11150100 &&
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m_p_fn_dma_write[ n_channel ] != NULL )
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m_p_fn_dma_write[ n_channel ] != NULL )
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@ -350,7 +349,7 @@ WRITE32_HANDLER( psx_dma_w )
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/* todo: check this is a write not a read... */
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/* todo: check this is a write not a read... */
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verboselog( machine, 1, "dma %d write block %08x %08x\n", n_channel, n_address, n_size );
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verboselog( machine, 1, "dma %d write block %08x %08x\n", n_channel, n_address, n_size );
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m_p_fn_dma_write[ n_channel ]( space->machine, n_address, n_size );
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m_p_fn_dma_write[ n_channel ]( space->machine, n_address, n_size );
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dma_finished( space, n_channel );
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dma_finished( machine, n_channel );
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}
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}
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else if( m_p_n_dmachannelcontrol[ n_channel ] == 0x01000401 &&
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else if( m_p_n_dmachannelcontrol[ n_channel ] == 0x01000401 &&
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n_channel == 2 &&
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n_channel == 2 &&
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@ -359,7 +358,7 @@ WRITE32_HANDLER( psx_dma_w )
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verboselog( machine, 1, "dma %d write linked list %08x\n",
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verboselog( machine, 1, "dma %d write linked list %08x\n",
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n_channel, m_p_n_dmabase[ n_channel ] );
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n_channel, m_p_n_dmabase[ n_channel ] );
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dma_finished( space, n_channel );
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dma_finished( machine, n_channel );
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}
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}
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else if( m_p_n_dmachannelcontrol[ n_channel ] == 0x11000002 &&
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else if( m_p_n_dmachannelcontrol[ n_channel ] == 0x11000002 &&
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n_channel == 6 )
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n_channel == 6 )
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@ -1566,7 +1565,7 @@ void psx_driver_init( running_machine *machine )
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for( n = 0; n < 7; n++ )
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for( n = 0; n < 7; n++ )
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{
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{
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m_p_timer_dma[ n ] = timer_alloc( machine, dma_finished_callback , NULL);
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m_p_timer_dma[ n ] = timer_alloc( machine, dma_finished_callback, machine );
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m_p_fn_dma_read[ n ] = NULL;
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m_p_fn_dma_read[ n ] = NULL;
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m_p_fn_dma_write[ n ] = NULL;
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m_p_fn_dma_write[ n ] = NULL;
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}
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}
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