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https://github.com/holub/mame
synced 2025-04-26 18:23:08 +03:00
imds2: multibus update
* also modernized address map
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parent
4287970f0d
commit
1f6c4266e2
@ -213,7 +213,7 @@ offs_t isbc202_disassembler::disassemble(std::ostream &stream, offs_t pc, const
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// isbc202_device
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isbc202_device::isbc202_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock)
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: cpu_device(mconfig , ISBC202 , tag , owner , multibus_slot_device::BUS_CLOCK / 4)
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: cpu_device(mconfig , ISBC202 , tag , owner , DERIVED_CLOCK(1, 4))
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, device_multibus_interface(mconfig , *this)
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, m_mcu(*this , "mcu")
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, m_cpes(*this , "cpe%u" , 0)
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@ -227,16 +227,6 @@ isbc202_device::~isbc202_device()
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{
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}
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void isbc202_device::install_io_rw(address_space& space)
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{
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space.install_readwrite_handler(0x78 , 0x7f , read8m_delegate(*this , FUNC(isbc202_device::io_r)) , write8m_delegate(*this , FUNC(isbc202_device::io_w)));
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}
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void isbc202_device::install_mem_rw(address_space& space)
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{
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m_mem_space = &space;
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}
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uint8_t isbc202_device::io_r(address_space &space, offs_t offset)
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{
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uint8_t res = 0;
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@ -417,6 +407,9 @@ void isbc202_device::device_start()
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m_timeout_timer = timer_alloc(TIMEOUT_TMR_ID);
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m_byte_timer = timer_alloc(BYTE_TMR_ID);
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m_f_timer = timer_alloc(F_TMR_ID);
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m_mem_space = &m_bus->space(AS_PROGRAM);
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m_bus->space(AS_IO).install_readwrite_handler(0x78, 0x7f, read8m_delegate(*this, FUNC(isbc202_device::io_r)), write8m_delegate(*this, FUNC(isbc202_device::io_w)));
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}
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void isbc202_device::device_reset()
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@ -27,10 +27,6 @@ public:
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isbc202_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock);
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virtual ~isbc202_device();
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// device_multibus_interface overrides
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virtual void install_io_rw(address_space& space) override;
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virtual void install_mem_rw(address_space& space) override;
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// Access to I/O space by CPU
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uint8_t io_r(address_space &space, offs_t offset);
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void io_w(address_space &space, offs_t offset, uint8_t data);
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@ -88,6 +88,7 @@
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#include "machine/pic8259.h"
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#include "bus/rs232/rs232.h"
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#include "bus/multibus/multibus.h"
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#include "bus/multibus/isbc202.h"
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// CPU oscillator of IPC board: 8 MHz
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#define IPC_XTAL_Y2 8_MHz_XTAL
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@ -113,10 +114,14 @@ private:
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void ipclocpic_w(offs_t offset, uint8_t data);
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virtual void driver_start() override;
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virtual void driver_reset() override;
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void ipc_io_map(address_map &map);
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void ipc_mem_map(address_map &map);
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u8 bus_pio_r(offs_t offset) { return m_bus->space(AS_IO).read_byte(offset); }
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void bus_pio_w(offs_t offset, u8 data) { m_bus->space(AS_IO).write_byte(offset, data); }
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required_device<i8085a_cpu_device> m_ipccpu;
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required_device<pic8259_device> m_ipcsyspic;
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required_device<pic8259_device> m_ipclocpic;
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@ -125,24 +130,39 @@ private:
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required_device<ls259_device> m_ipcctrl;
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required_device_array<rs232_port_device, 2> m_serial;
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required_device<imds2ioc_device> m_ioc;
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required_device<multibus_device> m_bus;
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required_device<multibus_slot_device> m_slot;
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std::vector<uint8_t> m_ipc_ram;
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bool in_ipc_rom(offs_t offset) const;
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// IPC ROM content
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required_region_ptr<uint8_t> m_ipc_rom;
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required_shared_ptr<u8> m_ram;
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memory_view m_boot;
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};
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void imds2_state::ipc_mem_map(address_map &map)
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{
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map(0x0000, 0xffff).rw(FUNC(imds2_state::ipc_mem_read), FUNC(imds2_state::ipc_mem_write));
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map(0x0000, 0xffff).ram().share("ram");
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// selectively map the boot/diagnostic segment
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map(0x0000, 0xefff).view(m_boot);
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// SEL_BOOT/ == 0 and START_UP/ == 0
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m_boot[0](0x0000, 0x07ff).rom().region("ipcrom", 0);
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m_boot[0](0xe800, 0xefff).rom().region("ipcrom", 0);
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// SEL_BOOT/ == 0 and START_UP/ == 1
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m_boot[1](0xe800, 0xefff).rom().region("ipcrom", 0);
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// monitor segment
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map(0xf800, 0xffff).rom().region("ipcrom", 0x800);
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}
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void imds2_state::ipc_io_map(address_map &map)
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{
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map.unmap_value_low();
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// map PIO to Multibus by default
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map(0x00, 0xff).rw(FUNC(imds2_state::bus_pio_r), FUNC(imds2_state::bus_pio_w));
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// local bus PIO
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map(0xc0, 0xc1).rw(m_ioc, FUNC(imds2ioc_device::dbb_master_r), FUNC(imds2ioc_device::dbb_master_w));
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map(0xf0, 0xf3).rw(m_ipctimer, FUNC(pit8253_device::read), FUNC(pit8253_device::write));
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map(0xf4, 0xf5).rw(m_ipcusart[0], FUNC(i8251_device::read), FUNC(i8251_device::write));
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@ -163,33 +183,26 @@ imds2_state::imds2_state(const machine_config &mconfig, device_type type, const
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m_ipcctrl(*this, "ipcctrl"),
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m_serial(*this, "serial%u", 0U),
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m_ioc(*this, "ioc"),
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m_slot(*this, "slot"),
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m_ipc_rom(*this, "ipcrom")
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m_bus(*this, "slot"),
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m_slot(*this, "slot:1"),
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m_ram(*this, "ram"),
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m_boot(*this, "boot")
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{
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}
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uint8_t imds2_state::ipc_mem_read(offs_t offset)
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{
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if (in_ipc_rom(offset)) {
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return m_ipc_rom[ (offset & 0x07ff) | ((offset & 0x1000) >> 1) ];
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} else {
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return m_ipc_ram[ offset ];
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}
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}
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void imds2_state::ipc_mem_write(offs_t offset, uint8_t data)
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{
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if (!in_ipc_rom(offset)) {
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m_ipc_ram[ offset ] = data;
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}
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}
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void imds2_state::ipc_control_w(uint8_t data)
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{
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// See A84, pg 28 of [1]
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// b3 is ~(bit to be written)
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// b2-b0 is ~(no. of bit to be written)
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m_ipcctrl->write_bit(~data & 7, BIT(~data, 3));
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// SEL_BOOT/ == 0
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if (!m_ipcctrl->q3_r())
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// START_UP/
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m_boot.select(m_ipcctrl->q5_r());
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else
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m_boot.disable();
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}
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WRITE_LINE_MEMBER(imds2_state::ipc_intr_w)
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@ -219,40 +232,23 @@ void imds2_state::ipclocpic_w(offs_t offset, uint8_t data)
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void imds2_state::driver_start()
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{
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// Allocate 64k for IPC RAM
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m_ipc_ram.resize(0x10000);
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m_slot->install_io_rw(m_ipccpu->space(AS_IO));
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m_slot->install_mem_rw(m_ipccpu->space(AS_PROGRAM));
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// share local RAM on Multibus
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m_bus->space(AS_PROGRAM).install_ram(0x0000, 0xffff, m_ram.target());
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}
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bool imds2_state::in_ipc_rom(offs_t offset) const
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void imds2_state::driver_reset()
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{
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offs_t masked_offset = offset & 0xf800;
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bool start_up = m_ipcctrl->q5_r();
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bool sel_boot = m_ipcctrl->q3_r();
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// Region 0000-07ff is in ROM when START_UP/ == 0 && SEL_BOOT/ == 0
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if (masked_offset == 0x0000 && !start_up && !sel_boot) {
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return true;
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}
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// Region e800-efff is in ROM when SEL_BOOT/ == 0
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if (masked_offset == 0xe800 && !sel_boot) {
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return true;
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}
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// Region f800-ffff is always in ROM
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if (masked_offset == 0xf800) {
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return true;
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}
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return false;
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m_boot.select(0);
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}
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static INPUT_PORTS_START(imds2)
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INPUT_PORTS_END
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static void imds2_cards(device_slot_interface &device)
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{
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device.option_add("isbc202", ISBC202);
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}
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void imds2_state::imds2(machine_config &config)
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{
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I8085A(config, m_ipccpu, IPC_XTAL_Y2); // CLK OUT = 4 MHz
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@ -307,7 +303,8 @@ void imds2_state::imds2(machine_config &config)
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m_ioc->master_intr_cb().set(m_ipclocpic, FUNC(pic8259_device::ir6_w));
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m_ioc->parallel_int_cb().set(m_ipclocpic, FUNC(pic8259_device::ir5_w));
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MULTIBUS_SLOT(config , m_slot , 0);
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MULTIBUS(config, m_bus, 9'830'400);
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MULTIBUS_SLOT(config, m_slot, m_bus, imds2_cards, nullptr, false); // FIXME: isbc202
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}
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ROM_START(imds2)
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