Added first draft of 74123 to netlist code.

This commit is contained in:
Couriersud 2014-05-06 22:37:20 +00:00
parent 6e59e28996
commit 1f70685652
7 changed files with 236 additions and 0 deletions

3
.gitattributes vendored
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@ -364,6 +364,7 @@ keymaps/km_se_LINUX.map svneol=native#text/plain
keymaps/km_se_OSX.map svneol=native#text/plain
/makefile svneol=native#text/plain
nl_examples/7400_astable.c svneol=native#text/plain
nl_examples/74123_mstable.c svneol=native#text/plain
nl_examples/bjt.c svneol=native#text/plain
nl_examples/bjt_eb.c svneol=native#text/plain
nl_examples/bjt_eb_pnp.c svneol=native#text/plain
@ -2782,6 +2783,8 @@ src/emu/netlist/devices/nld_7410.c svneol=native#text/plain
src/emu/netlist/devices/nld_7410.h svneol=native#text/plain
src/emu/netlist/devices/nld_74107.c svneol=native#text/plain
src/emu/netlist/devices/nld_74107.h svneol=native#text/plain
src/emu/netlist/devices/nld_74123.c svneol=native#text/plain
src/emu/netlist/devices/nld_74123.h svneol=native#text/plain
src/emu/netlist/devices/nld_74153.c svneol=native#text/plain
src/emu/netlist/devices/nld_74153.h svneol=native#text/plain
src/emu/netlist/devices/nld_7420.c svneol=native#text/plain

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@ -0,0 +1,45 @@
/*
* 74123_mstable.c
*
*/
#include "netlist/devices/net_lib.h"
NETLIST_START(74123_mstable)
/*
* Monoflog
*
*/
/* Standard stuff */
SOLVER(Solver, 48000)
ANALOG_INPUT(V5, 5) // 5V
/* Wiring up the 74123 */
CLOCK(clk, 500)
TTL_74123(mf)
RES(R, 1000)
CAP(C, 1e-6)
NET_C(GND, mf.GND)
NET_C(V5, mf.VCC)
NET_C(C.1, mf.C)
NET_C(mf.C, GND)
NET_C(C.2, mf.RC, R.2)
NET_C(R.1, V5)
NET_C(mf.CLRQ, V5)
NET_C(mf.B, V5)
NET_C(mf.A, clk.Q)
//LOG(logC, C.2)
//LOG(logQ, mf.Q)
//LOG(logX, clk.Q)
NETLIST_END()

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@ -118,6 +118,7 @@ void netlist_factory_t::initialize()
ENTRY(7493, TTL_7493, "+CLKA,CLKB,R1,R2")
ENTRY(74107, TTL_74107, "+CLK,J,K,CLRQ")
ENTRY(74107A, TTL_74107A, "+CLK,J,K,CLRQ")
ENTRY(74123, TTL_74123, "-")
ENTRY(74153, TTL_74153, "+C0,C1,C2,C3,A,B,G")
ENTRY(SN74LS629, SN74LS629, "CAP")
ENTRY(9316, TTL_9316, "+CLK,ENP,ENT,CLRQ,LOADQ,A,B,C,D")
@ -139,6 +140,7 @@ void netlist_factory_t::initialize()
ENTRY(7490_dip, TTL_7490_DIP, "-")
ENTRY(7493_dip, TTL_7493_DIP, "-")
ENTRY(74107_dip, TTL_74107_DIP, "-")
ENTRY(74123_dip, TTL_74123_DIP, "-")
ENTRY(74153_dip, TTL_74153_DIP, "-")
ENTRY(9316_dip, TTL_9316_DIP, "-")
ENTRY(SN74LS629_dip, SN74LS629_DIP, "1.CAP1,2.CAP2")

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@ -71,6 +71,7 @@
#include "nld_7490.h"
#include "nld_7493.h"
#include "nld_74107.h"
#include "nld_74123.h"
#include "nld_74153.h"
#include "nld_74ls629.h"
#include "nld_9316.h"

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@ -0,0 +1,122 @@
/*
* nld_74123.c
*
*/
#include "nld_74123.h"
#define R_OFF (1E20)
#define R_ON (1)
NETLIB_START(74123)
{
register_sub(m_RP, "RP");
register_sub(m_RN, "RN");
register_input("A", m_A);
register_input("B", m_B);
register_input("CLRQ", m_CLRQ);
register_output("Q", m_Q);
register_output("QQ", m_QQ);
register_input("_CV", m_CV); // internal
register_subalias("GND", m_RN.m_N);
register_subalias("VCC", m_RP.m_P);
register_subalias("C", m_RN.m_N);
register_subalias("RC", m_RN.m_P);
connect(m_RN.m_P, m_RP.m_N);
connect(m_CV, m_RN.m_P);
save(NAME(m_last_trig));
save(NAME(m_state));
}
NETLIB_UPDATE(74123)
{
// FIXME: CLR!
const netlist_sig_t m_trig = (INPLOGIC(m_A) ^ 1) & INPLOGIC(m_B) & INPLOGIC(m_CLRQ);
if (!m_last_trig && m_trig)
{
// FIXME: Timing!
OUTLOGIC(m_Q, 1, NLTIME_FROM_NS(10));
OUTLOGIC(m_QQ, 0, NLTIME_FROM_NS(10));
m_RN.set_R(R_ON);
m_RP.set_R(R_OFF);
m_state = 1; // discharging
}
m_last_trig = m_trig;
if (m_state == 1)
{
if (INPANALOG(m_CV) < 1.3)
{
m_RN.set_R(R_OFF);
m_state = 2; // charging
}
}
else if (m_state == 2)
{
if (INPANALOG(m_CV) > 3.7)
{
OUTLOGIC(m_Q, 0, NLTIME_FROM_NS(10));
OUTLOGIC(m_QQ, 1, NLTIME_FROM_NS(10));
m_state = 0; // waiting
}
}
}
NETLIB_RESET(74123)
{
m_RP.do_reset();
m_RN.do_reset();
m_RP.set_R(R_OFF);
m_RN.set_R(R_OFF);
m_last_trig = 0;
m_state = 0;
m_QQ.initial(1);
}
NETLIB_START(74123_dip)
{
#if 0
register_sub(m_1, "1");
register_sub(m_2, "2");
register_sub(m_3, "3");
register_subalias("1", m_1.m_i[0]);
register_subalias("2", m_1.m_i[1]);
register_subalias("3", m_2.m_i[0]);
register_subalias("4", m_2.m_i[1]);
register_subalias("5", m_2.m_i[2]);
register_subalias("6", m_2.m_Q);
register_subalias("8", m_3.m_Q);
register_subalias("9", m_3.m_i[0]);
register_subalias("10", m_3.m_i[1]);
register_subalias("11", m_3.m_i[2]);
register_subalias("12", m_1.m_Q);
register_subalias("13", m_1.m_i[2]);
#endif
}
NETLIB_UPDATE(74123_dip)
{
/* only called during startup */
m_1.update_dev();
m_2.update_dev();
}
NETLIB_RESET(74123_dip)
{
m_1.do_reset();
m_2.do_reset();
}

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@ -0,0 +1,62 @@
// license:GPL-2.0+
// copyright-holders:Couriersud
/*
* nld_74123.h
*
* 74123: PRECISION TIMERS
*
* +--------------+
* A1 |1 ++ 16| VCC
* B1 |2 15| RC1
* CLR1 |3 14| C1
* Q1Q |4 74123 13| Q1
* Q2 |5 12| Q2Q
* C2 |6 11| CLR2
* RC2 |7 10| B2
* GND |8 9| A2
* +--------------+
*
* Naming conventions follow Fairchild Semiconductor datasheet
*
*/
#ifndef NLD_74123_H_
#define NLD_74123_H_
#include "../nl_base.h"
#include "../analog/nld_twoterm.h"
#define TTL_74123(_name) \
NET_REGISTER_DEV(74123, _name)
NETLIB_DEVICE(74123,
public:
NETLIB_NAME(R) m_RP;
NETLIB_NAME(R) m_RN;
netlist_ttl_input_t m_A;
netlist_ttl_input_t m_B;
netlist_ttl_input_t m_CLRQ;
netlist_ttl_output_t m_Q;
netlist_ttl_output_t m_QQ;
netlist_analog_input_t m_CV;
netlist_sig_t m_last_trig;
UINT8 m_state;
);
#define TTL_74123_DIP(_name) \
NET_REGISTER_DEV(74123_dip, _name)
NETLIB_DEVICE(74123_dip,
NETLIB_NAME(74123) m_1;
NETLIB_NAME(74123) m_2;
);
#endif /* NLD_74123_H_ */

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@ -50,6 +50,7 @@ NETLISTOBJS+= \
$(NETLISTOBJ)/devices/nld_7490.o \
$(NETLISTOBJ)/devices/nld_7493.o \
$(NETLISTOBJ)/devices/nld_74107.o \
$(NETLISTOBJ)/devices/nld_74123.o \
$(NETLISTOBJ)/devices/nld_74153.o \
$(NETLISTOBJ)/devices/nld_74ls629.o \
$(NETLISTOBJ)/devices/nld_9316.o \