mirror of
https://github.com/holub/mame
synced 2025-06-07 21:33:45 +03:00
New working clones
------------------ Dribbling (set 2) [f205v]
This commit is contained in:
parent
1955f0b999
commit
1f7f099376
@ -3,12 +3,18 @@
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/***************************************************************************
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/***************************************************************************
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Model Racing Dribbling hardware
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Model Racing Dribbling hardware
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MEF00284 main board + MEF00277 'counter drive' board + CS283 player control
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driver by Aaron Giles
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driver by Aaron Giles
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Games supported:
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Games supported:
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* Dribbling
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* Dribbling
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TODO:
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* Audio (discrete components, schematics available)
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* Implement the 2 banks of 8 dips which determine coinage for the 2 players
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* Actual game duration doesn't match the time reported in the manual
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****************************************************************************
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****************************************************************************
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Memory map
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Memory map
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@ -42,7 +48,7 @@
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*
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*
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*************************************/
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*************************************/
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INTERRUPT_GEN_MEMBER(dribling_state::dribling_irq_gen)
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INTERRUPT_GEN_MEMBER(dribling_state::irq_gen)
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{
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{
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if (m_di)
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if (m_di)
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device.execute().set_input_line(0, ASSERT_LINE);
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device.execute().set_input_line(0, ASSERT_LINE);
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@ -56,22 +62,22 @@ INTERRUPT_GEN_MEMBER(dribling_state::dribling_irq_gen)
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*
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*
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*************************************/
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*************************************/
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READ8_MEMBER(dribling_state::dsr_r)
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uint8_t dribling_state::dsr_r()
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{
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{
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/* return DSR0-7 */
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// return DSR0-7
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return (m_ds << m_sh) | (m_dr >> (8 - m_sh));
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return (m_ds << m_sh) | (m_dr >> (8 - m_sh));
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}
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}
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READ8_MEMBER(dribling_state::input_mux0_r)
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uint8_t dribling_state::input_mux0_r()
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{
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{
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/* low value in the given bit selects */
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// low value in the given bit selects
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if (!(m_input_mux & 0x01))
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if (!(m_input_mux & 0x01))
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return ioport("MUX0")->read();
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return m_mux[0]->read();
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else if (!(m_input_mux & 0x02))
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else if (!(m_input_mux & 0x02))
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return ioport("MUX1")->read();
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return m_mux[1]->read();
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else if (!(m_input_mux & 0x04))
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else if (!(m_input_mux & 0x04))
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return ioport("MUX2")->read();
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return m_mux[2]->read();
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return 0xff;
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return 0xff;
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}
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}
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@ -83,57 +89,57 @@ READ8_MEMBER(dribling_state::input_mux0_r)
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*
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*
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*************************************/
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*************************************/
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WRITE8_MEMBER(dribling_state::misc_w)
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void dribling_state::misc_w(uint8_t data)
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{
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{
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/* bit 7 = di */
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// bit 7 = di
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m_di = (data >> 7) & 1;
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m_di = (data >> 7) & 1;
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if (!m_di)
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if (!m_di)
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m_maincpu->set_input_line(0, CLEAR_LINE);
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m_maincpu->set_input_line(0, CLEAR_LINE);
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/* bit 6 = parata */
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// bit 6 = parata (save by goalkeeper)
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/* bit 5 = ab. campo */
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// bit 5 = ab. campo (field enable)
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m_abca = (data >> 5) & 1;
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m_abca = (data >> 5) & 1;
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/* bit 4 = ab. a.b.f. */
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// bit 4 = ab. a.b.f.
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/* bit 3 = n/c */
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// bit 3 = n/c
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/* bit 2 = (9) = PC2 */
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// bit 2 = (9) = PC2
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/* bit 1 = (10) = PC1 */
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// bit 1 = (10) = PC1
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/* bit 0 = (32) = PC0 */
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// bit 0 = (32) = PC0
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m_input_mux = data & 7;
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m_input_mux = data & 7;
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logerror("%s:misc_w(%02X)\n", machine().describe_context(), data);
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logerror("%s:misc_w(%02X)\n", machine().describe_context(), data);
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}
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}
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WRITE8_MEMBER(dribling_state::sound_w)
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void dribling_state::sound_w(uint8_t data)
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{
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{
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/* bit 7 = stop palla */
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// bit 7 = stop palla (ball stop)
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/* bit 6 = contrasto */
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// bit 6 = contrasto (tackle)
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/* bit 5 = calcio a */
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// bit 5 = calcio a (kick a)
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/* bit 4 = fischio */
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// bit 4 = fischio (whistle)
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/* bit 3 = calcio b */
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// bit 3 = calcio b (kick b)
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/* bit 2 = folla a */
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// bit 2 = folla a (crowd a)
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/* bit 1 = folla m */
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// bit 1 = folla m (crowd m)
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/* bit 0 = folla b */
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// bit 0 = folla b (crowd b)
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logerror("%s:sound_w(%02X)\n", machine().describe_context(), data);
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logerror("%s:sound_w(%02X)\n", machine().describe_context(), data);
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}
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}
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WRITE8_MEMBER(dribling_state::pb_w)
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void dribling_state::pb_w(uint8_t data)
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{
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{
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/* write PB0-7 */
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// write PB0-7
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logerror("%s:pb_w(%02X)\n", machine().describe_context(), data);
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logerror("%s:pb_w(%02X)\n", machine().describe_context(), data);
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}
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}
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WRITE8_MEMBER(dribling_state::shr_w)
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void dribling_state::shr_w(uint8_t data)
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{
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{
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/* bit 3 = watchdog */
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// bit 3 = watchdog
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if (data & 0x08)
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if (data & 0x08)
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m_watchdog->watchdog_reset();
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m_watchdog->watchdog_reset();
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/* bit 2-0 = SH0-2 */
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// bit 2-0 = SH0-2
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m_sh = data & 0x07;
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m_sh = data & 0x07;
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}
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}
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@ -145,22 +151,22 @@ WRITE8_MEMBER(dribling_state::shr_w)
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*
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*
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*************************************/
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*************************************/
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READ8_MEMBER(dribling_state::ioread)
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uint8_t dribling_state::ioread(offs_t offset)
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{
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{
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if (offset & 0x08)
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if (offset & 0x08)
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return m_ppi8255_0->read(offset & 3);
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return m_ppi8255[0]->read(offset & 3);
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else if (offset & 0x10)
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else if (offset & 0x10)
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return m_ppi8255_1->read(offset & 3);
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return m_ppi8255[1]->read(offset & 3);
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return 0xff;
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return 0xff;
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}
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}
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WRITE8_MEMBER(dribling_state::iowrite)
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void dribling_state::iowrite(offs_t offset, uint8_t data)
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{
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{
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if (offset & 0x08)
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if (offset & 0x08)
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m_ppi8255_0->write(offset & 3, data);
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m_ppi8255[0]->write(offset & 3, data);
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else if (offset & 0x10)
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else if (offset & 0x10)
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m_ppi8255_1->write(offset & 3, data);
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m_ppi8255[1]->write(offset & 3, data);
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else if (offset & 0x40)
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else if (offset & 0x40)
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{
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{
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m_dr = m_ds;
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m_dr = m_ds;
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@ -175,12 +181,12 @@ WRITE8_MEMBER(dribling_state::iowrite)
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*
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*
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*************************************/
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*************************************/
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void dribling_state::dribling_map(address_map &map)
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void dribling_state::prg_map(address_map &map)
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{
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{
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map(0x0000, 0x1fff).rom();
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map(0x0000, 0x1fff).rom();
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map(0x2000, 0x3fff).ram().share("videoram");
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map(0x2000, 0x3fff).ram().share(m_videoram);
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map(0x4000, 0x7fff).rom();
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map(0x4000, 0x7fff).rom();
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map(0xc000, 0xdfff).ram().w(FUNC(dribling_state::dribling_colorram_w)).share("colorram");
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map(0xc000, 0xdfff).ram().w(FUNC(dribling_state::colorram_w)).share(m_colorram);
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}
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}
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@ -231,12 +237,12 @@ static INPUT_PORTS_START( dribling )
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PORT_BIT( 0x0f, IP_ACTIVE_LOW, IPT_UNUSED )
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PORT_BIT( 0x0f, IP_ACTIVE_LOW, IPT_UNUSED )
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PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_COIN1 )
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PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_COIN1 )
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PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_START1 )
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PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_START1 )
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PORT_DIPNAME( 0x40, 0x40, DEF_STR( Unknown ) )
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PORT_DIPNAME( 0x40, 0x40, "Game Duration" ) PORT_DIPLOCATION( "SW:2" ) // timer always starts at 90, but decrements quicker / slower depending on dip setting
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PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x00, "1:50" ) // actually circa 1:25 emulated. Bug?
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PORT_DIPSETTING( 0x40, DEF_STR( On ) )
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PORT_DIPSETTING( 0x40, "2:30" ) // actually circa 1:40 emulated. Bug?
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PORT_DIPNAME( 0x80, 0x80, DEF_STR( Unknown ) )
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PORT_DIPNAME( 0x80, 0x80, "New game with one coin" ) PORT_DIPLOCATION( "SW:1" ) // according to the manual, for this to work both (unimplemented) coinage dip banks must be set to 1 coin 1 play
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PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x00, DEF_STR( On ) )
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PORT_DIPSETTING( 0x80, DEF_STR( On ) )
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PORT_DIPSETTING( 0x80, DEF_STR( Off ) )
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INPUT_PORTS_END
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INPUT_PORTS_END
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@ -270,38 +276,38 @@ void dribling_state::machine_reset()
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void dribling_state::dribling(machine_config &config)
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void dribling_state::dribling(machine_config &config)
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{
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{
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/* basic machine hardware */
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// basic machine hardware
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Z80(config, m_maincpu, 20_MHz_XTAL / 4); // XTAL verified, divider not
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Z80(config, m_maincpu, 20_MHz_XTAL / 4); // XTAL verified, divider not
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m_maincpu->set_addrmap(AS_PROGRAM, &dribling_state::dribling_map);
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m_maincpu->set_addrmap(AS_PROGRAM, &dribling_state::prg_map);
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m_maincpu->set_addrmap(AS_IO, &dribling_state::io_map);
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m_maincpu->set_addrmap(AS_IO, &dribling_state::io_map);
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m_maincpu->set_vblank_int("screen", FUNC(dribling_state::dribling_irq_gen));
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m_maincpu->set_vblank_int("screen", FUNC(dribling_state::irq_gen));
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I8255A(config, m_ppi8255_0);
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I8255A(config, m_ppi8255[0]);
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m_ppi8255_0->in_pa_callback().set(FUNC(dribling_state::dsr_r));
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m_ppi8255[0]->in_pa_callback().set(FUNC(dribling_state::dsr_r));
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m_ppi8255_0->in_pb_callback().set(FUNC(dribling_state::input_mux0_r));
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m_ppi8255[0]->in_pb_callback().set(FUNC(dribling_state::input_mux0_r));
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m_ppi8255_0->out_pc_callback().set(FUNC(dribling_state::misc_w));
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m_ppi8255[0]->out_pc_callback().set(FUNC(dribling_state::misc_w));
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I8255A(config, m_ppi8255_1);
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I8255A(config, m_ppi8255[1]);
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m_ppi8255_1->out_pa_callback().set(FUNC(dribling_state::sound_w));
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m_ppi8255[1]->out_pa_callback().set(FUNC(dribling_state::sound_w));
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m_ppi8255_1->out_pb_callback().set(FUNC(dribling_state::pb_w));
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m_ppi8255[1]->out_pb_callback().set(FUNC(dribling_state::pb_w));
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m_ppi8255_1->in_pc_callback().set_ioport("IN0");
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m_ppi8255[1]->in_pc_callback().set_ioport("IN0");
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m_ppi8255_1->out_pc_callback().set(FUNC(dribling_state::shr_w));
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m_ppi8255[1]->out_pc_callback().set(FUNC(dribling_state::shr_w));
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WATCHDOG_TIMER(config, m_watchdog);
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WATCHDOG_TIMER(config, m_watchdog);
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/* video hardware */
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// video hardware
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screen_device &screen(SCREEN(config, "screen", SCREEN_TYPE_RASTER));
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screen_device &screen(SCREEN(config, "screen", SCREEN_TYPE_RASTER));
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screen.set_video_attributes(VIDEO_UPDATE_BEFORE_VBLANK);
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screen.set_video_attributes(VIDEO_UPDATE_BEFORE_VBLANK);
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screen.set_refresh_hz(60);
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screen.set_refresh_hz(60);
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screen.set_vblank_time(ATTOSECONDS_IN_USEC(2500) /* not accurate */);
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screen.set_vblank_time(ATTOSECONDS_IN_USEC(2500)); // not accurate
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screen.set_size(256, 256);
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screen.set_size(256, 256);
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screen.set_visarea(0, 255, 40, 255);
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screen.set_visarea(0, 255, 40, 255);
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screen.set_screen_update(FUNC(dribling_state::screen_update_dribling));
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screen.set_screen_update(FUNC(dribling_state::screen_update));
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screen.set_palette("palette");
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screen.set_palette("palette");
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PALETTE(config, "palette", FUNC(dribling_state::dribling_palette), 256);
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PALETTE(config, "palette", FUNC(dribling_state::palette), 256);
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/* sound hardware */
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// sound hardware
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}
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}
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@ -320,7 +326,7 @@ ROM_START( dribling )
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ROM_LOAD( "5k.bin", 0x5000, 0x1000, CRC(737628c4) SHA1(301fda413388c26da5b5150aec2cefc971801749) ) //
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ROM_LOAD( "5k.bin", 0x5000, 0x1000, CRC(737628c4) SHA1(301fda413388c26da5b5150aec2cefc971801749) ) //
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ROM_LOAD( "5h.bin", 0x6000, 0x1000, CRC(30d0957f) SHA1(52135e12094ee1c8828a48c355bdd565aa5895de) ) //
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ROM_LOAD( "5h.bin", 0x6000, 0x1000, CRC(30d0957f) SHA1(52135e12094ee1c8828a48c355bdd565aa5895de) ) //
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ROM_REGION( 0x2000, "gfx1", 0 )
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ROM_REGION( 0x2000, "gfx", 0 )
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ROM_LOAD( "3p.bin", 0x0000, 0x1000, CRC(208971b8) SHA1(f91f3ea04d75beb58a61c844472b4dba53d84c0f) )
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ROM_LOAD( "3p.bin", 0x0000, 0x1000, CRC(208971b8) SHA1(f91f3ea04d75beb58a61c844472b4dba53d84c0f) )
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ROM_LOAD( "3n.bin", 0x1000, 0x1000, CRC(356c9803) SHA1(8e2ce52f32b33886f4747dadf3aeb78148538173) )
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ROM_LOAD( "3n.bin", 0x1000, 0x1000, CRC(356c9803) SHA1(8e2ce52f32b33886f4747dadf3aeb78148538173) )
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@ -330,6 +336,30 @@ ROM_START( dribling )
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ROM_LOAD( "tbp24s10.2d", 0x0500, 0x0100, CRC(a17d6956) SHA1(81724daf2e2d319f55cc34cc881b6a9a4e64e7ac) )
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ROM_LOAD( "tbp24s10.2d", 0x0500, 0x0100, CRC(a17d6956) SHA1(81724daf2e2d319f55cc34cc881b6a9a4e64e7ac) )
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ROM_END
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ROM_END
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// the only difference from the parent is the following routine has been removed:
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// 1FCF: 3A 0A 23 ld a,($230A)
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// 1FD2: A7 and a
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// 1FD3: C2 68 1F jp nz,$1F68
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// 1FD6: C3 6E 1F jp $1F6E
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// the code directly jumps to $1F6E instead
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ROM_START( driblinga )
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ROM_REGION( 0x10000, "maincpu", 0 )
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ROM_LOAD( "dribling-type01-mem.n.1.5p", 0x0000, 0x1000, CRC(0e791947) SHA1(57bc4f4e9e1fe3fbac1017601c9c75029b2601a4) )
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ROM_LOAD( "dribling-type01-mem.n.2.5n", 0x1000, 0x1000, CRC(2ad86cca) SHA1(e71bf46b8d7f1a93f8288a5c81493de9413f3d5d) ) // only different ROM
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ROM_LOAD( "dribling-type01-mem.n.3.5l", 0x4000, 0x1000, CRC(1fccfc85) SHA1(c0365ad54144414218f52209173b858b927c9626) )
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ROM_LOAD( "dribling-type01-mem.n.4.5k", 0x5000, 0x1000, CRC(737628c4) SHA1(301fda413388c26da5b5150aec2cefc971801749) )
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ROM_LOAD( "dribling-type01-mem.n.5.5h", 0x6000, 0x1000, CRC(30d0957f) SHA1(52135e12094ee1c8828a48c355bdd565aa5895de) )
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ROM_REGION( 0x2000, "gfx", 0 )
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ROM_LOAD( "3p.bin", 0x0000, 0x1000, CRC(208971b8) SHA1(f91f3ea04d75beb58a61c844472b4dba53d84c0f) )
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ROM_LOAD( "3n.bin", 0x1000, 0x1000, CRC(356c9803) SHA1(8e2ce52f32b33886f4747dadf3aeb78148538173) )
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ROM_REGION( 0x600, "proms", 0 )
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ROM_LOAD( "93453pc-d9.3c", 0x0000, 0x0400, CRC(b045d005) SHA1(7e3ac10a99aa37f6348b3a57a747116b7025103e) )
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||||||
|
ROM_LOAD( "63s140n-d8.3e", 0x0400, 0x0100, CRC(8f1a9908) SHA1(12c513c589757f1282e9979d3589f9b49d30ec0f) )
|
||||||
|
ROM_LOAD( "tbp24s10n.2d", 0x0500, 0x0100, CRC(a17d6956) SHA1(81724daf2e2d319f55cc34cc881b6a9a4e64e7ac) )
|
||||||
|
ROM_END
|
||||||
|
|
||||||
|
|
||||||
ROM_START( driblingo )
|
ROM_START( driblingo )
|
||||||
ROM_REGION( 0x10000, "maincpu", 0 )
|
ROM_REGION( 0x10000, "maincpu", 0 )
|
||||||
@ -339,7 +369,7 @@ ROM_START( driblingo )
|
|||||||
ROM_LOAD( "dribblng.5j", 0x5000, 0x1000, CRC(e535ac5b) SHA1(ba13298378f1e5b2b40634874097ad29c402fdea) )
|
ROM_LOAD( "dribblng.5j", 0x5000, 0x1000, CRC(e535ac5b) SHA1(ba13298378f1e5b2b40634874097ad29c402fdea) )
|
||||||
ROM_LOAD( "dribblng.5h", 0x6000, 0x1000, CRC(e6af7264) SHA1(a015120d85461e599c4bb9626ebea296386a31bb) )
|
ROM_LOAD( "dribblng.5h", 0x6000, 0x1000, CRC(e6af7264) SHA1(a015120d85461e599c4bb9626ebea296386a31bb) )
|
||||||
|
|
||||||
ROM_REGION( 0x2000, "gfx1", 0 )
|
ROM_REGION( 0x2000, "gfx", 0 )
|
||||||
ROM_LOAD( "3p.bin", 0x0000, 0x1000, CRC(208971b8) SHA1(f91f3ea04d75beb58a61c844472b4dba53d84c0f) )
|
ROM_LOAD( "3p.bin", 0x0000, 0x1000, CRC(208971b8) SHA1(f91f3ea04d75beb58a61c844472b4dba53d84c0f) )
|
||||||
ROM_LOAD( "3n.bin", 0x1000, 0x1000, CRC(356c9803) SHA1(8e2ce52f32b33886f4747dadf3aeb78148538173) )
|
ROM_LOAD( "3n.bin", 0x1000, 0x1000, CRC(356c9803) SHA1(8e2ce52f32b33886f4747dadf3aeb78148538173) )
|
||||||
|
|
||||||
@ -357,7 +387,7 @@ ROM_START( driblingbr )
|
|||||||
ROM_LOAD( "4", 0x5000, 0x1000, CRC(3ed4073a) SHA1(dec36e9dda07ea5f50163b98051955783131773d) )
|
ROM_LOAD( "4", 0x5000, 0x1000, CRC(3ed4073a) SHA1(dec36e9dda07ea5f50163b98051955783131773d) )
|
||||||
ROM_LOAD( "5", 0x6000, 0x1000, CRC(c21a1d32) SHA1(6e919f1416e6c4df133d3140f7331f65f65d4942) )
|
ROM_LOAD( "5", 0x6000, 0x1000, CRC(c21a1d32) SHA1(6e919f1416e6c4df133d3140f7331f65f65d4942) )
|
||||||
|
|
||||||
ROM_REGION( 0x2000, "gfx1", 0 )
|
ROM_REGION( 0x2000, "gfx", 0 )
|
||||||
ROM_LOAD( "6", 0x0000, 0x1000, CRC(208971b8) SHA1(f91f3ea04d75beb58a61c844472b4dba53d84c0f) )
|
ROM_LOAD( "6", 0x0000, 0x1000, CRC(208971b8) SHA1(f91f3ea04d75beb58a61c844472b4dba53d84c0f) )
|
||||||
ROM_LOAD( "7", 0x1000, 0x1000, CRC(356c9803) SHA1(8e2ce52f32b33886f4747dadf3aeb78148538173) )
|
ROM_LOAD( "7", 0x1000, 0x1000, CRC(356c9803) SHA1(8e2ce52f32b33886f4747dadf3aeb78148538173) )
|
||||||
|
|
||||||
@ -374,6 +404,7 @@ ROM_END
|
|||||||
*
|
*
|
||||||
*************************************/
|
*************************************/
|
||||||
|
|
||||||
GAME( 1983, dribling, 0, dribling, dribling, dribling_state, empty_init, ROT0, "Model Racing", "Dribbling", MACHINE_NO_SOUND | MACHINE_SUPPORTS_SAVE )
|
GAME( 1983, dribling, 0, dribling, dribling, dribling_state, empty_init, ROT0, "Model Racing", "Dribbling (set 1)", MACHINE_NO_SOUND | MACHINE_SUPPORTS_SAVE )
|
||||||
|
GAME( 1983, driblinga, dribling, dribling, dribling, dribling_state, empty_init, ROT0, "Model Racing", "Dribbling (set 2)", MACHINE_NO_SOUND | MACHINE_SUPPORTS_SAVE )
|
||||||
GAME( 1983, driblingo, dribling, dribling, dribling, dribling_state, empty_init, ROT0, "Model Racing (Olympia license)", "Dribbling (Olympia)", MACHINE_NO_SOUND | MACHINE_SUPPORTS_SAVE )
|
GAME( 1983, driblingo, dribling, dribling, dribling, dribling_state, empty_init, ROT0, "Model Racing (Olympia license)", "Dribbling (Olympia)", MACHINE_NO_SOUND | MACHINE_SUPPORTS_SAVE )
|
||||||
GAME( 1983, driblingbr, dribling, dribling, dribling, dribling_state, empty_init, ROT0, "bootleg (Videomac)", "Dribbling (bootleg, Brazil)", MACHINE_NO_SOUND | MACHINE_SUPPORTS_SAVE )
|
GAME( 1983, driblingbr, dribling, dribling, dribling, dribling_state, empty_init, ROT0, "bootleg (Videomac)", "Dribbling (bootleg, Brazil)", MACHINE_NO_SOUND | MACHINE_SUPPORTS_SAVE )
|
||||||
|
@ -21,10 +21,12 @@ public:
|
|||||||
driver_device(mconfig, type, tag),
|
driver_device(mconfig, type, tag),
|
||||||
m_maincpu(*this, "maincpu"),
|
m_maincpu(*this, "maincpu"),
|
||||||
m_watchdog(*this, "watchdog"),
|
m_watchdog(*this, "watchdog"),
|
||||||
m_ppi8255_0(*this, "ppi8255_0"),
|
m_ppi8255(*this, "ppi8255%d", 0),
|
||||||
m_ppi8255_1(*this, "ppi8255_1"),
|
|
||||||
m_videoram(*this, "videoram"),
|
m_videoram(*this, "videoram"),
|
||||||
m_colorram(*this, "colorram")
|
m_colorram(*this, "colorram"),
|
||||||
|
m_mux(*this, "MUX%u", 0),
|
||||||
|
m_proms(*this, "proms"),
|
||||||
|
m_gfxroms(*this, "gfx")
|
||||||
{ }
|
{ }
|
||||||
|
|
||||||
void dribling(machine_config &config);
|
void dribling(machine_config &config);
|
||||||
@ -34,16 +36,18 @@ protected:
|
|||||||
virtual void machine_reset() override;
|
virtual void machine_reset() override;
|
||||||
|
|
||||||
private:
|
private:
|
||||||
/* devices */
|
// devices
|
||||||
required_device<cpu_device> m_maincpu;
|
required_device<cpu_device> m_maincpu;
|
||||||
required_device<watchdog_timer_device> m_watchdog;
|
required_device<watchdog_timer_device> m_watchdog;
|
||||||
optional_device<i8255_device> m_ppi8255_0;
|
required_device_array<i8255_device, 2> m_ppi8255;
|
||||||
optional_device<i8255_device> m_ppi8255_1;
|
// memory pointers
|
||||||
/* memory pointers */
|
|
||||||
required_shared_ptr<uint8_t> m_videoram;
|
required_shared_ptr<uint8_t> m_videoram;
|
||||||
required_shared_ptr<uint8_t> m_colorram;
|
required_shared_ptr<uint8_t> m_colorram;
|
||||||
|
required_ioport_array<3> m_mux;
|
||||||
|
required_region_ptr<uint8_t> m_proms;
|
||||||
|
required_region_ptr<uint8_t> m_gfxroms;
|
||||||
|
|
||||||
/* misc */
|
// misc
|
||||||
uint8_t m_abca;
|
uint8_t m_abca;
|
||||||
uint8_t m_dr;
|
uint8_t m_dr;
|
||||||
uint8_t m_ds;
|
uint8_t m_ds;
|
||||||
@ -51,19 +55,19 @@ private:
|
|||||||
uint8_t m_input_mux;
|
uint8_t m_input_mux;
|
||||||
uint8_t m_di;
|
uint8_t m_di;
|
||||||
|
|
||||||
DECLARE_READ8_MEMBER(ioread);
|
uint8_t ioread(offs_t offset);
|
||||||
DECLARE_WRITE8_MEMBER(iowrite);
|
void iowrite(offs_t offset, uint8_t data);
|
||||||
DECLARE_WRITE8_MEMBER(dribling_colorram_w);
|
void colorram_w(offs_t offset, uint8_t data);
|
||||||
DECLARE_READ8_MEMBER(dsr_r);
|
uint8_t dsr_r();
|
||||||
DECLARE_READ8_MEMBER(input_mux0_r);
|
uint8_t input_mux0_r();
|
||||||
DECLARE_WRITE8_MEMBER(misc_w);
|
void misc_w(uint8_t data);
|
||||||
DECLARE_WRITE8_MEMBER(sound_w);
|
void sound_w(uint8_t data);
|
||||||
DECLARE_WRITE8_MEMBER(pb_w);
|
void pb_w(uint8_t data);
|
||||||
DECLARE_WRITE8_MEMBER(shr_w);
|
void shr_w(uint8_t data);
|
||||||
void dribling_palette(palette_device &palette) const;
|
void palette(palette_device &palette) const;
|
||||||
uint32_t screen_update_dribling(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect);
|
uint32_t screen_update(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect);
|
||||||
INTERRUPT_GEN_MEMBER(dribling_irq_gen);
|
INTERRUPT_GEN_MEMBER(irq_gen);
|
||||||
void dribling_map(address_map &map);
|
void prg_map(address_map &map);
|
||||||
void io_map(address_map &map);
|
void io_map(address_map &map);
|
||||||
};
|
};
|
||||||
|
|
||||||
|
@ -12287,6 +12287,7 @@ drgnmst2 // (c) 1994
|
|||||||
|
|
||||||
@source:dribling.cpp
|
@source:dribling.cpp
|
||||||
dribling // (c) 1983 Model Racing
|
dribling // (c) 1983 Model Racing
|
||||||
|
driblinga // (c) 1983 Model Racing
|
||||||
driblingbr // bootleg
|
driblingbr // bootleg
|
||||||
driblingo // (c) 1983 Olympia
|
driblingo // (c) 1983 Olympia
|
||||||
|
|
||||||
|
@ -17,7 +17,7 @@
|
|||||||
*
|
*
|
||||||
*************************************/
|
*************************************/
|
||||||
|
|
||||||
void dribling_state::dribling_palette(palette_device &palette) const
|
void dribling_state::palette(palette_device &palette) const
|
||||||
{
|
{
|
||||||
uint8_t const *const prom = memregion("proms")->base() + 0x400;
|
uint8_t const *const prom = memregion("proms")->base() + 0x400;
|
||||||
|
|
||||||
@ -43,9 +43,9 @@ void dribling_state::dribling_palette(palette_device &palette) const
|
|||||||
*
|
*
|
||||||
*************************************/
|
*************************************/
|
||||||
|
|
||||||
WRITE8_MEMBER(dribling_state::dribling_colorram_w)
|
void dribling_state::colorram_w(offs_t offset, uint8_t data)
|
||||||
{
|
{
|
||||||
/* it is very important that we mask off the two bits here */
|
// it is very important that we mask off the two bits here
|
||||||
m_colorram[offset & 0x1f9f] = data;
|
m_colorram[offset & 0x1f9f] = data;
|
||||||
}
|
}
|
||||||
|
|
||||||
@ -57,28 +57,24 @@ WRITE8_MEMBER(dribling_state::dribling_colorram_w)
|
|||||||
*
|
*
|
||||||
*************************************/
|
*************************************/
|
||||||
|
|
||||||
uint32_t dribling_state::screen_update_dribling(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect)
|
uint32_t dribling_state::screen_update(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect)
|
||||||
{
|
{
|
||||||
uint8_t *prombase = memregion("proms")->base();
|
// loop over rows
|
||||||
uint8_t *gfxbase = memregion("gfx1")->base();
|
for (int y = cliprect.min_y; y <= cliprect.max_y; y++)
|
||||||
int x, y;
|
|
||||||
|
|
||||||
/* loop over rows */
|
|
||||||
for (y = cliprect.min_y; y <= cliprect.max_y; y++)
|
|
||||||
{
|
{
|
||||||
uint16_t *dst = &bitmap.pix16(y);
|
uint16_t *dst = &bitmap.pix16(y);
|
||||||
|
|
||||||
/* loop over columns */
|
// loop over columns
|
||||||
for (x = cliprect.min_x; x <= cliprect.max_x; x++)
|
for (int x = cliprect.min_x; x <= cliprect.max_x; x++)
|
||||||
{
|
{
|
||||||
int b7 = prombase[(x >> 3) | ((y >> 3) << 5)] & 1;
|
int b7 = m_proms[(x >> 3) | ((y >> 3) << 5)] & 1;
|
||||||
int b6 = m_abca;
|
int b6 = m_abca;
|
||||||
int b5 = (x >> 3) & 1;
|
int b5 = (x >> 3) & 1;
|
||||||
int b4 = (gfxbase[(x >> 3) | (y << 5)] >> (x & 7)) & 1;
|
int b4 = (m_gfxroms[(x >> 3) | (y << 5)] >> (x & 7)) & 1;
|
||||||
int b3 = (m_videoram[(x >> 3) | (y << 5)] >> (x & 7)) & 1;
|
int b3 = (m_videoram[(x >> 3) | (y << 5)] >> (x & 7)) & 1;
|
||||||
int b2_0 = m_colorram[(x >> 3) | ((y >> 2) << 7)] & 7;
|
int b2_0 = m_colorram[(x >> 3) | ((y >> 2) << 7)] & 7;
|
||||||
|
|
||||||
/* assemble the various bits into a palette PROM index */
|
// assemble the various bits into a palette PROM index
|
||||||
dst[x] = (b7 << 7) | (b6 << 6) | (b5 << 5) | (b4 << 4) | (b3 << 3) | b2_0;
|
dst[x] = (b7 << 7) | (b6 << 6) | (b5 << 5) | (b4 << 4) | (b3 << 3) | b2_0;
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
Loading…
Reference in New Issue
Block a user