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https://github.com/holub/mame
synced 2025-07-07 19:03:29 +03:00
further hookup work (nw)
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688cbdc3a1
commit
1f81a427c5
@ -268,6 +268,12 @@ public:
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int depth;
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UINT8 coverage[256]; // coverage is how much of the table we've managed to verify using known facts about the table structure
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int command_31_write_type;
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// the maximum level size returned or read by the device appears to be this size
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UINT16 level_structure[10][8];
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int puzzli2_take_leveldata_value(UINT8 datvalue);
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};
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@ -647,15 +647,7 @@ void pgm_arm_type1_state::command_handler_puzzli2(int pc)
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switch (m_ddp3lastcommand)
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{
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// done before writes to 31 when getting level data, always just seems to return the 0x36 response.
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case 0x54: // ??
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printf("%08x: %02x %04x\n",pc, m_ddp3lastcommand, m_value0);
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m_puzzli_54_trigger = 1;
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hackcount2 = 0;
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hackcount = 0;
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m_valueresponse = 0x36<<16;
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break;
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case 0x31:
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{
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@ -786,45 +778,66 @@ void pgm_arm_type1_state::command_handler_puzzli2(int pc)
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printf("%08x: %02x %04x | ",pc, m_ddp3lastcommand, m_value0);
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// this shouldn't apply to the stuff written on startup, only the level data..
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if (hackcount2==0)
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if (command_31_write_type==2)
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{
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hack_31_table_offset = m_value0 & 0xff;
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hack_31_table_offset2 = 0;
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hackcount2++;
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m_valueresponse = 0x00d20000;
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printf("%08x: %02x %04x | ",pc, m_ddp3lastcommand, m_value0);
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printf("(set xor table offset)\n");
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}
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else if (hackcount2<39) // how do we decide end?
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{
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// always d2 0000 when writing doing level data
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// but different for the writes on startup?
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m_valueresponse = 0x00d20000;
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// this shouldn't apply to the stuff written on startup, only the level data..
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UINT8 tableaddr = (hack_31_table_offset + (hack_31_table_offset2&0xf))&0xff;
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UINT8 xoredval = m_value0 ^ puzzli2_level_decode[tableaddr];
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printf("value %02x, after xor is %02x (table address,value %02x,%02x)\n", m_value0, xoredval, tableaddr, puzzli2_level_decode[tableaddr]);
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if (hackcount2==0)
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{
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puzzli2_take_leveldata_value(m_value0&0xff);
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hack_31_table_offset = m_value0 & 0xff;
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hack_31_table_offset2 = 0;
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hackcount2++;
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m_valueresponse = 0x00d20000;
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//printf("(set xor table offset)\n");
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}
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else // how do we decide end?
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{
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int end = puzzli2_take_leveldata_value(m_value0&0xff);
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if (!end)
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{
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// always d2 0000 when writing doing level data
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// but different for the writes on startup?
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m_valueresponse = 0x00d20000;
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//UINT8 tableaddr = (hack_31_table_offset + (hack_31_table_offset2&0xf))&0xff;
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//UINT8 xoredval = m_value0 ^ puzzli2_level_decode[tableaddr];
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//printf("value %02x, after xor is %02x (table address,value %02x,%02x)\n", m_value0, xoredval, tableaddr, puzzli2_level_decode[tableaddr]);
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hackcount2++;
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hack_31_table_offset2++;
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hackcount2++;
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hack_31_table_offset2++;
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}
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else
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{
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hackcount2=0;
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// 63 0006 after the last 31 write doing the how to play level data - the 06 is the width of the playfield, where does it come from?
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m_valueresponse = 0x00630006;
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//UINT8 tableaddr = (hack_31_table_offset + (hack_31_table_offset2&0xf))&0xff;
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//UINT8 xoredval = m_value0 ^ puzzli2_level_decode[tableaddr];
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//printf("value %02x, after xor is %02x (table address,value %02x,%02x) (end, returning %02x as playfield width)\n", m_value0, xoredval, tableaddr, puzzli2_level_decode[tableaddr], m_valueresponse);
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}
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}
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}
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else
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{
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hackcount2=0;
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// 63 0006 after the last 31 write doing the how to play level data - the 06 is the width of the playfield, where does it come from?
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m_valueresponse = 0x00630006;
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UINT8 tableaddr = (hack_31_table_offset + (hack_31_table_offset2&0xf))&0xff;
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UINT8 xoredval = m_value0 ^ puzzli2_level_decode[tableaddr];
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printf("value %02x, after xor is %02x (table address,value %02x,%02x) (end, returning %02x as playfield width)\n", m_value0, xoredval, tableaddr, puzzli2_level_decode[tableaddr], m_valueresponse);
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// todo, responses when uploading the startup values are different
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printf("%08x: %02x %04x (for z80 address?)\n ",pc, m_ddp3lastcommand, m_value0);
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m_valueresponse = 0x00d20000;
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}
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}
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@ -884,11 +897,7 @@ void pgm_arm_type1_state::command_handler_puzzli2(int pc)
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m_puzzli_54_trigger = 0;
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break;
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case 0x41: // ASIC status?
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printf("%08x: %02x %04x (UNK)\n",pc, m_ddp3lastcommand, m_value0);
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m_valueresponse = 0x74<<16;
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break;
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// 47 and 52 are used to get the images during the intro sequence, different each loop
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@ -925,10 +934,34 @@ void pgm_arm_type1_state::command_handler_puzzli2(int pc)
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case 0x61: // ??
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printf("%08x: %02x %04x\n",pc, m_ddp3lastcommand, m_value0);
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// this command is written before the values used to decrypt the z80 addresses (assumed) are uploaded with command 31
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command_31_write_type = 1;
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m_valueresponse = 0x36<<16;
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break;
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case 0x41: // ASIC status?
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printf("%08x: %02x %04x (UNK)\n",pc, m_ddp3lastcommand, m_value0);
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// this command is written after the values used to decrypt the z80 addresses (assumed) are uploaded with command 31
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command_31_write_type = 0;
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m_valueresponse = 0x74<<16;
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break;
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case 0x54: // ??
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printf("%08x: %02x %04x\n",pc, m_ddp3lastcommand, m_value0);
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// this command is written before uploading the compressed level data stream with command 31
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command_31_write_type = 2;
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stage = -1;
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m_puzzli_54_trigger = 1;
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hackcount2 = 0;
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hackcount = 0;
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m_valueresponse = 0x36<<16;
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break;
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/*
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these are probably scrambled with some kind of rotating xor?
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@ -1870,6 +1903,16 @@ int pgm_arm_type1_state::puzzli2_take_leveldata_value(UINT8 datvalue)
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{
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if (stage==-1)
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{
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tableoffs = 0;
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tableoffs2 = 0;
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entries_left = 0;
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currentcolumn = 0;
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num_entries = 0;
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full_entry = 0;
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prev_tablloc = 0;
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numbercolumns = 0;
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depth = 0;
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printf("%02x <- table offset\n", datvalue);
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tableoffs = datvalue;
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tableoffs2 = 0;
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@ -2130,15 +2173,7 @@ DRIVER_INIT_MEMBER(pgm_arm_type1_state,puzzli2)
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int x = 0;
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tableoffs = 0;
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tableoffs2 = 0;
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entries_left = 0;
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currentcolumn = 0;
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num_entries = 0;
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full_entry = 0;
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prev_tablloc = 0;
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numbercolumns = 0;
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depth = 0;
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stage = -1;
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for (x=val1; x<val2;x++)
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