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pci wip (no whatsnew)

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This commit is contained in:
Miodrag Milanovic 2012-06-15 14:46:41 +00:00
parent ba2568c2b9
commit 1ff6d9966c
17 changed files with 190 additions and 226 deletions
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264
src/emu/machine/pci.c
View File

@ -70,50 +70,41 @@
***************************************************************************/
#include "emu.h"
#include "devconv.h"
#include "machine/pci.h"
#define LOG_PCI 0
typedef struct _pci_bus_state pci_bus_state;
struct _pci_bus_state
//**************************************************************************
// GLOBAL VARIABLES
//**************************************************************************
const device_type PCI_BUS = &device_creator<pci_bus_device>;
//**************************************************************************
// LIVE DEVICE
//**************************************************************************
//-------------------------------------------------
// pci_bus_device - constructor
//-------------------------------------------------
pci_bus_device::pci_bus_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) :
device_t(mconfig, PCI_BUS, "PCI Bus", tag, owner, clock),
m_father(NULL)
{
device_t * busdevice;
const pci_bus_config * config;
device_t * device[32];
pci_bus_state * siblings[8];
UINT8 siblings_busnum[8];
int siblings_count;
offs_t address;
INT8 devicenum; // device number we are addressing
INT8 busnum; // pci bus number we are addressing
pci_bus_state * busnumaddr; // pci bus we are addressing
};
for (int i = 0; i < ARRAY_LENGTH(m_devtag); i++) {
m_devtag[i]= NULL;
m_read_callback[i] = NULL;
m_write_callback[i] = NULL;
}
m_siblings_count = 0;
}
/***************************************************************************
INLINE FUNCTIONS
***************************************************************************/
/*-------------------------------------------------
get_safe_token - makes sure that the passed
in device is, in fact, a PCI bus
-------------------------------------------------*/
INLINE pci_bus_state *get_safe_token(device_t *device)
READ32_MEMBER( pci_bus_device::read )
{
assert(device != NULL);
assert(device->type() == PCI_BUS);
return (pci_bus_state *)downcast<legacy_device_base *>(device)->token();
}
READ32_DEVICE_HANDLER( pci_32le_r )
{
pci_bus_state *pcibus = get_safe_token(device);
UINT32 result = 0xffffffff;
int function, reg;
@ -122,43 +113,43 @@ READ32_DEVICE_HANDLER( pci_32le_r )
switch (offset)
{
case 0:
result = pcibus->address;
result = m_address;
break;
case 1:
if (pcibus->devicenum != -1)
if (m_devicenum != -1)
{
pci_read_func read = pcibus->busnumaddr->config->device[pcibus->devicenum].read_callback;
pci_read_func read = m_busnumaddr->m_read_callback[m_devicenum];
if (read != NULL)
{
function = (pcibus->address >> 8) & 0x07;
reg = (pcibus->address >> 0) & 0xfc;
result = (*read)(pcibus->busnumaddr->busdevice, pcibus->busnumaddr->device[pcibus->devicenum], function, reg, mem_mask);
function = (m_address >> 8) & 0x07;
reg = (m_address >> 0) & 0xfc;
result = (*read)(m_busnumaddr, m_busnumaddr->m_device[m_devicenum], function, reg, mem_mask);
}
}
break;
}
if (LOG_PCI)
logerror("pci_32le_r('%s'): offset=%d result=0x%08X\n", device->tag(), offset, result);
logerror("read('%s'): offset=%d result=0x%08X\n", tag(), offset, result);
return result;
}
static pci_bus_state *pci_search_bustree(int busnum, int devicenum, pci_bus_state *pcibus)
pci_bus_device *pci_bus_device::pci_search_bustree(int busnum, int devicenum, pci_bus_device *pcibus)
{
int a;
pci_bus_state *ret;
int a;
pci_bus_device *ret;
if (pcibus->config->busnum == busnum)
if (pcibus->m_busnum == busnum)
{
return pcibus;
}
for (a = 0; a < pcibus->siblings_count; a++)
for (a = 0; a < pcibus->m_siblings_count; a++)
{
ret = pci_search_bustree(busnum, devicenum, pcibus->siblings[a]);
ret = pci_search_bustree(busnum, devicenum, pcibus->m_siblings[a]);
if (ret != NULL)
return ret;
}
@ -167,50 +158,48 @@ pci_bus_state *ret;
WRITE32_DEVICE_HANDLER( pci_32le_w )
WRITE32_MEMBER( pci_bus_device::write )
{
pci_bus_state *pcibus = get_safe_token(device);
offset %= 2;
if (LOG_PCI)
logerror("pci_32le_w('%s'): offset=%d data=0x%08X\n", device->tag(), offset, data);
logerror("write('%s'): offset=%d data=0x%08X\n", tag(), offset, data);
switch (offset)
{
case 0:
pcibus->address = data;
m_address = data;
/* lookup current device */
if (pcibus->address & 0x80000000)
if (m_address & 0x80000000)
{
int busnum = (pcibus->address >> 16) & 0xff;
int devicenum = (pcibus->address >> 11) & 0x1f;
pcibus->busnumaddr = pci_search_bustree(busnum, devicenum, pcibus);
if (pcibus->busnumaddr != NULL)
int busnum = (m_address >> 16) & 0xff;
int devicenum = (m_address >> 11) & 0x1f;
m_busnumaddr = pci_search_bustree(busnum, devicenum, this);
if (m_busnumaddr != NULL)
{
pcibus->busnum = busnum;
pcibus->devicenum = devicenum;
m_busnumber = busnum;
m_devicenum = devicenum;
}
else
pcibus->devicenum = -1;
m_devicenum = -1;
if (LOG_PCI)
logerror(" bus:%d device:%d\n", busnum, devicenum);
}
break;
case 1:
if (pcibus->devicenum != -1)
if (m_devicenum != -1)
{
pci_write_func write = pcibus->busnumaddr->config->device[pcibus->devicenum].write_callback;
pci_write_func write = m_busnumaddr->m_write_callback[m_devicenum];
if (write != NULL)
{
int function = (pcibus->address >> 8) & 0x07;
int reg = (pcibus->address >> 0) & 0xfc;
(*write)(pcibus->busnumaddr->busdevice, pcibus->busnumaddr->device[pcibus->devicenum], function, reg, data, mem_mask);
int function = (m_address >> 8) & 0x07;
int reg = (m_address >> 0) & 0xfc;
(*write)(m_busnumaddr, m_busnumaddr->m_device[m_devicenum], function, reg, data, mem_mask);
}
if (LOG_PCI)
logerror(" function:%d register:%d\n", (pcibus->address >> 8) & 0x07, (pcibus->address >> 0) & 0xfc);
logerror(" function:%d register:%d\n", (m_address >> 8) & 0x07, (m_address >> 0) & 0xfc);
}
break;
}
@ -218,118 +207,83 @@ WRITE32_DEVICE_HANDLER( pci_32le_w )
READ64_DEVICE_HANDLER(pci_64be_r) { return read64be_with_32le_device_handler(pci_32le_r, device, offset, mem_mask); }
WRITE64_DEVICE_HANDLER(pci_64be_w) { write64be_with_32le_device_handler(pci_32le_w, device, offset, data, mem_mask); }
int pci_add_sibling( running_machine &machine, char *pcitag, char *sibling )
READ64_MEMBER(pci_bus_device::read_64be)
{
device_t *device1 = machine.device(pcitag);
device_t *device2 = machine.device(sibling);
pci_bus_state *pcibus1 = get_safe_token(device1);
pci_bus_state *pcibus2 = get_safe_token(device2);
pci_bus_config *config2;
UINT64 result = 0;
mem_mask = FLIPENDIAN_INT64(mem_mask);
if (ACCESSING_BITS_0_31)
result |= (UINT64)read(space, offset * 2 + 0, mem_mask >> 0) << 0;
if (ACCESSING_BITS_32_63)
result |= (UINT64)read(space, offset * 2 + 1, mem_mask >> 32) << 32;
return FLIPENDIAN_INT64(result);
}
if ((device1 == NULL) || (device2 == NULL) || (pcibus1 == NULL) || (pcibus2 == NULL))
return 0;
if (pcibus1->siblings_count == 8)
return 0;
config2 = (pci_bus_config *)downcast<const legacy_device_base *>(device2)->inline_config();
pcibus1->siblings[pcibus1->siblings_count] = get_safe_token(device2);
pcibus1->siblings_busnum[pcibus1->siblings_count] = config2->busnum;
pcibus1->siblings_count++;
return 1;
WRITE64_MEMBER(pci_bus_device::write_64be)
{
data = FLIPENDIAN_INT64(data);
mem_mask = FLIPENDIAN_INT64(mem_mask);
if (ACCESSING_BITS_0_31)
write(space, offset * 2 + 0, data >> 0, mem_mask >> 0);
if (ACCESSING_BITS_32_63)
write(space, offset * 2 + 1, data >> 32, mem_mask >> 32);
}
/***************************************************************************
DEVICE INTERFACE
***************************************************************************/
static void pci_bus_postload(pci_bus_state *pcibus)
void pci_bus_device::add_sibling(pci_bus_device *sibling, int busnum)
{
if (pcibus->devicenum != -1)
m_siblings[m_siblings_count] = sibling;
m_siblings_busnum[m_siblings_count] = busnum;
m_siblings_count++;
}
//-------------------------------------------------
// device_post_load - handle updating after a
// restore
//-------------------------------------------------
void pci_bus_device::device_post_load()
{
if (m_devicenum != -1)
{
pcibus->busnumaddr = pci_search_bustree(pcibus->busnum, pcibus->devicenum, pcibus);
m_busnumaddr = pci_search_bustree(m_busnumber, m_devicenum, this);
}
}
//-------------------------------------------------
// device_start - device-specific startup
//-------------------------------------------------
/*-------------------------------------------------
device start callback
-------------------------------------------------*/
static DEVICE_START( pci_bus )
void pci_bus_device::device_start()
{
pci_bus_state *pcibus = get_safe_token(device);
int devicenum;
/* validate some basic stuff */
assert(device != NULL);
assert(device->static_config() == NULL);
assert(downcast<const legacy_device_base *>(device)->inline_config() != NULL);
/* store a pointer back to the device */
pcibus->config = (const pci_bus_config *)downcast<const legacy_device_base *>(device)->inline_config();
pcibus->busdevice = device;
pcibus->devicenum = -1;
m_devicenum = -1;
/* find all our devices */
for (devicenum = 0; devicenum < ARRAY_LENGTH(pcibus->device); devicenum++)
if (pcibus->config->device[devicenum].devtag != NULL)
pcibus->device[devicenum] = device->machine().device(pcibus->config->device[devicenum].devtag);
for (int i = 0; i < ARRAY_LENGTH(m_devtag); i++)
if (m_devtag[i] != NULL)
m_device[i] = machine().device(m_devtag[i]);
if (pcibus->config->father != NULL)
pci_add_sibling(device->machine(), (char *)pcibus->config->father, (char *)device->tag());
if (m_father != NULL) {
pci_bus_device *father = machine().device<pci_bus_device>(m_father);
if (father)
father->add_sibling(this, m_busnum);
}
/* register pci states */
device->save_item(NAME(pcibus->address));
device->save_item(NAME(pcibus->devicenum));
device->save_item(NAME(pcibus->busnum));
device->machine().save().register_postload(save_prepost_delegate(FUNC(pci_bus_postload), pcibus));
save_item(NAME(m_address));
save_item(NAME(m_devicenum));
save_item(NAME(m_busnum));
}
/*-------------------------------------------------
device reset callback
-------------------------------------------------*/
//-------------------------------------------------
// device_reset - device-specific reset
//-------------------------------------------------
static DEVICE_RESET( pci_bus )
void pci_bus_device::device_reset()
{
pci_bus_state *pcibus = get_safe_token(device);
/* reset the drive state */
pcibus->devicenum = -1;
pcibus->address = 0;
m_devicenum = -1;
m_address = 0;
}
/*-------------------------------------------------
device get info callback
-------------------------------------------------*/
DEVICE_GET_INFO( pci_bus )
{
switch (state)
{
/* --- the following bits of info are returned as 64-bit signed integers --- */
case DEVINFO_INT_TOKEN_BYTES: info->i = sizeof(pci_bus_state); break;
case DEVINFO_INT_INLINE_CONFIG_BYTES: info->i = sizeof(pci_bus_config); break;
/* --- the following bits of info are returned as pointers to data or functions --- */
case DEVINFO_FCT_START: info->start = DEVICE_START_NAME(pci_bus); break;
case DEVINFO_FCT_RESET: info->reset = DEVICE_RESET_NAME(pci_bus);break;
/* --- the following bits of info are returned as NULL-terminated strings --- */
case DEVINFO_STR_NAME: strcpy(info->s, "PCI Bus"); break;
case DEVINFO_STR_FAMILY: strcpy(info->s, "Peripherial Bus"); break;
case DEVINFO_STR_VERSION: strcpy(info->s, "1.0"); break;
case DEVINFO_STR_SOURCE_FILE: strcpy(info->s, __FILE__); break;
case DEVINFO_STR_CREDITS: strcpy(info->s, "Copyright Nicola Salmoria and the MAME Team"); break;
}
}
DEFINE_LEGACY_DEVICE(PCI_BUS, pci_bus);

90
src/emu/machine/pci.h
View File

@ -9,32 +9,60 @@
#ifndef PCI_H
#define PCI_H
#include "devlegcy.h"
/***************************************************************************
TYPE DEFINITIONS
***************************************************************************/
//**************************************************************************
// TYPE DEFINITIONS
//**************************************************************************
typedef UINT32 (*pci_read_func)(device_t *pcibus, device_t *device, int function, int reg, UINT32 mem_mask);
typedef void (*pci_write_func)(device_t *pcibus, device_t *device, int function, int reg, UINT32 data, UINT32 mem_mask);
typedef struct _pci_device_entry pci_device_entry;
struct _pci_device_entry
// ======================> ttl74145_device
class pci_bus_device : public device_t
{
const char * devtag;
pci_read_func read_callback;
pci_write_func write_callback;
};
typedef struct _pci_bus_config pci_bus_config;
struct _pci_bus_config
{
UINT8 busnum;
pci_device_entry device[32];
const char * father;
public:
// construction/destruction
pci_bus_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
DECLARE_READ32_MEMBER( read );
DECLARE_WRITE32_MEMBER( write );
DECLARE_READ64_MEMBER( read_64be );
DECLARE_WRITE64_MEMBER( write_64be );
void set_busnum(int busnum) { m_busnum = busnum; }
void set_father(const char *father) { m_father = father; }
void set_device(int num, const char *tag, pci_read_func read_func, pci_write_func write_func) {
m_devtag[num] = tag; m_read_callback[num] = read_func; m_write_callback[num] = write_func; }
pci_bus_device *pci_search_bustree(int busnum, int devicenum, pci_bus_device *pcibus);
void add_sibling(pci_bus_device *sibling, int busnum);
protected:
// device-level overrides
virtual void device_start();
virtual void device_reset();
virtual void device_post_load();
private:
UINT8 m_busnum;
const char * m_devtag[32];
pci_read_func m_read_callback[32];
pci_write_func m_write_callback[32];
const char * m_father;
device_t * m_device[32];
pci_bus_device * m_siblings[8];
UINT8 m_siblings_busnum[8];
int m_siblings_count;
offs_t m_address;
INT8 m_devicenum; // device number we are addressing
INT8 m_busnumber; // pci bus number we are addressing
pci_bus_device * m_busnumaddr; // pci bus we are addressing
};
// device type definition
extern const device_type PCI_BUS;
/***************************************************************************
@ -43,31 +71,13 @@ struct _pci_bus_config
#define MCFG_PCI_BUS_ADD(_tag, _busnum) \
MCFG_DEVICE_ADD(_tag, PCI_BUS, 0) \
MCFG_DEVICE_CONFIG_DATA32(pci_bus_config, busnum, _busnum)
downcast<pci_bus_device *>(device)->set_busnum(_busnum); \
#define MCFG_PCI_BUS_DEVICE(_devnum, _devtag, _configread, _configwrite) \
MCFG_DEVICE_CONFIG_DATAPTR_ARRAY_MEMBER(pci_bus_config, device, _devnum, pci_device_entry, devtag, _devtag) \
MCFG_DEVICE_CONFIG_DATAPTR_ARRAY_MEMBER(pci_bus_config, device, _devnum, pci_device_entry, read_callback, _configread) \
MCFG_DEVICE_CONFIG_DATAPTR_ARRAY_MEMBER(pci_bus_config, device, _devnum, pci_device_entry, write_callback, _configwrite)
downcast<pci_bus_device *>(device)->set_device(_devnum, _devtag,_configread,_configwrite); \
#define MCFG_PCI_BUS_SIBLING(_father_tag) \
MCFG_DEVICE_CONFIG_DATAPTR(pci_bus_config, father, _father_tag)
downcast<pci_bus_device *>(device)->set_father(_father_tag); \
/***************************************************************************
FUNCTION PROTOTYPES
***************************************************************************/
READ32_DEVICE_HANDLER( pci_32le_r );
WRITE32_DEVICE_HANDLER( pci_32le_w );
READ64_DEVICE_HANDLER( pci_64be_r );
WRITE64_DEVICE_HANDLER( pci_64be_w );
int pci_add_sibling( running_machine &machine, char *pcitag, char *sibling );
/* ----- device interface ----- */
DECLARE_LEGACY_DEVICE(PCI_BUS, pci_bus);
#endif /* PCI_H */

2
src/mame/drivers/calchase.c
View File

@ -603,7 +603,7 @@ static ADDRESS_MAP_START( calchase_io, AS_IO, 32, calchase_state )
AM_RANGE(0x03f0, 0x03f7) AM_READWRITE(fdc_r, fdc_w)
AM_RANGE(0x03f8, 0x03ff) AM_NOP // To debug Serial Port COM1:
AM_RANGE(0x0a78, 0x0a7b) AM_WRITENOP//AM_WRITE_LEGACY(pnp_data_w)
AM_RANGE(0x0cf8, 0x0cff) AM_DEVREADWRITE_LEGACY("pcibus", pci_32le_r, pci_32le_w)
AM_RANGE(0x0cf8, 0x0cff) AM_DEVREADWRITE("pcibus", pci_bus_device, read, write)
AM_RANGE(0x42e8, 0x43ef) AM_NOP //To debug
AM_RANGE(0x43c0, 0x43cf) AM_RAM AM_SHARE("share1")
AM_RANGE(0x46e8, 0x46ef) AM_NOP //To debug

2
src/mame/drivers/chihiro.c
View File

@ -1124,7 +1124,7 @@ static ADDRESS_MAP_START(xbox_map_io, AS_IO, 32, smbus_state )
AM_RANGE(0x0040, 0x0043) AM_DEVREADWRITE8_LEGACY("pit8254", pit8253_r, pit8253_w, 0xffffffff)
AM_RANGE(0x00a0, 0x00a3) AM_DEVREADWRITE8_LEGACY("pic8259_2", pic8259_r, pic8259_w, 0xffffffff)
AM_RANGE(0x01f0, 0x01f7) AM_READWRITE_LEGACY(ide_r, ide_w)
AM_RANGE(0x0cf8, 0x0cff) AM_DEVREADWRITE_LEGACY("pcibus", pci_32le_r, pci_32le_w)
AM_RANGE(0x0cf8, 0x0cff) AM_DEVREADWRITE("pcibus", pci_bus_device, read, write)
AM_RANGE(0x8000, 0x80ff) AM_READWRITE_LEGACY(dummy_r, dummy_w)
AM_RANGE(0xc000, 0xc0ff) AM_READWRITE_LEGACY(smbus_r, smbus_w)
AM_RANGE(0xff60, 0xff67) AM_DEVREADWRITE_LEGACY("ide", ide_bus_master32_r, ide_bus_master32_w)

12
src/mame/drivers/cobra.c
View File

@ -469,7 +469,7 @@ static int m2sfifo_unk_flag = 0;
static int s2mfifo_unk_flag = 0;
static UINT32 mpc106_regs[256/4];
static UINT32 mpc106_pci_r(int function, int reg, UINT32 mem_mask)
static UINT32 mpc106_pci_r(device_t *busdevice, device_t *device, int function, int reg, UINT32 mem_mask)
{
//printf("MPC106: PCI read %d, %02X, %08X\n", function, reg, mem_mask);
@ -480,7 +480,7 @@ static UINT32 mpc106_pci_r(int function, int reg, UINT32 mem_mask)
return mpc106_regs[reg/4];
}
static void mpc106_pci_w(int function, int reg, UINT32 data, UINT32 mem_mask)
static void mpc106_pci_w(device_t *busdevice, device_t *device, int function, int reg, UINT32 data, UINT32 mem_mask)
{
//printf("MPC106: PCI write %d, %02X, %08X, %08X\n", function, reg, data, mem_mask);
COMBINE_DATA(mpc106_regs + (reg/4));
@ -488,16 +488,16 @@ static void mpc106_pci_w(int function, int reg, UINT32 data, UINT32 mem_mask)
READ64_MEMBER(cobra_state::main_mpc106_r)
{
device_t *device = machine().device("pcibus");
pci_bus_device *device = machine().device<pci_bus_device>("pcibus");
//return pci_64be_r(offset, mem_mask);
return pci_64be_r(device, offset, mem_mask);
return device->read_64be(space, offset, mem_mask);
}
WRITE64_MEMBER(cobra_state::main_mpc106_w)
{
device_t *device = machine().device("pcibus");
pci_bus_device *device = machine().device<pci_bus_device>("pcibus");
//pci_64be_w(offset, data, mem_mask);
pci_64be_w(device, offset, data, mem_mask);
device->write_64be(space, offset, data, mem_mask);
}
READ64_MEMBER(cobra_state::main_fifo_r)

2
src/mame/drivers/funkball.c
View File

@ -602,7 +602,7 @@ static ADDRESS_MAP_START(funkball_io, AS_IO, 32, funkball_state)
// AM_RANGE(0x03f0, 0x03ff) AM_READWRITE(fdc_r, fdc_w)
AM_RANGE(0x03f0, 0x03ff) AM_READWRITE8(fdc_r,fdc_w,0xffffffff)
AM_RANGE(0x0cf8, 0x0cff) AM_DEVREADWRITE_LEGACY("pcibus", pci_32le_r, pci_32le_w)
AM_RANGE(0x0cf8, 0x0cff) AM_DEVREADWRITE("pcibus", pci_bus_device, read, write)
AM_RANGE(0x0360, 0x0363) AM_WRITE8(flash_w,0xffffffff)

2
src/mame/drivers/gamecstl.c
View File

@ -540,7 +540,7 @@ static ADDRESS_MAP_START(gamecstl_io, AS_IO, 32, gamecstl_state )
AM_RANGE(0x0278, 0x027b) AM_WRITE(pnp_config_w)
AM_RANGE(0x03f0, 0x03ff) AM_READWRITE(fdc_r, fdc_w)
AM_RANGE(0x0a78, 0x0a7b) AM_WRITE(pnp_data_w)
AM_RANGE(0x0cf8, 0x0cff) AM_DEVREADWRITE_LEGACY("pcibus", pci_32le_r, pci_32le_w)
AM_RANGE(0x0cf8, 0x0cff) AM_DEVREADWRITE("pcibus", pci_bus_device, read, write)
ADDRESS_MAP_END
/*****************************************************************************/

8
src/mame/drivers/magictg.c
View File

@ -614,12 +614,12 @@ WRITE32_MEMBER( magictg_state::f0_w )
}
case 0xcf8:
{
pci_32le_w(m_pci, 0, data, mem_mask);
m_pci->write(space, 0, data, mem_mask);
break;
}
case 0xcfc:
{
pci_32le_w(m_pci, 1, data, mem_mask);
m_pci->write(space, 1, data, mem_mask);
break;
}
// default:
@ -651,12 +651,12 @@ READ32_MEMBER( magictg_state::f0_r )
case 0xcf8:
{
val = pci_32le_r(m_pci, 0, FLIPENDIAN_INT32(mem_mask));
val = m_pci->read(space, 0, FLIPENDIAN_INT32(mem_mask));
break;
}
case 0xcfc:
{
val = pci_32le_r(m_pci, 1, FLIPENDIAN_INT32(mem_mask));
val = m_pci->read(space, 1, FLIPENDIAN_INT32(mem_mask));
break;
}
// default:

2
src/mame/drivers/mediagx.c
View File

@ -960,7 +960,7 @@ static ADDRESS_MAP_START(mediagx_io, AS_IO, 32, mediagx_state )
AM_RANGE(0x0378, 0x037b) AM_READWRITE(parallel_port_r, parallel_port_w)
AM_RANGE(0x03f0, 0x03ff) AM_READWRITE(fdc_r, fdc_w)
AM_RANGE(0x0400, 0x04ff) AM_READWRITE(ad1847_r, ad1847_w)
AM_RANGE(0x0cf8, 0x0cff) AM_DEVREADWRITE_LEGACY("pcibus", pci_32le_r, pci_32le_w)
AM_RANGE(0x0cf8, 0x0cff) AM_DEVREADWRITE("pcibus", pci_bus_device, read, write)
ADDRESS_MAP_END
/*****************************************************************************/

2
src/mame/drivers/midqslvr.c
View File

@ -558,7 +558,7 @@ static ADDRESS_MAP_START(midqslvr_io, AS_IO, 32, midqslvr_state)
AM_RANGE(0x01f0, 0x01f7) AM_READWRITE(ide_r, ide_w)
AM_RANGE(0x03f0, 0x03f7) AM_READWRITE(fdc_r, fdc_w)
AM_RANGE(0x0cf8, 0x0cff) AM_DEVREADWRITE_LEGACY("pcibus", pci_32le_r, pci_32le_w)
AM_RANGE(0x0cf8, 0x0cff) AM_DEVREADWRITE("pcibus", pci_bus_device, read, write)
ADDRESS_MAP_END
static const struct pit8253_config midqslvr_pit8254_config =

2
src/mame/drivers/quakeat.c
View File

@ -106,7 +106,7 @@ static ADDRESS_MAP_START( quake_io, AS_IO, 32, quakeat_state )
// AM_RANGE(0x0278, 0x027b) AM_WRITE_LEGACY(pnp_config_w)
// AM_RANGE(0x03f0, 0x03ff) AM_DEVREADWRITE_LEGACY("ide", fdc_r, fdc_w)
// AM_RANGE(0x0a78, 0x0a7b) AM_WRITE_LEGACY(pnp_data_w)
// AM_RANGE(0x0cf8, 0x0cff) AM_DEVREADWRITE_LEGACY("pcibus", pci_32le_r, pci_32le_w)
// AM_RANGE(0x0cf8, 0x0cff) AM_DEVREADWRITE("pcibus", pci_bus_device, read, write)
ADDRESS_MAP_END
/*************************************************************

2
src/mame/drivers/queen.c
View File

@ -542,7 +542,7 @@ static ADDRESS_MAP_START( queen_io, AS_IO, 32, queen_state )
AM_RANGE(0x01f0, 0x01f7) AM_READWRITE(ide_r, ide_w)
AM_RANGE(0x03f0, 0x03f7) AM_READWRITE(fdc_r, fdc_w)
AM_RANGE(0x0cf8, 0x0cff) AM_DEVREADWRITE_LEGACY("pcibus", pci_32le_r, pci_32le_w)
AM_RANGE(0x0cf8, 0x0cff) AM_DEVREADWRITE("pcibus", pci_bus_device, read, write)
ADDRESS_MAP_END
static const struct pit8253_config queen_pit8254_config =

2
src/mame/drivers/savquest.c
View File

@ -417,7 +417,7 @@ static ADDRESS_MAP_START(savquest_io, AS_IO, 32, savquest_state)
AM_RANGE(0x01f0, 0x01f7) AM_READWRITE(ide_r, ide_w)
AM_RANGE(0x03f0, 0x03f7) AM_READWRITE(fdc_r, fdc_w)
AM_RANGE(0x0cf8, 0x0cff) AM_DEVREADWRITE_LEGACY("pcibus", pci_32le_r, pci_32le_w)
AM_RANGE(0x0cf8, 0x0cff) AM_DEVREADWRITE("pcibus", pci_bus_device, read, write)
// AM_RANGE(0x5000, 0x5007) // routes to port $eb
ADDRESS_MAP_END

2
src/mame/drivers/taitowlf.c
View File

@ -479,7 +479,7 @@ static ADDRESS_MAP_START(taitowlf_io, AS_IO, 32, taitowlf_state )
AM_RANGE(0x0278, 0x027b) AM_WRITE(pnp_config_w)
AM_RANGE(0x03f0, 0x03ff) AM_READWRITE(fdc_r, fdc_w)
AM_RANGE(0x0a78, 0x0a7b) AM_WRITE(pnp_data_w)
AM_RANGE(0x0cf8, 0x0cff) AM_DEVREADWRITE_LEGACY("pcibus", pci_32le_r, pci_32le_w)
AM_RANGE(0x0cf8, 0x0cff) AM_DEVREADWRITE("pcibus", pci_bus_device, read, write)
ADDRESS_MAP_END
/*****************************************************************************/

16
src/mame/drivers/viper.c
View File

@ -384,26 +384,26 @@ static void mpc8240_pci_w(device_t *busdevice, device_t *device, int function, i
READ64_MEMBER(viper_state::pci_config_addr_r)
{
device_t *device = machine().device("pcibus");
return pci_64be_r(device, 0, U64(0xffffffff00000000));
pci_bus_device *device = machine().device<pci_bus_device>("pcibus");
return device->read_64be(space, 0, U64(0xffffffff00000000));
}
WRITE64_MEMBER(viper_state::pci_config_addr_w)
{
device_t *device = machine().device("pcibus");
pci_64be_w(device, 0, data, U64(0xffffffff00000000));
pci_bus_device *device = machine().device<pci_bus_device>("pcibus");
device->write_64be(space, 0, data, U64(0xffffffff00000000));
}
READ64_MEMBER(viper_state::pci_config_data_r)
{
device_t *device = machine().device("pcibus");
return pci_64be_r(device, 1, U64(0x00000000ffffffff)) << 32;
pci_bus_device *device = machine().device<pci_bus_device>("pcibus");
return device->read_64be(space, 1, U64(0x00000000ffffffff)) << 32;
}
WRITE64_MEMBER(viper_state::pci_config_data_w)
{
device_t *device = machine().device("pcibus");
pci_64be_w(device, 1, data >> 32, U64(0x00000000ffffffff));
pci_bus_device *device = machine().device<pci_bus_device>("pcibus");
device->write_64be(space, 1, data >> 32, U64(0x00000000ffffffff));
}

2
src/mame/drivers/voyager.c
View File

@ -449,7 +449,7 @@ static ADDRESS_MAP_START( voyager_io, AS_IO, 32, voyager_state )
AM_RANGE(0x03f0, 0x03f7) AM_READWRITE(fdc_r, fdc_w)
AM_RANGE(0x03f8, 0x03ff) AM_NOP // To debug Serial Port COM1:
AM_RANGE(0x0a78, 0x0a7b) AM_WRITENOP//AM_WRITE_LEGACY(pnp_data_w)
AM_RANGE(0x0cf8, 0x0cff) AM_DEVREADWRITE_LEGACY("pcibus", pci_32le_r, pci_32le_w)
AM_RANGE(0x0cf8, 0x0cff) AM_DEVREADWRITE("pcibus", pci_bus_device, read, write)
AM_RANGE(0x42e8, 0x43ef) AM_NOP //To debug
AM_RANGE(0x43c0, 0x43cf) AM_RAM AM_SHARE("share1")
AM_RANGE(0x46e8, 0x46ef) AM_NOP //To debug

2
src/mame/drivers/xtom3d.c
View File

@ -549,7 +549,7 @@ static ADDRESS_MAP_START(xtom3d_io, AS_IO, 32, xtom3d_state)
AM_RANGE(0x01f0, 0x01f7) AM_READWRITE(ide_r, ide_w)
AM_RANGE(0x03f0, 0x03f7) AM_READWRITE(fdc_r, fdc_w)
AM_RANGE(0x0cf8, 0x0cff) AM_DEVREADWRITE_LEGACY("pcibus", pci_32le_r, pci_32le_w)
AM_RANGE(0x0cf8, 0x0cff) AM_DEVREADWRITE("pcibus", pci_bus_device, read, write)
ADDRESS_MAP_END