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hp9825: hp98036 serial I/O module added (#7024)
This commit is contained in:
fulivi
GitHub
parent
9414a219a9
commit
206767bf56
@ -4096,6 +4096,8 @@ if (BUSES["HP9845_IO"]~=null) then
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MAME_DIR .. "src/devices/bus/hp9845_io/98034.h",
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MAME_DIR .. "src/devices/bus/hp9845_io/98035.cpp",
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MAME_DIR .. "src/devices/bus/hp9845_io/98035.h",
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MAME_DIR .. "src/devices/bus/hp9845_io/98036.cpp",
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MAME_DIR .. "src/devices/bus/hp9845_io/98036.h",
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MAME_DIR .. "src/devices/bus/hp9845_io/98046.cpp",
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MAME_DIR .. "src/devices/bus/hp9845_io/98046.h",
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MAME_DIR .. "src/devices/bus/hp9845_io/hp9885.cpp",
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505
src/devices/bus/hp9845_io/98036.cpp
Normal file
505
src/devices/bus/hp9845_io/98036.cpp
Normal file
@ -0,0 +1,505 @@
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// license:BSD-3-Clause
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// copyright-holders: F. Ulivi
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/*********************************************************************
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98036.cpp
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98036 module (RS232 interface)
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Main reference for this module:
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HP, 98036A Serial I/O interface installation & service manual
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*********************************************************************/
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#include "98036.h"
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// Debugging
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#define VERBOSE 0
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#include "logmacro.h"
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// Bit manipulation
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namespace {
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template<typename T> constexpr T BIT_MASK(unsigned n)
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{
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return (T)1U << n;
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}
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template<typename T> void BIT_SET(T& w , unsigned n)
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{
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w |= BIT_MASK<T>(n);
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}
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}
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// device type definitions
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DEFINE_DEVICE_TYPE(HP98036_IO_CARD, hp98036_io_card_device, "hp98036" , "HP98036 card")
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hp98036_io_card_device::hp98036_io_card_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
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: device_t(mconfig, HP98036_IO_CARD, tag, owner, clock)
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, device_hp9845_io_interface(mconfig, *this)
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, m_uart(*this , "uart")
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, m_clock_gen(*this , "clock_gen")
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, m_rs232(*this , "rs232")
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, m_s1_input(*this , "s1")
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, m_s2_input(*this , "s2")
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, m_s3_input(*this , "s3")
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, m_jumper_input(*this , "jumper")
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, m_loopback_en(*this , "loop")
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{
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}
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hp98036_io_card_device::~hp98036_io_card_device()
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{
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}
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uint16_t hp98036_io_card_device::reg_r(address_space &space, offs_t offset)
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{
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uint16_t res = 0;
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switch (offset) {
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case 0:
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// R4IN
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m_r4_dir = false;
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res = m_r4in_data;
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break;
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case 1:
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// R5IN
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if (m_tx_int_en) {
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BIT_SET(res, 0);
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}
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if (m_rx_int_en) {
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BIT_SET(res, 1);
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}
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BIT_SET(res, 4);
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if (m_int_en) {
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BIT_SET(res, 7);
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}
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break;
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case 2:
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// R6IN
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// Bits 3&4: jumpers
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res = (m_jumper_input->read() & 3) << 3;
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if (m_loopback) {
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res |= m_lineout;
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} else {
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if (!m_rs232->dcd_r()) {
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BIT_SET(res, 0);
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}
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if (!m_rs232->ri_r()) {
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BIT_SET(res, 1);
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}
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// Bit 2: secondary CD, always 0
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}
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BIT_SET(res, 5);
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BIT_SET(res, 6);
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BIT_SET(res, 7);
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break;
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default:
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logerror("Unmapped read @%u\n" , offset);
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break;
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}
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LOG("RD R%u=%02x\n" , offset + 4 , res);
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return res;
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}
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void hp98036_io_card_device::reg_w(address_space &space, offs_t offset, uint16_t data)
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{
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LOG("WR R%u=%02x\n" , offset + 4 , data);
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switch (offset) {
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case 0:
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// R4OUT
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m_r4_dir = true;
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m_wrrq = true;
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m_r4out_data = data;
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uart_wr();
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update_flg();
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break;
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case 1:
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// R5OUT
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m_uart_cmd = BIT(data , 0);
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m_tx_int_en = BIT(data , 1);
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m_rx_int_en = BIT(data , 2);
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m_int_en = BIT(data , 7);
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if (BIT(data , 5)) {
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int_reset();
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} else {
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uart_rd();
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uart_wr();
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update_irq();
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update_flg();
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}
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break;
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case 2:
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// R6OUT
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m_half_baud = BIT(data , 4);
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m_lineout = data & 7;
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break;
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case 3:
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// R7OUT
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if (!m_r4_dir) {
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m_rdrq = true;
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uart_rd();
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update_irq();
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update_flg();
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}
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break;
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default:
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logerror("Unmapped write @%u\n" , offset);
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break;
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}
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}
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void hp98036_io_card_device::device_add_mconfig(machine_config &config)
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{
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I8251(config , m_uart , 0);
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m_uart->txd_handler().set(FUNC(hp98036_io_card_device::txd_w));
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m_uart->dtr_handler().set(FUNC(hp98036_io_card_device::dtr_w));
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m_uart->rts_handler().set(FUNC(hp98036_io_card_device::rts_w));
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m_uart->rxrdy_handler().set(FUNC(hp98036_io_card_device::rxrdy_w));
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m_uart->txrdy_handler().set(FUNC(hp98036_io_card_device::txrdy_w));
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MC14411(config , m_clock_gen , 1.8432_MHz_XTAL);
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m_clock_gen->out_f<1>().set(FUNC(hp98036_io_card_device::bit_rate_clock));
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m_clock_gen->out_f<3>().set(FUNC(hp98036_io_card_device::bit_rate_clock));
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m_clock_gen->out_f<5>().set(FUNC(hp98036_io_card_device::bit_rate_clock));
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m_clock_gen->out_f<6>().set(FUNC(hp98036_io_card_device::bit_rate_clock));
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m_clock_gen->out_f<7>().set(FUNC(hp98036_io_card_device::bit_rate_clock));
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m_clock_gen->out_f<8>().set(FUNC(hp98036_io_card_device::bit_rate_clock));
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m_clock_gen->out_f<9>().set(FUNC(hp98036_io_card_device::bit_rate_clock));
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m_clock_gen->out_f<11>().set(FUNC(hp98036_io_card_device::bit_rate_clock));
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m_clock_gen->out_f<13>().set(FUNC(hp98036_io_card_device::bit_rate_clock));
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m_clock_gen->out_f<14>().set(FUNC(hp98036_io_card_device::bit_rate_clock));
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m_clock_gen->out_f<12>().set(FUNC(hp98036_io_card_device::slow_clock));
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RS232_PORT(config , m_rs232 , default_rs232_devices , nullptr);
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m_rs232->rxd_handler().set(FUNC(hp98036_io_card_device::rxd_w));
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m_rs232->dsr_handler().set(FUNC(hp98036_io_card_device::dsr_w));
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m_rs232->cts_handler().set(FUNC(hp98036_io_card_device::cts_w));
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}
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static INPUT_PORTS_START(hp98036_port)
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PORT_HP9845_IO_SC(11)
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PORT_START("s1")
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PORT_DIPNAME(3 , 3 , "Clock factor")
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PORT_DIPLOCATION("S1:1,2")
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PORT_DIPSETTING(1 , "x1")
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PORT_DIPSETTING(2 , "x16")
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PORT_DIPSETTING(3 , "x64")
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PORT_DIPNAME(0x0c , 0x0c , "Character length")
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PORT_DIPLOCATION("S1:3,4")
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PORT_DIPSETTING(0x00 , "5")
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PORT_DIPSETTING(0x04 , "6")
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PORT_DIPSETTING(0x08 , "7")
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PORT_DIPSETTING(0x0c , "8")
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PORT_DIPNAME(0x10 , 0 , "Parity enable")
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PORT_DIPLOCATION("S1:5")
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PORT_DIPSETTING(0x00 , DEF_STR(Off))
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PORT_DIPSETTING(0x10 , DEF_STR(On))
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PORT_DIPNAME(0x20 , 0 , "Parity")
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PORT_DIPLOCATION("S1:6")
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PORT_DIPSETTING(0x00 , "Odd")
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PORT_DIPSETTING(0x20 , "Even")
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PORT_DIPNAME(0xc0 , 0xc0 , "Stop bits")
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PORT_DIPLOCATION("S1:7,8")
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PORT_DIPSETTING(0x40 , "1")
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PORT_DIPSETTING(0x80 , "1.5")
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PORT_DIPSETTING(0xc0 , "2")
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PORT_START("s2")
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PORT_DIPNAME(1 , 1 , "CTS")
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PORT_DIPLOCATION("S2:1")
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PORT_DIPSETTING(0 , "Device controlled")
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PORT_DIPSETTING(1 , "Always active")
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PORT_START("s3")
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PORT_CONFNAME(0xf , 6 , "Baud rate")
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PORT_CONFSETTING(0 , "9600")
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PORT_CONFSETTING(1 , "4800")
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PORT_CONFSETTING(2 , "2400")
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PORT_CONFSETTING(3 , "1800")
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PORT_CONFSETTING(4 , "1200")
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PORT_CONFSETTING(5 , "600")
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PORT_CONFSETTING(6 , "300")
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PORT_CONFSETTING(7 , "150")
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PORT_CONFSETTING(8 , "110")
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PORT_CONFSETTING(9 , "75")
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PORT_START("jumper")
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PORT_CONFNAME(1 , 0 , "J1")
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PORT_CONFSETTING(0 , DEF_STR(Off))
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PORT_CONFSETTING(1 , DEF_STR(On))
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PORT_CONFNAME(2 , 0 , "J2")
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PORT_CONFSETTING(0 , DEF_STR(Off))
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PORT_CONFSETTING(2 , DEF_STR(On))
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PORT_START("loop")
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PORT_CONFNAME(1 , 0 , "Test loopback")
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PORT_CONFSETTING(0 , DEF_STR(Off))
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PORT_CONFSETTING(1 , DEF_STR(On))
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INPUT_PORTS_END
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ioport_constructor hp98036_io_card_device::device_input_ports() const
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{
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return INPUT_PORTS_NAME(hp98036_port);
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}
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void hp98036_io_card_device::device_start()
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{
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save_item(NAME(m_init_state));
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save_item(NAME(m_irq));
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save_item(NAME(m_int_en));
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save_item(NAME(m_tx_int_en));
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save_item(NAME(m_rx_int_en));
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save_item(NAME(m_txrdy));
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save_item(NAME(m_rxrdy));
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save_item(NAME(m_wrrq));
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save_item(NAME(m_rdrq));
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save_item(NAME(m_uart_cmd));
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save_item(NAME(m_uart_wr_mode));
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save_item(NAME(m_flg));
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save_item(NAME(m_half_baud));
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save_item(NAME(m_baud_div));
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save_item(NAME(m_r4_dir));
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save_item(NAME(m_r4in_data));
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save_item(NAME(m_r4out_data));
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save_item(NAME(m_lineout));
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}
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void hp98036_io_card_device::device_reset()
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{
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sts_w(true);
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ioport_value baud_sel = m_s3_input->read();
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m_clock_gen->timer_enable(mc14411_device::TIMER_F1 , baud_sel == 0);
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m_clock_gen->timer_enable(mc14411_device::TIMER_F3 , baud_sel == 1);
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m_clock_gen->timer_enable(mc14411_device::TIMER_F5 , baud_sel == 2);
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m_clock_gen->timer_enable(mc14411_device::TIMER_F6 , baud_sel == 3);
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m_clock_gen->timer_enable(mc14411_device::TIMER_F7 , baud_sel == 4);
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m_clock_gen->timer_enable(mc14411_device::TIMER_F8 , baud_sel == 5);
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m_clock_gen->timer_enable(mc14411_device::TIMER_F9 , baud_sel == 6);
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m_clock_gen->timer_enable(mc14411_device::TIMER_F11 , baud_sel == 7);
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m_clock_gen->timer_enable(mc14411_device::TIMER_F13 , baud_sel == 8);
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m_clock_gen->timer_enable(mc14411_device::TIMER_F14 , baud_sel == 9);
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m_loopback = m_loopback_en->read() != 0;
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if (!m_loopback && BIT(m_s2_input->read() , 0)) {
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m_uart->write_cts(0);
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}
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int_reset();
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}
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WRITE_LINE_MEMBER(hp98036_io_card_device::bit_rate_clock)
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{
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if (m_half_baud) {
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if (state) {
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m_baud_div = !m_baud_div;
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m_uart->write_txc(m_baud_div);
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m_uart->write_rxc(m_baud_div);
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}
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} else {
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m_uart->write_txc(state);
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m_uart->write_rxc(state);
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}
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}
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WRITE_LINE_MEMBER(hp98036_io_card_device::slow_clock)
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{
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switch (m_init_state) {
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case 0:
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// Reset
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if (state) {
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m_init_state++;
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}
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break;
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case 1:
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// Write mode word
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if (state) {
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m_init_state++;
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} else {
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write_uart(true , uint8_t(m_s1_input->read()));
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}
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break;
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case 2:
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// Write default control word
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if (state) {
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m_init_state++;
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update_flg();
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} else {
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write_uart(true , 0x05);
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}
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break;
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default:
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break;
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}
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}
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WRITE_LINE_MEMBER(hp98036_io_card_device::txd_w)
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{
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if (m_loopback) {
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m_uart->write_rxd(state);
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} else {
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m_rs232->write_txd(state);
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}
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}
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WRITE_LINE_MEMBER(hp98036_io_card_device::dtr_w)
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{
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if (m_loopback) {
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m_uart->write_dsr(state);
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} else {
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m_rs232->write_dtr(state);
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}
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}
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WRITE_LINE_MEMBER(hp98036_io_card_device::rts_w)
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{
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if (m_loopback) {
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m_uart->write_cts(state);
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} else {
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m_rs232->write_rts(state);
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}
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}
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WRITE_LINE_MEMBER(hp98036_io_card_device::txrdy_w)
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{
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if (m_txrdy != state) {
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m_txrdy = state;
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LOG("txrdy %d\n" , m_txrdy);
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uart_wr();
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update_irq();
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update_flg();
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}
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}
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WRITE_LINE_MEMBER(hp98036_io_card_device::rxrdy_w)
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{
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if (m_rxrdy != state) {
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m_rxrdy = state;
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LOG("rxrdy %d\n" , m_rxrdy);
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uart_rd();
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update_irq();
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update_flg();
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}
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}
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WRITE_LINE_MEMBER(hp98036_io_card_device::rxd_w)
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{
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if (!m_loopback) {
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m_uart->write_rxd(state);
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}
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}
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WRITE_LINE_MEMBER(hp98036_io_card_device::dsr_w)
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{
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if (!m_loopback) {
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m_uart->write_dsr(state);
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}
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}
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WRITE_LINE_MEMBER(hp98036_io_card_device::cts_w)
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{
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if (!m_loopback && !BIT(m_s2_input->read() , 0)) {
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m_uart->write_cts(state);
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}
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}
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void hp98036_io_card_device::int_reset()
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{
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m_init_state = 0;
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m_r4in_data = 0;
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m_r4out_data = 0;
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m_wrrq = false;
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m_rdrq = false;
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m_int_en = false;
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m_tx_int_en = false;
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m_rx_int_en = false;
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m_uart_cmd = false;
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m_uart_wr_mode = true;
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m_half_baud = false;
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m_lineout = 0;
|
||||
m_clock_gen->rate_select_w(0);
|
||||
m_flg = true; // Ensure update in update_flg
|
||||
update_flg();
|
||||
m_irq = true; // Ensure update in update_irq
|
||||
update_irq();
|
||||
m_uart->reset();
|
||||
}
|
||||
|
||||
void hp98036_io_card_device::update_flg()
|
||||
{
|
||||
bool new_flg = (m_init_state == 3) && (!m_wrrq || m_tx_int_en) && (!m_rdrq || m_rx_int_en);
|
||||
|
||||
if (m_flg != new_flg) {
|
||||
m_flg = new_flg;
|
||||
LOG("FLG %d\n" , m_flg);
|
||||
flg_w(m_flg);
|
||||
}
|
||||
}
|
||||
|
||||
void hp98036_io_card_device::update_irq()
|
||||
{
|
||||
bool new_irq = m_int_en && ((m_tx_int_en && m_txrdy) || (m_rx_int_en && !m_rdrq));
|
||||
|
||||
if (m_irq != new_irq) {
|
||||
m_irq = new_irq;
|
||||
LOG("IRQ %d\n" , m_irq);
|
||||
irq_w(m_irq);
|
||||
}
|
||||
}
|
||||
|
||||
void hp98036_io_card_device::uart_rd()
|
||||
{
|
||||
if (m_rdrq && (m_rxrdy || m_uart_cmd)) {
|
||||
m_rdrq = false;
|
||||
m_r4in_data = m_uart->read(m_uart_cmd);
|
||||
LOG("uart rd%d=%02x\n" , m_uart_cmd , m_r4in_data);
|
||||
update_flg();
|
||||
}
|
||||
}
|
||||
|
||||
void hp98036_io_card_device::uart_wr()
|
||||
{
|
||||
if (m_wrrq && (m_txrdy || m_uart_cmd)) {
|
||||
m_wrrq = false;
|
||||
write_uart(m_uart_cmd , m_r4out_data);
|
||||
update_flg();
|
||||
}
|
||||
}
|
||||
|
||||
void hp98036_io_card_device::write_uart(bool cmd , uint8_t data)
|
||||
{
|
||||
if (cmd && m_uart_wr_mode) {
|
||||
// Capture bits 1 & 0 of mode word (clock factor) and
|
||||
// adjust rate selection in clock generator
|
||||
// Mode word RSB/RSA Factor
|
||||
// 0 0 0 0 -- INVALID --
|
||||
// 0 1 0 0 x1
|
||||
// 1 0 1 0 x16
|
||||
// 1 1 1 1 x64
|
||||
m_clock_gen->rate_select_w((BIT(data , 1) ? mc14411_device::RSB : 0) | ((BIT(data , 1) && BIT(data , 0)) ? mc14411_device::RSA : 0));
|
||||
LOG("RS %u\n" , data & 3);
|
||||
}
|
||||
if (cmd) {
|
||||
if (BIT(data , 6)) {
|
||||
m_uart_wr_mode = !m_uart_wr_mode;
|
||||
} else {
|
||||
m_uart_wr_mode = false;
|
||||
}
|
||||
}
|
||||
LOG("uart wr%d=%02x\n" , cmd , data);
|
||||
m_uart->write(cmd , data);
|
||||
}
|
||||
96
src/devices/bus/hp9845_io/98036.h
Normal file
96
src/devices/bus/hp9845_io/98036.h
Normal file
@ -0,0 +1,96 @@
|
||||
// license:BSD-3-Clause
|
||||
// copyright-holders: F. Ulivi
|
||||
/*********************************************************************
|
||||
|
||||
98036.h
|
||||
|
||||
98036 module (RS232 interface)
|
||||
|
||||
*********************************************************************/
|
||||
|
||||
#ifndef MAME_BUS_HP9845_IO_98036_H
|
||||
#define MAME_BUS_HP9845_IO_98036_H
|
||||
|
||||
#pragma once
|
||||
|
||||
#include "hp9845_io.h"
|
||||
#include "machine/i8251.h"
|
||||
#include "machine/mc14411.h"
|
||||
#include "bus/rs232/rs232.h"
|
||||
|
||||
class hp98036_io_card_device : public device_t, public device_hp9845_io_interface
|
||||
{
|
||||
public:
|
||||
// construction/destruction
|
||||
hp98036_io_card_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
|
||||
virtual ~hp98036_io_card_device();
|
||||
|
||||
virtual uint16_t reg_r(address_space &space, offs_t offset) override;
|
||||
virtual void reg_w(address_space &space, offs_t offset, uint16_t data) override;
|
||||
|
||||
protected:
|
||||
// device-level overrides
|
||||
virtual void device_add_mconfig(machine_config &config) override;
|
||||
virtual ioport_constructor device_input_ports() const override;
|
||||
virtual void device_start() override;
|
||||
virtual void device_reset() override;
|
||||
|
||||
private:
|
||||
required_device<i8251_device> m_uart;
|
||||
required_device<mc14411_device> m_clock_gen;
|
||||
required_device<rs232_port_device> m_rs232;
|
||||
required_ioport m_s1_input;
|
||||
required_ioport m_s2_input;
|
||||
required_ioport m_s3_input;
|
||||
required_ioport m_jumper_input;
|
||||
required_ioport m_loopback_en;
|
||||
|
||||
DECLARE_WRITE_LINE_MEMBER(bit_rate_clock);
|
||||
DECLARE_WRITE_LINE_MEMBER(slow_clock);
|
||||
DECLARE_WRITE_LINE_MEMBER(txd_w);
|
||||
DECLARE_WRITE_LINE_MEMBER(dtr_w);
|
||||
DECLARE_WRITE_LINE_MEMBER(rts_w);
|
||||
DECLARE_WRITE_LINE_MEMBER(txrdy_w);
|
||||
DECLARE_WRITE_LINE_MEMBER(rxrdy_w);
|
||||
DECLARE_WRITE_LINE_MEMBER(rxd_w);
|
||||
DECLARE_WRITE_LINE_MEMBER(dsr_w);
|
||||
DECLARE_WRITE_LINE_MEMBER(cts_w);
|
||||
|
||||
// State of initialization FSM
|
||||
// State U11A-Q U11B-Q
|
||||
// 0 0 0
|
||||
// 1 1 0 Load mode word
|
||||
// 2 1 1 Load control word
|
||||
// 3 0 1 Done
|
||||
uint8_t m_init_state;
|
||||
bool m_irq; // U9-2
|
||||
bool m_int_en; // U10-2
|
||||
bool m_tx_int_en; // U10-10
|
||||
bool m_rx_int_en; // U10-7
|
||||
bool m_txrdy; // U31-15
|
||||
bool m_rxrdy; // U31-14
|
||||
bool m_wrrq; // U19-13
|
||||
bool m_rdrq; // U19-7
|
||||
bool m_uart_cmd; // U10-15
|
||||
bool m_uart_wr_mode;// U17-15
|
||||
bool m_flg; // U9-10
|
||||
bool m_half_baud; // U21-13
|
||||
bool m_baud_div; // U21-1
|
||||
bool m_r4_dir; // U19-4
|
||||
bool m_loopback;
|
||||
uint8_t m_r4in_data; // U29, U30
|
||||
uint8_t m_r4out_data; // U26, U27
|
||||
uint8_t m_lineout; // U28
|
||||
|
||||
void int_reset();
|
||||
void update_flg();
|
||||
void update_irq();
|
||||
void uart_rd();
|
||||
void uart_wr();
|
||||
void write_uart(bool cmd , uint8_t data);
|
||||
};
|
||||
|
||||
// device type definitions
|
||||
DECLARE_DEVICE_TYPE(HP98036_IO_CARD, hp98036_io_card_device)
|
||||
|
||||
#endif // MAME_BUS_HP9845_IO_98036_H
|
||||
@ -12,6 +12,7 @@
|
||||
#include "hp9845_io.h"
|
||||
#include "98032.h"
|
||||
#include "98035.h"
|
||||
#include "98036.h"
|
||||
#include "98034.h"
|
||||
#include "98046.h"
|
||||
|
||||
@ -36,6 +37,7 @@ hp9845_io_slot_device::hp9845_io_slot_device(const machine_config &mconfig, cons
|
||||
option_add("98032_gpio" , HP98032_IO_CARD);
|
||||
option_add("98034_hpib" , HP98034_IO_CARD);
|
||||
option_add("98035_rtc" , HP98035_IO_CARD);
|
||||
option_add("98036" , HP98036_IO_CARD);
|
||||
option_add("98046" , HP98046_IO_CARD);
|
||||
set_default_option(nullptr);
|
||||
set_fixed(false);
|
||||
|
||||
Loading…
Reference in New Issue
Block a user