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https://github.com/holub/mame
synced 2025-05-17 19:24:59 +03:00
Last time I've checked FDC ports aren't really used to write debug strings ...
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@ -4,9 +4,6 @@
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/***************************************************************************
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/***************************************************************************
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Notes:
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Notes:
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- You should soft reset at first boot, this is because there's an
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uninitialized read at 0x40010e10 that is written to after it (presumably
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the port that follows actually trips the reset line)
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- Say hi to 0x9fe80-0x9feff debug strings, that clearly states the current
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- Say hi to 0x9fe80-0x9feff debug strings, that clearly states the current
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flash state
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flash state
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@ -127,8 +124,24 @@ public:
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DECLARE_WRITE8_MEMBER( flash_data_w );
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DECLARE_WRITE8_MEMBER( flash_data_w );
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// DECLARE_WRITE8_MEMBER( bios_ram_w );
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// DECLARE_WRITE8_MEMBER( bios_ram_w );
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DECLARE_READ8_MEMBER( fdc_r );
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DECLARE_WRITE8_MEMBER( fdc_w );
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virtual void video_start();
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virtual bool screen_update(screen_device &screen, bitmap_t &bitmap, const rectangle &cliprect);
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};
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};
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void funkball_state::video_start()
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{
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}
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bool funkball_state::screen_update( screen_device &screen, bitmap_t &bitmap, const rectangle &cliprect )
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{
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return 0;
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}
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static UINT32 cx5510_pci_r(device_t *busdevice, device_t *device, int function, int reg, UINT32 mem_mask)
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static UINT32 cx5510_pci_r(device_t *busdevice, device_t *device, int function, int reg, UINT32 mem_mask)
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{
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{
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funkball_state *state = busdevice->machine().driver_data<funkball_state>();
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funkball_state *state = busdevice->machine().driver_data<funkball_state>();
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@ -150,6 +163,7 @@ static void cx5510_pci_w(device_t *busdevice, device_t *device, int function, in
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COMBINE_DATA(state->m_cx5510_regs + (reg/4));
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COMBINE_DATA(state->m_cx5510_regs + (reg/4));
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}
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}
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#if 0
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static READ32_DEVICE_HANDLER( ide_r )
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static READ32_DEVICE_HANDLER( ide_r )
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{
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{
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return ide_controller32_r(device, 0x1f0/4 + offset, mem_mask);
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return ide_controller32_r(device, 0x1f0/4 + offset, mem_mask);
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@ -170,6 +184,28 @@ static WRITE32_DEVICE_HANDLER( fdc_w )
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//mame_printf_debug("FDC: write %08X, %08X, %08X\n", data, offset, mem_mask);
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//mame_printf_debug("FDC: write %08X, %08X, %08X\n", data, offset, mem_mask);
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ide_controller32_w(device, 0x3f0/4 + offset, data, mem_mask);
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ide_controller32_w(device, 0x3f0/4 + offset, data, mem_mask);
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}
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}
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#endif
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READ8_MEMBER( funkball_state::fdc_r )
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{
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//printf("%02x\n",offset);
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if(offset == 0xd)
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return 0x20;
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return 0;
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}
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WRITE8_MEMBER( funkball_state::fdc_w )
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{
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if(offset == 8)
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{
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if(data == 0x0d)
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printf("\n");
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else
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printf("%c",data);
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}
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}
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static READ8_HANDLER(at_page8_r)
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static READ8_HANDLER(at_page8_r)
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{
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{
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@ -378,7 +414,7 @@ WRITE8_MEMBER( funkball_state::flash_w )
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0x81: init device
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0x81: init device
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*/
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*/
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m_flash_cmd = data;
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m_flash_cmd = data;
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//printf("%02x CMD\n",data);
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printf("%02x CMD\n",data);
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}
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}
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else
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else
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printf("%02x %02x\n",offset,data);
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printf("%02x %02x\n",offset,data);
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@ -388,18 +424,21 @@ READ8_MEMBER( funkball_state::flash_data_r )
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{
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{
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if(m_flash_data_cmd == 0x90)
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if(m_flash_data_cmd == 0x90)
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{
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{
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if(offset == 0)
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if(offset == 0 && (m_flash_addr == 0))
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return 0x89;
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return 0x89; // manufacturer code
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if(offset == 2)
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if(offset == 2 && (m_flash_addr == 0))
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return (m_flash_cmd & 0x80) ? 0x15 : 0x14; // recognize
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return 0x14; // device code, 32 MBit in both cases
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if(offset > 3)
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printf("%02x FLASH DATA 0x90\n",offset);
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return 0;
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return 0;
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}
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}
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if(m_flash_data_cmd == 0xff)
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if(m_flash_data_cmd == 0xff)
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{
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{
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UINT8 *ROM = machine().region(m_flash_cmd & 0x80 ? "flash1" : "flash2")->base();
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UINT8 *ROM = machine().region(m_flash_cmd & 0x80 ? "prg_flash" : "data_flash")->base();
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return ROM[offset + (m_flash_addr << 16)];
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return ROM[offset + (m_flash_addr << 16)];
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}
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}
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@ -477,7 +516,8 @@ static ADDRESS_MAP_START(funkball_map, AS_PROGRAM, 32, funkball_state)
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AM_RANGE(0x000f8000, 0x000fbfff) AM_ROMBANK("bios_bank3")
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AM_RANGE(0x000f8000, 0x000fbfff) AM_ROMBANK("bios_bank3")
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AM_RANGE(0x000fc000, 0x000fffff) AM_ROMBANK("bios_bank4")
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AM_RANGE(0x000fc000, 0x000fffff) AM_ROMBANK("bios_bank4")
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AM_RANGE(0x000e0000, 0x000fffff) AM_WRITE8_LEGACY(bios_ram_w,0xffffffff)
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AM_RANGE(0x000e0000, 0x000fffff) AM_WRITE8_LEGACY(bios_ram_w,0xffffffff)
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AM_RANGE(0x00100000, 0x01ffffff) AM_RAM
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AM_RANGE(0x00100000, 0x07ffffff) AM_RAM
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AM_RANGE(0x08000000, 0x0fffffff) AM_NOP
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AM_RANGE(0x40008000, 0x400080ff) AM_READWRITE_LEGACY(biu_ctrl_r, biu_ctrl_w)
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AM_RANGE(0x40008000, 0x400080ff) AM_READWRITE_LEGACY(biu_ctrl_r, biu_ctrl_w)
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AM_RANGE(0x40010e00, 0x40010eff) AM_RAM AM_BASE(m_unk_ram)
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AM_RANGE(0x40010e00, 0x40010eff) AM_RAM AM_BASE(m_unk_ram)
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AM_RANGE(0xfffe0000, 0xffffffff) AM_ROM AM_REGION("bios", 0) /* System BIOS */
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AM_RANGE(0xfffe0000, 0xffffffff) AM_ROM AM_REGION("bios", 0) /* System BIOS */
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@ -494,8 +534,9 @@ static ADDRESS_MAP_START(funkball_io, AS_IO, 32, funkball_state)
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AM_RANGE(0x00c0, 0x00df) AM_DEVREADWRITE_LEGACY("dma8237_2", at32_dma8237_2_r, at32_dma8237_2_w)
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AM_RANGE(0x00c0, 0x00df) AM_DEVREADWRITE_LEGACY("dma8237_2", at32_dma8237_2_r, at32_dma8237_2_w)
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AM_RANGE(0x00e8, 0x00ef) AM_NOP
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AM_RANGE(0x00e8, 0x00ef) AM_NOP
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AM_RANGE(0x01f0, 0x01f7) AM_DEVREADWRITE_LEGACY("ide", ide_r, ide_w)
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// AM_RANGE(0x01f0, 0x01f7) AM_DEVREADWRITE_LEGACY("ide", ide_r, ide_w)
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AM_RANGE(0x03f0, 0x03ff) AM_DEVREADWRITE_LEGACY("ide", fdc_r, fdc_w)
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// AM_RANGE(0x03f0, 0x03ff) AM_DEVREADWRITE_LEGACY("ide", fdc_r, fdc_w)
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AM_RANGE(0x03f0, 0x03ff) AM_READWRITE8(fdc_r,fdc_w,0xffffffff)
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AM_RANGE(0x0cf8, 0x0cff) AM_DEVREADWRITE_LEGACY("pcibus", pci_32le_r, pci_32le_w)
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AM_RANGE(0x0cf8, 0x0cff) AM_DEVREADWRITE_LEGACY("pcibus", pci_32le_r, pci_32le_w)
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@ -505,6 +546,9 @@ static ADDRESS_MAP_START(funkball_io, AS_IO, 32, funkball_state)
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// AM_RANGE(0x036c, 0x036f) AM_READ(test_r)
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// AM_RANGE(0x036c, 0x036f) AM_READ(test_r)
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ADDRESS_MAP_END
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ADDRESS_MAP_END
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static INPUT_PORTS_START( funkball )
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INPUT_PORTS_END
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static const struct pit8253_config funkball_pit8254_config =
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static const struct pit8253_config funkball_pit8254_config =
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{
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{
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{
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{
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@ -625,7 +669,7 @@ static MACHINE_RESET( funkball )
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}
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}
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static MACHINE_CONFIG_START( funkball, funkball_state )
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static MACHINE_CONFIG_START( funkball, funkball_state )
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MCFG_CPU_ADD("maincpu", MEDIAGX, 66666666*3.5)
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MCFG_CPU_ADD("maincpu", MEDIAGX, 66666666*3.5/16) // 66,6 MHz x 3.5
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MCFG_CPU_PROGRAM_MAP(funkball_map)
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MCFG_CPU_PROGRAM_MAP(funkball_map)
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MCFG_CPU_IO_MAP(funkball_io)
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MCFG_CPU_IO_MAP(funkball_io)
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@ -646,20 +690,24 @@ static MACHINE_CONFIG_START( funkball, funkball_state )
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MCFG_IDE_CONTROLLER_ADD("ide", ide_interrupt)
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MCFG_IDE_CONTROLLER_ADD("ide", ide_interrupt)
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/* video hardware */
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/* video hardware */
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// ...
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MCFG_SCREEN_ADD("screen", RASTER)
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MCFG_SCREEN_REFRESH_RATE(60)
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MCFG_SCREEN_FORMAT(BITMAP_FORMAT_RGB32)
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MCFG_SCREEN_SIZE(640, 480)
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MCFG_SCREEN_VISIBLE_AREA(0, 639, 0, 239)
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MACHINE_CONFIG_END
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MACHINE_CONFIG_END
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ROM_START( funkball )
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ROM_START( funkball )
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ROM_REGION32_LE(0x20000, "bios", ROMREGION_ERASEFF)
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ROM_REGION32_LE(0x20000, "bios", ROMREGION_ERASEFF)
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ROM_LOAD( "512k-epr.u62", 0x010000, 0x010000, CRC(cced894a) SHA1(298c81716e375da4b7215f3e588a45ca3ea7e35c) )
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ROM_LOAD( "512k-epr.u62", 0x010000, 0x010000, CRC(cced894a) SHA1(298c81716e375da4b7215f3e588a45ca3ea7e35c) )
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ROM_REGION(0x800000, "flash1", 0)
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ROM_REGION(0x8000000, "prg_flash", ROMREGION_ERASE00)
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ROM_LOAD( "flash.u29", 0x000000, 0x400000, CRC(7cf6ff4b) SHA1(4ccdd4864ad92cc218998f3923997119a1a9dd1d) )
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ROM_LOAD( "flash.u3", 0x0000000, 0x400000, CRC(fb376abc) SHA1(ea4c48bb6cd2055431a33f5c426e52c7af6997eb) )
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ROM_LOAD( "flash.u30", 0x400000, 0x400000, CRC(1d46717a) SHA1(acfbd0a2ccf4d717779733c4a9c639296c3bbe0e) )
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ROM_REGION(0x400000, "flash2", 0)
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ROM_REGION(0x8000000, "data_flash", ROMREGION_ERASE00)
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ROM_LOAD( "flash.u3", 0x000000, 0x400000, CRC(fb376abc) SHA1(ea4c48bb6cd2055431a33f5c426e52c7af6997eb) )
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ROM_LOAD( "flash.u29",0x0000000, 0x400000, CRC(7cf6ff4b) SHA1(4ccdd4864ad92cc218998f3923997119a1a9dd1d) )
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ROM_LOAD( "flash.u30",0x0400000, 0x400000, CRC(1d46717a) SHA1(acfbd0a2ccf4d717779733c4a9c639296c3bbe0e) )
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ROM_END
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ROM_END
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GAME(1998, funkball, 0, funkball, at_keyboard, 0, ROT0, "dgPIX Entertainment Inc.", "Funky Ball", GAME_IS_SKELETON)
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GAME(1998, funkball, 0, funkball, funkball, 0, ROT0, "dgPIX Entertainment Inc.", "Funky Ball", GAME_IS_SKELETON)
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