mirror of
https://github.com/holub/mame
synced 2025-04-22 16:31:49 +03:00
ncd68k: wip checkpoint (nw)
* ncd16 and ncd19 keyboards are working using perfect quantum hack * ncd19 resolution fix * serial ports mostly working
This commit is contained in:
Patrick Mackinlay
parent
6739376933
commit
20a230b759
@ -44,11 +44,13 @@
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* - ncd17c nvram timeout or checksum failure
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* - NCD19 boots, tries to contact network (timeout)
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*
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* DUART IP2 is set when the 68k mailbox is full (inverse of mcu A5), probably
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* both of these are tied to a latch with a flip-flop
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*
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* TODO
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* - tidy latches
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* - fix keyboard
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* - sound
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* - serial control lines
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* - refactor
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*/
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#include "emu.h"
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@ -71,6 +73,12 @@
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// video and audio
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#include "screen.h"
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#define LOG_GENERAL (1U << 0)
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#define LOG_MCU (1U << 1)
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//#define VERBOSE (LOG_GENERAL|LOG_MCU)
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#include "logmacro.h"
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class ncd_68k_state : public driver_device
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{
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public:
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@ -116,12 +124,10 @@ private:
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DECLARE_READ16_MEMBER(lance16_dma_r);
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DECLARE_WRITE16_MEMBER(lance16_dma_w);
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DECLARE_WRITE32_MEMBER(bt478_palette_w);
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DECLARE_READ32_MEMBER(from_mcu_r);
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DECLARE_WRITE32_MEMBER(to_mcu_w);
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DECLARE_READ16_MEMBER(from_mcu16_r);
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DECLARE_WRITE16_MEMBER(to_mcu16_w);
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DECLARE_READ32_MEMBER(mcu_status_r);
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DECLARE_WRITE32_MEMBER(irq_w);
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u8 mcu_r();
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void mcu_w(u8 data);
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u8 mcu_status_r();
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void irq_w(u8 data);
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u8 mcu_porta_r();
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u8 mcu_portb_r();
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@ -207,7 +213,7 @@ u32 ncd_68k_state::screen_update_19(screen_device &screen, bitmap_rgb32 &bitmap,
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for (int y = 0; y < 1024; y++)
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{
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u32 *scanline = &bitmap.pix32(y);
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for (int x = 0; x < 1024/8; x++)
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for (int x = 0; x < 1280/8; x++)
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{
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u8 const pixels = vram[(y * (2048/8)) + (BYTE4_XOR_BE(x))];
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@ -222,20 +228,23 @@ u32 ncd_68k_state::screen_update_19(screen_device &screen, bitmap_rgb32 &bitmap,
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void ncd_68k_state::ncd_16_map(address_map &map)
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{
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map(0x000000, 0x0bffff).rom().region("maincpu", 0);
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map(0x0c0000, 0x0c0001).rw(FUNC(ncd_68k_state::from_mcu16_r), FUNC(ncd_68k_state::to_mcu16_w));
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map(0x0c0000, 0x0c0001).rw(FUNC(ncd_68k_state::mcu_r), FUNC(ncd_68k_state::mcu_w)).umask16(0x00ff);
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map(0x0e0000, 0x0e003f).rw(m_duart, FUNC(scn2681_device::read), FUNC(scn2681_device::write)).umask16(0xff00);
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map(0x100000, 0x100003).rw(m_lance, FUNC(am79c90_device::regs_r), FUNC(am79c90_device::regs_w));
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map(0x200000, 0x21ffff).ram().share("vram16");
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map(0x380000, 0x5fffff).ram().share("mainram16");
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//map(0xa00000, 0xa002ff).ram(); // QLC?
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//map(0xbf0000, 0xbf000f).ram(); // BERT?
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}
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void ncd_68k_state::ncd_17c_map(address_map &map)
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{
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map(0x00000000, 0x000bffff).rom().region("maincpu", 0);
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map(0x001c0000, 0x001c0003).rw(FUNC(ncd_68k_state::from_mcu_r), FUNC(ncd_68k_state::to_mcu_w));
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map(0x001c0000, 0x001c0003).rw(FUNC(ncd_68k_state::mcu_r), FUNC(ncd_68k_state::mcu_w)).umask32(0xff000000);
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map(0x001c8000, 0x001c803f).rw(m_duart, FUNC(scn2681_device::read), FUNC(scn2681_device::write)).umask32(0xff000000);
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map(0x001d0000, 0x001d0003).w(FUNC(ncd_68k_state::bt478_palette_w));
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map(0x001d8000, 0x001d8003).rw(FUNC(ncd_68k_state::mcu_status_r), FUNC(ncd_68k_state::irq_w));
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map(0x001d8000, 0x001d8003).rw(FUNC(ncd_68k_state::mcu_status_r), FUNC(ncd_68k_state::irq_w)).umask32(0xff000000);
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map(0x00200000, 0x00200003).rw(m_lance, FUNC(am79c90_device::regs_r), FUNC(am79c90_device::regs_w)).umask32(0xffffffff);
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map(0x01000000, 0x02ffffff).ram();
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map(0x03000000, 0x03ffffff).ram().share("mainram");
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@ -244,15 +253,14 @@ void ncd_68k_state::ncd_17c_map(address_map &map)
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void ncd_68k_state::ncd_19_map(address_map &map)
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{
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map(0x00000000, 0x0000ffff).rom().region("maincpu", 0);
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map(0x001c0000, 0x001c0003).rw(FUNC(ncd_68k_state::from_mcu_r), FUNC(ncd_68k_state::to_mcu_w));
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map(0x001d8000, 0x001d8003).rw(FUNC(ncd_68k_state::mcu_status_r), FUNC(ncd_68k_state::irq_w));
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map(0x001c0000, 0x001c0003).rw(FUNC(ncd_68k_state::mcu_r), FUNC(ncd_68k_state::mcu_w)).umask32(0xff000000);
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map(0x001d8000, 0x001d8003).rw(FUNC(ncd_68k_state::mcu_status_r), FUNC(ncd_68k_state::irq_w)).umask32(0xff000000);
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map(0x001e0000, 0x001e003f).rw(m_duart, FUNC(scn2681_device::read), FUNC(scn2681_device::write)).umask32(0xff000000);
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map(0x00200000, 0x00200003).rw(m_lance, FUNC(am79c90_device::regs_r), FUNC(am79c90_device::regs_w)).umask32(0xffffffff);
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map(0x00400000, 0x0043ffff).ram().share("vram");
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map(0x00800000, 0x00ffffff).ram().share("mainram");
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}
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u8 ncd_68k_state::mcu_porta_r()
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{
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return m_porta_in;
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@ -265,6 +273,7 @@ u8 ncd_68k_state::mcu_portb_r()
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{
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// FIXME: ncd19 requires this, but ncd17c fails with an nvram timeout
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m_porta_in |= 0x20;
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m_duart->ip2_w(0);
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return m_from_68k;
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}
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@ -274,12 +283,11 @@ u8 ncd_68k_state::mcu_portb_r()
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void ncd_68k_state::mcu_porta_w(u8 data)
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{
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//if (data != m_porta) printf("%02x to port A\n", data);
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if ((data & 0x40) && !(m_porta_out & 0x40))
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{
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//logerror("Sending %02x to 68k\n", m_portb_out);
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m_to_68k = m_portb_out;
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m_porta_in |= 0x80;
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m_maincpu->set_input_line(M68K_IRQ_2, ASSERT_LINE);
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}
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@ -299,6 +307,8 @@ void ncd_68k_state::mcu_portb_w(u8 data)
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m_eeprom->di_write(BIT(data, 1));
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}
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// TODO: what is bit 7 used as an output for?
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m_portb_out = data;
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}
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@ -307,54 +317,48 @@ void ncd_68k_state::mcu_portc_w(u8 data)
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m_portc = data;
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}
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READ32_MEMBER(ncd_68k_state::from_mcu_r)
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u8 ncd_68k_state::mcu_r()
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{
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//printf("020 read %02x\n", m_to020);
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LOGMASKED(LOG_MCU, "mcu_r 0x%02x\n", m_to_68k);
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m_porta_in &= ~0x80;
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m_maincpu->set_input_line(M68K_IRQ_2, CLEAR_LINE);
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return m_to_68k << 24;
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}
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WRITE32_MEMBER(ncd_68k_state::to_mcu_w)
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{
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//printf("Sending %02x to MCU\n", data);
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m_from_68k = data>>24;
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m_porta_in &= ~0x20;
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}
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READ16_MEMBER(ncd_68k_state::from_mcu16_r)
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{
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//printf("68k read %02x\n", m_to020);
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m_porta_in &= ~0x80;
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m_maincpu->set_input_line(M68K_IRQ_2, CLEAR_LINE);
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return m_to_68k;
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}
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WRITE16_MEMBER(ncd_68k_state::to_mcu16_w)
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void ncd_68k_state::mcu_w(u8 data)
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{
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//printf("Sending %02x to MCU\n", data);
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m_from_68k = data & 0xff;
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LOGMASKED(LOG_MCU, "mcu_w 0x%02x (%s)\n", data, machine().describe_context());
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m_from_68k = data;
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m_porta_in &= ~0x20;
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m_duart->ip2_w(1);
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}
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READ32_MEMBER(ncd_68k_state::mcu_status_r)
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u8 ncd_68k_state::mcu_status_r()
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{
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u32 rv = 0;
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u8 rv = 0;
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if (!(m_porta_in & 0x20))
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{
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rv |= 0x01000000;
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rv |= 0x01;
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}
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if (m_porta_in & 0x80)
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{
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rv |= 0x02000000;
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rv |= 0x02;
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}
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LOGMASKED(LOG_MCU, "mcu_status_r 0x%02x\n", rv);
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return rv;
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}
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WRITE32_MEMBER(ncd_68k_state::irq_w)
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void ncd_68k_state::irq_w(u8 data)
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{
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m_maincpu->set_input_line(M68K_IRQ_1, BIT(data, 31));
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LOGMASKED(LOG_MCU, "irq_w %d (%s)\n", data, machine().describe_context());
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m_maincpu->set_input_line(M68K_IRQ_1, BIT(data, 7));
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}
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READ16_MEMBER(ncd_68k_state::lance16_dma_r)
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@ -554,6 +558,9 @@ void ncd_68k_state::ncd_19(machine_config &config)
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void ncd_68k_state::common(machine_config &config)
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{
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// HACK: this makes the ncd16 and ncd19 keyboard work
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config.m_perfect_cpu_quantum = subtag("mcu");
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// mcu ports
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m_mcu->porta_w().set(FUNC(ncd_68k_state::mcu_porta_w));
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m_mcu->portb_w().set(FUNC(ncd_68k_state::mcu_portb_w));
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@ -578,7 +585,7 @@ void ncd_68k_state::common(machine_config &config)
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pc_kbdc_slot_device &kbd(PC_KBDC_SLOT(config, "kbd", pc_at_keyboards, STR_KBD_MICROSOFT_NATURAL));
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kbd.set_pc_kbdc_slot(m_kbd_con);
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// mouse port
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// mouse and auxiliary ports
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RS232_PORT(config, m_serial[0],
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[this](device_slot_interface &device)
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{
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@ -586,13 +593,36 @@ void ncd_68k_state::common(machine_config &config)
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device.option_add("mouse", LOGITECH_HLE_SERIAL_MOUSE);
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},
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"mouse");
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m_serial[0]->rxd_handler().set(m_duart, FUNC(scn2681_device::rx_a_w));
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m_duart->a_tx_cb().set(m_serial[0], FUNC(rs232_port_device::write_txd));
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// auxiliary port
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RS232_PORT(config, m_serial[1], default_rs232_devices, nullptr);
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m_serial[1]->rxd_handler().set(m_duart, FUNC(scn2681_device::rx_b_w));
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// duart outputs
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m_duart->a_tx_cb().set(m_serial[0], FUNC(rs232_port_device::write_txd));
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m_duart->b_tx_cb().set(m_serial[1], FUNC(rs232_port_device::write_txd));
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m_duart->outport_cb().set(
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[this](u8 data)
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{
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m_serial[0]->write_rts(BIT(data, 0));
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m_serial[1]->write_rts(BIT(data, 1));
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m_serial[0]->write_dtr(BIT(data, 2));
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m_serial[1]->write_dtr(BIT(data, 3));
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// TODO: bit 4 - usually set
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// TODO: bit 5 - usually clear
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// TODO: bit 6 - usually set
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// TODO: bit 7 - set/cleared continuously
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});
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// duart inputs
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// FIXME: rts/dsr external loopback test fails - dsr might not be correct?
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m_serial[0]->rxd_handler().set(m_duart, FUNC(scn2681_device::rx_a_w));
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m_serial[0]->cts_handler().set(m_duart, FUNC(scn2681_device::ip0_w));
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m_serial[0]->dsr_handler().set(m_duart, FUNC(scn2681_device::ip3_w));
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m_serial[0]->dcd_handler().set(m_duart, FUNC(scn2681_device::ip4_w));
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m_serial[1]->rxd_handler().set(m_duart, FUNC(scn2681_device::rx_b_w));
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m_serial[1]->cts_handler().set(m_duart, FUNC(scn2681_device::ip1_w));
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m_serial[1]->dsr_handler().set(m_duart, FUNC(scn2681_device::ip5_w));
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m_serial[1]->dcd_handler().set(m_duart, FUNC(scn2681_device::ip6_w));
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// eeprom
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EEPROM_93C46_16BIT(config, m_eeprom);
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