Cleanups and version bump.

src/emu/cpu/arm7/arm7.c

@@ -737,7 +737,7 @@ static WRITE32_DEVICE_HANDLER( arm7_rt_w_callback )
 	    	fatalerror("ARM7: Unhandled coprocessor %d\n", cpnum);
 	    }
     }
-    
+
     switch( cReg )
     {
         case 0:

src/emu/cpu/m68000/m68kcpu.c

@@ -541,13 +541,13 @@ static CPU_EXECUTE( m68k )
 	m68ki_cpu_core *m68k = get_safe_token(device);
 
 	m68k->initial_cycles = cycles;
-	
+
 	/* eat up any reset cycles */
 	if (m68k->reset_cycles) {
 		int rc = m68k->reset_cycles;
 		m68k->reset_cycles = 0;
 		cycles -= rc;
-		
+
 		if (cycles <= 0) return rc;
 	}
 

src/mame/audio/irem.c

@@ -265,7 +265,7 @@ static const msm5205_interface irem_msm5205_interface_2 =
 #define M52_R14		RES_K(10)
 #define M52_R15		RES_K(2.2)	/* schematics RES_K(22) , althought 10-Yard states 2.2 */
 #define M52_R19		RES_K(10)
-#define M52_R22		RES_K(47)	
+#define M52_R22		RES_K(47)
 #define M52_R23		RES_K(2.2)
 #define M52_R25		RES_K(10)
 #define M52_VR1		RES_K(50)

src/mame/drivers/39in1.c

@@ -336,7 +336,7 @@ static READ32_HANDLER( pxa255_dma_r )
 			verboselog( space->machine, 4, "pxa255_dma_r: DMA Channel Control/Status Register %d: %08x & %08x\n", offset, dma_regs.dcsr[offset], mem_mask );
 			return dma_regs.dcsr[offset];
 		case PXA255_DINT:
-//			verboselog( space->machine, 3, "pxa255_dma_r: DMA Interrupt Register: %08x & %08x\n", dma_regs.dint, mem_mask );
+//          verboselog( space->machine, 3, "pxa255_dma_r: DMA Interrupt Register: %08x & %08x\n", dma_regs.dint, mem_mask );
 			return dma_regs.dint;
 		case PXA255_DRCMR0:		case PXA255_DRCMR1:		case PXA255_DRCMR2:		case PXA255_DRCMR3:
 		case PXA255_DRCMR4:		case PXA255_DRCMR5:		case PXA255_DRCMR6:		case PXA255_DRCMR7:
@@ -389,7 +389,7 @@ static WRITE32_HANDLER( pxa255_dma_w )
 		case PXA255_DCSR4:		case PXA255_DCSR5:		case PXA255_DCSR6:		case PXA255_DCSR7:
 		case PXA255_DCSR8:		case PXA255_DCSR9:		case PXA255_DCSR10:		case PXA255_DCSR11:
 		case PXA255_DCSR12:		case PXA255_DCSR13:		case PXA255_DCSR14:		case PXA255_DCSR15:
-//			verboselog( space->machine, 3, "pxa255_dma_w: DMA Channel Control/Status Register %d: %08x & %08x\n", offset, data, mem_mask );
+//          verboselog( space->machine, 3, "pxa255_dma_w: DMA Channel Control/Status Register %d: %08x & %08x\n", offset, data, mem_mask );
 			dma_regs.dcsr[offset] &= ~(data & 0x00000007);
 			dma_regs.dcsr[offset] &= ~0x60000000;
 			dma_regs.dcsr[offset] |= data & 0x60000000;
@@ -480,7 +480,7 @@ static void pxa255_ostimer_irq_check(running_machine* machine)
 
 static TIMER_CALLBACK( pxa255_ostimer_match )
 {
-//	verboselog(machine, 3, "pxa255_ostimer_match channel %d\n", param);
+//  verboselog(machine, 3, "pxa255_ostimer_match channel %d\n", param);
 	ostimer_regs.ossr |= (1 << param);
 	ostimer_regs.oscr = ostimer_regs.osmr[param];
 	pxa255_ostimer_irq_check(machine);
@@ -491,33 +491,33 @@ static READ32_HANDLER( pxa255_ostimer_r )
 	switch(PXA255_OSTMR_BASE_ADDR | (offset << 2))
 	{
 		case PXA255_OSMR0:
-//			verboselog( space->machine, 3, "pxa255_ostimer_r: OS Timer Match Register 0: %08x & %08x\n", ostimer_regs.osmr[0], mem_mask );
+//          verboselog( space->machine, 3, "pxa255_ostimer_r: OS Timer Match Register 0: %08x & %08x\n", ostimer_regs.osmr[0], mem_mask );
 			return ostimer_regs.osmr[0];
 		case PXA255_OSMR1:
-//			verboselog( space->machine, 3, "pxa255_ostimer_r: OS Timer Match Register 1: %08x & %08x\n", ostimer_regs.osmr[1], mem_mask );
+//          verboselog( space->machine, 3, "pxa255_ostimer_r: OS Timer Match Register 1: %08x & %08x\n", ostimer_regs.osmr[1], mem_mask );
 			return ostimer_regs.osmr[1];
 		case PXA255_OSMR2:
-//			verboselog( space->machine, 3, "pxa255_ostimer_r: OS Timer Match Register 2: %08x & %08x\n", ostimer_regs.osmr[2], mem_mask );
+//          verboselog( space->machine, 3, "pxa255_ostimer_r: OS Timer Match Register 2: %08x & %08x\n", ostimer_regs.osmr[2], mem_mask );
 			return ostimer_regs.osmr[2];
 		case PXA255_OSMR3:
-//			verboselog( space->machine, 3, "pxa255_ostimer_r: OS Timer Match Register 3: %08x & %08x\n", ostimer_regs.osmr[3], mem_mask );
+//          verboselog( space->machine, 3, "pxa255_ostimer_r: OS Timer Match Register 3: %08x & %08x\n", ostimer_regs.osmr[3], mem_mask );
 			return ostimer_regs.osmr[3];
 		case PXA255_OSCR:
-//			verboselog( space->machine, 4, "pxa255_ostimer_r: OS Timer Count Register: %08x & %08x\n", ostimer_regs.oscr, mem_mask );
+//          verboselog( space->machine, 4, "pxa255_ostimer_r: OS Timer Count Register: %08x & %08x\n", ostimer_regs.oscr, mem_mask );
 			// free-running 3.something MHz counter.  this is a complete hack.
 			ostimer_regs.oscr += 0x300;
 			return ostimer_regs.oscr;
 		case PXA255_OSSR:
-//			verboselog( space->machine, 3, "pxa255_ostimer_r: OS Timer Status Register: %08x & %08x\n", ostimer_regs.ossr, mem_mask );
+//          verboselog( space->machine, 3, "pxa255_ostimer_r: OS Timer Status Register: %08x & %08x\n", ostimer_regs.ossr, mem_mask );
 			return ostimer_regs.ossr;
 		case PXA255_OWER:
-//			verboselog( space->machine, 3, "pxa255_ostimer_r: OS Timer Watchdog Match Enable Register: %08x & %08x\n", ostimer_regs.ower, mem_mask );
+//          verboselog( space->machine, 3, "pxa255_ostimer_r: OS Timer Watchdog Match Enable Register: %08x & %08x\n", ostimer_regs.ower, mem_mask );
 			return ostimer_regs.ower;
 		case PXA255_OIER:
-//			verboselog( space->machine, 3, "pxa255_ostimer_r: OS Timer Interrupt Enable Register: %08x & %08x\n", ostimer_regs.oier, mem_mask );
+//          verboselog( space->machine, 3, "pxa255_ostimer_r: OS Timer Interrupt Enable Register: %08x & %08x\n", ostimer_regs.oier, mem_mask );
 			return ostimer_regs.oier;
 		default:
-//			verboselog( space->machine, 0, "pxa255_ostimer_r: Unknown address: %08x\n", PXA255_OSTMR_BASE_ADDR | (offset << 2));
+//          verboselog( space->machine, 0, "pxa255_ostimer_r: Unknown address: %08x\n", PXA255_OSTMR_BASE_ADDR | (offset << 2));
 			break;
 	}
 	return 0;
@@ -528,7 +528,7 @@ static WRITE32_HANDLER( pxa255_ostimer_w )
 	switch(PXA255_OSTMR_BASE_ADDR | (offset << 2))
 	{
 		case PXA255_OSMR0:
-//			verboselog( space->machine, 3, "pxa255_ostimer_w: OS Timer Match Register 0: %08x & %08x\n", data, mem_mask );
+//          verboselog( space->machine, 3, "pxa255_ostimer_w: OS Timer Match Register 0: %08x & %08x\n", data, mem_mask );
 			ostimer_regs.osmr[0] = data;
 			if(ostimer_regs.oier & PXA255_OIER_E0)
 			{
@@ -539,7 +539,7 @@ static WRITE32_HANDLER( pxa255_ostimer_w )
 			}
 			break;
 		case PXA255_OSMR1:
-//			verboselog( space->machine, 3, "pxa255_ostimer_w: OS Timer Match Register 1: %08x & %08x\n", data, mem_mask );
+//          verboselog( space->machine, 3, "pxa255_ostimer_w: OS Timer Match Register 1: %08x & %08x\n", data, mem_mask );
 			ostimer_regs.osmr[1] = data;
 			if(ostimer_regs.oier & PXA255_OIER_E1)
 			{
@@ -549,7 +549,7 @@ static WRITE32_HANDLER( pxa255_ostimer_w )
 			}
 			break;
 		case PXA255_OSMR2:
-//			verboselog( space->machine, 3, "pxa255_ostimer_w: OS Timer Match Register 2: %08x & %08x\n", data, mem_mask );
+//          verboselog( space->machine, 3, "pxa255_ostimer_w: OS Timer Match Register 2: %08x & %08x\n", data, mem_mask );
 			ostimer_regs.osmr[2] = data;
 			if(ostimer_regs.oier & PXA255_OIER_E2)
 			{
@@ -559,7 +559,7 @@ static WRITE32_HANDLER( pxa255_ostimer_w )
 			}
 			break;
 		case PXA255_OSMR3:
-//			verboselog( space->machine, 3, "pxa255_ostimer_w: OS Timer Match Register 3: %08x & %08x\n", data, mem_mask );
+//          verboselog( space->machine, 3, "pxa255_ostimer_w: OS Timer Match Register 3: %08x & %08x\n", data, mem_mask );
 			ostimer_regs.osmr[3] = data;
 			if(ostimer_regs.oier & PXA255_OIER_E3)
 			{
@@ -569,22 +569,22 @@ static WRITE32_HANDLER( pxa255_ostimer_w )
 			}
 			break;
 		case PXA255_OSCR:
-//			verboselog( space->machine, 3, "pxa255_ostimer_w: OS Timer Count Register: %08x & %08x\n", data, mem_mask );
+//          verboselog( space->machine, 3, "pxa255_ostimer_w: OS Timer Count Register: %08x & %08x\n", data, mem_mask );
 			ostimer_regs.oscr = data;
 			break;
 		case PXA255_OSSR:
-//			verboselog( space->machine, 3, "pxa255_ostimer_w: OS Timer Status Register: %08x & %08x\n", data, mem_mask );
+//          verboselog( space->machine, 3, "pxa255_ostimer_w: OS Timer Status Register: %08x & %08x\n", data, mem_mask );
 			ostimer_regs.ossr &= ~data;
 			pxa255_ostimer_irq_check(space->machine);
 			break;
 		case PXA255_OWER:
-//			verboselog( space->machine, 3, "pxa255_ostimer_w: OS Timer Watchdog Enable Register: %08x & %08x\n", data, mem_mask );
+//          verboselog( space->machine, 3, "pxa255_ostimer_w: OS Timer Watchdog Enable Register: %08x & %08x\n", data, mem_mask );
 			ostimer_regs.ower = data & 0x00000001;
 			break;
 		case PXA255_OIER:
 		{
 			int index = 0;
-//			verboselog( space->machine, 3, "pxa255_ostimer_w: OS Timer Interrupt Enable Register: %08x & %08x\n", data, mem_mask );
+//          verboselog( space->machine, 3, "pxa255_ostimer_w: OS Timer Interrupt Enable Register: %08x & %08x\n", data, mem_mask );
 			ostimer_regs.oier = data & 0x0000000f;
 			for(index = 0; index < 4; index++)
 			{
@@ -633,22 +633,22 @@ static READ32_HANDLER( pxa255_intc_r )
 	switch(PXA255_INTC_BASE_ADDR | (offset << 2))
 	{
 		case PXA255_ICIP:
-//			verboselog( space->machine, 3, "pxa255_intc_r: Interrupt Controller IRQ Pending Register: %08x & %08x\n", intc_regs.icip, mem_mask );
+//          verboselog( space->machine, 3, "pxa255_intc_r: Interrupt Controller IRQ Pending Register: %08x & %08x\n", intc_regs.icip, mem_mask );
 			return intc_regs.icip;
 		case PXA255_ICMR:
-//			verboselog( space->machine, 3, "pxa255_intc_r: Interrupt Controller Mask Register: %08x & %08x\n", intc_regs.icmr, mem_mask );
+//          verboselog( space->machine, 3, "pxa255_intc_r: Interrupt Controller Mask Register: %08x & %08x\n", intc_regs.icmr, mem_mask );
 			return intc_regs.icmr;
 		case PXA255_ICLR:
-//			verboselog( space->machine, 3, "pxa255_intc_r: Interrupt Controller Level Register: %08x & %08x\n", intc_regs.iclr, mem_mask );
+//          verboselog( space->machine, 3, "pxa255_intc_r: Interrupt Controller Level Register: %08x & %08x\n", intc_regs.iclr, mem_mask );
 			return intc_regs.iclr;
 		case PXA255_ICFP:
-//			verboselog( space->machine, 3, "pxa255_intc_r: Interrupt Controller FIQ Pending Register: %08x & %08x\n", intc_regs.icfp, mem_mask );
+//          verboselog( space->machine, 3, "pxa255_intc_r: Interrupt Controller FIQ Pending Register: %08x & %08x\n", intc_regs.icfp, mem_mask );
 			return intc_regs.icfp;
 		case PXA255_ICPR:
-//			verboselog( space->machine, 3, "pxa255_intc_r: Interrupt Controller Pending Register: %08x & %08x\n", intc_regs.icpr, mem_mask );
+//          verboselog( space->machine, 3, "pxa255_intc_r: Interrupt Controller Pending Register: %08x & %08x\n", intc_regs.icpr, mem_mask );
 			return intc_regs.icpr;
 		case PXA255_ICCR:
-//			verboselog( space->machine, 3, "pxa255_intc_r: Interrupt Controller Control Register: %08x & %08x\n", intc_regs.iccr, mem_mask );
+//          verboselog( space->machine, 3, "pxa255_intc_r: Interrupt Controller Control Register: %08x & %08x\n", intc_regs.iccr, mem_mask );
 			return intc_regs.iccr;
 		default:
 			verboselog( space->machine, 0, "pxa255_intc_r: Unknown address: %08x\n", PXA255_INTC_BASE_ADDR | (offset << 2));
@@ -665,21 +665,21 @@ static WRITE32_HANDLER( pxa255_intc_w )
 			verboselog( space->machine, 3, "pxa255_intc_w: (Invalid Write) Interrupt Controller IRQ Pending Register: %08x & %08x\n", data, mem_mask );
 			break;
 		case PXA255_ICMR:
-//			verboselog( space->machine, 3, "pxa255_intc_w: Interrupt Controller Mask Register: %08x & %08x\n", data, mem_mask );
+//          verboselog( space->machine, 3, "pxa255_intc_w: Interrupt Controller Mask Register: %08x & %08x\n", data, mem_mask );
 			intc_regs.icmr = data & 0xfffe7f00;
 			break;
 		case PXA255_ICLR:
-//			verboselog( space->machine, 3, "pxa255_intc_w: Interrupt Controller Level Register: %08x & %08x\n", data, mem_mask );
+//          verboselog( space->machine, 3, "pxa255_intc_w: Interrupt Controller Level Register: %08x & %08x\n", data, mem_mask );
 			intc_regs.iclr = data & 0xfffe7f00;
 			break;
 		case PXA255_ICFP:
-//			verboselog( space->machine, 3, "pxa255_intc_w: (Invalid Write) Interrupt Controller FIQ Pending Register: %08x & %08x\n", data, mem_mask );
+//          verboselog( space->machine, 3, "pxa255_intc_w: (Invalid Write) Interrupt Controller FIQ Pending Register: %08x & %08x\n", data, mem_mask );
 			break;
 		case PXA255_ICPR:
-//			verboselog( space->machine, 3, "pxa255_intc_w: (Invalid Write) Interrupt Controller Pending Register: %08x & %08x\n", data, mem_mask );
+//          verboselog( space->machine, 3, "pxa255_intc_w: (Invalid Write) Interrupt Controller Pending Register: %08x & %08x\n", data, mem_mask );
 			break;
 		case PXA255_ICCR:
-//			verboselog( space->machine, 3, "pxa255_intc_w: Interrupt Controller Control Register: %08x & %08x\n", data, mem_mask );
+//          verboselog( space->machine, 3, "pxa255_intc_w: Interrupt Controller Control Register: %08x & %08x\n", data, mem_mask );
 			intc_regs.iccr = data & 0x00000001;
 			break;
 		default:
@@ -707,8 +707,8 @@ static READ32_HANDLER( pxa255_gpio_r )
 			verboselog( space->machine, 3, "pxa255_gpio_r: *Not Yet Implemented* GPIO Pin-Level Register 1: %08x & %08x\n", gpio_regs.gplr1, mem_mask );
 			return 0xff9fffff;
 		/*
-			0x200000 = flip screen
+            0x200000 = flip screen
-		*/
+        */
 		case PXA255_GPLR2:
 			verboselog( space->machine, 3, "pxa255_gpio_r: *Not Yet Implemented* GPIO Pin-Level Register 2: %08x & %08x\n", gpio_regs.gplr2, mem_mask );
 			return gpio_regs.gplr2;
@@ -1025,13 +1025,13 @@ static void pxa255_lcd_check_load_next_branch(running_machine* machine, int chan
 	}
 	else
 	{
-//		verboselog( machine, 3, "pxa255_lcd_check_load_next_branch: Not taking branch\n" );
+//      verboselog( machine, 3, "pxa255_lcd_check_load_next_branch: Not taking branch\n" );
 	}
 }
 
 static TIMER_CALLBACK( pxa255_lcd_dma_eof )
 {
-//	verboselog( machine, 3, "End of frame callback\n" );
+//  verboselog( machine, 3, "End of frame callback\n" );
 	if(lcd_regs.dma[param].ldcmd & PXA255_LDCMD_EOFINT)
 	{
 		lcd_regs.liidr = lcd_regs.dma[param].fidr;
@@ -1076,7 +1076,7 @@ static READ32_HANDLER( pxa255_lcd_r )
 			verboselog( space->machine, 3, "pxa255_lcd_r: TMED RGB Seed Register: %08x & %08x\n", lcd_regs.tcr, mem_mask );
 			return lcd_regs.tcr;
 		case PXA255_FDADR0:		// 0x44000200
-//			verboselog( space->machine, 3, "pxa255_lcd_r: LCD DMA Frame Descriptor Address Register 0: %08x & %08x\n", lcd_regs.dma[0].fdadr, mem_mask );
+//          verboselog( space->machine, 3, "pxa255_lcd_r: LCD DMA Frame Descriptor Address Register 0: %08x & %08x\n", lcd_regs.dma[0].fdadr, mem_mask );
 			return lcd_regs.dma[0].fdadr;
 		case PXA255_FSADR0:		// 0x44000204
 			verboselog( space->machine, 3, "pxa255_lcd_r: LCD DMA Frame Source Address Register 0: %08x & %08x\n", lcd_regs.dma[0].fsadr, mem_mask );
@@ -1085,7 +1085,7 @@ static READ32_HANDLER( pxa255_lcd_r )
 			verboselog( space->machine, 3, "pxa255_lcd_r: LCD DMA Frame ID Register 0: %08x & %08x\n", lcd_regs.dma[0].fidr, mem_mask );
 			return lcd_regs.dma[0].fidr;
 		case PXA255_LDCMD0:		// 0x4400020c
-//			verboselog( space->machine, 3, "pxa255_lcd_r: LCD DMA Command Register 0: %08x & %08x\n", lcd_regs.dma[0].ldcmd & 0xfff00000, mem_mask );
+//          verboselog( space->machine, 3, "pxa255_lcd_r: LCD DMA Command Register 0: %08x & %08x\n", lcd_regs.dma[0].ldcmd & 0xfff00000, mem_mask );
 			return lcd_regs.dma[0].ldcmd & 0xfff00000;
 		case PXA255_FDADR1:		// 0x44000210
 			verboselog( space->machine, 3, "pxa255_lcd_r: LCD DMA Frame Descriptor Address Register 1: %08x & %08x\n", lcd_regs.dma[1].fdadr, mem_mask );
@@ -1131,7 +1131,7 @@ static WRITE32_HANDLER( pxa255_lcd_w )
 			lcd_regs.fbr[0] = data & 0xfffffff3;
 			if(!timer_enabled(lcd_regs.dma[0].eof))
 			{
-//				verboselog( space->machine, 3, "ch0 EOF timer is not enabled, taking branch now\n" );
+//              verboselog( space->machine, 3, "ch0 EOF timer is not enabled, taking branch now\n" );
 				pxa255_lcd_check_load_next_branch(space->machine, 0);
 				pxa255_lcd_irq_check(space->machine);
 			}
@@ -1216,19 +1216,19 @@ static INTERRUPT_GEN( pxa255_vblank_start )
 
 //static READ32_HANDLER( return_zero )
 //{
-//	return 0;
+//  return 0;
 //}
 
 //static READ32_HANDLER( unknown_r )
 //{
-//	//return 0x00008000;
+//  //return 0x00008000;
 //}
 
 static UINT32 seed, magic;
 static UINT32 state = 0;
 static READ32_HANDLER( cpld_r )
 {
-//	printf("CPLD read @ %x (PC %x state %d)\n", offset, cpu_get_pc(space->cpu), state);
+//  printf("CPLD read @ %x (PC %x state %d)\n", offset, cpu_get_pc(space->cpu), state);
 
 	if (cpu_get_pc(space->cpu) == 0x3f04)
 	{
@@ -1296,10 +1296,10 @@ static WRITE32_HANDLER( cpld_w )
 	else if (offset == 0xa)
 	{
 	}
-//	else
+//  else
-//	{
+//  {
-//		printf("%08x: CPLD_W: %08x = %08x & %08x\n", cpu_get_pc(space->cpu), offset, data, mem_mask);
+//      printf("%08x: CPLD_W: %08x = %08x & %08x\n", cpu_get_pc(space->cpu), offset, data, mem_mask);
-//	}
+//  }
 }
 
 static ADDRESS_MAP_START( 39in1_map, ADDRESS_SPACE_PROGRAM, 32 )
@@ -1318,13 +1318,13 @@ ADDRESS_MAP_END
 static INPUT_PORTS_START( 39in1 )
 	PORT_START("MCUIPT")
 	PORT_BIT( 0x00000001, IP_ACTIVE_LOW, IPT_START1 )
-	PORT_BIT( 0x00000002, IP_ACTIVE_LOW, IPT_JOYSTICK_UP ) PORT_8WAY PORT_PLAYER(1) 
+	PORT_BIT( 0x00000002, IP_ACTIVE_LOW, IPT_JOYSTICK_UP ) PORT_8WAY PORT_PLAYER(1)
-	PORT_BIT( 0x00000004, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN ) PORT_8WAY PORT_PLAYER(1) 
+	PORT_BIT( 0x00000004, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN ) PORT_8WAY PORT_PLAYER(1)
-	PORT_BIT( 0x00000008, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT ) PORT_8WAY PORT_PLAYER(1) 
+	PORT_BIT( 0x00000008, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT ) PORT_8WAY PORT_PLAYER(1)
-	PORT_BIT( 0x00000010, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT ) PORT_8WAY PORT_PLAYER(1) 
+	PORT_BIT( 0x00000010, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT ) PORT_8WAY PORT_PLAYER(1)
-	PORT_BIT( 0x00000020, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_PLAYER(1) 
+	PORT_BIT( 0x00000020, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_PLAYER(1)
-	PORT_BIT( 0x00000040, IP_ACTIVE_LOW, IPT_BUTTON2 ) PORT_PLAYER(1) 
+	PORT_BIT( 0x00000040, IP_ACTIVE_LOW, IPT_BUTTON2 ) PORT_PLAYER(1)
-	PORT_BIT( 0x00000080, IP_ACTIVE_LOW, IPT_BUTTON3 ) PORT_PLAYER(1) 
+	PORT_BIT( 0x00000080, IP_ACTIVE_LOW, IPT_BUTTON3 ) PORT_PLAYER(1)
 	PORT_BIT( 0x00000100, IP_ACTIVE_LOW, IPT_UNKNOWN )
 	PORT_BIT( 0x00000200, IP_ACTIVE_LOW, IPT_UNKNOWN )
 	PORT_BIT( 0x00000400, IP_ACTIVE_LOW, IPT_UNKNOWN )
@@ -1334,13 +1334,13 @@ static INPUT_PORTS_START( 39in1 )
 	PORT_BIT( 0x00004000, IP_ACTIVE_LOW, IPT_UNKNOWN )
 	PORT_BIT( 0x00008000, IP_ACTIVE_LOW, IPT_SERVICE1 )
 	PORT_BIT( 0x00010000, IP_ACTIVE_LOW, IPT_START2 )
-	PORT_BIT( 0x00020000, IP_ACTIVE_LOW, IPT_JOYSTICK_UP ) PORT_8WAY PORT_PLAYER(2) 
+	PORT_BIT( 0x00020000, IP_ACTIVE_LOW, IPT_JOYSTICK_UP ) PORT_8WAY PORT_PLAYER(2)
-	PORT_BIT( 0x00040000, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN ) PORT_8WAY PORT_PLAYER(2) 
+	PORT_BIT( 0x00040000, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN ) PORT_8WAY PORT_PLAYER(2)
-	PORT_BIT( 0x00080000, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT ) PORT_8WAY PORT_PLAYER(2) 
+	PORT_BIT( 0x00080000, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT ) PORT_8WAY PORT_PLAYER(2)
-	PORT_BIT( 0x00100000, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT ) PORT_8WAY PORT_PLAYER(2) 
+	PORT_BIT( 0x00100000, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT ) PORT_8WAY PORT_PLAYER(2)
-	PORT_BIT( 0x00200000, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_PLAYER(2) 
+	PORT_BIT( 0x00200000, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_PLAYER(2)
-	PORT_BIT( 0x00400000, IP_ACTIVE_LOW, IPT_BUTTON2 ) PORT_PLAYER(2) 
+	PORT_BIT( 0x00400000, IP_ACTIVE_LOW, IPT_BUTTON2 ) PORT_PLAYER(2)
-	PORT_BIT( 0x00800000, IP_ACTIVE_LOW, IPT_BUTTON3 ) PORT_PLAYER(2) 
+	PORT_BIT( 0x00800000, IP_ACTIVE_LOW, IPT_BUTTON3 ) PORT_PLAYER(2)
 	PORT_BIT( 0x01000000, IP_ACTIVE_LOW, IPT_UNKNOWN )
 	PORT_BIT( 0x02000000, IP_ACTIVE_LOW, IPT_UNKNOWN )
 	PORT_BIT( 0x04000000, IP_ACTIVE_LOW, IPT_UNKNOWN )
@@ -1452,7 +1452,7 @@ static MACHINE_DRIVER_START( 39in1 )
 	MDRV_SCREEN_REFRESH_RATE(60)
 	MDRV_SCREEN_VBLANK_TIME(ATTOSECONDS_IN_USEC(0))
 	MDRV_SCREEN_FORMAT(BITMAP_FORMAT_RGB32)
-	//MDRV_SCREEN_RAW_PARAMS(16777216/4, 308, 0,  240, 228, 0,  160)	// completely bogus for this h/w
+	//MDRV_SCREEN_RAW_PARAMS(16777216/4, 308, 0,  240, 228, 0,  160)    // completely bogus for this h/w
 	MDRV_SCREEN_SIZE(1024, 1024)
 	MDRV_SCREEN_VISIBLE_AREA(0, 295, 0, 479)
 	MDRV_PALETTE_LENGTH(256)
@@ -1480,12 +1480,12 @@ ROM_START( 39in1 )
 ROM_END
 
 /*ROM_START( arm4in1 )
-	// main program, encrypted
+    // main program, encrypted
-	ROM_REGION( 0x80000, "maincpu", 0 )
+    ROM_REGION( 0x80000, "maincpu", 0 )
         ROM_LOAD( "27c4096_plz-v001_ver.300.bin", 0x000000, 0x080000, CRC(9149dbc4) SHA1(40efe1f654f11474f75ae7fee1613f435dbede38) )
 
-	// data ROM - contains a filesystem with ROMs, fonts, graphics, etc. in an unknown compressed format
+    // data ROM - contains a filesystem with ROMs, fonts, graphics, etc. in an unknown compressed format
-	ROM_REGION32_LE( 0x200000, "data", 0 )
+    ROM_REGION32_LE( 0x200000, "data", 0 )
         ROM_LOAD( "16mflash.bin", 0x000000, 0x200000, CRC(a089f0f8) SHA1(e975eadd9176a8b9e416229589dfe3158cba22cb) )
 ROM_END*/
 

src/mame/drivers/alpha68k.c

@@ -1111,7 +1111,7 @@ static INPUT_PORTS_START( paddlema )
 	PORT_DIPSETTING(    0x80, "A to B" )	/* Manual shows "Upright Sytle B" */
 	PORT_DIPSETTING(    0x00, "A to C" )	/* Manual shows "Upright Sytle A" */
 	PORT_DIPSETTING(    0x40, "A to E" )	/* Manual shows "Table Sytle C"   */
-//  PORT_DIPSETTING(    0xc0, "A to B" )	/* Manual shows "Table Sytle D"   */
+//  PORT_DIPSETTING(    0xc0, "A to B" )    /* Manual shows "Table Sytle D"   */
 
 	PORT_START("IN4")	// DSW1
 	PORT_SERVICE_DIPLOC(  0x01, IP_ACTIVE_HIGH, "SW2:8" )
@@ -1342,7 +1342,7 @@ static INPUT_PORTS_START( goldmedl )
 	PORT_DIPSETTING(    0x00, "Upright 2 Players" )
 	PORT_DIPSETTING(    0x80, "Upright 4 Players" )
 	PORT_DIPSETTING(    0x88, DEF_STR( Cocktail ) )
-	//PORT_DIPSETTING(  0x08, DEF_STR( Cocktail ) )		/* Not documented. */
+	//PORT_DIPSETTING(  0x08, DEF_STR( Cocktail ) )     /* Not documented. */
 	PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_START3 )		PORT_DIPLOCATION("SW1:3") /* Listed as "Always OFF". */
 	PORT_DIPNAME( 0x20, 0x20, "Speed For 100M Dash" )	PORT_DIPLOCATION("SW1:4")
 	PORT_DIPSETTING(    0x00, "10 Beats For Max Speed" )

src/mame/drivers/aquarium.c

@@ -183,12 +183,12 @@ static INPUT_PORTS_START( aquarium )
 	PORT_DIPSETTING(      0x000c, "1/1" )
 	PORT_DIPSETTING(      0x0008, "2/3" )
 	PORT_DIPSETTING(      0x0004, "3/5" )
-//  PORT_DIPSETTING(      0x0000, "1/1" )					/* Not used or listed in manual */
+//  PORT_DIPSETTING(      0x0000, "1/1" )                   /* Not used or listed in manual */
 	PORT_DIPNAME( 0x0030, 0x0030, "Winning Rounds (Player VS Player)" )	PORT_DIPLOCATION("SW1:5,6")
 	PORT_DIPSETTING(      0x0030, "1/1" )
 	PORT_DIPSETTING(      0x0020, "2/3" )
 	PORT_DIPSETTING(      0x0010, "3/5" )
-//  PORT_DIPSETTING(      0x0000, "1/1" )					/* Not used or listed in manual */
+//  PORT_DIPSETTING(      0x0000, "1/1" )                   /* Not used or listed in manual */
 	PORT_DIPUNUSED_DIPLOC( 0x0040, 0x0040, "SW1:7" )			/* Listed in the manual as always OFF */
 	PORT_DIPUNUSED_DIPLOC( 0x0080, 0x0080, "SW1:8" )			/* Listed in the manual as always OFF */
 	PORT_DIPNAME( 0x0700, 0x0700, DEF_STR( Coinage ) )			PORT_DIPLOCATION("SW2:1,2,3")

src/mame/drivers/bfm_sc2.c

@@ -4059,12 +4059,12 @@ static DRIVER_INIT (bbrkfst)
 	Scorpion2_SetSwitchState(4,1, 1);	  /* 20p Low Level Switch */
 	Scorpion2_SetSwitchState(4,2, 1);	  /* Token Front Low Level Switch */
 	Scorpion2_SetSwitchState(4,3, 1);	  /* Token Rear  Low Level Switch */
-	Scorpion2_SetSwitchState(4,4, 1);	  
+	Scorpion2_SetSwitchState(4,4, 1);
 	Scorpion2_SetSwitchState(6,0, 0);
 	Scorpion2_SetSwitchState(6,1, 1);
 	Scorpion2_SetSwitchState(6,2, 0);
 	Scorpion2_SetSwitchState(6,3, 1);
-	
+
 }
 
 static DRIVER_INIT (drwho)

src/mame/drivers/bingor.c

@@ -69,10 +69,10 @@ static ADDRESS_MAP_START( bingor_map, ADDRESS_SPACE_PROGRAM, 16 )
 ADDRESS_MAP_END
 
 static ADDRESS_MAP_START( bingor_io, ADDRESS_SPACE_IO, 16 )
-//	AM_RANGE(0x0000, 0x00ff) AM_READ( test_r )
+//  AM_RANGE(0x0000, 0x00ff) AM_READ( test_r )
 	AM_RANGE(0x0100, 0x0101) AM_DEVWRITE8("saa", saa1099_data_w, 0x00ff)
 	AM_RANGE(0x0102, 0x0103) AM_DEVWRITE8("saa", saa1099_control_w, 0x00ff)
-//	AM_RANGE(0x0200, 0x0201) AM_READ( test_r )
+//  AM_RANGE(0x0200, 0x0201) AM_READ( test_r )
 ADDRESS_MAP_END
 
 static READ8_HANDLER( test8_r )
@@ -139,7 +139,7 @@ INPUT_PORTS_END
 
 static INTERRUPT_GEN( vblank_irq )
 {
-//	cpu_set_input_line_and_vector(device,0,HOLD_LINE,0x08/4); // reads i/o 0x200 and puts the result in ram, pic irq?
+//  cpu_set_input_line_and_vector(device,0,HOLD_LINE,0x08/4); // reads i/o 0x200 and puts the result in ram, pic irq?
 	cpu_set_input_line_and_vector(device,0,HOLD_LINE,0x4c/4); // ?
 }
 

src/mame/drivers/bublbobl.c

@@ -1286,12 +1286,12 @@ ROM_START( dland )
 	ROM_LOAD( "dl_6.bin",     0x00000, 0x10000, CRC(6352d3fa) SHA1(eacaddd476952f3c048138184e712ca1fbba4ce2) )
 	ROM_LOAD( "dl_7.bin",     0x10000, 0x10000, CRC(37a38b69) SHA1(3d28fbf1725b35f664836ee45f705c05f6ccd78a) )
 	ROM_LOAD( "dl_8.bin",     0x20000, 0x10000, CRC(509ee5b1) SHA1(b5edc7346d43db0157deadece60e478ba6d63eab) )
-	/* 0x30000-0x3ffff empty */	
+	/* 0x30000-0x3ffff empty */
 	ROM_LOAD( "dl_9.bin",     0x40000, 0x10000, CRC(ae8514d7) SHA1(5205a3faf354f5b5616be4494f5bd553de4c7965) )
 	ROM_LOAD( "dl_10.bin",    0x50000, 0x10000, CRC(6d406fb7) SHA1(26d9236d259f8b3876087797b77994b299eeea63) )
 	ROM_LOAD( "dl_11.bin",    0x60000, 0x10000, CRC(bdf9c0ab) SHA1(d5afc5205e8e391a4a095a4e2efbeee96e780638) )
 	/* 0x70000-0x7ffff empty */
-	
+
 	ROM_REGION( 0x0100, "proms", 0 ) // not on this? (but needed for the bublbobl video driver to work)
 	ROM_LOAD( "a71-25.41",    0x0000, 0x0100, CRC(2d0f8545) SHA1(089c31e2f614145ef2743164f7b52ae35bc06808) )	/* video timing */
 ROM_END
@@ -1332,7 +1332,7 @@ static DRIVER_INIT( dland )
 	UINT8* src = memory_region(machine,"gfx1");
 	for (i=0;i<0x40000;i++)
 		src[i] = BITSWAP8(src[i],7,6,5,4,0,1,2,3);
-		
+
 	for (i=0x40000;i<0x80000;i++)
 		src[i] = BITSWAP8(src[i],7,4,5,6,3,0,1,2);
 

src/mame/drivers/cischeat.c

@@ -475,19 +475,19 @@ READ16_HANDLER( scudhamm_analog_r )
 {
 	static int prev=0;
 	int i=input_port_read(space->machine, "IN1"),j;
-	
+
 	if ((i^prev)&0x4000) {
 		if (i<prev) prev-=0x8000;
 		else prev+=0x8000;
 	}
-	
+
 	j=i-prev;
 	prev=i;
-	
+
 	/* effect of hammer collision 'accelerometer':
-	$00 - $09 - no hit
+    $00 - $09 - no hit
-	$0A - $3F - soft hit
+    $0A - $3F - soft hit
-	$40 - $FF - hard hit */
+    $40 - $FF - hard hit */
 	if (j<0) return 0;
 	else if (j>0xff) return 0xff;
 	return j;

src/mame/drivers/citycon.c

@@ -54,7 +54,7 @@ ADDRESS_MAP_END
 static ADDRESS_MAP_START( sound_map, ADDRESS_SPACE_PROGRAM, 8 )
 	AM_RANGE(0x0000, 0x0fff) AM_RAM
 	AM_RANGE(0x4000, 0x4001) AM_DEVWRITE("ay", ay8910_address_data_w)
-//	AM_RANGE(0x4002, 0x4002) AM_DEVREAD("ay", ay8910_r)  /* ?? */
+//  AM_RANGE(0x4002, 0x4002) AM_DEVREAD("ay", ay8910_r)  /* ?? */
 	AM_RANGE(0x6000, 0x6001) AM_DEVREADWRITE("ym", ym2203_r, ym2203_w)
 	AM_RANGE(0x8000, 0xffff) AM_ROM
 ADDRESS_MAP_END
@@ -205,7 +205,7 @@ static MACHINE_DRIVER_START( citycon )
 
 	MDRV_CPU_ADD("audiocpu", M6809, 640000)       /* 0.640 MHz ??? */
 	MDRV_CPU_PROGRAM_MAP(sound_map)
-//	MDRV_CPU_VBLANK_INT("screen", irq0_line_hold) //actually unused, probably it was during development
+//  MDRV_CPU_VBLANK_INT("screen", irq0_line_hold) //actually unused, probably it was during development
 
 	/* video hardware */
 	MDRV_SCREEN_ADD("screen", RASTER)

src/mame/drivers/decocass.c

@@ -170,8 +170,8 @@ static INPUT_PORTS_START( decocass )
 	PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_VBLANK)
 
 	PORT_START("DSW2") /* Start with all Unknown as each can change per game, except for Country Code */
-	PORT_DIPUNKNOWN_DIPLOC( 0x01, 0x01, "SW2:1")		/* Most Dipswitch Settings sheets show this as "Number of Players" (Lives) */ 
+	PORT_DIPUNKNOWN_DIPLOC( 0x01, 0x01, "SW2:1")		/* Most Dipswitch Settings sheets show this as "Number of Players" (Lives) */
-	PORT_DIPUNKNOWN_DIPLOC( 0x02, 0x02, "SW2:2")		/* Most Dipswitch Settings sheets show 2 & 3 as "Bonus Players" */ 
+	PORT_DIPUNKNOWN_DIPLOC( 0x02, 0x02, "SW2:2")		/* Most Dipswitch Settings sheets show 2 & 3 as "Bonus Players" */
 	PORT_DIPUNKNOWN_DIPLOC( 0x04, 0x04, "SW2:3")
 	PORT_DIPUNKNOWN_DIPLOC( 0x08, 0x08, "SW2:4")		/* Most Dipswitch Settings sheets show 4 (with/without 5) as some form of Diffculty */
 	PORT_DIPUNKNOWN_DIPLOC( 0x10, 0x10, "SW2:5")

src/mame/drivers/funworld.c

@@ -1952,7 +1952,7 @@ GFXDECODE_END
 static const pia6821_interface pia0_intf =
 /*
     TAB light green board
-	---------------------
+    ---------------------
 
                 PIA 0                                       PIA 1
          .--------u--------.                         .--------u--------.
@@ -2731,7 +2731,7 @@ ROM_START( royalcdp )
 	ROM_REGION( 0x10000, "gfx1", 0 )
 	ROM_LOAD( "u11_tms27c256.bin",0x0000, 0x8000, CRC(d6834c3a) SHA1(4b071b9826c086439b9763393b23c671261b3788) )
 	ROM_LOAD( "u4_nmc27c256.bin", 0x8000, 0x8000, CRC(41f7a0b3) SHA1(9aff2b8832d2a4f868daa9849a0bfe5e44f88fc0) )
-	
+
 	ROM_REGION( 0x0200, "proms", 0 )	/* not present in the set */
 	ROM_LOAD( "n82s147.bin",      0x0000, 0x0200, CRC(8bc86f48) SHA1(4c677ab9314a1f571e35104b22659e6811aeb194) )
 

src/mame/drivers/gottlieb.c

@@ -2015,7 +2015,7 @@ MACHINE_DRIVER_END
 
 static MACHINE_DRIVER_START( cobram3 )
 	MDRV_IMPORT_FROM(g2laser)
-	
+
 	/* sound hardware */
 	MDRV_SOUND_MODIFY("dac1")
 	MDRV_SOUND_ROUTES_RESET()

src/mame/drivers/mappy.c

@@ -1202,13 +1202,13 @@ NAMCO_56DSW0
 	PORT_DIPSETTING(    0x04, "30k Only" )			PORT_CONDITION("DSW2",0x02,PORTCOND_NOTEQUALS,0x00)
 	PORT_DIPSETTING(    0x18, "30k & 60k Only" )		PORT_CONDITION("DSW2",0x02,PORTCOND_NOTEQUALS,0x00)
 	PORT_DIPSETTING(    0x1c, "30k & 100k Only" )		PORT_CONDITION("DSW2",0x02,PORTCOND_NOTEQUALS,0x00)
-//  PORT_DIPSETTING(    0x14, "30k 100k" )  // repeated     	PORT_CONDITION("DSW2",0x02,PORTCOND_NOTEQUALS,0x00)
+//  PORT_DIPSETTING(    0x14, "30k 100k" )  // repeated         PORT_CONDITION("DSW2",0x02,PORTCOND_NOTEQUALS,0x00)
 	PORT_DIPSETTING(    0x0c, "30k, 120k & Every 120k" )	PORT_CONDITION("DSW2",0x02,PORTCOND_NOTEQUALS,0x00)
 	PORT_DIPSETTING(    0x0c, "20k & 80k Only" )		PORT_CONDITION("DSW2",0x02,PORTCOND_EQUALS,0x00)
 	PORT_DIPSETTING(    0x08, "30k" )			PORT_CONDITION("DSW2",0x02,PORTCOND_EQUALS,0x00)
 	PORT_DIPSETTING(    0x10, "30k, 100k & Every 100k" )	PORT_CONDITION("DSW2",0x02,PORTCOND_EQUALS,0x00)
 	PORT_DIPSETTING(    0x1c, "30k & 100k Only" )		PORT_CONDITION("DSW2",0x02,PORTCOND_EQUALS,0x00)
-//  PORT_DIPSETTING(    0x14, "30k 100k" )  // repeated		PORT_CONDITION("DSW2",0x02,PORTCOND_EQUALS,0x00)
+//  PORT_DIPSETTING(    0x14, "30k 100k" )  // repeated     PORT_CONDITION("DSW2",0x02,PORTCOND_EQUALS,0x00)
 	PORT_DIPSETTING(    0x18, "40k & 80k Only" )		PORT_CONDITION("DSW2",0x02,PORTCOND_EQUALS,0x00)
 	PORT_DIPSETTING(    0x04, "100k Only" )			PORT_CONDITION("DSW2",0x02,PORTCOND_EQUALS,0x00)
 	PORT_DIPSETTING(    0x00, DEF_STR( None ) )

src/mame/drivers/mw8080bw.c

@@ -1845,7 +1845,7 @@ static ADDRESS_MAP_START( spacwalk_io_map, ADDRESS_SPACE_IO, 8 )
 	AM_RANGE(0x00, 0x00) AM_READ_PORT("IN0")
 	AM_RANGE(0x01, 0x01) AM_READ_PORT("IN1")
 	AM_RANGE(0x02, 0x02) AM_READ_PORT("IN2")
-	AM_RANGE(0x03, 0x03) AM_READ(mb14241_0_shift_result_r)	
+	AM_RANGE(0x03, 0x03) AM_READ(mb14241_0_shift_result_r)
 
 	AM_RANGE(0x04, 0x04) AM_WRITE(watchdog_reset_w)
 

src/mame/drivers/naomi.c

@@ -1990,9 +1990,9 @@ ROM_START( capsnk )
 
 	// trojaned protection data (filename is address read from)
 	ROM_REGION( 0x200000, "naomibd_prot", ROMREGION_ERASE00 )
-        ROM_LOAD( "a63a9260.bin", 0x000000, 0x008760, CRC(54efa963) SHA1(41874253567da56441d83de041f6e82111977fa4) )     
+        ROM_LOAD( "a63a9260.bin", 0x000000, 0x008760, CRC(54efa963) SHA1(41874253567da56441d83de041f6e82111977fa4) )
-        ROM_LOAD( "a63b19c0.bin", 0x010000, 0x008260, CRC(f0ca72ef) SHA1(87fc4654afaf763cdb3ea5b4501948bfe7b9e9dc) )     
+        ROM_LOAD( "a63b19c0.bin", 0x010000, 0x008260, CRC(f0ca72ef) SHA1(87fc4654afaf763cdb3ea5b4501948bfe7b9e9dc) )
-        ROM_LOAD( "a63b9c20.bin", 0x020000, 0x00a0c0, CRC(92eec22c) SHA1(c7267503a828e852edeb26f68f3f4b685b9b163e) )     
+        ROM_LOAD( "a63b9c20.bin", 0x020000, 0x00a0c0, CRC(92eec22c) SHA1(c7267503a828e852edeb26f68f3f4b685b9b163e) )
         ROM_LOAD( "a63c3ce0.bin", 0x030000, 0x00d7e0, CRC(93201f32) SHA1(5aca43776306a5a5ecd68a7e8699a724703f329a) )
         ROM_LOAD( "a63d14c0.bin", 0x040000, 0x00a8e0, CRC(fb2e9f7b) SHA1(ae4fc9a82eafb5b511485eef1d65ee9d3adc27b6) )
         ROM_LOAD( "a63dbda0.bin", 0x050000, 0x008460, CRC(b4b74624) SHA1(6ae2f5d69e45d295a3d0dcf295b1fb76be201e8e) )
@@ -2039,9 +2039,9 @@ ROM_START( capsnka )
 
 	// trojaned protection data (filename is address read from)
 	ROM_REGION( 0x200000, "naomibd_prot", ROMREGION_ERASE00 )
-        ROM_LOAD( "a63a9260.bin", 0x000000, 0x008760, CRC(54efa963) SHA1(41874253567da56441d83de041f6e82111977fa4) )     
+        ROM_LOAD( "a63a9260.bin", 0x000000, 0x008760, CRC(54efa963) SHA1(41874253567da56441d83de041f6e82111977fa4) )
-        ROM_LOAD( "a63b19c0.bin", 0x010000, 0x008260, CRC(f0ca72ef) SHA1(87fc4654afaf763cdb3ea5b4501948bfe7b9e9dc) )     
+        ROM_LOAD( "a63b19c0.bin", 0x010000, 0x008260, CRC(f0ca72ef) SHA1(87fc4654afaf763cdb3ea5b4501948bfe7b9e9dc) )
-        ROM_LOAD( "a63b9c20.bin", 0x020000, 0x00a0c0, CRC(92eec22c) SHA1(c7267503a828e852edeb26f68f3f4b685b9b163e) )     
+        ROM_LOAD( "a63b9c20.bin", 0x020000, 0x00a0c0, CRC(92eec22c) SHA1(c7267503a828e852edeb26f68f3f4b685b9b163e) )
         ROM_LOAD( "a63c3ce0.bin", 0x030000, 0x00d7e0, CRC(93201f32) SHA1(5aca43776306a5a5ecd68a7e8699a724703f329a) )
         ROM_LOAD( "a63d14c0.bin", 0x040000, 0x00a8e0, CRC(fb2e9f7b) SHA1(ae4fc9a82eafb5b511485eef1d65ee9d3adc27b6) )
         ROM_LOAD( "a63dbda0.bin", 0x050000, 0x008460, CRC(b4b74624) SHA1(6ae2f5d69e45d295a3d0dcf295b1fb76be201e8e) )

src/mame/drivers/neodrvr.c

@@ -7044,7 +7044,7 @@ title: '98 NeoPri Best 44 version
 ROM_START( 98best44 )
 	ROM_REGION( 0x100000, "maincpu", 0 )
 	ROM_LOAD16_WORD_SWAP( "p060-ep1", 0x000000, 0x080000, CRC(d42e505d) SHA1(0ad6b0288f36c339832730a03e53cbc07dab4f82))
-	
+
 	ROM_REGION16_BE( 0x80000, "mainbios", 0 )
 	ROM_LOAD16_WORD_SWAP( "neoprint.bios",    0x00000, 0x020000, NO_DUMP ) // should be different
 	ROM_COPY( "maincpu", 0x00000, 0x00000, 0x80000 ) // just copy the program rom to stop it crashing
@@ -7056,14 +7056,14 @@ ROM_START( 98best44 )
 
 	ROM_REGION( 0x20000, "audiobios", 0 )
 	ROM_LOAD( "sm1.sm1", 0x00000, 0x20000, CRC(94416d67) SHA1(42f9d7ddd6c0931fd64226a60dc73602b2819dcf) ) // maybe
-	
+
 	ROM_REGION( 0x20000, "fixed", ROMREGION_ERASE00 )
 	/* no S1 rom */
-	
+
 	ROM_REGION( 0x30000, "audiocpu", 0 )
 	ROM_LOAD( "pt004-m1", 	 0x00000, 0x20000, CRC(6d77cdaa) SHA1(f88a93b3085b18b6663b4e51fccaa41958aafae1) )
 	ROM_RELOAD(          0x10000, 0x20000 )
-	
+
 	ROM_REGION( 0x200000, "ym", 0 )
 	ROM_LOAD( "pt004-v1", 0x000000, 0x200000, CRC(118a84fd) SHA1(9059297a42a329eca47a82327c301853219013bd) )
 

src/mame/drivers/nmk16.c

@@ -1005,12 +1005,12 @@ static ADDRESS_MAP_START( macross2_map, ADDRESS_SPACE_PROGRAM, 16 )
 	AM_RANGE(0x130000, 0x1301ff) AM_RAM AM_BASE(&gunnail_scrollram)
 	AM_RANGE(0x130200, 0x1303ff) AM_RAM AM_BASE(&gunnail_scrollramy)
 	AM_RANGE(0x130400, 0x1307ff) AM_RAM
-	
+
 	AM_RANGE(0x140000, 0x143fff) AM_RAM_WRITE(nmk_bgvideoram0_w) AM_BASE(&nmk_bgvideoram0)
 	AM_RANGE(0x144000, 0x147fff) AM_RAM_WRITE(nmk_bgvideoram1_w) AM_BASE(&nmk_bgvideoram1)
 	AM_RANGE(0x148000, 0x14bfff) AM_RAM_WRITE(nmk_bgvideoram2_w) AM_BASE(&nmk_bgvideoram2)
 	AM_RANGE(0x14c000, 0x14ffff) AM_RAM_WRITE(nmk_bgvideoram3_w) AM_BASE(&nmk_bgvideoram3)
-	
+
 	AM_RANGE(0x170000, 0x170fff) AM_MIRROR(0x1000) AM_RAM_WRITE(nmk_txvideoram_w) AM_BASE(&nmk_txvideoram)
 	AM_RANGE(0x1f0000, 0x1fffff) AM_RAM AM_BASE(&nmk16_mainram)
 ADDRESS_MAP_END
@@ -1027,17 +1027,17 @@ static ADDRESS_MAP_START( raphero_map, ADDRESS_SPACE_PROGRAM, 16 )
 	AM_RANGE(0x100018, 0x100019) AM_WRITE(nmk_tilebank_w)
 	AM_RANGE(0x10001e, 0x10001f) AM_WRITE(macross2_sound_command_w)	/* to Z80 */
 	AM_RANGE(0x120000, 0x1207ff) AM_RAM_WRITE(paletteram16_RRRRGGGGBBBBRGBx_word_w) AM_BASE(&paletteram16)
-	
+
 	AM_RANGE(0x130000, 0x1301ff) AM_RAM AM_BASE(&gunnail_scrollram)
 	AM_RANGE(0x130200, 0x1303ff) AM_RAM AM_BASE(&gunnail_scrollramy)
 	AM_RANGE(0x130400, 0x1307ff) AM_RAM
-	
+
 	AM_RANGE(0x140000, 0x143fff) AM_RAM_WRITE(nmk_bgvideoram0_w) AM_BASE(&nmk_bgvideoram0)
 	AM_RANGE(0x144000, 0x147fff) AM_RAM_WRITE(nmk_bgvideoram1_w) AM_BASE(&nmk_bgvideoram1)
 	AM_RANGE(0x148000, 0x14bfff) AM_RAM_WRITE(nmk_bgvideoram2_w) AM_BASE(&nmk_bgvideoram2)
 	AM_RANGE(0x14c000, 0x14ffff) AM_RAM_WRITE(nmk_bgvideoram3_w) AM_BASE(&nmk_bgvideoram3)
-	
+
-	
+
 	AM_RANGE(0x170000, 0x170fff) AM_MIRROR(0x1000) AM_RAM_WRITE(nmk_txvideoram_w) AM_BASE(&nmk_txvideoram)
 	AM_RANGE(0x1f0000, 0x1fffff) AM_RAM AM_BASE(&nmk16_mainram)
 ADDRESS_MAP_END
@@ -4703,7 +4703,7 @@ static ADDRESS_MAP_START( afega, ADDRESS_SPACE_PROGRAM, 16 )
 /**/AM_RANGE(0x08c000, 0x08c003) AM_RAM_WRITE(afega_scroll0_w) AM_BASE(&afega_scroll_0)	// Scroll
 /**/AM_RANGE(0x08c004, 0x08c007) AM_RAM_WRITE(afega_scroll1_w) AM_BASE(&afega_scroll_1)	//
 	AM_RANGE(0x08c008, 0x08ffff) AM_WRITE(SMH_RAM)				//
-/**/AM_RANGE(0x090000, 0x093fff) AM_RAM_WRITE(nmk_bgvideoram0_w) AM_BASE(&nmk_bgvideoram0)	// Layer 0					// ?
+/**/AM_RANGE(0x090000, 0x093fff) AM_RAM_WRITE(nmk_bgvideoram0_w) AM_BASE(&nmk_bgvideoram0)	// Layer 0                  // ?
 /**/AM_RANGE(0x09c000, 0x09c7ff) AM_RAM_WRITE(nmk_txvideoram_w) AM_BASE(&nmk_txvideoram)	// Layer 1
 
 	AM_RANGE(0x0c0000, 0x0cffff) AM_RAM_WRITE(nmk16_mainram_strange_w) AM_SHARE(1) AM_BASE(&nmk16_mainram)
@@ -4942,7 +4942,7 @@ static MACHINE_DRIVER_START( grdnstrm )
 
 	/* basic machine hardware */
 	MDRV_IMPORT_FROM(stagger1)
-	
+
 	/* video hardware */
 	MDRV_GFXDECODE(grdnstrm)
 	MDRV_VIDEO_START(firehawk)
@@ -4953,7 +4953,7 @@ static MACHINE_DRIVER_START( grdnstrmk )
 
 	/* basic machine hardware */
 	MDRV_IMPORT_FROM(stagger1)
-	
+
 	/* video hardware */
 	MDRV_GFXDECODE(grdnstrm)
 	MDRV_VIDEO_START(grdnstrm)

src/mame/drivers/pbaction.c

@@ -419,7 +419,7 @@ ROM_START( pbaction4 )
 	ROM_IGNORE(0x4000)
 	ROM_LOAD( "pinball_05.bin",     0x0c000, 0x4000, CRC(c9a4dfea) SHA1(38fb34f21773d652b14108e4a083d7c7acecdd03) )
 	ROM_IGNORE(0x4000)
-	
+
 	ROM_REGION( 0x06000, "sprites", 0 )
 	ROM_LOAD( "pinball_14.bin",     0x00000, 0x2000, CRC(d1795ef5) SHA1(69ad8e419e340d2f548468ed7838102789b978da) )
 	ROM_LOAD( "pinball_13.bin",     0x02000, 0x2000, CRC(f28df203) SHA1(060f70ed6386c808303a488c97691257681bd8f3) )

src/mame/drivers/photon.c

@@ -1,27 +1,27 @@
 /*
-	Photon System
+    Photon System
 
-	Uses PK8000 emulation by Miodrag Milanovic
+    Uses PK8000 emulation by Miodrag Milanovic
-	Imported to MAME by Mariusz Wojcieszek
+    Imported to MAME by Mariusz Wojcieszek
 
-	Russian arcade system based on PK8000 home computer, created by unknown manufacturer
+    Russian arcade system based on PK8000 home computer, created by unknown manufacturer
-	in late 1980s or early 1990s.
+    in late 1980s or early 1990s.
 
-	Following games were produced for this system:
+    Following games were produced for this system:
-	- Tetris
+    - Tetris
-	- Python
+    - Python
-	- Treasure/Labyrinth
+    - Treasure/Labyrinth
 
-	Dump was made using custom adaptor, hence it is marked as bad dump. 
+    Dump was made using custom adaptor, hence it is marked as bad dump.
-	The real machine has following roms:
+    The real machine has following roms:
-	0000...07FFh - ROM1 (D41) 
+    0000...07FFh - ROM1 (D41)
-	0800...0FFFh - ROM2 (D42) 
+    0800...0FFFh - ROM2 (D42)
-	1000...17FFh - ROM3 (D43) 
+    1000...17FFh - ROM3 (D43)
-	1800...1FFFh - not chip sealed (D44) 
+    1800...1FFFh - not chip sealed (D44)
-	2000...27FFh - ROM5 (D45) 
+    2000...27FFh - ROM5 (D45)
-	2800...2FFFh - ROM6 (D46) 
+    2800...2FFFh - ROM6 (D46)
-	3000...37FFh - ROM7 (D47) 
+    3000...37FFh - ROM7 (D47)
-	3000...37FFh - ROM8 (D48) 
+    3000...37FFh - ROM8 (D48)
 
 */
 
@@ -31,15 +31,15 @@
 #include "machine/i8255a.h"
 #include "sound/dac.h"
 
-static void pk8000_set_bank(running_machine *machine,UINT8 data) 
+static void pk8000_set_bank(running_machine *machine,UINT8 data)
-{ 
+{
 	UINT8 *rom = memory_region(machine, "maincpu");
 	UINT8 *ram = memory_region(machine, "maincpu");
 	UINT8 block1 = data & 3;
 	UINT8 block2 = (data >> 2) & 3;
 	UINT8 block3 = (data >> 4) & 3;
 	UINT8 block4 = (data >> 6) & 3;
-	
+
 	switch(block1) {
 		case 0:
 				memory_set_bankptr(machine, 1, rom + 0x10000);
@@ -47,14 +47,14 @@ static void pk8000_set_bank(running_machine *machine,UINT8 data)
 				break;
 		case 1: break;
 		case 2: break;
-		case 3:				
+		case 3:
 				memory_set_bankptr(machine, 1, ram);
 				memory_set_bankptr(machine, 5, ram);
 				break;
 	}
-	
+
 	switch(block2) {
-		case 0:				
+		case 0:
 				memory_set_bankptr(machine, 2, rom + 0x14000);
 				memory_set_bankptr(machine, 6, ram + 0x4000);
 				break;
@@ -88,7 +88,7 @@ static void pk8000_set_bank(running_machine *machine,UINT8 data)
 				memory_set_bankptr(machine, 4, ram + 0xc000);
 				memory_set_bankptr(machine, 8, ram + 0xc000);
 				break;
-	}						
+	}
 }
 static WRITE8_DEVICE_HANDLER(pk8000_80_porta_w)
 {
@@ -116,17 +116,17 @@ static I8255A_INTERFACE( pk8000_ppi8255_interface_1 )
 };
 
 static READ8_DEVICE_HANDLER(pk8000_84_porta_r)
-{	
+{
 	return pk8000_video_mode;
 }
 
 static WRITE8_DEVICE_HANDLER(pk8000_84_porta_w)
-{	
+{
 	pk8000_video_mode = data;
 }
 
 static WRITE8_DEVICE_HANDLER(pk8000_84_portc_w)
-{	
+{
 	pk8000_video_enable = BIT(data,4);
 }
 static I8255A_INTERFACE( pk8000_ppi8255_interface_2 )
@@ -151,7 +151,7 @@ static ADDRESS_MAP_START( pk8000_io , ADDRESS_SPACE_IO, 8)
 	ADDRESS_MAP_UNMAP_HIGH
 	AM_RANGE(0x80, 0x83) AM_DEVREADWRITE("ppi8255_1", i8255a_r, i8255a_w)
 	AM_RANGE(0x84, 0x87) AM_DEVREADWRITE("ppi8255_2", i8255a_r, i8255a_w)
-	AM_RANGE(0x88, 0x88) AM_READWRITE(pk8000_video_color_r,pk8000_video_color_w)	
+	AM_RANGE(0x88, 0x88) AM_READWRITE(pk8000_video_color_r,pk8000_video_color_w)
 	AM_RANGE(0x8c, 0x8c) AM_READ_PORT("JOY1")
 	AM_RANGE(0x8d, 0x8d) AM_READ_PORT("JOY2")
 	AM_RANGE(0x90, 0x90) AM_READWRITE(pk8000_text_start_r,pk8000_text_start_w)
@@ -164,7 +164,7 @@ ADDRESS_MAP_END
 static INPUT_PORTS_START( photon )
 	PORT_START("JOY1")
 	PORT_BIT(0x01, IP_ACTIVE_HIGH, IPT_JOYSTICK_UP) PORT_PLAYER(1)
-	PORT_BIT(0x02, IP_ACTIVE_HIGH, IPT_JOYSTICK_DOWN) PORT_PLAYER(1)	
+	PORT_BIT(0x02, IP_ACTIVE_HIGH, IPT_JOYSTICK_DOWN) PORT_PLAYER(1)
 	PORT_BIT(0x04, IP_ACTIVE_HIGH, IPT_JOYSTICK_LEFT) PORT_PLAYER(1)
 	PORT_BIT(0x08, IP_ACTIVE_HIGH, IPT_JOYSTICK_RIGHT) PORT_PLAYER(1)
 	PORT_BIT(0x10, IP_ACTIVE_HIGH, IPT_COIN1)
@@ -174,7 +174,7 @@ static INPUT_PORTS_START( photon )
 
 	PORT_START("JOY2")
 	PORT_BIT(0x01, IP_ACTIVE_HIGH, IPT_JOYSTICK_UP) PORT_PLAYER(2)
-	PORT_BIT(0x02, IP_ACTIVE_HIGH, IPT_JOYSTICK_DOWN) PORT_PLAYER(2)	
+	PORT_BIT(0x02, IP_ACTIVE_HIGH, IPT_JOYSTICK_DOWN) PORT_PLAYER(2)
 	PORT_BIT(0x04, IP_ACTIVE_HIGH, IPT_JOYSTICK_LEFT) PORT_PLAYER(2)
 	PORT_BIT(0x08, IP_ACTIVE_HIGH, IPT_JOYSTICK_RIGHT) PORT_PLAYER(2)
 	PORT_BIT(0x10, IP_ACTIVE_HIGH, IPT_COIN2)
@@ -190,14 +190,14 @@ INTERRUPT_GEN( pk8000_interrupt )
 }
 
 static IRQ_CALLBACK(pk8000_irq_callback)
-{	
-	return 0xff;
-} 
-
-
-static MACHINE_RESET(pk8000) 
 {
-	pk8000_set_bank(machine,0);	
+	return 0xff;
+}
+
+
+static MACHINE_RESET(pk8000)
+{
+	pk8000_set_bank(machine,0);
 	cpu_set_irq_callback(cputag_get_cpu(machine, "maincpu"), pk8000_irq_callback);
 }
 
@@ -215,11 +215,11 @@ static MACHINE_DRIVER_START( photon )
     /* basic machine hardware */
     MDRV_CPU_ADD("maincpu",8080, 1780000)
     MDRV_CPU_PROGRAM_MAP(pk8000_mem)
-    MDRV_CPU_IO_MAP(pk8000_io)	
+    MDRV_CPU_IO_MAP(pk8000_io)
     MDRV_CPU_VBLANK_INT("screen", pk8000_interrupt)
 
     MDRV_MACHINE_RESET(pk8000)
-	
+
     /* video hardware */
     MDRV_SCREEN_ADD("screen", RASTER)
     MDRV_SCREEN_REFRESH_RATE(50)
@@ -232,10 +232,10 @@ static MACHINE_DRIVER_START( photon )
 
     MDRV_VIDEO_START(photon)
     MDRV_VIDEO_UPDATE(photon)
-    
+
     MDRV_I8255A_ADD( "ppi8255_1", pk8000_ppi8255_interface_1 )
     MDRV_I8255A_ADD( "ppi8255_2", pk8000_ppi8255_interface_2 )
-    
+
     /* audio hardware */
 	MDRV_SPEAKER_STANDARD_MONO("mono")
 	MDRV_SOUND_ADD("dac", DAC, 0)

src/mame/drivers/plygonet.c

@@ -1,81 +1,81 @@
 /*
-	Polygonet Commanders (Konami, 1993)
+    Polygonet Commanders (Konami, 1993)
-	Poly-Net Warriors (Konami, 1993)
+    Poly-Net Warriors (Konami, 1993)
 
-	Preliminary driver by R. Belmont
+    Preliminary driver by R. Belmont
-	Additional work by Andrew Gardner
+    Additional work by Andrew Gardner
 
-	This is Konami's first 3D game!
+    This is Konami's first 3D game!
 
-	Hardware:
+    Hardware:
-	68EC020 @ 16 MHz
+    68EC020 @ 16 MHz
-	Motorola XC56156-40 DSP @ 40 MHz
+    Motorola XC56156-40 DSP @ 40 MHz
-	Z80 + K054539 for sound
+    Z80 + K054539 for sound
-	Network to connect up to 4 PCBs.
+    Network to connect up to 4 PCBs.
 
-	Video hardware:
+    Video hardware:
-	TTL text plane similar to Run and Gun.
+    TTL text plane similar to Run and Gun.
-	Konami K054009(x2) + K054010(x2) (polygon rasterizers)
+    Konami K054009(x2) + K054010(x2) (polygon rasterizers)
-	Konami K053936 "PSAC2" (3d roz plane, used for backgrounds)
+    Konami K053936 "PSAC2" (3d roz plane, used for backgrounds)
-	24.0 MHz crystal to drive the video hardware
+    24.0 MHz crystal to drive the video hardware
 
-	Driver includes:
+    Driver includes:
-	- 68020 memory map
+    - 68020 memory map
-	- Z80 + sound system
+    - Z80 + sound system
-	- EEPROM
+    - EEPROM
-	- service switch
+    - service switch
-	- TTL text plane
+    - TTL text plane
 
-	Driver needs:
+    Driver needs:
-	- Handle network at 580800 so game starts
+    - Handle network at 580800 so game starts
-	- Polygon rasterization (K054009 + K054010)
+    - Polygon rasterization (K054009 + K054010)
-	- Hook up PSAC2 (gfx decode for it is already present and correct)
+    - Hook up PSAC2 (gfx decode for it is already present and correct)
-	- Palettes
+    - Palettes
-	- Controls
+    - Controls
-	- Priorities.  From the original board it appears they're fixed, in front to back order:
+    - Priorities.  From the original board it appears they're fixed, in front to back order:
-	  (all the way in front) TTL text layer -> polygons -> PSAC2 (all the way in back)
+      (all the way in front) TTL text layer -> polygons -> PSAC2 (all the way in back)
 
-	Tech info by Phil Bennett, from the schematics:
+    Tech info by Phil Bennett, from the schematics:
 
-	68000 address map
+    68000 address map
-	=================
+    =================
 
-	400000-43ffff = PSAC
+    400000-43ffff = PSAC
-	440000-47ffff = PSVR
+    440000-47ffff = PSVR
-	480000-4bffff = IO
+    480000-4bffff = IO
-	4c0000-4fffff = SYS
+    4c0000-4fffff = SYS
-	500000-53ffff = DSP
+    500000-53ffff = DSP
-	540000-57ffff = FIX
+    540000-57ffff = FIX
-	580000-5bffff = OP1
+    580000-5bffff = OP1
-	5c0000-5fffff = UNUSED
+    5c0000-5fffff = UNUSED
 
 
-	SYS (Write only?)
+    SYS (Write only?)
-	=================
+    =================
 
-	D28 = /FIXKILL     - Disable 'FIX' layer?
+    D28 = /FIXKILL     - Disable 'FIX' layer?
-	D27 = MUTE
+    D27 = MUTE
-	D26 = EEPROM CLK
+    D26 = EEPROM CLK
-	D25 = EEPROM CS
+    D25 = EEPROM CS
-	D24 = EEPROM DATA
+    D24 = EEPROM DATA
-	D23 = BRMAS        - 68k bus error mask
+    D23 = BRMAS        - 68k bus error mask
-	D22 = L7MAS        - L7 interrupt mask (unusued - should always be '1')
+    D22 = L7MAS        - L7 interrupt mask (unusued - should always be '1')
-	D21 = /L5MAS       - L5 interrupt mask/acknowledge
+    D21 = /L5MAS       - L5 interrupt mask/acknowledge
-	D20 = L3MAS        - L3 interrupt mask
+    D20 = L3MAS        - L3 interrupt mask
-	D19 = VFLIP        - Flip video vertically
+    D19 = VFLIP        - Flip video vertically
-	D18 = HFLIP        - Flip video horizontally
+    D18 = HFLIP        - Flip video horizontally
-	D17 = COIN2        - Coin counter 2
+    D17 = COIN2        - Coin counter 2
-	D16 = COIN1        - Coin counter 1
+    D16 = COIN1        - Coin counter 1
 
 
-	DSP
+    DSP
-	===
+    ===
 
-	500000-503fff = HCOM     - 16kB common RAM
+    500000-503fff = HCOM     - 16kB common RAM
-	504000-504fff = CONTROL  - DSP/Host Control
+    504000-504fff = CONTROL  - DSP/Host Control
-					D10? = COMBNK - Switch between 68k and DSP access to common RAM
+                    D10? = COMBNK - Switch between 68k and DSP access to common RAM
-					D08? = RESN   - Reset DSP
+                    D08? = RESN   - Reset DSP
-	506000-506fff = HEN      - DSP/Host interface
+    506000-506fff = HEN      - DSP/Host interface
 
 */
 
@@ -723,7 +723,7 @@ static DRIVER_INIT(polygonet)
 ROM_START( plygonet )
 	/* main program */
 	ROM_REGION( 0x200000, "maincpu", 0)
-	ROM_LOAD32_BYTE( "305uaa01.4k", 0x000003, 512*1024, CRC(8bdb6c95) SHA1(e981833842f8fd89b9726901fbe2058444204792) ) /* Boards exist without the "UA" in the label IE: 305a01, ect... */ 
+	ROM_LOAD32_BYTE( "305uaa01.4k", 0x000003, 512*1024, CRC(8bdb6c95) SHA1(e981833842f8fd89b9726901fbe2058444204792) ) /* Boards exist without the "UA" in the label IE: 305a01, ect... */
 	ROM_LOAD32_BYTE( "305uaa02.2k", 0x000002, 512*1024, CRC(4d7e32b3) SHA1(25731526535036972577637d186f02ae467296bd) )
 	ROM_LOAD32_BYTE( "305uaa03.2h", 0x000001, 512*1024, CRC(36e4e3fe) SHA1(e8fcad4f196c9b225a0fbe70791493ff07c648a9) )
 	ROM_LOAD32_BYTE( "305uaa04.4h", 0x000000, 512*1024, CRC(d8394e72) SHA1(eb6bcf8aedb9ba5843204ab8aacb735cbaafb74d) )

src/mame/drivers/psikyo.c

@@ -1247,7 +1247,7 @@ static MACHINE_DRIVER_START( gunbird )
 
 	/* video hardware */
 	MDRV_SCREEN_ADD("screen", RASTER)
-	MDRV_SCREEN_REFRESH_RATE(59.3)    
+	MDRV_SCREEN_REFRESH_RATE(59.3)
 	MDRV_SCREEN_VBLANK_TIME(ATTOSECONDS_IN_USEC(2500) /* not accurate */)	// we're using IPT_VBLANK
 	MDRV_SCREEN_FORMAT(BITMAP_FORMAT_INDEXED16)
 	MDRV_SCREEN_SIZE(320, 256)

src/mame/drivers/quakeat.c

@@ -50,10 +50,10 @@ Quantum3D's GCI (Game Control Interface) - a unique, low-cost subsystem
 
 ===============================================================================
 TODO:
-	* Add BIOS dump (custom 440LX motherboard or standard?)
+    * Add BIOS dump (custom 440LX motherboard or standard?)
-	* Hook up PC hardware
+    * Hook up PC hardware
-	* Hook up the GCI (details? ROMs?)
+    * Hook up the GCI (details? ROMs?)
-	* What's the dongle do?
+    * What's the dongle do?
 ===============================================================================
 */
 
@@ -81,22 +81,22 @@ static ADDRESS_MAP_START( quake_map, ADDRESS_SPACE_PROGRAM, 32 )
 ADDRESS_MAP_END
 
 static ADDRESS_MAP_START( quake_io, ADDRESS_SPACE_IO, 32 )
-//	AM_RANGE(0x0000, 0x001f) AM_DEVREADWRITE8("dma8237_1", dma8237_r, dma8237_w, 0xffffffff)
+//  AM_RANGE(0x0000, 0x001f) AM_DEVREADWRITE8("dma8237_1", dma8237_r, dma8237_w, 0xffffffff)
 	AM_RANGE(0x0020, 0x003f) AM_DEVREADWRITE8("pic8259_1", pic8259_r, pic8259_w, 0xffffffff)
-//	AM_RANGE(0x0040, 0x005f) AM_DEVREADWRITE8("pit8254", pit8253_r, pit8253_w, 0xffffffff)
+//  AM_RANGE(0x0040, 0x005f) AM_DEVREADWRITE8("pit8254", pit8253_r, pit8253_w, 0xffffffff)
-//	AM_RANGE(0x0060, 0x006f) AM_READWRITE(kbdc8042_32le_r,			kbdc8042_32le_w)
+//  AM_RANGE(0x0060, 0x006f) AM_READWRITE(kbdc8042_32le_r,          kbdc8042_32le_w)
-//	AM_RANGE(0x0070, 0x007f) AM_READWRITE(mc146818_port32le_r,		mc146818_port32le_w)
+//  AM_RANGE(0x0070, 0x007f) AM_READWRITE(mc146818_port32le_r,      mc146818_port32le_w)
-//	AM_RANGE(0x0080, 0x009f) AM_READWRITE(at_page32_r,				at_page32_w)
+//  AM_RANGE(0x0080, 0x009f) AM_READWRITE(at_page32_r,              at_page32_w)
 	AM_RANGE(0x00a0, 0x00bf) AM_DEVREADWRITE8("pic8259_2", pic8259_r, pic8259_w, 0xffffffff)
-//	AM_RANGE(0x00c0, 0x00df) AM_DEVREADWRITE("dma8237_2", at32_dma8237_2_r, at32_dma8237_2_w)
+//  AM_RANGE(0x00c0, 0x00df) AM_DEVREADWRITE("dma8237_2", at32_dma8237_2_r, at32_dma8237_2_w)
 	AM_RANGE(0x00e8, 0x00eb) AM_NOP
-//	AM_RANGE(0x01f0, 0x01f7) AM_DEVREADWRITE("ide", ide_r, ide_w)
+//  AM_RANGE(0x01f0, 0x01f7) AM_DEVREADWRITE("ide", ide_r, ide_w)
 	AM_RANGE(0x0300, 0x03af) AM_NOP
 	AM_RANGE(0x03b0, 0x03df) AM_NOP
-//	AM_RANGE(0x0278, 0x027b) AM_WRITE(pnp_config_w)
+//  AM_RANGE(0x0278, 0x027b) AM_WRITE(pnp_config_w)
-//	AM_RANGE(0x03f0, 0x03ff) AM_DEVREADWRITE("ide", fdc_r, fdc_w)
+//  AM_RANGE(0x03f0, 0x03ff) AM_DEVREADWRITE("ide", fdc_r, fdc_w)
-//	AM_RANGE(0x0a78, 0x0a7b) AM_WRITE(pnp_data_w)
+//  AM_RANGE(0x0a78, 0x0a7b) AM_WRITE(pnp_data_w)
-//	AM_RANGE(0x0cf8, 0x0cff) AM_DEVREADWRITE("pcibus", pci_32le_r,	pci_32le_w)
+//  AM_RANGE(0x0cf8, 0x0cff) AM_DEVREADWRITE("pcibus", pci_32le_r,  pci_32le_w)
 ADDRESS_MAP_END
 
 /*************************************************************

src/mame/drivers/seta.c

@@ -1946,7 +1946,7 @@ static ADDRESS_MAP_START( jjsquawb_map, ADDRESS_SPACE_PROGRAM, 16 )
 	AM_RANGE(0x908000, 0x908005) AM_RAM AM_BASE(&seta_vctrl_0)		// VRAM 0&1 Ctrl
 	AM_RANGE(0x909000, 0x909005) AM_RAM AM_BASE(&seta_vctrl_2)		// VRAM 2&3 Ctrl
 	AM_RANGE(0xa0a000, 0xa0a607) AM_RAM AM_BASE(&spriteram16)		// RZ: Sprites Y
-// AM_RANGE(0xa80000, 0xa80001) AM_RAM								// ? 0x4000
+// AM_RANGE(0xa80000, 0xa80001) AM_RAM                              // ? 0x4000
 	AM_RANGE(0xb0c000, 0xb0ffff) AM_RAM AM_BASE(&spriteram16_2)		// RZ: Sprites Code + X + Attr
 	AM_RANGE(0xc00000, 0xc03fff) AM_DEVREADWRITE("x1", seta_sound_word_r,seta_sound_word_w)	// Sound
 #if __uPD71054_TIMER

src/mame/drivers/vpoker.c

@@ -16,64 +16,64 @@ TODO:
 
 Bought as "old poker game by videotronics early 80's"
 
-Scratched on the CPU board	SN1069
+Scratched on the CPU board  SN1069
-Scratched on the CPU board	SN1069
+Scratched on the CPU board  SN1069
 
 CPU board
-.0	2716	stickered	DRAWPKR2	located top left
+.0  2716    stickered   DRAWPKR2    located top left
-				8-F
+                8-F
-				REV A
+                REV A
 
-.1	2716	stickered	DRAWPKR2	located next to .0
+.1  2716    stickered   DRAWPKR2    located next to .0
-				0-7
+                0-7
-				REV A
+                REV A
 
 ROM board
 Top of board left to right
-.R0	2716	stickered	RA
+.R0 2716    stickered   RA
-				0-7
+                0-7
 
-.R1	2716	stickered	RA
+.R1 2716    stickered   RA
-				8-F
+                8-F
 
-.R2	2716	stickered	BA
+.R2 2716    stickered   BA
-				0-7
+                0-7
 
-.R3	2716	stickered	BA
+.R3 2716    stickered   BA
-				8-F
+                8-F
 
-.R4	2716	stickered	GA
+.R4 2716    stickered   GA
-				0-7
+                0-7
 
-.R5	2716	stickered	GA
+.R5 2716    stickered   GA
-				8-F
+                8-F
 
 
 Below top row left to right
-.R6	2716	stickered	RB
+.R6 2716    stickered   RB
-				0-7
+                0-7
 
-.R7	2716	stickered	RB
+.R7 2716    stickered   RB
-				8-F
+                8-F
 
-.R8	2716	stickered	BB
+.R8 2716    stickered   BB
-				0-7
+                0-7
 
-.R9	2716	stickered	BB
+.R9 2716    stickered   BB
-				8-F
+                8-F
 
-.R10	2716	stickered	GB
+.R10    2716    stickered   GB
-				0-7
+                0-7
 
-.R11	2716	stickered	GB
+.R11    2716    stickered   GB
-				8-F
+                8-F
 
 ROM data showed cards
 
 6809 cpu
 4.000Mhz crystal
 MC6840P
-mm74c920J/mmc6551j-9	x2
+mm74c920J/mmc6551j-9    x2
 
 
 **************************************************************************************************************/
@@ -130,7 +130,7 @@ static WRITE8_HANDLER( blitter_w )
 		blit_offs = (blit_ram[1] & 0x01)<<8|(blit_ram[2] & 0xff);
 
 		videoram[blit_offs] = blit_ram[0];
-//		printf("%02x %02x %02x %02x %02x %02x %02x %02x\n",blit_ram[0],blit_ram[1],blit_ram[2],blit_ram[3],blit_ram[4],blit_ram[5],blit_ram[6],blit_ram[7]);
+//      printf("%02x %02x %02x %02x %02x %02x %02x %02x\n",blit_ram[0],blit_ram[1],blit_ram[2],blit_ram[3],blit_ram[4],blit_ram[5],blit_ram[6],blit_ram[7]);
 	}
 }
 
@@ -399,7 +399,7 @@ static MACHINE_DRIVER_START( vpoker )
 	/* basic machine hardware */
 	MDRV_CPU_ADD("maincpu",M6809,XTAL_4MHz)
 	MDRV_CPU_PROGRAM_MAP(main_map)
-//	MDRV_CPU_VBLANK_INT("screen",irq0_line_hold) //irq0 valid too
+//  MDRV_CPU_VBLANK_INT("screen",irq0_line_hold) //irq0 valid too
 
 	/* video hardware */
 	MDRV_SCREEN_ADD("screen", RASTER)
@@ -420,8 +420,8 @@ static MACHINE_DRIVER_START( vpoker )
 
 	/* sound hardware */
 	MDRV_SPEAKER_STANDARD_MONO("mono")
-//	MDRV_SOUND_ADD("ay", AY8910, 8000000/4 /* guess */)
+//  MDRV_SOUND_ADD("ay", AY8910, 8000000/4 /* guess */)
-//	MDRV_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.30)
+//  MDRV_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.30)
 MACHINE_DRIVER_END
 
 /***************************************************************************

src/mame/machine/kaneko16.c

@@ -383,7 +383,7 @@ static UINT8 calc3_table04[64] = {
     0xff,0x4a,0x62,0xa3,0xf4,0xb4,0x8c,0x2d,0x84,0xbd,0x87,0x3a,0x9e,0xe9,0xd7,0x12,
     0xff,0x50,0x40,0x39,0xa6,0x47,0xd9,0x38,0x89,0x3c,0x62,0xa0,0x86,0xe2,0xd7,0x4d,
 	0x9c,0x8e,0x45,0xe8,0x5b,0xe1,0xdd,0xaf,0x99,0xa8,0x47,0x79,0x67,0x00,0x38,0xf4,
-	0x43,0xbe,0x47,0x32,0x8f,0x0e,0xfd,0x64,0x42,0x59,0x2b,0xe5,0xde,0x6d,0x80,0x7a, 
+	0x43,0xbe,0x47,0x32,0x8f,0x0e,0xfd,0x64,0x42,0x59,0x2b,0xe5,0xde,0x6d,0x80,0x7a,
  };
 
 
@@ -742,7 +742,7 @@ UINT16 cakc3_checkumaddress;
 extern UINT16 calc3_mcu_crc;
 extern UINT16* kaneko16_calc3_fakeram;
 // from brap boys, might be polluted with shogun warriors values tho as was running shogun code at the time
-static UINT16 kaneko16_eeprom_data[0x40] = 
+static UINT16 kaneko16_eeprom_data[0x40] =
 {
 	0x0001, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,	0x0000, 0x0000,
 	0x0000, 0x0003, 0x0002, 0x1020, 0x0002, 0x6010, 0x0101, 0x0101,
@@ -751,14 +751,14 @@ static UINT16 kaneko16_eeprom_data[0x40] =
 	0x3038, 0x7FFF, 0xFFFF, 0xFFFF,	0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF,
 	0xFFFF, 0xFFFF,	0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF,
 	0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF,	0xFFFF, 0xFFFF,
-	0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF,	0x003B, 0xFFFF, 0xFFFF, 0xFFFF						
+	0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF,	0x003B, 0xFFFF, 0xFFFF, 0xFFFF
 };
 
 static void calc3_mcu_run(running_machine *machine)
 {
 	UINT16 mcu_command;
 	int i;
-	
+
 	if ( calc3_mcu_status != (1|2|4|8) )	return;
 
 	//calc3_mcu_status = 0;
@@ -778,7 +778,7 @@ static void calc3_mcu_run(running_machine *machine)
 		{
 			// clear old command (handshake to main cpu)
 			kaneko16_mcu_ram[(calc3_mcu_command_offset>>1)+0] = 0x0000;
-			
+
 
 			calc3_dsw_addr =           kaneko16_mcu_ram[(0>>1) + 1];
 			calc3_eeprom_addr =        kaneko16_mcu_ram[(0>>1) + 2];
@@ -787,19 +787,19 @@ static void calc3_mcu_run(running_machine *machine)
 			cakc3_checkumaddress =     kaneko16_mcu_ram[(0>>1) + 5];
 			calc3_writeaddress =      (kaneko16_mcu_ram[(0>>1) + 6] << 16) |
 			                          (kaneko16_mcu_ram[(0>>1) + 7]);
-	
+
 			printf("Calc 3 Init Command - %04x DSW addr\n",  calc3_dsw_addr);
 			printf("Calc 3 Init Command - %04x Eeprom Address\n",  calc3_eeprom_addr);
 			printf("Calc 3 Init Command - %04x Future Commands Base\n",  calc3_mcu_command_offset);
 			printf("Calc 3 Init Command - %04x Poll / Busy Address\n",  calc3_poll_addr);
 			printf("Calc 3 Init Command - %04x ROM Checksum Address\n",  cakc3_checkumaddress);
 			printf("Calc 3 Init Command - %08x Data Write Address\n",  calc3_writeaddress);
-			
+
 			kaneko16_mcu_ram[calc3_dsw_addr/2] = ~input_port_read(machine, "DSW1");	// DSW
 			kaneko16_mcu_ram[cakc3_checkumaddress / 2] = calc3_mcu_crc;				// MCU Rom Checksum!
 
 			for (i=0;i<0x40;i++)
-			{				
+			{
 				kaneko16_mcu_ram[(calc3_eeprom_addr / 2)+i] = kaneko16_eeprom_data[i];//((eepromData[i]&0xff00)>>8) |  ((eepromData[i]&0x00ff)<<8);
 			}
 
@@ -812,7 +812,7 @@ static void calc3_mcu_run(running_machine *machine)
 
 			// clear old command (handshake to main cpu)
 			kaneko16_mcu_ram[calc3_mcu_command_offset>>1] = 0x0000;;
-			
+
 			logerror("Calc3 transfer request, %d transfers\n", num_transfers);
 
 			for (i=0;i<num_transfers;i++)
@@ -822,7 +822,7 @@ static void calc3_mcu_run(running_machine *machine)
 				UINT8  commandtabl = (param1&0xff00) >> 8;
 				UINT16 commandaddr = (param1&0x00ff) | (param2&0xff00);
 				UINT8  commandunk =  (param2&0x00ff); // brap boys sets.. seems to cause further writebasck address displacement??
-				
+
 				UINT32 fakeoffs;
 
 				printf("transfer %d table %02x writeback address %04x unknown %02x\n", i, commandtabl, commandaddr, commandunk);
@@ -831,7 +831,7 @@ static void calc3_mcu_run(running_machine *machine)
 				// but I'm not sure how, for now write it back to a FAKE region instead
 				fakeoffs = 0x1e00*commandtabl;
 				fakeoffs+=0xf00000;
-				
+
 				// HACK HACK HACK, I don't know what commandunk does, but Brap Boys polls a table of addresses and doesn't do anything
 				// more unless they change.  The usual writeback address doesn't touch this table, so I think this unknown value must
 				// cause an additional displacement to cause the writeback address to populate that table.. maybe
@@ -842,8 +842,8 @@ static void calc3_mcu_run(running_machine *machine)
 
 					printf("writing back address %08x to %08x\n", calc3_writeaddress, commandaddr);
 					kaneko16_mcu_ram[(commandaddr>>1)+0] = (calc3_writeaddress>>16)&0xffff;
-					kaneko16_mcu_ram[(commandaddr>>1)+1] = (calc3_writeaddress&0xffff);			
+					kaneko16_mcu_ram[(commandaddr>>1)+1] = (calc3_writeaddress&0xffff);
-					
+
 				}
 				else
 				{
@@ -854,7 +854,7 @@ static void calc3_mcu_run(running_machine *machine)
 
 					printf("writing back fake address %08x to %08x\n", fakeoffs, commandaddr);
 					kaneko16_mcu_ram[(commandaddr>>1)+0] = (fakeoffs>>16)&0xffff;
-					kaneko16_mcu_ram[(commandaddr>>1)+1] = (fakeoffs&0xffff);			
+					kaneko16_mcu_ram[(commandaddr>>1)+1] = (fakeoffs&0xffff);
 				}
 			}
 

src/mame/machine/namcos2.c

@@ -132,7 +132,7 @@ MACHINE_RESET( namcos2 )
 		namcos2_68k_slave_C148[loop] = 0;
 		namcos2_68k_gpu_C148[loop] = 0;
 	}
-	
+
 	/* reset POSIRQ timer */
 	timer_adjust_oneshot(namcos2_posirq_timer, attotime_never, 0);
 }
@@ -517,7 +517,7 @@ ReadWriteC148( const address_space *space, offs_t offset, UINT16 data, int bWrit
 	case 0x1c0000: break; /* ? NAMCOS2_C148_0 */
 	case 0x1c2000: break; /* ? NAMCOS2_C148_1 */
 	case 0x1c4000: break; /* ? NAMCOS2_C148_2 */
-	
+
 	/* IRQ level */
 	case 0x1c6000: break; /* NAMCOS2_C148_CPUIRQ */
 	case 0x1c8000: break; /* NAMCOS2_C148_EXIRQ */
@@ -530,7 +530,7 @@ ReadWriteC148( const address_space *space, offs_t offset, UINT16 data, int bWrit
 		{
 			// mame_printf_debug( "cpu(%d) RAM[0x%06x] = 0x%x\n", cpu, addr, data );
 			/* Dubious to assert IRQ for other CPU here, but Starblade seems to rely on it.
-			   It fails to show large polygons otherwise. */
+               It fails to show large polygons otherwise. */
 			cpu_set_input_line(altcpu, pC148RegAlt[NAMCOS2_C148_CPUIRQ], ASSERT_LINE);
 		}
 		break;
@@ -674,7 +674,7 @@ static TIMER_CALLBACK( namcos2_posirq_tick )
 		}
 		return;
 	}
-	
+
 	if (namcos2_68k_master_C148[NAMCOS2_C148_POSIRQ]|namcos2_68k_slave_C148[NAMCOS2_C148_POSIRQ]) {
 		video_screen_update_partial(machine->primary_screen, param);
 		if (namcos2_68k_master_C148[NAMCOS2_C148_POSIRQ]) cputag_set_input_line(machine, "maincpu", namcos2_68k_master_C148[NAMCOS2_C148_POSIRQ] , ASSERT_LINE);
@@ -704,7 +704,7 @@ INTERRUPT_GEN( namcos2_68k_gpu_vblank )
 	/* only used by namcos21 */
 	int scanline = GetPosIRQScanline(device->machine);
 	scanline = 0x50+0x89; /* HACK for Winning Run */
-	
+
 	//printf( "namcos2_68k_gpu_vblank(%d)\n",namcos2_68k_gpu_C148[NAMCOS2_C148_POSIRQ] );
 	namcos2_adjust_posirq_timer(device->machine, scanline);
 	cpu_set_input_line(device, namcos2_68k_gpu_C148[NAMCOS2_C148_VBLANKIRQ], HOLD_LINE);

src/mame/machine/playch10.c

@@ -396,13 +396,13 @@ static void pc10_set_videorom_bank( running_machine *machine, int first, int cou
 
 	/* yeah, this is probably a horrible assumption to make.*/
 	/* but the driver is 100% consistant */
-	
+
 	len = memory_region_length(machine, "gfx2");
 	len /= 0x400;	// convert to KB
 	len /= size;	// convert to bank resolution
 	len--;			// convert to mask
 	bank &= len;	// should be the right mask
-	
+
 	for (i = 0; i < count; i++)
 	{
 		chr_page[i + first].writable = 0;
@@ -422,7 +422,7 @@ static void set_videoram_bank( running_machine *machine, int first, int count, i
 	/* assumes 8K of vram */
 	/* need 8K to fill address space */
 	/* only pinbot (8k) banks at all */
-		
+
 	for (i = 0; i < count; i++)
 	{
 		chr_page[i + first].writable = 1;

src/mame/mamedriv.c

@@ -9573,7 +9573,7 @@ Other Sun games
 
 	/* Scorpion 2 */
 	DRIVER( m_brkfst )
-	
+
 	DRIVER( m_bdrwho )
 	DRIVER( m_bdrwh1 )
 	DRIVER( m_bdrwh2 )

src/mame/video/namcos2.c

@@ -228,7 +228,7 @@ READ16_HANDLER( namcos2_68k_video_palette_r )
 	{
 		/* palette register */
 		offset &= 0x180f;
-		
+
 		/* registers 6,7: unmapped? */
 		if (offset > 0x180b) return 0xff;
 	}
@@ -241,27 +241,27 @@ WRITE16_HANDLER( namcos2_68k_video_palette_w )
 	{
 		/* palette register */
 		offset &= 0x180f;
-		
+
 		if( ACCESSING_BITS_0_7 ) data&=0xff;
 		else data>>=8;
-		
+
 		switch (offset) {
 			/* registers 0-3: clipping */
-			
+
 			/* register 4: ? */
 			/* sets using it:
-			assault:	$0020
+            assault:    $0020
-			burnforc:	$0130 after titlescreen
+            burnforc:   $0130 after titlescreen
-			dirtfoxj:	$0108 at game start
+            dirtfoxj:   $0108 at game start
-			finalap1/2/3:	$00C0
+            finalap1/2/3:   $00C0
-			finehour:	$0168 after titlescreen
+            finehour:   $0168 after titlescreen
-			fourtrax:	$00E8 and $00F0
+            fourtrax:   $00E8 and $00F0
-			luckywld:	$00E8 at titlescreen, $00A0 in game and $0118 if in tunnel
+            luckywld:   $00E8 at titlescreen, $00A0 in game and $0118 if in tunnel
-			suzuka8h1/2:	$00E8 and $00A0 */
+            suzuka8h1/2:    $00E8 and $00A0 */
 			case 0x1808: case 0x1809:
 				// if (data^namcos2_68k_palette_ram[offset]) printf("%04X\n",data<<((~offset&1)<<3)|namcos2_68k_palette_ram[offset^1]<<((offset&1)<<3));
 				break;
-			
+
 			/* register 5: POSIRQ scanline (only 8 bits used) */
 			/*case 0x180a:*/ case 0x180b:
 				if (data^namcos2_68k_palette_ram[offset]) {
@@ -269,11 +269,11 @@ WRITE16_HANDLER( namcos2_68k_video_palette_w )
 					namcos2_adjust_posirq_timer(space->machine,namcos2_GetPosIrqScanline(space->machine));
 				}
 				break;
-			
+
 			/* registers 6,7: nothing? */
 			default: break;
 		}
-		
+
 		namcos2_68k_palette_ram[offset] = data;
 	}
 	else

src/mame/video/nmk16.c

@@ -55,8 +55,8 @@ extern UINT16* nmk16_mainram;
 #define TILES_PER_PAGE_X	(0x10)
 #define TILES_PER_PAGE_Y	(0x10)
 #define PAGES_PER_TMAP_X	(0x10)
-#define PAGES_PER_TMAP_Y	(0x02)						
+#define PAGES_PER_TMAP_Y	(0x02)
-								
+
 static TILEMAP_MAPPER( afega_tilemap_scan_pages )
 {
 	return	(row / TILES_PER_PAGE_Y) * TILES_PER_PAGE_X * TILES_PER_PAGE_Y * PAGES_PER_TMAP_X +
@@ -177,7 +177,7 @@ VIDEO_START( gunnail )
 	videoshift = 64;	/* 384x224 screen, leftmost 64 pixels have to be retrieved */
 						/* from the other side of the tilemap (!) */
 	background_bitmap = NULL;
-	
+
 	nmk16_simple_scroll = 0;
 }
 
@@ -187,17 +187,17 @@ VIDEO_START( macross2 )
 	bg_tilemap1 = tilemap_create(machine, macross_get_bg1_tile_info, afega_tilemap_scan_pages,16,16,TILES_PER_PAGE_X*PAGES_PER_TMAP_X,TILES_PER_PAGE_Y*PAGES_PER_TMAP_Y);
 	bg_tilemap2 = tilemap_create(machine, macross_get_bg2_tile_info, afega_tilemap_scan_pages,16,16,TILES_PER_PAGE_X*PAGES_PER_TMAP_X,TILES_PER_PAGE_Y*PAGES_PER_TMAP_Y);
 	bg_tilemap3 = tilemap_create(machine, macross_get_bg3_tile_info, afega_tilemap_scan_pages,16,16,TILES_PER_PAGE_X*PAGES_PER_TMAP_X,TILES_PER_PAGE_Y*PAGES_PER_TMAP_Y);
-							
+
 	tx_tilemap = tilemap_create(machine, macross_get_tx_tile_info,tilemap_scan_cols,8,8,64,32);
 	spriteram_old = auto_alloc_array_clear(machine, UINT16, 0x1000/2);
 	spriteram_old2 = auto_alloc_array_clear(machine, UINT16, 0x1000/2);
 
 	tilemap_set_transparent_pen(tx_tilemap,15);
-	
+
 	videoshift = 64;	/* 384x224 screen, leftmost 64 pixels have to be retrieved */
 						/* from the other side of the tilemap (!) */
 	background_bitmap = NULL;
-	
+
 	nmk16_simple_scroll = 1;
 }
 
@@ -290,7 +290,7 @@ WRITE16_HANDLER( bioshipbg_scroll_w )
 }
 
 WRITE16_HANDLER( nmk_scroll_w )
-{	
+{
 	if (ACCESSING_BITS_0_7)
 	{
 		static UINT8 scroll[4];
@@ -589,17 +589,17 @@ VIDEO_UPDATE( gunnail )
 	y1 = cliprect->min_y;
 
 	if (!nmk16_simple_scroll)
-	{			
+	{
 		while (y1 <= cliprect->max_y)
 		{
 			int const yscroll = gunnail_scrollramy[0] + gunnail_scrollramy[y1];
 			int tilemap_bank_select;
 			tilemap* bg_tilemap = bg_tilemap0;
-		
+
 			bgclip.min_y = y1;
 			bgclip.max_y = y1;
 
-			
+
 			tilemap_bank_select = (gunnail_scrollram[0]&0x3000)>>12;
 			switch (tilemap_bank_select)
 			{
@@ -608,9 +608,9 @@ VIDEO_UPDATE( gunnail )
 				case 2: if (bg_tilemap2) bg_tilemap = bg_tilemap2; break;
 				case 3: if (bg_tilemap3) bg_tilemap = bg_tilemap3; break;
 			}
-			
+
 			tilemap_set_scroll_rows(bg_tilemap,512);
-			
+
 			tilemap_set_scrolly(bg_tilemap, 0, yscroll);
 			tilemap_set_scrollx(bg_tilemap,(i + yscroll) & 0x1ff, gunnail_scrollram[0] + gunnail_scrollram[i] - videoshift);
 
@@ -626,7 +626,7 @@ VIDEO_UPDATE( gunnail )
 		UINT16 xscroll = ((gunnail_scrollram[0]&0xff)<<8) | ((gunnail_scrollram[1]&0xff)<<0);
 		int tilemap_bank_select;
 		tilemap* bg_tilemap = bg_tilemap0;
-			
+
 		//popmessage( "scroll %04x, %04x", yscroll,xscroll);
 
 		tilemap_bank_select = (xscroll&0x3000)>>12;
@@ -637,13 +637,13 @@ VIDEO_UPDATE( gunnail )
 			case 2: if (bg_tilemap2) bg_tilemap = bg_tilemap2; break;
 			case 3: if (bg_tilemap3) bg_tilemap = bg_tilemap3; break;
 		}
-			
+
 		tilemap_set_scroll_rows(bg_tilemap,1);
-	
+
 		tilemap_set_scrolly(bg_tilemap, 0, yscroll);
 		tilemap_set_scrollx(bg_tilemap, 0, xscroll - videoshift);
 
-		tilemap_draw(bitmap,cliprect,bg_tilemap,0,0);		
+		tilemap_draw(bitmap,cliprect,bg_tilemap,0,0);
 	}
 
 	nmk16_draw_sprites(screen->machine, bitmap,cliprect,3);

src/mame/video/pk8000.c

@@ -4,7 +4,7 @@ static UINT8 pk8000_text_start;
 static UINT8 pk8000_chargen_start;
 static UINT8 pk8000_video_start;
 static UINT8 pk8000_color_start;
-	
+
 UINT8 pk8000_video_mode;
 static UINT8 pk8000_video_color;
 static UINT8 pk8000_color[32];
@@ -41,7 +41,7 @@ WRITE8_HANDLER(pk8000_chargen_start_w)
 }
 
 READ8_HANDLER(pk8000_video_start_r)
-{	
+{
 	return pk8000_video_start;
 }
 
@@ -50,7 +50,7 @@ WRITE8_HANDLER(pk8000_video_start_w)
 	pk8000_video_start = data;
 }
 
-READ8_HANDLER(pk8000_color_start_r) 
+READ8_HANDLER(pk8000_color_start_r)
 {
 	return pk8000_color_start;
 }
@@ -60,7 +60,7 @@ WRITE8_HANDLER(pk8000_color_start_w)
 	pk8000_color_start = data;
 }
 
-READ8_HANDLER(pk8000_color_r) 
+READ8_HANDLER(pk8000_color_r)
 {
 	return pk8000_color[offset];
 }
@@ -73,20 +73,20 @@ WRITE8_HANDLER(pk8000_color_w)
 static const rgb_t pk8000_palette[16] = {
 	MAKE_RGB(0x00, 0x00, 0x00), // 0
 	MAKE_RGB(0x00, 0x00, 0x00), // 1
-	MAKE_RGB(0x00, 0xc0, 0x00), // 2 
+	MAKE_RGB(0x00, 0xc0, 0x00), // 2
-	MAKE_RGB(0x00, 0xff, 0x00), // 3  
+	MAKE_RGB(0x00, 0xff, 0x00), // 3
-	MAKE_RGB(0x00, 0x00, 0xc0), // 4  
+	MAKE_RGB(0x00, 0x00, 0xc0), // 4
-	MAKE_RGB(0x00, 0x00, 0xff), // 5  
+	MAKE_RGB(0x00, 0x00, 0xff), // 5
-	MAKE_RGB(0x00, 0xc0, 0xc0), // 6  
+	MAKE_RGB(0x00, 0xc0, 0xc0), // 6
-	MAKE_RGB(0x00, 0xff, 0xff), // 7  
+	MAKE_RGB(0x00, 0xff, 0xff), // 7
-	MAKE_RGB(0xc0, 0x00, 0x00), // 8  
+	MAKE_RGB(0xc0, 0x00, 0x00), // 8
-	MAKE_RGB(0xff, 0x00, 0x00), // 9  
+	MAKE_RGB(0xff, 0x00, 0x00), // 9
-	MAKE_RGB(0xc0, 0xc0, 0x00), // A  
+	MAKE_RGB(0xc0, 0xc0, 0x00), // A
-	MAKE_RGB(0xff, 0xff, 0x00), // B  
+	MAKE_RGB(0xff, 0xff, 0x00), // B
-	MAKE_RGB(0xc0, 0x00, 0xc0), // C  
+	MAKE_RGB(0xc0, 0x00, 0xc0), // C
-	MAKE_RGB(0xff, 0x00, 0xff), // D  
+	MAKE_RGB(0xff, 0x00, 0xff), // D
-	MAKE_RGB(0xc0, 0xc0, 0xc0), // E  
+	MAKE_RGB(0xc0, 0xc0, 0xc0), // E
-	MAKE_RGB(0xff, 0xff, 0xff),	// F  
+	MAKE_RGB(0xff, 0xff, 0xff),	// F
 };
 
 PALETTE_INIT( pk8000 )
@@ -103,11 +103,11 @@ UINT32 pk8000_video_update(const device_config *screen, bitmap_t *bitmap, const
 	my_rect.max_x = 256+32-1;
 	my_rect.min_y = 0;
 	my_rect.max_y = 192+32-1;
-	
+
 	if (pk8000_video_enable) {
 		bitmap_fill(bitmap, &my_rect, (pk8000_video_color >> 4) & 0x0f);
-		
+
-		if (BIT(pk8000_video_mode,4)==0){	
+		if (BIT(pk8000_video_mode,4)==0){
 			// Text mode
 			if (BIT(pk8000_video_mode,5)==0){
 				// 32 columns
@@ -119,9 +119,9 @@ UINT32 pk8000_video_update(const device_config *screen, bitmap_t *bitmap, const
 						UINT8 color= pk8000_color[chr>>3];
 						for (j = 0; j < 8; j++) {
 							UINT8 code = videomem[((chr<<3) + j) + ((pk8000_chargen_start & 0x0e) << 10)+offset];
-							
+
 							for (b = 0; b < 8; b++)
-							{								
+							{
 								UINT8 col = (code >> b) & 0x01 ? (color & 0x0f) : ((color>>4) & 0x0f);
 								*BITMAP_ADDR16(bitmap, (y*8)+j+16, x*8+(7-b)+16) =  col;
 							}
@@ -129,7 +129,7 @@ UINT32 pk8000_video_update(const device_config *screen, bitmap_t *bitmap, const
 					}
 				}
 			} else {
-				// 40 columns						
+				// 40 columns
 				for (y = 0; y < 24; y++)
 				{
 					for (x = 0; x < 42; x++)
@@ -138,7 +138,7 @@ UINT32 pk8000_video_update(const device_config *screen, bitmap_t *bitmap, const
 						for (j = 0; j < 8; j++) {
 							UINT8 code = videomem[((chr<<3) + j) + ((pk8000_chargen_start  & 0x0e) << 10)+offset];
 							for (b = 2; b < 8; b++)
-							{								
+							{
 								UINT8 col = ((code >> b) & 0x01) ? (pk8000_video_color) & 0x0f : (pk8000_video_color>>4) & 0x0f;
 								*BITMAP_ADDR16(bitmap, (y*8)+j+16, x*6+(7-b)+16+8) =  col;
 							}
@@ -158,10 +158,10 @@ UINT32 pk8000_video_update(const device_config *screen, bitmap_t *bitmap, const
 					for (j = 0; j < 8; j++) {
 						UINT8 color= videomem[((chr<<3) + j)+off_color];
 						UINT8 code = videomem[((chr<<3) + j)+off_code];
-						
+
 						for (b = 0; b < 8; b++)
-						{								
+						{
-							UINT8 col = (code >> b) & 0x01 ? (color & 0x0f) : ((color>>4) & 0x0f);						
+							UINT8 col = (code >> b) & 0x01 ? (color & 0x0f) : ((color>>4) & 0x0f);
 							*BITMAP_ADDR16(bitmap, (y*8)+j+16, x*8+(7-b)+16) =  col;
 						}
 					}

src/mame/video/ppu2c0x.c

@@ -470,7 +470,7 @@ static void draw_background( const device_config *device, UINT8 *line_priority )
 				plane2 = plane2 << 1;
 				if ((start_x + i) >= 0 && (start_x + i) < VISIBLE_SCREEN_WIDTH)
 				{
-					
+
 					if (pix)
 					{
 						pen = paldata[pix];
@@ -599,7 +599,7 @@ static void draw_sprites( const device_config *device, UINT8 *line_priority )
 		/* compute the character's line to draw */
 		sprite_line = scanline - spriteYPos;
 
-		
+
 		if (flipy)
 			sprite_line = (size - 1) - sprite_line;
 
@@ -618,16 +618,16 @@ static void draw_sprites( const device_config *device, UINT8 *line_priority )
 		plane1 = memory_read_byte(device->space[0], (index1 + sprite_line) & 0x1fff);
 		plane2 = memory_read_byte(device->space[0], (index1 + sprite_line + 8) & 0x1fff);
 
-//		sd = gfx_element_get_data(device->machine->gfx[gfx_bank], index1 % total_elements) + start;
+//      sd = gfx_element_get_data(device->machine->gfx[gfx_bank], index1 % total_elements) + start;
-//		if (size > 8)
+//      if (size > 8)
-//			gfx_element_get_data(device->machine->gfx[gfx_bank], (index1 + 1) % total_elements);
+//          gfx_element_get_data(device->machine->gfx[gfx_bank], (index1 + 1) % total_elements);
 
 		if (pri)
 		{
 			/* draw the low-priority sprites */
 			for (pixel = 0; pixel < 8; pixel++)
 			{
-//				UINT8 pixelData = flipx ? sd[7-pixel] : sd[pixel];
+//              UINT8 pixelData = flipx ? sd[7-pixel] : sd[pixel];
 				UINT8 pixelData;
 				if (flipx)
 				{
@@ -998,7 +998,7 @@ static DEVICE_RESET( ppu2c0x )
 
 /*************************************
 *
-*	PPU Memory functions
+*   PPU Memory functions
 *
 *************************************/
 
@@ -1278,7 +1278,7 @@ void ppu2c0x_spriteram_dma( const address_space *space, const device_config *dev
 	{
 		UINT8 spriteData = memory_read_byte(space, address + i);
 		memory_write_byte(space, 0x2004, spriteData);
-//		ppu2c0x_w(device, PPU_SPRITE_DATA, spriteData);
+//      ppu2c0x_w(device, PPU_SPRITE_DATA, spriteData);
 	}
 
 	// should last 513 CPU cycles.

src/version.c

@@ -10,4 +10,4 @@
 ***************************************************************************/
 
 extern const char build_version[];
-const char build_version[] = "0.133 ("__DATE__")";
+const char build_version[] = "0.133u1 ("__DATE__")";