diff --git a/src/devices/cpu/8x300/8x300dasm.cpp b/src/devices/cpu/8x300/8x300dasm.cpp index 562dbaf4693..5b66dbd1f05 100644 --- a/src/devices/cpu/8x300/8x300dasm.cpp +++ b/src/devices/cpu/8x300/8x300dasm.cpp @@ -41,9 +41,8 @@ static inline bool is_src_rot(uint16_t opcode) return true; } -CPU_DISASSEMBLE( n8x300 ) +static offs_t internal_disasm_n8x300(cpu_device *device, std::ostream &stream, offs_t pc, const uint8_t *oprom, const uint8_t *opram, int options) { - char tmp[16]; unsigned startpc = pc; uint16_t opcode = (oprom[pc - startpc] << 8) | oprom[pc+1 - startpc]; uint8_t inst = opcode >> 13; @@ -53,99 +52,90 @@ CPU_DISASSEMBLE( n8x300 ) switch (inst) { case 0x00: - sprintf(buffer,"MOVE "); - strcat(buffer,reg_names[SRC]); + stream << "MOVE " << reg_names[SRC]; if(is_rot(opcode)) - sprintf(tmp,"(%i),",ROTLEN); + util::stream_format(stream, "(%i),", ROTLEN); else - sprintf(tmp,",%i,",ROTLEN); - strcat(buffer,tmp); - strcat(buffer,reg_names[DST]); + util::stream_format(stream, ",%i,", ROTLEN); + stream << reg_names[DST]; break; case 0x01: - sprintf(buffer,"ADD "); - strcat(buffer,reg_names[SRC]); + stream << "ADD " << reg_names[SRC]; if(is_rot(opcode)) - sprintf(tmp,"(%i),",ROTLEN); + util::stream_format(stream, "(%i),", ROTLEN); else - sprintf(tmp,",%i,",ROTLEN); - strcat(buffer,tmp); - strcat(buffer,reg_names[DST]); + util::stream_format(stream, ",%i,", ROTLEN); + stream << reg_names[DST]; break; case 0x02: - sprintf(buffer,"AND "); - strcat(buffer,reg_names[SRC]); + stream << "AND " << reg_names[SRC]; if(is_rot(opcode)) - sprintf(tmp,"(%i),",ROTLEN); + util::stream_format(stream, "(%i),", ROTLEN); else - sprintf(tmp,",%i,",ROTLEN); - strcat(buffer,tmp); - strcat(buffer,reg_names[DST]); + util::stream_format(stream, ",%i,", ROTLEN); + stream << reg_names[DST]; break; case 0x03: - sprintf(buffer,"XOR "); - strcat(buffer,reg_names[SRC]); + stream << "XOR " << reg_names[SRC]; if(is_rot(opcode)) - sprintf(tmp,"(%i),",ROTLEN); + util::stream_format(stream, "(%i),", ROTLEN); else - sprintf(tmp,",%i,",ROTLEN); - strcat(buffer,tmp); - strcat(buffer,reg_names[DST]); + util::stream_format(stream, ",%i,", ROTLEN); + stream << reg_names[DST]; break; case 0x04: - sprintf(buffer,"XEC "); - strcat(buffer,reg_names[SRC]); + stream << "XEC " << reg_names[SRC]; if(is_src_rot(opcode)) { - sprintf(tmp,",%02XH",IMM8); - strcat(buffer,tmp); + util::stream_format(stream, ",%02XH", IMM8); } else { - sprintf(tmp,",%i",ROTLEN); - strcat(buffer,tmp); - sprintf(tmp,",%02XH",IMM5); - strcat(buffer,tmp); + util::stream_format(stream, ",%i", ROTLEN); + util::stream_format(stream, ",%02XH", IMM5); } break; case 0x05: - sprintf(buffer,"NZT "); - strcat(buffer,reg_names[SRC]); + stream << "NZT " << reg_names[SRC]; if(is_src_rot(opcode)) { - sprintf(tmp,",%02XH",IMM8); - strcat(buffer,tmp); + util::stream_format(stream, ",%02XH", IMM8); } else { - sprintf(tmp,",%i",ROTLEN); - strcat(buffer,tmp); - sprintf(tmp,",%02XH",IMM5); - strcat(buffer,tmp); + util::stream_format(stream, ",%i", ROTLEN); + util::stream_format(stream, ",%02XH", IMM5); } break; case 0x06: - sprintf(buffer,"XMIT "); + stream << "XMIT "; if(is_src_rot(opcode)) { - sprintf(tmp,"%02XH,",IMM8); - strcat(buffer,tmp); - strcat(buffer,reg_names[SRC]); + util::stream_format(stream, "%02XH,", IMM8); + stream << reg_names[SRC]; } else { - sprintf(tmp,"%02XH,",IMM5); - strcat(buffer,tmp); - strcat(buffer,reg_names[SRC]); - sprintf(tmp,",%i",ROTLEN); - strcat(buffer,tmp); + util::stream_format(stream, "%02XH,", IMM5); + stream << reg_names[SRC]; + util::stream_format(stream, ",%i", ROTLEN); } break; case 0x07: - sprintf(buffer,"JMP %04XH",opcode & 0x1fff); + util::stream_format(stream, "JMP %04XH", opcode & 0x1fff); break; } return (pc - startpc); } + + +CPU_DISASSEMBLE(n8x300) +{ + std::ostringstream stream; + offs_t result = internal_disasm_n8x300(device, stream, pc, oprom, opram, options); + std::string stream_str = stream.str(); + strcpy(buffer, stream_str.c_str()); + return result; +}