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tms9900: Fixed register autoincrement for DIV operation [Michael Zapf] (nw)
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@ -1308,6 +1308,7 @@ void tms99xx_device::decode(UINT16 inst)
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m_state = 0;
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m_state = 0;
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IR = inst;
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IR = inst;
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m_get_destination = false;
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m_get_destination = false;
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m_byteop = false;
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while (!complete)
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while (!complete)
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{
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{
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@ -1336,6 +1337,10 @@ void tms99xx_device::decode(UINT16 inst)
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MPC = -1;
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MPC = -1;
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m_command = decoded->id;
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m_command = decoded->id;
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if (VERBOSE>7) LOG("tms99xx: Command decoded as id %d, %s, base opcode %04x\n", m_command, opname[m_command], decoded->opcode);
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if (VERBOSE>7) LOG("tms99xx: Command decoded as id %d, %s, base opcode %04x\n", m_command, opname[m_command], decoded->opcode);
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// Byte operations are either format 1 with the byte flag set
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// or format 4 (CRU multi bit operations) with 1-8 bits to transfer.
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m_byteop = ((decoded->format==1 && ((IR & 0x1000)!=0))
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|| (decoded->format==4 && (((IR >> 6)&0x000f) > 0) && (((IR >> 6)&0x000f) > 9)));
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}
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}
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m_pass = 1;
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m_pass = 1;
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}
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}
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@ -1537,7 +1542,7 @@ void tms99xx_device::data_derivation_subprogram()
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MPC = ircopy & 0x0030;
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MPC = ircopy & 0x0030;
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if (((MPC == 0x0020) && (m_regnumber != 0)) // indexed
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if (((MPC == 0x0020) && (m_regnumber != 0)) // indexed
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|| ((MPC == 0x0030) && ((IR & 0x1000)!=0))) // byte flag
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|| ((MPC == 0x0030) && m_byteop)) // byte operation
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{
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{
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MPC += 8; // the second option
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MPC += 8; // the second option
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}
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}
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@ -193,6 +193,10 @@ protected:
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// Decoded command
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// Decoded command
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UINT16 m_command;
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UINT16 m_command;
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// Is it a byte operation? Only format 1 commands with the byte flag set
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// and CRU commands with less than 9 bits to transfer are byte operations.
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bool m_byteop;
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// Issue clock pulses. Note that each machine cycle has two clock cycles.
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// Issue clock pulses. Note that each machine cycle has two clock cycles.
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void pulse_clock(int count);
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void pulse_clock(int count);
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