mirror of
https://github.com/holub/mame
synced 2025-04-23 00:39:36 +03:00
Jack Potten's Poker with fever feature:
* New full addressing memory map * New proper machine driver. * Fixed ROM load. * Worked proper inputs. * Added extra DIP switches.
This commit is contained in:
parent
2147615c6f
commit
22bcfe4dfe
@ -1048,6 +1048,7 @@ public:
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void gldnirq0(machine_config &config);
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void lespendu(machine_config &config);
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void icproul(machine_config &config);
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void glfever(machine_config &config);
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void init_vkdlswwh();
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void init_icp1db();
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@ -1075,6 +1076,7 @@ public:
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void init_lespenduj();
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void init_op5cards();
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void init_olym65();
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void init_glfev();
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uint8_t pottnpkr_mux_port_r();
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void lamps_a_w(uint8_t data);
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@ -1141,6 +1143,7 @@ private:
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void op5cards_map(address_map &map) ATTR_COLD;
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void icp_ext_map(address_map &map) ATTR_COLD;
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void lespendu_map(address_map &map) ATTR_COLD;
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void glfever_map(address_map &map) ATTR_COLD;
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required_shared_ptr<uint8_t> m_videoram;
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required_shared_ptr<uint8_t> m_colorram;
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@ -1899,6 +1902,21 @@ void goldnpkr_state::op5cards_map(address_map &map)
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map(0xc000, 0xffff).rom();
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}
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void goldnpkr_state::glfever_map(address_map &map)
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{
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map(0x0000, 0x07ff).ram().share("nvram"); // battery backed RAM
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map(0x0800, 0x0800).w("crtc", FUNC(mc6845_device::address_w));
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map(0x0801, 0x0801).rw("crtc", FUNC(mc6845_device::register_r), FUNC(mc6845_device::register_w));
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map(0x0844, 0x0847).rw("pia0", FUNC(pia6821_device::read), FUNC(pia6821_device::write));
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map(0x0848, 0x084b).rw("pia1", FUNC(pia6821_device::read), FUNC(pia6821_device::write));
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map(0x1000, 0x13ff).ram().w(FUNC(goldnpkr_state::goldnpkr_videoram_w)).share("videoram");
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map(0x1800, 0x1bff).ram().w(FUNC(goldnpkr_state::goldnpkr_colorram_w)).share("colorram");
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map(0x2000, 0x2000).portr("SWA");
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map(0x3000, 0x7fff).rom(); // base rom space
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map(0xa000, 0xa000).portr("SWB");
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map(0xf000, 0xffff).rom(); // extended rom space
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}
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/*********************************************
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* Input Ports *
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@ -4393,7 +4411,121 @@ static INPUT_PORTS_START( icproul )
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PORT_DIPNAME( 0x80, 0x80, DEF_STR( Unknown ) )
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PORT_DIPSETTING( 0x80, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x00, DEF_STR( On ) )
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INPUT_PORTS_END
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static INPUT_PORTS_START( glfever )
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// Multiplexed - 4x5bits
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PORT_START("IN0-0")
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PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_GAMBLE_BET ) PORT_NAME("Bet")
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PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_GAMBLE_BOOK ) PORT_NAME("Meters/Settings")
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PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_GAMBLE_D_UP ) PORT_NAME("Double-Up/Next")
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PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_GAMBLE_DEAL ) PORT_NAME("Deal/Draw")
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PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_POKER_CANCEL ) PORT_NAME("Cancel")
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PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_UNKNOWN )
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PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNKNOWN )
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PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNKNOWN )
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PORT_START("IN0-1")
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PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_UNKNOWN )
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PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_GAMBLE_PAYOUT)
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PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_GAMBLE_TAKE ) PORT_NAME("Take")
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PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_GAMBLE_HIGH ) PORT_NAME("High/Red")
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PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_GAMBLE_LOW ) PORT_NAME("Low/Black")
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PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_UNKNOWN )
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PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNKNOWN )
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PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNKNOWN )
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PORT_START("IN0-2")
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PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_POKER_HOLD1 )
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PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_POKER_HOLD2 )
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PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_POKER_HOLD3 )
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PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_POKER_HOLD4 )
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PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_POKER_HOLD5 )
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PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_UNKNOWN )
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PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNKNOWN )
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PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNKNOWN )
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PORT_START("IN0-3")
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PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_UNKNOWN )
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PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_UNKNOWN )
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PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_COIN2 ) PORT_IMPULSE(3)
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PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_COIN1 ) PORT_IMPULSE(3)
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PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_UNKNOWN )
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PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_UNKNOWN )
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PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNKNOWN )
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PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNKNOWN )
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PORT_START("SW1")
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// only bits 4-7 are connected here and were routed to SW1 1-4
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PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_UNUSED )
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PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_UNUSED )
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PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_UNUSED )
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PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_UNUSED )
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PORT_DIPNAME( 0x10, 0x10, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW1:1")
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PORT_DIPSETTING( 0x10, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x00, DEF_STR( On ) )
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PORT_DIPNAME( 0x20, 0x20, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW1:2")
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PORT_DIPSETTING( 0x20, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x00, DEF_STR( On ) )
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PORT_DIPNAME( 0x40, 0x40, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW1:3")
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PORT_DIPSETTING( 0x40, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x00, DEF_STR( On ) )
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PORT_DIPNAME( 0x80, 0x80, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW1:4")
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PORT_DIPSETTING( 0x80, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x00, DEF_STR( On ) )
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PORT_START("SWA")
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PORT_DIPNAME( 0x01, 0x01, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SWA:1")
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PORT_DIPSETTING( 0x01, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x00, DEF_STR( On ) )
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PORT_DIPNAME( 0x02, 0x02, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SWA:2")
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PORT_DIPSETTING( 0x02, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x00, DEF_STR( On ) )
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PORT_DIPNAME( 0x04, 0x04, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SWA:3")
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PORT_DIPSETTING( 0x04, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x00, DEF_STR( On ) )
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PORT_DIPNAME( 0x08, 0x08, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SWA:4")
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PORT_DIPSETTING( 0x08, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x00, DEF_STR( On ) )
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PORT_DIPNAME( 0x10, 0x10, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SWA:5")
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PORT_DIPSETTING( 0x10, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x00, DEF_STR( On ) )
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PORT_DIPNAME( 0x20, 0x20, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SWA:6")
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PORT_DIPSETTING( 0x20, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x00, DEF_STR( On ) )
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PORT_DIPNAME( 0x40, 0x40, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SWA:7")
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PORT_DIPSETTING( 0x40, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x00, DEF_STR( On ) )
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PORT_DIPNAME( 0x80, 0x80, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SWA:8")
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PORT_DIPSETTING( 0x80, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x00, DEF_STR( On ) )
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PORT_START("SWB")
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PORT_DIPNAME( 0x01, 0x01, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SWB:1")
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PORT_DIPSETTING( 0x01, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x00, DEF_STR( On ) )
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PORT_DIPNAME( 0x02, 0x02, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SWB:2")
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PORT_DIPSETTING( 0x02, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x00, DEF_STR( On ) )
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PORT_DIPNAME( 0x04, 0x04, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SWB:3")
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PORT_DIPSETTING( 0x04, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x00, DEF_STR( On ) )
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PORT_DIPNAME( 0x08, 0x08, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SWB:4")
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PORT_DIPSETTING( 0x08, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x00, DEF_STR( On ) )
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PORT_DIPNAME( 0x10, 0x10, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SWB:5")
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PORT_DIPSETTING( 0x10, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x00, DEF_STR( On ) )
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PORT_DIPNAME( 0x20, 0x20, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SWB:6")
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PORT_DIPSETTING( 0x20, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x00, DEF_STR( On ) )
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PORT_DIPNAME( 0x40, 0x40, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SWB:7")
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PORT_DIPSETTING( 0x40, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x00, DEF_STR( On ) )
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PORT_DIPNAME( 0x80, 0x80, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SWB:8")
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PORT_DIPSETTING( 0x80, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x00, DEF_STR( On ) )
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INPUT_PORTS_END
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@ -5015,6 +5147,25 @@ void goldnpkr_state::icproul(machine_config &config)
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}
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void goldnpkr_state::glfever(machine_config &config)
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{
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goldnpkr_base(config);
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// basic machine hardware
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m_maincpu->set_addrmap(AS_PROGRAM, &goldnpkr_state::glfever_map);
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m_pia[0]->readpa_handler().set(FUNC(goldnpkr_state::pottnpkr_mux_port_r));
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m_pia[0]->writepa_handler().set(FUNC(goldnpkr_state::mux_port_w));
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// video hardware
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m_palette->set_init(FUNC(goldnpkr_state::witchcrd_palette));
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// sound hardware
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SPEAKER(config, "mono").front_center();
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DISCRETE(config, m_discrete, goldnpkr_discrete).add_route(ALL_OUTPUTS, "mono", 1.0);
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}
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/*********************************************
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* Blitz System *
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*********************************************/
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@ -5822,14 +5973,15 @@ ROM_START( potnpkrm )
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ROM_LOAD( "82s129.9c", 0x0000, 0x0100, BAD_DUMP CRC(7f31066b) SHA1(15420780ec6b2870fc4539ec3afe4f0c58eedf12) ) // PROM dump needed
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ROM_END
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// Potten's Poker - PCB ICP-1 with riser board with CPU and ROMs.
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/*
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Potten's Poker with Fever feature.
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PCB ICP-1 with full CPU addressing, plus a riser board with CPU and ROMs.
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*/
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ROM_START( potnpkrn )
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ROM_REGION( 0x10000, "maincpu", 0 )
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ROM_LOAD( "7.sub", 0x6000, 0x1000, CRC(3dd65452) SHA1(f4641160ad8472b8446603c1102a42b818aee430) )
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ROM_LOAD( "8.sub", 0x7000, 0x0800, CRC(2f09b647) SHA1(8d5c069c2ecf07ca1f3f04a580e11860ea728b38) )
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ROM_CONTINUE( 0x5800, 0x0800 )
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ROM_LOAD( "9.sub", 0x5000, 0x0800, CRC(cb988f21) SHA1(4d70de07ea41d23a3da13dd5ad6bd4fc54a239f3) )
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ROM_CONTINUE( 0x7800, 0x0800 )
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ROM_LOAD( "8.sub", 0x7000, 0x1000, CRC(2f09b647) SHA1(8d5c069c2ecf07ca1f3f04a580e11860ea728b38) )
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ROM_LOAD( "9.sub", 0xf000, 0x1000, CRC(cb988f21) SHA1(4d70de07ea41d23a3da13dd5ad6bd4fc54a239f3) )
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ROM_REGION( 0x3000, "gfx1", 0 )
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ROM_FILL( 0x0000, 0x2000, 0x0000 ) // filling the R-G bitplanes
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@ -5838,7 +5990,7 @@ ROM_START( potnpkrn )
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ROM_REGION( 0x3000, "gfx2", 0 )
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ROM_LOAD( "3.a4", 0x0000, 0x1000, CRC(b5a1f5a3) SHA1(a34aaaab5443c6962177a5dd35002bd09d0d2772) ) // cards deck gfx, bitplane1
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ROM_LOAD( "4.a6", 0x1000, 0x1000, CRC(40e426af) SHA1(7e7cb30dafc96bcb87a05d3e0ef5c2d426ed6a74) ) // cards deck gfx, bitplane2
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// a7 not populated, weirdly
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ROM_LOAD( "5.a7", 0x2000, 0x1000, CRC(232374f3) SHA1(b75907edbf769b8c46fb1ebdb301c325c556e6c2) ) // cards deck gfx, bitplane3
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ROM_REGION( 0x0100, "proms", 0 )
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ROM_LOAD( "tbp24s10n.7d", 0x0000, 0x0100, CRC(7f31066b) SHA1(15420780ec6b2870fc4539ec3afe4f0c58eedf12) )
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@ -12884,6 +13036,11 @@ void goldnpkr_state::init_olym65()
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}
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}
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void goldnpkr_state::init_glfev()
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{
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// to do: break the loops
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}
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} // anonymous namespace
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@ -12920,7 +13077,7 @@ GAMEL( 198?, potnpkrj, pottnpkr, goldnpkr, goldnpkr, goldnpkr_state, empty_init
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GAMEL( 198?, potnpkrk, pottnpkr, goldnpkr, goldnpkr, goldnpkr_state, empty_init, ROT0, "bootleg", "Jack Potten's Poker (set 12, no Double-Up)", 0, layout_goldnpkr )
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GAMEL( 198?, potnpkrl, pottnpkr, pottnpkr, potnpkra, goldnpkr_state, empty_init, ROT0, "<unknown>", "Jack Potten's Poker (set 13, ICP-1 PCB)", 0, layout_goldnpkr ) // unencrypted IPC-1 PCB.
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GAMEL( 1988, potnpkrm, pottnpkr, pottnpkr, goldnpkr, goldnpkr_state, empty_init, ROT0, "bootleg (PED)", "Jack Potten's Poker (set 14, ICP-1 PCB)", 0, layout_goldnpkr ) // unencrypted IPC-1 PCB.
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GAMEL( 1988, potnpkrn, pottnpkr, goldnpkr, goldnpkr, goldnpkr_state, empty_init, ROT0, "bootleg", "Jack Potten's Poker (set 15, ICP-1 PCB)", MACHINE_NOT_WORKING, layout_goldnpkr ) // hangs
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GAME ( 198?, potnpkrn, pottnpkr, glfever, glfever, goldnpkr_state, init_glfev, ROT0, "bootleg", "Jack Potten's Poker (fever, ICP-1 PCB)", MACHINE_NOT_WORKING ) // hangs
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GAMEL( 198?, ngold, pottnpkr, pottnpkr, ngold, goldnpkr_state, empty_init, ROT0, "<unknown>", "Jack Potten's Poker (NGold, set 1)", 0, layout_goldnpkr )
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GAMEL( 198?, ngolda, pottnpkr, pottnpkr, ngold, goldnpkr_state, empty_init, ROT0, "<unknown>", "Jack Potten's Poker (NGold, set 2)", 0, layout_goldnpkr )
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GAMEL( 198?, ngoldb, pottnpkr, pottnpkr, ngoldb, goldnpkr_state, empty_init, ROT0, "<unknown>", "Jack Potten's Poker (NGold, set 3)", 0, layout_goldnpkr )
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