diff --git a/src/mame/drivers/menghong.cpp b/src/mame/drivers/menghong.cpp index ce673ff9e44..ab9b0892416 100644 --- a/src/mame/drivers/menghong.cpp +++ b/src/mame/drivers/menghong.cpp @@ -70,14 +70,17 @@ Red PCB, very similar to crzyddz2 #include "emu.h" #include "cpu/se3208/se3208.h" #include "machine/ds1302.h" -#include "machine/nvram.h" #include "machine/eepromser.h" -#include "machine/vrender0.h" +#include "machine/nvram.h" #include "machine/timer.h" +#include "machine/vrender0.h" #include "emupal.h" #include + +namespace { + class menghong_state : public driver_device { public: @@ -91,48 +94,54 @@ public: // m_nvram(*this, "nvram"), m_ds1302(*this, "rtc"), m_eeprom(*this, "eeprom"), - m_prot_data(*this, "pic_data") + m_prot_data(*this, "pic_data"), + m_keys(*this, "KEY%u", 0U) { } void crzyddz2(machine_config &config); void menghong(machine_config &config); -private: - /* memory pointers */ - required_shared_ptr m_workram; - optional_region_ptr m_flash; - optional_memory_bank m_mainbank; +protected: + virtual void machine_start() override; + virtual void machine_reset() override; - /* devices */ +private: + // memory pointers + required_shared_ptr m_workram; + required_region_ptr m_flash; + required_memory_bank m_mainbank; + + // devices required_device m_maincpu; required_device m_vr0soc; // required_device m_nvram; required_device m_ds1302; - optional_device m_eeprom; + required_device m_eeprom; required_region_ptr m_prot_data; - uint32_t m_Bank; - uint32_t m_maxbank; - uint32_t m_FlashCmd; + // inputs + required_ioport_array<5> m_keys; - void Banksw_w(uint32_t data); - uint32_t FlashCmd_r(); - void FlashCmd_w(uint32_t data); + uint32_t m_bank; + uint32_t m_maxbank; + uint32_t m_flashcmd; - uint32_t crzyddz2_key_r(); + void banksw_w(uint32_t data); + uint32_t flashcmd_r(); + void flashcmd_w(uint32_t data); + + uint32_t key_r(); - virtual void machine_start() override; - virtual void machine_reset() override; void menghong_mem(address_map &map); void crzyddz2_mem(address_map &map); - // PIO - uint32_t PIOldat_r(); - uint32_t m_PIO; - void crzyddz2_PIOldat_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0); - uint32_t crzyddz2_PIOedat_r(); - uint8_t m_crzyddz2_prot; + // pio + uint32_t pioldat_r(); + uint32_t m_pio; + void pioldat_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0); + uint32_t pioedat_r(); + uint8_t m_prot; uint8_t menghong_shared_r(offs_t offset); void menghong_shared_w(offs_t offset, uint8_t data); @@ -143,17 +152,17 @@ private: -void menghong_state::Banksw_w(uint32_t data) +void menghong_state::banksw_w(uint32_t data) { - m_Bank = (data >> 1) & 7; - m_mainbank->set_entry(m_Bank); + m_bank = (data >> 1) & 7; + m_mainbank->set_entry(m_bank); } -uint32_t menghong_state::FlashCmd_r() +uint32_t menghong_state::flashcmd_r() { - if ((m_FlashCmd & 0xff) == 0xff) + if ((m_flashcmd & 0xff) == 0xff) { - if (m_Bank < m_maxbank) + if (m_bank < m_maxbank) { uint32_t *ptr = (uint32_t*)(m_mainbank->base()); return ptr[0]; @@ -161,9 +170,9 @@ uint32_t menghong_state::FlashCmd_r() else return 0xffffffff; } - if ((m_FlashCmd & 0xff) == 0x90) + if ((m_flashcmd & 0xff) == 0x90) { - if (m_Bank < m_maxbank) + if (m_bank < m_maxbank) return 0x00180089; //Intel 128MBit else return 0xffffffff; @@ -171,9 +180,9 @@ uint32_t menghong_state::FlashCmd_r() return 0; } -void menghong_state::FlashCmd_w(uint32_t data) +void menghong_state::flashcmd_w(uint32_t data) { - m_FlashCmd = data; + m_flashcmd = data; } @@ -248,14 +257,14 @@ void menghong_state::crzyddz2_shared_w(offs_t offset, uint8_t data) } } -uint32_t menghong_state::PIOldat_r() +uint32_t menghong_state::pioldat_r() { - return m_PIO; + return m_pio; } -void menghong_state::crzyddz2_PIOldat_w(offs_t offset, uint32_t data, uint32_t mem_mask) +void menghong_state::pioldat_w(offs_t offset, uint32_t data, uint32_t mem_mask) { - COMBINE_DATA(&m_PIO); + COMBINE_DATA(&m_pio); //uint32_t RST = data & 0x01000000; //uint32_t CLK = data & 0x02000000; //uint32_t DAT = data & 0x10000000; @@ -266,30 +275,28 @@ void menghong_state::crzyddz2_PIOldat_w(offs_t offset, uint32_t data, uint32_t m if (ACCESSING_BITS_8_15) { - int mux = (m_PIO >> 8) & 0x1f; + int mux = (m_pio >> 8) & 0x1f; if (mux == 0x1f) { - m_crzyddz2_prot = ((m_PIO >> 8) & 0xc0) ^ 0x40; - logerror("%s: PIO = %08x, prot = %02x\n", machine().describe_context(), m_PIO, m_crzyddz2_prot); + m_prot = ((m_pio >> 8) & 0xc0) ^ 0x40; + logerror("%s: pio = %08x, prot = %02x\n", machine().describe_context(), m_pio, m_prot); } } } -uint32_t menghong_state::crzyddz2_PIOedat_r() +uint32_t menghong_state::pioedat_r() { return 0;//m_eeprom->do_read(); } -uint32_t menghong_state::crzyddz2_key_r() +uint32_t menghong_state::key_r() { - static const char *const key_names[] = { "KEY0", "KEY1", "KEY2", "KEY3", "KEY4" }; - - int mux = (m_PIO >> 8) & 0x1f; + int mux = (m_pio >> 8) & 0x1f; uint8_t data = 0x3f; - for (int i = 0; i < sizeof(key_names)/sizeof(key_names[0]); ++i) + for (int i = 0; i < 5; ++i) if (!BIT(mux,i)) - data = ioport(key_names[i])->read(); + data = m_keys[i]->read(); /* crzyddz2 in out @@ -298,33 +305,33 @@ crzyddz2 in out c0 80 */ // menghong Sealy logo pal offset is at 0x3ea7400, relevant code is at 2086034 -// m_crzyddz2_prot = (m_PIO >> 8) & 0xc0) ^ 0x40; - m_crzyddz2_prot = (machine().rand() & 0xc0); +// m_prot = (m_pio >> 8) & 0xc0) ^ 0x40; + m_prot = (machine().rand() & 0xc0); - return 0xffffff00 | data | m_crzyddz2_prot; + return 0xffffff00 | data | m_prot; } void menghong_state::menghong_mem(address_map &map) { map(0x00000000, 0x003fffff).rom().nopw(); - map(0x01280000, 0x01280003).w(FUNC(menghong_state::Banksw_w)); + map(0x01280000, 0x01280003).w(FUNC(menghong_state::banksw_w)); // map(0x01400000, 0x0140ffff).ram().share("nvram"); map(0x01400000, 0x0140ffff).rw(FUNC(menghong_state::menghong_shared_r), FUNC(menghong_state::menghong_shared_w)); map(0x01500000, 0x01500003).portr("P1_P2"); - map(0x01500004, 0x01500007).r(FUNC(menghong_state::crzyddz2_key_r)); + map(0x01500004, 0x01500007).r(FUNC(menghong_state::key_r)); map(0x01500008, 0x0150000b).portr("SYSTEM"); map(0x01800000, 0x01ffffff).m(m_vr0soc, FUNC(vrender0soc_device::regs_map)); - map(0x01802004, 0x01802007).rw(FUNC(menghong_state::PIOldat_r), FUNC(menghong_state::crzyddz2_PIOldat_w)); - map(0x01802008, 0x0180200b).r(FUNC(menghong_state::crzyddz2_PIOedat_r)); + map(0x01802004, 0x01802007).rw(FUNC(menghong_state::pioldat_r), FUNC(menghong_state::pioldat_w)); + map(0x01802008, 0x0180200b).r(FUNC(menghong_state::pioedat_r)); - map(0x02000000, 0x027fffff).ram().share("workram"); + map(0x02000000, 0x027fffff).ram().share(m_workram); map(0x03000000, 0x04ffffff).m(m_vr0soc, FUNC(vrender0soc_device::audiovideo_map)); - map(0x05000000, 0x05ffffff).bankr("mainbank"); - map(0x05000000, 0x05000003).rw(FUNC(menghong_state::FlashCmd_r), FUNC(menghong_state::FlashCmd_w)); + map(0x05000000, 0x05ffffff).bankr(m_mainbank); + map(0x05000000, 0x05000003).rw(FUNC(menghong_state::flashcmd_r), FUNC(menghong_state::flashcmd_w)); } void menghong_state::crzyddz2_mem(address_map &map) @@ -337,33 +344,31 @@ void menghong_state::machine_start() { m_sharedram = make_unique_clear(0x10000); - if (m_mainbank) + m_maxbank = (m_flash) ? m_flash.bytes() / 0x1000000 : 0; + std::unique_ptr dummy_region = std::make_unique(0x1000000); + std::fill_n(&dummy_region[0], 0x1000000, 0xff); // 0xff Filled at Unmapped area + uint8_t *rom = (m_flash) ? (uint8_t *)&m_flash[0] : dummy_region.get(); + for (int i = 0; i < 8; i++) { - m_maxbank = (m_flash) ? m_flash.bytes() / 0x1000000 : 0; - uint8_t *dummy_region = auto_alloc_array(machine(), uint8_t, 0x1000000); - std::fill_n(&dummy_region[0], 0x1000000, 0xff); // 0xff Filled at Unmapped area - uint8_t *ROM = (m_flash) ? (uint8_t *)&m_flash[0] : dummy_region; - for (int i = 0; i < 8; i++) - { - if ((i < m_maxbank)) - m_mainbank->configure_entry(i, ROM + i * 0x1000000); - else - m_mainbank->configure_entry(i, dummy_region); - } + if (i < m_maxbank) + m_mainbank->configure_entry(i, rom + i * 0x1000000); + else + m_mainbank->configure_entry(i, dummy_region.get()); } - save_item(NAME(m_Bank)); - save_item(NAME(m_FlashCmd)); - save_item(NAME(m_PIO)); + save_item(NAME(m_bank)); + save_item(NAME(m_flashcmd)); + save_item(NAME(m_pio)); + save_pointer(NAME(m_sharedram), 0x10000); } void menghong_state::machine_reset() { - m_Bank = 0; - m_mainbank->set_entry(m_Bank); - m_FlashCmd = 0xff; + m_bank = 0; + m_mainbank->set_entry(m_bank); + m_flashcmd = 0xff; - m_crzyddz2_prot = 0x00; + m_prot = 0x00; } static INPUT_PORTS_START(crzyddz2) @@ -473,7 +478,7 @@ void menghong_state::menghong(machine_config &config) m_vr0soc->set_external_vclk(28636360); // Assumed from the only available XTal on PCB DS1302(config, m_ds1302, 32.768_kHz_XTAL); - EEPROM_93C46_16BIT(config, "eeprom"); + EEPROM_93C46_16BIT(config, m_eeprom); } void menghong_state::crzyddz2(machine_config &config) @@ -510,6 +515,8 @@ ROM_START( crzyddz2 ) ROM_REGION( 0x0100, "pic_data", ROMREGION_ERASEFF ) ROM_END +} // Anonymous namespace + GAME( 2004?,menghong, 0, menghong, crzyddz2, menghong_state, empty_init, ROT0, "Sealy", "Meng Hong Lou", MACHINE_NOT_WORKING | MACHINE_UNEMULATED_PROTECTION ) GAME( 2006, crzyddz2, 0, crzyddz2, crzyddz2, menghong_state, empty_init, ROT0, "Sealy", "Crazy Dou Di Zhu II", MACHINE_NOT_WORKING | MACHINE_UNEMULATED_PROTECTION ) diff --git a/src/mame/drivers/trivrus.cpp b/src/mame/drivers/trivrus.cpp index 8bfc64685dc..e41a8d92948 100644 --- a/src/mame/drivers/trivrus.cpp +++ b/src/mame/drivers/trivrus.cpp @@ -19,15 +19,18 @@ #include "emu.h" #include "cpu/se3208/se3208.h" +#include "machine/microtch.h" #include "machine/nvram.h" #include "machine/vrender0.h" -#include "machine/microtch.h" #include "emupal.h" #include "screen.h" #include "speaker.h" #include + +namespace { + class trivrus_state : public driver_device { public: @@ -38,41 +41,48 @@ public: m_maincpu(*this, "maincpu"), m_mainbank(*this, "mainbank"), m_vr0soc(*this, "vr0soc"), - m_microtouch(*this, "microtouch") + m_microtouch(*this, "microtouch"), + m_inputs(*this, "IN%u", 1U), + m_dsw(*this, "DSW") { } void trivrus(machine_config &config); -private: +protected: + virtual void machine_start() override; + virtual void machine_reset() override; - /* memory pointers */ +private: + // memory pointers required_shared_ptr m_workram; required_region_ptr m_flash; - /* devices */ + // devices required_device m_maincpu; - optional_memory_bank m_mainbank; + required_memory_bank m_mainbank; required_device m_vr0soc; required_device m_microtouch; - uint32_t m_FlashCmd; - uint32_t m_Bank; - uint32_t m_maxbank; + // inputs + required_ioport_array<5> m_inputs; + required_ioport m_dsw; - uint32_t FlashCmd_r(); - void FlashCmd_w(uint32_t data); - void Banksw_w(uint32_t data); + uint32_t m_flashcmd; + uint32_t m_bank; + uint32_t m_maxbank; + + uint32_t flashcmd_r(); + void flashcmd_w(uint32_t data); + void banksw_w(uint32_t data); - virtual void machine_start() override; - virtual void machine_reset() override; void trivrus_mem(address_map &map); - // PIO - uint32_t PIOldat_r(); - uint32_t m_PIO; - void PIOldat_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0); - uint32_t PIOedat_r(); + // pio + uint32_t pioldat_r(); + uint32_t m_pio; + void pioldat_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0); + uint32_t pioedat_r(); uint8_t trivrus_input_r(); void trivrus_input_w(uint8_t data); @@ -80,39 +90,39 @@ private: }; -void trivrus_state::FlashCmd_w(uint32_t data) +void trivrus_state::flashcmd_w(uint32_t data) { - m_FlashCmd = data; + m_flashcmd = data; } -uint32_t trivrus_state::PIOedat_r() +uint32_t trivrus_state::pioedat_r() { return 0; } -uint32_t trivrus_state::PIOldat_r() +uint32_t trivrus_state::pioldat_r() { // ... - return m_PIO; + return m_pio; } -// PIO Latched output DATa Register -void trivrus_state::PIOldat_w(offs_t offset, uint32_t data, uint32_t mem_mask) +// pio Latched output DATa Register +void trivrus_state::pioldat_w(offs_t offset, uint32_t data, uint32_t mem_mask) { // ... - COMBINE_DATA(&m_PIO); + COMBINE_DATA(&m_pio); } uint8_t trivrus_state::trivrus_input_r() { switch (m_trivrus_input) { - case 1: return ioport("IN1")->read(); - case 2: return ioport("IN2")->read(); - case 3: return ioport("IN3")->read(); - case 4: return ioport("IN4")->read(); - case 5: return ioport("IN5")->read(); - case 6: return ioport("DSW")->read(); + case 1: return m_inputs[0]->read(); + case 2: return m_inputs[1]->read(); + case 3: return m_inputs[2]->read(); + case 4: return m_inputs[3]->read(); + case 5: return m_inputs[4]->read(); + case 6: return m_dsw->read(); } logerror("%s: unknown input %02x read\n", machine().describe_context(), m_trivrus_input); return 0xff; @@ -120,14 +130,14 @@ uint8_t trivrus_state::trivrus_input_r() void trivrus_state::trivrus_input_w(uint8_t data) { - m_trivrus_input = data & 0xff; + m_trivrus_input = data; } -uint32_t trivrus_state::FlashCmd_r() +uint32_t trivrus_state::flashcmd_r() { - if ((m_FlashCmd & 0xff) == 0xff) + if ((m_flashcmd & 0xff) == 0xff) { - if (m_Bank < m_maxbank) + if (m_bank < m_maxbank) { uint32_t *ptr = (uint32_t*)(m_mainbank->base()); return ptr[0]; @@ -135,9 +145,9 @@ uint32_t trivrus_state::FlashCmd_r() else return 0xffffffff; } - if ((m_FlashCmd & 0xff) == 0x90) + if ((m_flashcmd & 0xff) == 0x90) { - if (m_Bank < m_maxbank) + if (m_bank < m_maxbank) return 0x00180089; //Intel 128MBit else return 0xffffffff; @@ -146,17 +156,17 @@ uint32_t trivrus_state::FlashCmd_r() } -void trivrus_state::Banksw_w(uint32_t data) +void trivrus_state::banksw_w(uint32_t data) { - m_Bank = (data >> 1) & 7; - m_mainbank->set_entry(m_Bank); + m_bank = (data >> 1) & 7; + m_mainbank->set_entry(m_bank); } void trivrus_state::trivrus_mem(address_map &map) { map(0x00000000, 0x0007ffff).rom().nopw(); - map(0x01280000, 0x01280003).w(FUNC(trivrus_state::Banksw_w)); + map(0x01280000, 0x01280003).w(FUNC(trivrus_state::banksw_w)); map(0x01500000, 0x01500000).rw(FUNC(trivrus_state::trivrus_input_r), FUNC(trivrus_state::trivrus_input_w)); // reads occurs by SELECTING the given register on successive ODD addresses then reading at 0x01500011 @@ -172,46 +182,43 @@ void trivrus_state::trivrus_mem(address_map &map) map(0x01600000, 0x01607fff).ram().share("nvram"); map(0x01800000, 0x01ffffff).m(m_vr0soc, FUNC(vrender0soc_device::regs_map)); - map(0x01802004, 0x01802007).rw(FUNC(trivrus_state::PIOldat_r), FUNC(trivrus_state::PIOldat_w)); - map(0x01802008, 0x0180200b).r(FUNC(trivrus_state::PIOedat_r)); + map(0x01802004, 0x01802007).rw(FUNC(trivrus_state::pioldat_r), FUNC(trivrus_state::pioldat_w)); + map(0x01802008, 0x0180200b).r(FUNC(trivrus_state::pioedat_r)); - map(0x02000000, 0x027fffff).ram().share("workram"); + map(0x02000000, 0x027fffff).ram().share(m_workram); map(0x03000000, 0x04ffffff).m(m_vr0soc, FUNC(vrender0soc_device::audiovideo_map)); - map(0x05000000, 0x05ffffff).bankr("mainbank"); - map(0x05000000, 0x05000003).rw(FUNC(trivrus_state::FlashCmd_r), FUNC(trivrus_state::FlashCmd_w)); + map(0x05000000, 0x05ffffff).bankr(m_mainbank); + map(0x05000000, 0x05000003).rw(FUNC(trivrus_state::flashcmd_r), FUNC(trivrus_state::flashcmd_w)); // 0x06000000 accessed during POST during above check then discarded, probably a debug left-over } void trivrus_state::machine_start() { - if (m_mainbank) + m_maxbank = (m_flash) ? m_flash.bytes() / 0x1000000 : 0; + std::unique_ptr dummy_region = std::make_unique(0x1000000); + std::fill_n(&dummy_region[0], 0x1000000, 0xff); // 0xff Filled at Unmapped area + uint8_t *rom = (m_flash) ? (uint8_t *)&m_flash[0] : dummy_region.get(); + for (int i = 0; i < 8; i++) { - m_maxbank = (m_flash) ? m_flash.bytes() / 0x1000000 : 0; - uint8_t *dummy_region = auto_alloc_array(machine(), uint8_t, 0x1000000); - std::fill_n(&dummy_region[0], 0x1000000, 0xff); // 0xff Filled at Unmapped area - uint8_t *ROM = (m_flash) ? (uint8_t *)&m_flash[0] : dummy_region; - for (int i = 0; i < 8; i++) - { - if ((i < m_maxbank)) - m_mainbank->configure_entry(i, ROM + i * 0x1000000); - else - m_mainbank->configure_entry(i, dummy_region); - } + if (i < m_maxbank) + m_mainbank->configure_entry(i, rom + i * 0x1000000); + else + m_mainbank->configure_entry(i, dummy_region.get()); } - save_item(NAME(m_Bank)); - save_item(NAME(m_FlashCmd)); - save_item(NAME(m_PIO)); + save_item(NAME(m_bank)); + save_item(NAME(m_flashcmd)); + save_item(NAME(m_pio)); save_item(NAME(m_trivrus_input)); } void trivrus_state::machine_reset() { - m_Bank = 0; - m_mainbank->set_entry(m_Bank); - m_FlashCmd = 0xff; + m_bank = 0; + m_mainbank->set_entry(m_bank); + m_flashcmd = 0xff; } static INPUT_PORTS_START( trivrus ) @@ -310,4 +317,7 @@ ROM_START( trivrus ) ROM_LOAD( "u3", 0x000000, 0x1000010, CRC(ba901707) SHA1(e281ba07024cd19ef1ab72d2197014f7b1f4d30f) ) ROM_END -GAME( 2009, trivrus, 0, trivrus, trivrus, trivrus_state, empty_init, ROT0, "AGT", "Trivia R Us (v1.07)", 0 ) +} // Anonymous namespace + + +GAME( 2009, trivrus, 0, trivrus, trivrus, trivrus_state, empty_init, ROT0, "AGT", "Trivia R Us (v1.07)", 0 )