mirror of
https://github.com/holub/mame
synced 2025-04-24 01:11:11 +03:00
bus/intv: Simplify read/write handlers (nw)
Note that mem_mask can be safely eliminated here because the CP1610 has no byte select lines.
This commit is contained in:
AJR
parent
5161cf2562
commit
234b14ac75
@ -126,7 +126,7 @@ const tiny_rom_entry *intv_ecs_device::device_rom_region() const
|
||||
Paged ROM handling
|
||||
-------------------------------------------------*/
|
||||
|
||||
READ16_MEMBER(intv_ecs_device::read_rom20)
|
||||
uint16_t intv_ecs_device::read_rom20(offs_t offset)
|
||||
{
|
||||
if (m_bank_base[2])
|
||||
return INTV_ROM16_READ(offset + 0x2000);
|
||||
@ -134,7 +134,7 @@ READ16_MEMBER(intv_ecs_device::read_rom20)
|
||||
return 0xffff;
|
||||
}
|
||||
|
||||
READ16_MEMBER(intv_ecs_device::read_rom70)
|
||||
uint16_t intv_ecs_device::read_rom70(offs_t offset)
|
||||
{
|
||||
if (m_bank_base[7])
|
||||
return 0xffff;
|
||||
@ -142,21 +142,21 @@ READ16_MEMBER(intv_ecs_device::read_rom70)
|
||||
return INTV_ROM16_READ(offset + 0x7000);
|
||||
}
|
||||
|
||||
READ16_MEMBER(intv_ecs_device::read_rome0)
|
||||
uint16_t intv_ecs_device::read_rome0(offs_t offset)
|
||||
{
|
||||
if (m_bank_base[14])
|
||||
return INTV_ROM16_READ(offset + 0xe000);
|
||||
else // if WSMLB is loaded, it shall go here, otherwise 0xffff
|
||||
return m_subslot->read_rome0(space, offset, mem_mask);
|
||||
return m_subslot->read_rome0(offset);
|
||||
}
|
||||
|
||||
READ16_MEMBER(intv_ecs_device::read_romf0)
|
||||
uint16_t intv_ecs_device::read_romf0(offs_t offset)
|
||||
{
|
||||
// only WSMLB should come here with bank_base = 1
|
||||
if (m_bank_base[15])
|
||||
return m_subslot->read_romf0(space, offset + 0x1000, mem_mask);
|
||||
return m_subslot->read_romf0(offset + 0x1000);
|
||||
else
|
||||
return m_subslot->read_romf0(space, offset, mem_mask);
|
||||
return m_subslot->read_romf0(offset);
|
||||
}
|
||||
|
||||
|
||||
@ -164,44 +164,40 @@ READ16_MEMBER(intv_ecs_device::read_romf0)
|
||||
read_audio
|
||||
-------------------------------------------------*/
|
||||
|
||||
READ16_MEMBER(intv_ecs_device::read_ay)
|
||||
uint16_t intv_ecs_device::read_ay(offs_t offset)
|
||||
{
|
||||
if (ACCESSING_BITS_0_7)
|
||||
return m_snd->read(offset);
|
||||
else
|
||||
return 0xffff;
|
||||
return 0xff00 | m_snd->read(offset);
|
||||
}
|
||||
|
||||
/*-------------------------------------------------
|
||||
write_audio
|
||||
-------------------------------------------------*/
|
||||
|
||||
WRITE16_MEMBER(intv_ecs_device::write_ay)
|
||||
void intv_ecs_device::write_ay(offs_t offset, uint16_t data)
|
||||
{
|
||||
if (ACCESSING_BITS_0_7)
|
||||
return m_snd->write(offset, data);
|
||||
return m_snd->write(offset, data & 0x00ff);
|
||||
}
|
||||
|
||||
|
||||
READ16_MEMBER(intv_ecs_device::read_rom80)
|
||||
uint16_t intv_ecs_device::read_rom80(offs_t offset)
|
||||
{
|
||||
if (m_ram88_enabled && offset >= 0x800)
|
||||
return m_subslot->read_ram(space, offset & 0x7ff, mem_mask);
|
||||
return m_subslot->read_ram(offset & 0x7ff);
|
||||
else
|
||||
return m_subslot->read_rom80(space, offset, mem_mask);
|
||||
return m_subslot->read_rom80(offset);
|
||||
}
|
||||
|
||||
|
||||
READ16_MEMBER(intv_ecs_device::read_romd0)
|
||||
uint16_t intv_ecs_device::read_romd0(offs_t offset)
|
||||
{
|
||||
if (m_ramd0_enabled && offset < 0x800)
|
||||
return m_subslot->read_ram(space, offset, mem_mask);
|
||||
return m_subslot->read_ram(offset);
|
||||
else
|
||||
return m_subslot->read_romd0(space, offset, mem_mask);
|
||||
return m_subslot->read_romd0(offset);
|
||||
}
|
||||
|
||||
|
||||
WRITE16_MEMBER(intv_ecs_device::write_rom20)
|
||||
void intv_ecs_device::write_rom20(offs_t offset, uint16_t data)
|
||||
{
|
||||
if (offset == 0xfff)
|
||||
{
|
||||
@ -212,7 +208,7 @@ WRITE16_MEMBER(intv_ecs_device::write_rom20)
|
||||
}
|
||||
}
|
||||
|
||||
WRITE16_MEMBER(intv_ecs_device::write_rom70)
|
||||
void intv_ecs_device::write_rom70(offs_t offset, uint16_t data)
|
||||
{
|
||||
if (offset == 0xfff)
|
||||
{
|
||||
@ -223,7 +219,7 @@ WRITE16_MEMBER(intv_ecs_device::write_rom70)
|
||||
}
|
||||
}
|
||||
|
||||
WRITE16_MEMBER(intv_ecs_device::write_rome0)
|
||||
void intv_ecs_device::write_rome0(offs_t offset, uint16_t data)
|
||||
{
|
||||
if (offset == 0xfff)
|
||||
{
|
||||
@ -234,7 +230,7 @@ WRITE16_MEMBER(intv_ecs_device::write_rome0)
|
||||
}
|
||||
}
|
||||
|
||||
WRITE16_MEMBER(intv_ecs_device::write_romf0)
|
||||
void intv_ecs_device::write_romf0(offs_t offset, uint16_t data)
|
||||
{
|
||||
if (offset == 0xfff)
|
||||
{
|
||||
|
||||
@ -23,41 +23,41 @@ public:
|
||||
|
||||
// actual ECS accesses
|
||||
// paged ROMs
|
||||
virtual DECLARE_READ16_MEMBER(read_rom20) override;
|
||||
virtual DECLARE_READ16_MEMBER(read_rom70) override;
|
||||
virtual DECLARE_READ16_MEMBER(read_rome0) override;
|
||||
virtual DECLARE_READ16_MEMBER(read_romf0) override;
|
||||
virtual uint16_t read_rom20(offs_t offset) override;
|
||||
virtual uint16_t read_rom70(offs_t offset) override;
|
||||
virtual uint16_t read_rome0(offs_t offset) override;
|
||||
virtual uint16_t read_romf0(offs_t offset) override;
|
||||
// RAM
|
||||
virtual DECLARE_READ16_MEMBER(read_ram) override { return (int)m_ram[offset & (m_ram.size() - 1)]; }
|
||||
virtual DECLARE_WRITE16_MEMBER(write_ram) override { m_ram[offset & (m_ram.size() - 1)] = data & 0xff; }
|
||||
virtual uint16_t read_ram(offs_t offset) override { return (int)m_ram[offset & (m_ram.size() - 1)]; }
|
||||
virtual void write_ram(offs_t offset, uint16_t data) override { m_ram[offset & (m_ram.size() - 1)] = data & 0xff; }
|
||||
// AY8914
|
||||
virtual DECLARE_READ16_MEMBER(read_ay) override;
|
||||
virtual DECLARE_WRITE16_MEMBER(write_ay) override;
|
||||
virtual uint16_t read_ay(offs_t offset) override;
|
||||
virtual void write_ay(offs_t offset, uint16_t data) override;
|
||||
|
||||
// passthru accesses
|
||||
virtual DECLARE_READ16_MEMBER(read_rom04) override { return m_subslot->read_rom04(space, offset, mem_mask); }
|
||||
virtual DECLARE_READ16_MEMBER(read_rom40) override { return m_subslot->read_rom40(space, offset, mem_mask); }
|
||||
virtual DECLARE_READ16_MEMBER(read_rom48) override { return m_subslot->read_rom48(space, offset, mem_mask); }
|
||||
virtual DECLARE_READ16_MEMBER(read_rom50) override { return m_subslot->read_rom50(space, offset, mem_mask); }
|
||||
virtual DECLARE_READ16_MEMBER(read_rom60) override { return m_subslot->read_rom60(space, offset, mem_mask); }
|
||||
virtual DECLARE_READ16_MEMBER(read_rom80) override;
|
||||
virtual DECLARE_READ16_MEMBER(read_rom90) override { return m_subslot->read_rom90(space, offset, mem_mask); }
|
||||
virtual DECLARE_READ16_MEMBER(read_roma0) override { return m_subslot->read_roma0(space, offset, mem_mask); }
|
||||
virtual DECLARE_READ16_MEMBER(read_romb0) override { return m_subslot->read_romb0(space, offset, mem_mask); }
|
||||
virtual DECLARE_READ16_MEMBER(read_romc0) override { return m_subslot->read_romc0(space, offset, mem_mask); }
|
||||
virtual DECLARE_READ16_MEMBER(read_romd0) override;
|
||||
virtual uint16_t read_rom04(offs_t offset) override { return m_subslot->read_rom04(offset); }
|
||||
virtual uint16_t read_rom40(offs_t offset) override { return m_subslot->read_rom40(offset); }
|
||||
virtual uint16_t read_rom48(offs_t offset) override { return m_subslot->read_rom48(offset); }
|
||||
virtual uint16_t read_rom50(offs_t offset) override { return m_subslot->read_rom50(offset); }
|
||||
virtual uint16_t read_rom60(offs_t offset) override { return m_subslot->read_rom60(offset); }
|
||||
virtual uint16_t read_rom80(offs_t offset) override;
|
||||
virtual uint16_t read_rom90(offs_t offset) override { return m_subslot->read_rom90(offset); }
|
||||
virtual uint16_t read_roma0(offs_t offset) override { return m_subslot->read_roma0(offset); }
|
||||
virtual uint16_t read_romb0(offs_t offset) override { return m_subslot->read_romb0(offset); }
|
||||
virtual uint16_t read_romc0(offs_t offset) override { return m_subslot->read_romc0(offset); }
|
||||
virtual uint16_t read_romd0(offs_t offset) override;
|
||||
|
||||
// paged ROM banking
|
||||
virtual DECLARE_WRITE16_MEMBER(write_rom20) override;
|
||||
virtual DECLARE_WRITE16_MEMBER(write_rom70) override;
|
||||
virtual DECLARE_WRITE16_MEMBER(write_rome0) override;
|
||||
virtual DECLARE_WRITE16_MEMBER(write_romf0) override;
|
||||
virtual void write_rom20(offs_t offset, uint16_t data) override;
|
||||
virtual void write_rom70(offs_t offset, uint16_t data) override;
|
||||
virtual void write_rome0(offs_t offset, uint16_t data) override;
|
||||
virtual void write_romf0(offs_t offset, uint16_t data) override;
|
||||
// RAM passthru write
|
||||
virtual DECLARE_WRITE16_MEMBER(write_88) override { if (m_ram88_enabled) m_subslot->write_ram(space, offset, data, mem_mask); }
|
||||
virtual DECLARE_WRITE16_MEMBER(write_d0) override { if (m_ramd0_enabled) m_subslot->write_ram(space, offset, data, mem_mask); }
|
||||
virtual void write_88(offs_t offset, uint16_t data) override { if (m_ram88_enabled) m_subslot->write_ram(offset, data); }
|
||||
virtual void write_d0(offs_t offset, uint16_t data) override { if (m_ramd0_enabled) m_subslot->write_ram(offset, data); }
|
||||
// IntelliVoice passthru
|
||||
virtual DECLARE_READ16_MEMBER(read_speech) override { if (m_voice_enabled) return m_subslot->read_speech(space, offset, mem_mask); else return 0xffff; }
|
||||
virtual DECLARE_WRITE16_MEMBER(write_speech) override { if (m_voice_enabled) m_subslot->write_speech(space, offset, data, mem_mask); }
|
||||
virtual uint16_t read_speech(offs_t offset) override { if (m_voice_enabled) return m_subslot->read_speech(offset); else return 0xffff; }
|
||||
virtual void write_speech(offs_t offset, uint16_t data) override { if (m_voice_enabled) m_subslot->write_speech(offset, data); }
|
||||
|
||||
virtual void late_subslot_setup() override;
|
||||
|
||||
|
||||
@ -16,21 +16,21 @@ public:
|
||||
intv_rom_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
|
||||
|
||||
// reading and writing
|
||||
virtual DECLARE_READ16_MEMBER(read_rom04) override { return INTV_ROM16_READ(offset + 0x0400); }
|
||||
virtual DECLARE_READ16_MEMBER(read_rom20) override { return INTV_ROM16_READ(offset + 0x2000); }
|
||||
virtual DECLARE_READ16_MEMBER(read_rom40) override { return INTV_ROM16_READ(offset + 0x4000); }
|
||||
virtual DECLARE_READ16_MEMBER(read_rom48) override { return INTV_ROM16_READ(offset + 0x4800); }
|
||||
virtual DECLARE_READ16_MEMBER(read_rom50) override { return INTV_ROM16_READ(offset + 0x5000); }
|
||||
virtual DECLARE_READ16_MEMBER(read_rom60) override { return INTV_ROM16_READ(offset + 0x6000); }
|
||||
virtual DECLARE_READ16_MEMBER(read_rom70) override { return INTV_ROM16_READ(offset + 0x7000); }
|
||||
virtual DECLARE_READ16_MEMBER(read_rom80) override { return INTV_ROM16_READ(offset + 0x8000); }
|
||||
virtual DECLARE_READ16_MEMBER(read_rom90) override { return INTV_ROM16_READ(offset + 0x9000); }
|
||||
virtual DECLARE_READ16_MEMBER(read_roma0) override { return INTV_ROM16_READ(offset + 0xa000); }
|
||||
virtual DECLARE_READ16_MEMBER(read_romb0) override { return INTV_ROM16_READ(offset + 0xb000); }
|
||||
virtual DECLARE_READ16_MEMBER(read_romc0) override { return INTV_ROM16_READ(offset + 0xc000); }
|
||||
virtual DECLARE_READ16_MEMBER(read_romd0) override { return INTV_ROM16_READ(offset + 0xd000); }
|
||||
virtual DECLARE_READ16_MEMBER(read_rome0) override { return INTV_ROM16_READ(offset + 0xe000); }
|
||||
virtual DECLARE_READ16_MEMBER(read_romf0) override { return INTV_ROM16_READ(offset + 0xf000); }
|
||||
virtual uint16_t read_rom04(offs_t offset) override { return INTV_ROM16_READ(offset + 0x0400); }
|
||||
virtual uint16_t read_rom20(offs_t offset) override { return INTV_ROM16_READ(offset + 0x2000); }
|
||||
virtual uint16_t read_rom40(offs_t offset) override { return INTV_ROM16_READ(offset + 0x4000); }
|
||||
virtual uint16_t read_rom48(offs_t offset) override { return INTV_ROM16_READ(offset + 0x4800); }
|
||||
virtual uint16_t read_rom50(offs_t offset) override { return INTV_ROM16_READ(offset + 0x5000); }
|
||||
virtual uint16_t read_rom60(offs_t offset) override { return INTV_ROM16_READ(offset + 0x6000); }
|
||||
virtual uint16_t read_rom70(offs_t offset) override { return INTV_ROM16_READ(offset + 0x7000); }
|
||||
virtual uint16_t read_rom80(offs_t offset) override { return INTV_ROM16_READ(offset + 0x8000); }
|
||||
virtual uint16_t read_rom90(offs_t offset) override { return INTV_ROM16_READ(offset + 0x9000); }
|
||||
virtual uint16_t read_roma0(offs_t offset) override { return INTV_ROM16_READ(offset + 0xa000); }
|
||||
virtual uint16_t read_romb0(offs_t offset) override { return INTV_ROM16_READ(offset + 0xb000); }
|
||||
virtual uint16_t read_romc0(offs_t offset) override { return INTV_ROM16_READ(offset + 0xc000); }
|
||||
virtual uint16_t read_romd0(offs_t offset) override { return INTV_ROM16_READ(offset + 0xd000); }
|
||||
virtual uint16_t read_rome0(offs_t offset) override { return INTV_ROM16_READ(offset + 0xe000); }
|
||||
virtual uint16_t read_romf0(offs_t offset) override { return INTV_ROM16_READ(offset + 0xf000); }
|
||||
|
||||
protected:
|
||||
intv_rom_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock);
|
||||
@ -49,8 +49,8 @@ public:
|
||||
intv_ram_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
|
||||
|
||||
// reading and writing
|
||||
virtual DECLARE_READ16_MEMBER(read_ram) override { return (int)m_ram[offset & (m_ram.size() - 1)]; }
|
||||
virtual DECLARE_WRITE16_MEMBER(write_ram) override { m_ram[offset & (m_ram.size() - 1)] = data & 0xff; }
|
||||
virtual uint16_t read_ram(offs_t offset) override { return (int)m_ram[offset & (m_ram.size() - 1)]; }
|
||||
virtual void write_ram(offs_t offset, uint16_t data) override { m_ram[offset & (m_ram.size() - 1)] = data & 0xff; }
|
||||
};
|
||||
|
||||
// ======================> intv_gfact_device
|
||||
@ -62,8 +62,8 @@ public:
|
||||
intv_gfact_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
|
||||
|
||||
// reading and writing
|
||||
virtual DECLARE_READ16_MEMBER(read_ram) override { return (int)m_ram[offset & (m_ram.size() - 1)]; }
|
||||
virtual DECLARE_WRITE16_MEMBER(write_ram) override { m_ram[offset & (m_ram.size() - 1)] = data & 0xff; }
|
||||
virtual uint16_t read_ram(offs_t offset) override { return (int)m_ram[offset & (m_ram.size() - 1)]; }
|
||||
virtual void write_ram(offs_t offset, uint16_t data) override { m_ram[offset & (m_ram.size() - 1)] = data & 0xff; }
|
||||
};
|
||||
|
||||
// ======================> intv_wsmlb_device
|
||||
|
||||
@ -488,10 +488,10 @@ std::string intv_cart_slot_device::get_default_card_software(get_default_card_so
|
||||
read_ay
|
||||
-------------------------------------------------*/
|
||||
|
||||
READ16_MEMBER(intv_cart_slot_device::read_ay)
|
||||
uint16_t intv_cart_slot_device::read_ay(offs_t offset)
|
||||
{
|
||||
if (m_cart)
|
||||
return m_cart->read_ay(space, offset, mem_mask);
|
||||
return m_cart->read_ay(offset);
|
||||
else
|
||||
return 0xffff;
|
||||
}
|
||||
@ -500,20 +500,20 @@ READ16_MEMBER(intv_cart_slot_device::read_ay)
|
||||
write_ay
|
||||
-------------------------------------------------*/
|
||||
|
||||
WRITE16_MEMBER(intv_cart_slot_device::write_ay)
|
||||
void intv_cart_slot_device::write_ay(offs_t offset, uint16_t data)
|
||||
{
|
||||
if (m_cart)
|
||||
m_cart->write_ay(space, offset, data, mem_mask);
|
||||
m_cart->write_ay(offset, data);
|
||||
}
|
||||
|
||||
/*-------------------------------------------------
|
||||
read_speech
|
||||
-------------------------------------------------*/
|
||||
|
||||
READ16_MEMBER(intv_cart_slot_device::read_speech)
|
||||
uint16_t intv_cart_slot_device::read_speech(offs_t offset)
|
||||
{
|
||||
if (m_cart)
|
||||
return m_cart->read_speech(space, offset, mem_mask);
|
||||
return m_cart->read_speech(offset);
|
||||
else
|
||||
return 0xffff;
|
||||
}
|
||||
@ -522,10 +522,10 @@ READ16_MEMBER(intv_cart_slot_device::read_speech)
|
||||
write_speech
|
||||
-------------------------------------------------*/
|
||||
|
||||
WRITE16_MEMBER(intv_cart_slot_device::write_speech)
|
||||
void intv_cart_slot_device::write_speech(offs_t offset, uint16_t data)
|
||||
{
|
||||
if (m_cart)
|
||||
m_cart->write_speech(space, offset, data, mem_mask);
|
||||
m_cart->write_speech(offset, data);
|
||||
}
|
||||
|
||||
|
||||
|
||||
@ -39,36 +39,36 @@ public:
|
||||
virtual ~device_intv_cart_interface();
|
||||
|
||||
// reading and writing
|
||||
virtual DECLARE_READ16_MEMBER(read_rom04) { return 0xffff; }
|
||||
virtual DECLARE_READ16_MEMBER(read_rom20) { return 0xffff; }
|
||||
virtual DECLARE_READ16_MEMBER(read_rom40) { return 0xffff; }
|
||||
virtual DECLARE_READ16_MEMBER(read_rom48) { return 0xffff; }
|
||||
virtual DECLARE_READ16_MEMBER(read_rom50) { return 0xffff; }
|
||||
virtual DECLARE_READ16_MEMBER(read_rom60) { return 0xffff; }
|
||||
virtual DECLARE_READ16_MEMBER(read_rom70) { return 0xffff; }
|
||||
virtual DECLARE_READ16_MEMBER(read_rom80) { return 0xffff; }
|
||||
virtual DECLARE_READ16_MEMBER(read_rom90) { return 0xffff; }
|
||||
virtual DECLARE_READ16_MEMBER(read_roma0) { return 0xffff; }
|
||||
virtual DECLARE_READ16_MEMBER(read_romb0) { return 0xffff; }
|
||||
virtual DECLARE_READ16_MEMBER(read_romc0) { return 0xffff; }
|
||||
virtual DECLARE_READ16_MEMBER(read_romd0) { return 0xffff; }
|
||||
virtual DECLARE_READ16_MEMBER(read_rome0) { return 0xffff; }
|
||||
virtual DECLARE_READ16_MEMBER(read_romf0) { return 0xffff; }
|
||||
virtual uint16_t read_rom04(offs_t offset) { return 0xffff; }
|
||||
virtual uint16_t read_rom20(offs_t offset) { return 0xffff; }
|
||||
virtual uint16_t read_rom40(offs_t offset) { return 0xffff; }
|
||||
virtual uint16_t read_rom48(offs_t offset) { return 0xffff; }
|
||||
virtual uint16_t read_rom50(offs_t offset) { return 0xffff; }
|
||||
virtual uint16_t read_rom60(offs_t offset) { return 0xffff; }
|
||||
virtual uint16_t read_rom70(offs_t offset) { return 0xffff; }
|
||||
virtual uint16_t read_rom80(offs_t offset) { return 0xffff; }
|
||||
virtual uint16_t read_rom90(offs_t offset) { return 0xffff; }
|
||||
virtual uint16_t read_roma0(offs_t offset) { return 0xffff; }
|
||||
virtual uint16_t read_romb0(offs_t offset) { return 0xffff; }
|
||||
virtual uint16_t read_romc0(offs_t offset) { return 0xffff; }
|
||||
virtual uint16_t read_romd0(offs_t offset) { return 0xffff; }
|
||||
virtual uint16_t read_rome0(offs_t offset) { return 0xffff; }
|
||||
virtual uint16_t read_romf0(offs_t offset) { return 0xffff; }
|
||||
|
||||
virtual DECLARE_READ16_MEMBER(read_ram) { return 0xffff; }
|
||||
virtual DECLARE_WRITE16_MEMBER(write_ram) {}
|
||||
virtual uint16_t read_ram(offs_t offset) { return 0xffff; }
|
||||
virtual void write_ram(offs_t offset, uint16_t data) {}
|
||||
|
||||
// Used by IntelliVoice & ECS
|
||||
virtual DECLARE_READ16_MEMBER(read_ay) { return 0xffff; }
|
||||
virtual DECLARE_WRITE16_MEMBER(write_ay) {}
|
||||
virtual DECLARE_READ16_MEMBER(read_speech) { return 0xffff; }
|
||||
virtual DECLARE_WRITE16_MEMBER(write_speech) {}
|
||||
virtual DECLARE_WRITE16_MEMBER(write_d0) {}
|
||||
virtual DECLARE_WRITE16_MEMBER(write_88) {}
|
||||
virtual DECLARE_WRITE16_MEMBER(write_rom20) {}
|
||||
virtual DECLARE_WRITE16_MEMBER(write_rom70) {}
|
||||
virtual DECLARE_WRITE16_MEMBER(write_rome0) {}
|
||||
virtual DECLARE_WRITE16_MEMBER(write_romf0) {}
|
||||
virtual uint16_t read_ay(offs_t offset) { return 0xffff; }
|
||||
virtual void write_ay(offs_t offset, uint16_t data) {}
|
||||
virtual uint16_t read_speech(offs_t offset) { return 0xffff; }
|
||||
virtual void write_speech(offs_t offset, uint16_t data) {}
|
||||
virtual void write_d0(offs_t offset, uint16_t data) {}
|
||||
virtual void write_88(offs_t offset, uint16_t data) {}
|
||||
virtual void write_rom20(offs_t offset, uint16_t data) {}
|
||||
virtual void write_rom70(offs_t offset, uint16_t data) {}
|
||||
virtual void write_rome0(offs_t offset, uint16_t data) {}
|
||||
virtual void write_romf0(offs_t offset, uint16_t data) {}
|
||||
|
||||
void rom_alloc(uint32_t size, const char *tag);
|
||||
void ram_alloc(uint32_t size);
|
||||
@ -134,40 +134,40 @@ public:
|
||||
virtual std::string get_default_card_software(get_default_card_software_hook &hook) const override;
|
||||
|
||||
// reading and writing
|
||||
virtual DECLARE_READ16_MEMBER(read_rom04) { if (m_cart) return m_cart->read_rom04(space, offset, mem_mask); else return 0xffff; }
|
||||
virtual DECLARE_READ16_MEMBER(read_rom20) { if (m_cart) return m_cart->read_rom20(space, offset, mem_mask); else return 0xffff; }
|
||||
virtual DECLARE_READ16_MEMBER(read_rom40) { if (m_cart) return m_cart->read_rom40(space, offset, mem_mask); else return 0xffff; }
|
||||
virtual DECLARE_READ16_MEMBER(read_rom48) { if (m_cart) return m_cart->read_rom48(space, offset, mem_mask); else return 0xffff; }
|
||||
virtual DECLARE_READ16_MEMBER(read_rom50) { if (m_cart) return m_cart->read_rom50(space, offset, mem_mask); else return 0xffff; }
|
||||
virtual DECLARE_READ16_MEMBER(read_rom60) { if (m_cart) return m_cart->read_rom60(space, offset, mem_mask); else return 0xffff; }
|
||||
virtual DECLARE_READ16_MEMBER(read_rom70) { if (m_cart) return m_cart->read_rom70(space, offset, mem_mask); else return 0xffff; }
|
||||
virtual DECLARE_READ16_MEMBER(read_rom80) { if (m_cart) return m_cart->read_rom80(space, offset, mem_mask); else return 0xffff; }
|
||||
virtual DECLARE_READ16_MEMBER(read_rom90) { if (m_cart) return m_cart->read_rom90(space, offset, mem_mask); else return 0xffff; }
|
||||
virtual DECLARE_READ16_MEMBER(read_roma0) { if (m_cart) return m_cart->read_roma0(space, offset, mem_mask); else return 0xffff; }
|
||||
virtual DECLARE_READ16_MEMBER(read_romb0) { if (m_cart) return m_cart->read_romb0(space, offset, mem_mask); else return 0xffff; }
|
||||
virtual DECLARE_READ16_MEMBER(read_romc0) { if (m_cart) return m_cart->read_romc0(space, offset, mem_mask); else return 0xffff; }
|
||||
virtual DECLARE_READ16_MEMBER(read_romd0) { if (m_cart) return m_cart->read_romd0(space, offset, mem_mask); else return 0xffff; }
|
||||
virtual DECLARE_READ16_MEMBER(read_rome0) { if (m_cart) return m_cart->read_rome0(space, offset, mem_mask); else return 0xffff; }
|
||||
virtual DECLARE_READ16_MEMBER(read_romf0) { if (m_cart) return m_cart->read_romf0(space, offset, mem_mask); else return 0xffff; }
|
||||
uint16_t read_rom04(offs_t offset) { if (m_cart) return m_cart->read_rom04(offset); else return 0xffff; }
|
||||
uint16_t read_rom20(offs_t offset) { if (m_cart) return m_cart->read_rom20(offset); else return 0xffff; }
|
||||
uint16_t read_rom40(offs_t offset) { if (m_cart) return m_cart->read_rom40(offset); else return 0xffff; }
|
||||
uint16_t read_rom48(offs_t offset) { if (m_cart) return m_cart->read_rom48(offset); else return 0xffff; }
|
||||
uint16_t read_rom50(offs_t offset) { if (m_cart) return m_cart->read_rom50(offset); else return 0xffff; }
|
||||
uint16_t read_rom60(offs_t offset) { if (m_cart) return m_cart->read_rom60(offset); else return 0xffff; }
|
||||
uint16_t read_rom70(offs_t offset) { if (m_cart) return m_cart->read_rom70(offset); else return 0xffff; }
|
||||
uint16_t read_rom80(offs_t offset) { if (m_cart) return m_cart->read_rom80(offset); else return 0xffff; }
|
||||
uint16_t read_rom90(offs_t offset) { if (m_cart) return m_cart->read_rom90(offset); else return 0xffff; }
|
||||
uint16_t read_roma0(offs_t offset) { if (m_cart) return m_cart->read_roma0(offset); else return 0xffff; }
|
||||
uint16_t read_romb0(offs_t offset) { if (m_cart) return m_cart->read_romb0(offset); else return 0xffff; }
|
||||
uint16_t read_romc0(offs_t offset) { if (m_cart) return m_cart->read_romc0(offset); else return 0xffff; }
|
||||
uint16_t read_romd0(offs_t offset) { if (m_cart) return m_cart->read_romd0(offset); else return 0xffff; }
|
||||
uint16_t read_rome0(offs_t offset) { if (m_cart) return m_cart->read_rome0(offset); else return 0xffff; }
|
||||
uint16_t read_romf0(offs_t offset) { if (m_cart) return m_cart->read_romf0(offset); else return 0xffff; }
|
||||
|
||||
virtual DECLARE_READ16_MEMBER(read_ay);
|
||||
virtual DECLARE_WRITE16_MEMBER(write_ay);
|
||||
virtual DECLARE_READ16_MEMBER(read_speech);
|
||||
virtual DECLARE_WRITE16_MEMBER(write_speech);
|
||||
virtual DECLARE_READ16_MEMBER(read_ram) { if (m_cart) return m_cart->read_ram(space, offset, mem_mask); else return 0xffff; }
|
||||
virtual DECLARE_WRITE16_MEMBER(write_ram) { if (m_cart) m_cart->write_ram(space, offset, data, mem_mask); }
|
||||
uint16_t read_ay(offs_t offset);
|
||||
void write_ay(offs_t offset, uint16_t data);
|
||||
uint16_t read_speech(offs_t offset);
|
||||
void write_speech(offs_t offset, uint16_t data);
|
||||
uint16_t read_ram(offs_t offset) { if (m_cart) return m_cart->read_ram(offset); else return 0xffff; }
|
||||
void write_ram(offs_t offset, uint16_t data) { if (m_cart) m_cart->write_ram(offset, data); }
|
||||
|
||||
virtual void late_subslot_setup() { if (m_cart) return m_cart->late_subslot_setup(); }
|
||||
|
||||
// these RAM accessors are needed to deal with IntelliVoice and ECS mounting RAM-equipped carts
|
||||
virtual DECLARE_WRITE16_MEMBER(write_d0) { if (m_cart) m_cart->write_d0(space, offset, data, mem_mask); }
|
||||
virtual DECLARE_WRITE16_MEMBER(write_88) { if (m_cart) m_cart->write_88(space, offset, data, mem_mask); }
|
||||
void write_d0(offs_t offset, uint16_t data) { if (m_cart) m_cart->write_d0(offset, data); }
|
||||
void write_88(offs_t offset, uint16_t data) { if (m_cart) m_cart->write_88(offset, data); }
|
||||
|
||||
// ECS paged roms need these
|
||||
virtual DECLARE_WRITE16_MEMBER(write_rom20) { if (m_cart) m_cart->write_rom20(space, offset, data, mem_mask); }
|
||||
virtual DECLARE_WRITE16_MEMBER(write_rom70) { if (m_cart) m_cart->write_rom70(space, offset, data, mem_mask); }
|
||||
virtual DECLARE_WRITE16_MEMBER(write_rome0) { if (m_cart) m_cart->write_rome0(space, offset, data, mem_mask); }
|
||||
virtual DECLARE_WRITE16_MEMBER(write_romf0) { if (m_cart) m_cart->write_romf0(space, offset, data, mem_mask); }
|
||||
void write_rom20(offs_t offset, uint16_t data) { if (m_cart) m_cart->write_rom20(offset, data); }
|
||||
void write_rom70(offs_t offset, uint16_t data) { if (m_cart) m_cart->write_rom70(offset, data); }
|
||||
void write_rome0(offs_t offset, uint16_t data) { if (m_cart) m_cart->write_rome0(offset, data); }
|
||||
void write_romf0(offs_t offset, uint16_t data) { if (m_cart) m_cart->write_romf0(offset, data); }
|
||||
|
||||
protected:
|
||||
// device-level overrides
|
||||
|
||||
@ -96,37 +96,33 @@ const tiny_rom_entry *intv_voice_device::device_rom_region() const
|
||||
read_audio
|
||||
-------------------------------------------------*/
|
||||
|
||||
READ16_MEMBER(intv_voice_device::read_speech)
|
||||
uint16_t intv_voice_device::read_speech(offs_t offset)
|
||||
{
|
||||
if (ACCESSING_BITS_0_7)
|
||||
return m_speech->spb640_r(offset);
|
||||
else
|
||||
return 0xff;
|
||||
return 0xff00 | m_speech->spb640_r(offset);
|
||||
}
|
||||
|
||||
/*-------------------------------------------------
|
||||
write_audio
|
||||
-------------------------------------------------*/
|
||||
|
||||
WRITE16_MEMBER(intv_voice_device::write_speech)
|
||||
void intv_voice_device::write_speech(offs_t offset, uint16_t data)
|
||||
{
|
||||
if (ACCESSING_BITS_0_7)
|
||||
return m_speech->spb640_w(offset, data);
|
||||
m_speech->spb640_w(offset, data & 0x00ff);
|
||||
}
|
||||
|
||||
|
||||
READ16_MEMBER(intv_voice_device::read_rom80)
|
||||
uint16_t intv_voice_device::read_rom80(offs_t offset)
|
||||
{
|
||||
if (m_ram88_enabled && offset >= 0x800)
|
||||
return m_subslot->read_ram(space, offset & 0x7ff, mem_mask);
|
||||
return m_subslot->read_ram(offset & 0x7ff);
|
||||
else
|
||||
return m_subslot->read_rom80(space, offset, mem_mask);
|
||||
return m_subslot->read_rom80(offset);
|
||||
}
|
||||
|
||||
READ16_MEMBER(intv_voice_device::read_romd0)
|
||||
uint16_t intv_voice_device::read_romd0(offs_t offset)
|
||||
{
|
||||
if (m_ramd0_enabled && offset < 0x800)
|
||||
return m_subslot->read_ram(space, offset, mem_mask);
|
||||
return m_subslot->read_ram(offset);
|
||||
else
|
||||
return m_subslot->read_romd0(space, offset, mem_mask);
|
||||
return m_subslot->read_romd0(offset);
|
||||
}
|
||||
|
||||
@ -18,31 +18,31 @@ public:
|
||||
|
||||
// reading and writing
|
||||
// actual IntelliVoice access
|
||||
virtual DECLARE_READ16_MEMBER(read_speech) override;
|
||||
virtual DECLARE_WRITE16_MEMBER(write_speech) override;
|
||||
virtual uint16_t read_speech(offs_t offset) override;
|
||||
virtual void write_speech(offs_t offset, uint16_t data) override;
|
||||
|
||||
// passthru access
|
||||
virtual DECLARE_READ16_MEMBER(read_rom04) override { return m_subslot->read_rom04(space, offset, mem_mask); }
|
||||
virtual DECLARE_READ16_MEMBER(read_rom20) override { return m_subslot->read_rom20(space, offset, mem_mask); }
|
||||
virtual DECLARE_READ16_MEMBER(read_rom40) override { return m_subslot->read_rom40(space, offset, mem_mask); }
|
||||
virtual DECLARE_READ16_MEMBER(read_rom48) override { return m_subslot->read_rom48(space, offset, mem_mask); }
|
||||
virtual DECLARE_READ16_MEMBER(read_rom50) override { return m_subslot->read_rom50(space, offset, mem_mask); }
|
||||
virtual DECLARE_READ16_MEMBER(read_rom60) override { return m_subslot->read_rom60(space, offset, mem_mask); }
|
||||
virtual DECLARE_READ16_MEMBER(read_rom70) override { return m_subslot->read_rom70(space, offset, mem_mask); }
|
||||
virtual DECLARE_READ16_MEMBER(read_rom80) override;
|
||||
virtual DECLARE_READ16_MEMBER(read_rom90) override { return m_subslot->read_rom90(space, offset, mem_mask); }
|
||||
virtual DECLARE_READ16_MEMBER(read_roma0) override { return m_subslot->read_roma0(space, offset, mem_mask); }
|
||||
virtual DECLARE_READ16_MEMBER(read_romb0) override { return m_subslot->read_romb0(space, offset, mem_mask); }
|
||||
virtual DECLARE_READ16_MEMBER(read_romc0) override { return m_subslot->read_romc0(space, offset, mem_mask); }
|
||||
virtual DECLARE_READ16_MEMBER(read_romd0) override;
|
||||
virtual DECLARE_READ16_MEMBER(read_rome0) override { return m_subslot->read_rome0(space, offset, mem_mask); }
|
||||
virtual DECLARE_READ16_MEMBER(read_romf0) override { return m_subslot->read_romf0(space, offset, mem_mask); }
|
||||
virtual uint16_t read_rom04(offs_t offset) override { return m_subslot->read_rom04(offset); }
|
||||
virtual uint16_t read_rom20(offs_t offset) override { return m_subslot->read_rom20(offset); }
|
||||
virtual uint16_t read_rom40(offs_t offset) override { return m_subslot->read_rom40(offset); }
|
||||
virtual uint16_t read_rom48(offs_t offset) override { return m_subslot->read_rom48(offset); }
|
||||
virtual uint16_t read_rom50(offs_t offset) override { return m_subslot->read_rom50(offset); }
|
||||
virtual uint16_t read_rom60(offs_t offset) override { return m_subslot->read_rom60(offset); }
|
||||
virtual uint16_t read_rom70(offs_t offset) override { return m_subslot->read_rom70(offset); }
|
||||
virtual uint16_t read_rom80(offs_t offset) override;
|
||||
virtual uint16_t read_rom90(offs_t offset) override { return m_subslot->read_rom90(offset); }
|
||||
virtual uint16_t read_roma0(offs_t offset) override { return m_subslot->read_roma0(offset); }
|
||||
virtual uint16_t read_romb0(offs_t offset) override { return m_subslot->read_romb0(offset); }
|
||||
virtual uint16_t read_romc0(offs_t offset) override { return m_subslot->read_romc0(offset); }
|
||||
virtual uint16_t read_romd0(offs_t offset) override;
|
||||
virtual uint16_t read_rome0(offs_t offset) override { return m_subslot->read_rome0(offset); }
|
||||
virtual uint16_t read_romf0(offs_t offset) override { return m_subslot->read_romf0(offset); }
|
||||
|
||||
// RAM passthru write
|
||||
virtual DECLARE_WRITE16_MEMBER(write_88) override { if (m_ram88_enabled) m_subslot->write_ram(space, offset, data, mem_mask); }
|
||||
virtual DECLARE_WRITE16_MEMBER(write_d0) override { if (m_ramd0_enabled) m_subslot->write_ram(space, offset, data, mem_mask); }
|
||||
virtual DECLARE_READ16_MEMBER(read_ram) override { return m_subslot->read_ram(space, offset, mem_mask); }
|
||||
virtual DECLARE_WRITE16_MEMBER(write_ram) override { m_subslot->write_ram(space, offset, data, mem_mask); }
|
||||
virtual void write_88(offs_t offset, uint16_t data) override { if (m_ram88_enabled) m_subslot->write_ram(offset, data); }
|
||||
virtual void write_d0(offs_t offset, uint16_t data) override { if (m_ramd0_enabled) m_subslot->write_ram(offset, data); }
|
||||
virtual uint16_t read_ram(offs_t offset) override { return m_subslot->read_ram(offset); }
|
||||
virtual void write_ram(offs_t offset, uint16_t data) override { m_subslot->write_ram(offset, data); }
|
||||
|
||||
virtual void late_subslot_setup() override;
|
||||
|
||||
|
||||
@ -598,35 +598,35 @@ void intv_state::machine_start()
|
||||
switch (m_cart->get_type())
|
||||
{
|
||||
case INTV_RAM:
|
||||
m_maincpu->space(AS_PROGRAM).install_readwrite_handler(0xd000, 0xd7ff, read16_delegate(FUNC(intv_cart_slot_device::read_ram),(intv_cart_slot_device*)m_cart), write16_delegate(FUNC(intv_cart_slot_device::write_ram),(intv_cart_slot_device*)m_cart));
|
||||
m_maincpu->space(AS_PROGRAM).install_readwrite_handler(0xd000, 0xd7ff, read16sm_delegate(FUNC(intv_cart_slot_device::read_ram),(intv_cart_slot_device*)m_cart), write16sm_delegate(FUNC(intv_cart_slot_device::write_ram),(intv_cart_slot_device*)m_cart));
|
||||
break;
|
||||
case INTV_GFACT:
|
||||
m_maincpu->space(AS_PROGRAM).install_readwrite_handler(0x8800, 0x8fff, read16_delegate(FUNC(intv_cart_slot_device::read_ram),(intv_cart_slot_device*)m_cart), write16_delegate(FUNC(intv_cart_slot_device::write_ram),(intv_cart_slot_device*)m_cart));
|
||||
m_maincpu->space(AS_PROGRAM).install_readwrite_handler(0x8800, 0x8fff, read16sm_delegate(FUNC(intv_cart_slot_device::read_ram),(intv_cart_slot_device*)m_cart), write16sm_delegate(FUNC(intv_cart_slot_device::write_ram),(intv_cart_slot_device*)m_cart));
|
||||
break;
|
||||
case INTV_VOICE:
|
||||
m_cart->late_subslot_setup();
|
||||
m_maincpu->space(AS_PROGRAM).install_readwrite_handler(0x0080, 0x0081, read16_delegate(FUNC(intv_cart_slot_device::read_speech),(intv_cart_slot_device*)m_cart), write16_delegate(FUNC(intv_cart_slot_device::write_speech),(intv_cart_slot_device*)m_cart));
|
||||
m_maincpu->space(AS_PROGRAM).install_readwrite_handler(0x0080, 0x0081, read16sm_delegate(FUNC(intv_cart_slot_device::read_speech),(intv_cart_slot_device*)m_cart), write16sm_delegate(FUNC(intv_cart_slot_device::write_speech),(intv_cart_slot_device*)m_cart));
|
||||
|
||||
// passthru for RAM-equipped carts
|
||||
m_maincpu->space(AS_PROGRAM).install_write_handler(0x8800, 0x8fff, write16_delegate(FUNC(intv_cart_slot_device::write_88),(intv_cart_slot_device*)m_cart));
|
||||
m_maincpu->space(AS_PROGRAM).install_write_handler(0xd000, 0xd7ff, write16_delegate(FUNC(intv_cart_slot_device::write_d0),(intv_cart_slot_device*)m_cart));
|
||||
m_maincpu->space(AS_PROGRAM).install_write_handler(0x8800, 0x8fff, write16sm_delegate(FUNC(intv_cart_slot_device::write_88),(intv_cart_slot_device*)m_cart));
|
||||
m_maincpu->space(AS_PROGRAM).install_write_handler(0xd000, 0xd7ff, write16sm_delegate(FUNC(intv_cart_slot_device::write_d0),(intv_cart_slot_device*)m_cart));
|
||||
break;
|
||||
case INTV_ECS:
|
||||
m_cart->late_subslot_setup();
|
||||
m_maincpu->space(AS_PROGRAM).install_readwrite_handler(0x00f0, 0x00ff, read16_delegate(FUNC(intv_cart_slot_device::read_ay),(intv_cart_slot_device*)m_cart), write16_delegate(FUNC(intv_cart_slot_device::write_ay),(intv_cart_slot_device*)m_cart));
|
||||
m_maincpu->space(AS_PROGRAM).install_readwrite_handler(0x4000, 0x47ff, read16_delegate(FUNC(intv_cart_slot_device::read_ram),(intv_cart_slot_device*)m_cart), write16_delegate(FUNC(intv_cart_slot_device::write_ram),(intv_cart_slot_device*)m_cart));
|
||||
m_maincpu->space(AS_PROGRAM).install_readwrite_handler(0x00f0, 0x00ff, read16sm_delegate(FUNC(intv_cart_slot_device::read_ay),(intv_cart_slot_device*)m_cart), write16sm_delegate(FUNC(intv_cart_slot_device::write_ay),(intv_cart_slot_device*)m_cart));
|
||||
m_maincpu->space(AS_PROGRAM).install_readwrite_handler(0x4000, 0x47ff, read16sm_delegate(FUNC(intv_cart_slot_device::read_ram),(intv_cart_slot_device*)m_cart), write16sm_delegate(FUNC(intv_cart_slot_device::write_ram),(intv_cart_slot_device*)m_cart));
|
||||
|
||||
m_maincpu->space(AS_PROGRAM).install_write_handler(0x2000, 0x2fff, write16_delegate(FUNC(intv_cart_slot_device::write_rom20),(intv_cart_slot_device*)m_cart));
|
||||
m_maincpu->space(AS_PROGRAM).install_write_handler(0x7000, 0x7fff, write16_delegate(FUNC(intv_cart_slot_device::write_rom70),(intv_cart_slot_device*)m_cart));
|
||||
m_maincpu->space(AS_PROGRAM).install_write_handler(0xe000, 0xefff, write16_delegate(FUNC(intv_cart_slot_device::write_rome0),(intv_cart_slot_device*)m_cart));
|
||||
m_maincpu->space(AS_PROGRAM).install_write_handler(0xf000, 0xffff, write16_delegate(FUNC(intv_cart_slot_device::write_romf0),(intv_cart_slot_device*)m_cart));
|
||||
m_maincpu->space(AS_PROGRAM).install_write_handler(0x2000, 0x2fff, write16sm_delegate(FUNC(intv_cart_slot_device::write_rom20),(intv_cart_slot_device*)m_cart));
|
||||
m_maincpu->space(AS_PROGRAM).install_write_handler(0x7000, 0x7fff, write16sm_delegate(FUNC(intv_cart_slot_device::write_rom70),(intv_cart_slot_device*)m_cart));
|
||||
m_maincpu->space(AS_PROGRAM).install_write_handler(0xe000, 0xefff, write16sm_delegate(FUNC(intv_cart_slot_device::write_rome0),(intv_cart_slot_device*)m_cart));
|
||||
m_maincpu->space(AS_PROGRAM).install_write_handler(0xf000, 0xffff, write16sm_delegate(FUNC(intv_cart_slot_device::write_romf0),(intv_cart_slot_device*)m_cart));
|
||||
|
||||
// passthru for Intellivoice expansion
|
||||
m_maincpu->space(AS_PROGRAM).install_readwrite_handler(0x0080, 0x0081, read16_delegate(FUNC(intv_cart_slot_device::read_speech),(intv_cart_slot_device*)m_cart), write16_delegate(FUNC(intv_cart_slot_device::write_speech),(intv_cart_slot_device*)m_cart));
|
||||
m_maincpu->space(AS_PROGRAM).install_readwrite_handler(0x0080, 0x0081, read16sm_delegate(FUNC(intv_cart_slot_device::read_speech),(intv_cart_slot_device*)m_cart), write16sm_delegate(FUNC(intv_cart_slot_device::write_speech),(intv_cart_slot_device*)m_cart));
|
||||
|
||||
// passthru for RAM-equipped carts
|
||||
m_maincpu->space(AS_PROGRAM).install_write_handler(0x8800, 0x8fff, write16_delegate(FUNC(intv_cart_slot_device::write_88),(intv_cart_slot_device*)m_cart));
|
||||
m_maincpu->space(AS_PROGRAM).install_write_handler(0xd000, 0xd7ff, write16_delegate(FUNC(intv_cart_slot_device::write_d0),(intv_cart_slot_device*)m_cart));
|
||||
m_maincpu->space(AS_PROGRAM).install_write_handler(0x8800, 0x8fff, write16sm_delegate(FUNC(intv_cart_slot_device::write_88),(intv_cart_slot_device*)m_cart));
|
||||
m_maincpu->space(AS_PROGRAM).install_write_handler(0xd000, 0xd7ff, write16sm_delegate(FUNC(intv_cart_slot_device::write_d0),(intv_cart_slot_device*)m_cart));
|
||||
break;
|
||||
}
|
||||
|
||||
|
||||
Loading…
Reference in New Issue
Block a user