Sprinter/mame
2
0
Fork 0
mirror of https://github.com/holub/mame synced 2025-04-19 07:00:31 +03:00
Code Issues Actions 3 Packages Projects Releases Wiki Activity

arm7: Disassembly improvements

Browse Source 
- Correct formatting of LDR and STR pre-indexed writeback modes
- Correct opcode suffixes for LDM and STM in ARM mode
- Correct LDRSH mnemonic in Thumb mode
- Omit destination register for data processing instructions when Rd = Rs
- Recognize RRX shift mode
- Disassemble immediate ADD or SUB from R15 as ADR in both ARM and Thumb modes
- Use ARM-preferred LSL, LSR, ASR, ROR and RRX mnemonics for shifted MOV operations
- Fully disassemble flag field for MSR [CS]PSR
- Use 0x as hexadecimal prefix except for small constants
- Make output in Thumb mode prettier
- Recognize a few more ARMv5/v5TE instructions
- Add STEP_OUT debugging flag to a few more instructions commonly used for exits
- Regularize a lot of sloppy formatting
- Somewhat reduce code duplication in Thumb disassembler
This commit is contained in:
AJR 2022-03-13 19:45:05 -04:00
parent c682bab37f
commit 236da6e6ad
2 changed files with 886 additions and 835 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

1106
src/devices/cpu/arm7/arm7dasm.cpp
View File

File diff suppressed because it is too large Load Diff

5
src/devices/cpu/arm7/arm7dasm.h
View File

@ -39,8 +39,9 @@ private:
void DasmCoProc_RT(std::ostream &stream, u32 opcode, const char *pConditionCode, std::streampos start_position);
void DasmCoProc_DT(std::ostream &stream, u32 opcode, const char *pConditionCode, std::streampos start_position);
void DasmCoProc_DO(std::ostream &stream, u32 opcode, const char *pConditionCode, std::streampos start_position);
void WriteImmediateOperand( std::ostream &stream, u32 opcode );
void WriteDataProcessingOperand( std::ostream &stream, u32 opcode, int printOp0, int printOp1, int printOp2 );
static u32 ExtractImmediateOperand( u32 opcode );
void WriteShiftCount( std::ostream &stream, u32 opcode );
void WriteDataProcessingOperand( std::ostream &stream, u32 opcode, bool printOp0, bool printOp1 );
void WriteRegisterOperand1( std::ostream &stream, u32 opcode );
void WriteBranchAddress( std::ostream &stream, u32 pc, u32 opcode, bool h_bit );
u32 arm7_disasm( std::ostream &stream, u32 pc, u32 opcode );