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Merge branch 'master' of https://github.com/mamedev/mame

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This commit is contained in:
Roberto Fresca 2018-10-19 10:33:09 +02:00
commit 24aff9c031
13 changed files with 215 additions and 89 deletions
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2
src/devices/cpu/m6502/dxavix.lst
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@ -12,7 +12,7 @@ bvs_rel adc_idy kil_non rra_idy nop_zpx adc_zpx ror_zpx
retf_imp sta_idx nop_imm sax_idx sty_zpg sta_zpg stx_zpg sax_zpg dey_imp nop_imm txa_imp ane_imm sty_aba sta_aba stx_aba sax_aba
bcc_rel sta_idy kil_non sha_idy sty_zpx sta_zpx stx_zpy sax_zpy tya_imp sta_aby txs_imp shs_aby shy_abx sta_abx shx_aby sha_aby
ldy_imm lda_idx ldx_imm lax_idx ldy_zpg lda_zpg ldx_zpg lax_zpg tay_imp lda_imm tax_imp lxa_imm ldy_aba lda_aba ldx_aba lax_aba
bcs_rel lda_idy kil_non lax_idy ldy_zpx lda_zpx ldx_zpy lax_zpy clv_imp lda_aby tsx_imp las_aby ldy_abx lda_abx ldx_aby lax_aby
bcs_rel xa_lda_idy kil_non lax_idy ldy_zpx lda_zpx ldx_zpy lax_zpy clv_imp lda_aby tsx_imp las_aby ldy_abx lda_abx ldx_aby lax_aby
cpy_imm cmp_idx nop_imm dcp_idx cpy_zpg cmp_zpg dec_zpg dcp_zpg iny_imp cmp_imm dex_imp sbx_imm cpy_aba cmp_aba dec_aba dcp_aba
bne_rel cmp_idy kil_non dcp_idy nop_zpx cmp_zpx dec_zpx dcp_zpx cld_imp cmp_aby nop_imp dcp_aby nop_abx cmp_abx dec_abx dcp_abx
cpx_imm sbc_idx nop_imm isb_idx cpx_zpg sbc_zpg inc_zpg isb_zpg inx_imp sbc_imm nop_imp sbc_imm cpx_aba sbc_aba inc_aba isb_aba

2
src/devices/cpu/m6502/dxavix2000.lst
View File

@ -12,7 +12,7 @@ bvs_rel adc_idy ply_imp adcpa_imp nop_imp adc_zpx ror_zpx
retf_imp sta_idx stz_zpg stal0_acc sty_zpg sta_zpg stx_zpg stal1_acc dey_imp sev_imp txa_imp stal2_acc sty_aba sta_aba stx_aba stal3_acc
bcc_rel sta_idy stz_aba stapa_imp sty_zpx sta_zpx stx_zpy stapb_imp tya_imp sta_aby txs_imp spa2_acc sty_abx sta_abx stx_aby spb2_acc
ldy_imm lda_idx ldx_imm ldal0_acc ldy_zpg lda_zpg ldx_zpg ldal1_acc tay_imp lda_imm tax_imp ldal2_acc ldy_aba lda_aba ldx_aba ldal3_acc
bcs_rel lda_idy clr_acc ldapa_imp ldy_zpx lda_zpx ldx_zpy ldapb_imp clv_imp lda_aby tsx_imp lpa2_acc ldy_abx lda_abx ldx_aby lpb2_acc
bcs_rel xa_lda_idy clr_acc ldapa_imp ldy_zpx lda_zpx ldx_zpy ldapb_imp clv_imp lda_aby tsx_imp lpa2_acc ldy_abx lda_abx ldx_aby lpb2_acc
cpy_imm cmp_idx dec_acc cmpl0_acc cpy_zpg cmp_zpg dec_zpg cmpl1_acc iny_imp cmp_imm dex_imp cmpl2_acc cpy_aba cmp_aba dec_aba cmpl3_acc
bne_rel cmp_idy not_acc cmppa_imp nop_imp cmp_zpx dec_zpx cmppb_imp cld_imp cmp_aby nop_imp decpa_imp nop_imp cmp_abx dec_abx decpb_imp
cpx_imm sbc_idx inc_acc sbcl0_acc cpx_zpg sbc_zpg inc_zpg sbcl1_acc inx_imp sbc_imm nop_imp sbcl2_acc cpx_aba sbc_aba inc_aba sbcl3_acc

12
src/devices/cpu/m6502/oxavix.lst
View File

@ -111,3 +111,15 @@ rti_xav_imp
TMP2 = read(SP);
set_codebank(TMP2);
prefetch();
xa_lda_idy
TMP2 = read_pc(); // we need to fetch the zero page part from zero page, but the rest as if zero page wasn't there, similar to the 6509
TMP = read(TMP2);
TMP = set_h(TMP, read((TMP2+1) & 0xff));
if(page_changing(TMP, Y)) {
read(set_l(TMP, TMP+Y));
}
A = read_special(TMP+Y);
set_nz(A);
prefetch();

80
src/devices/cpu/m6502/oxavix2000.lst
View File

@ -66,6 +66,7 @@ oral0_acc
prefetch();
oral1_acc
read_pc_noinc();
A |= (m_l & 0x0000ff00) >> 8;
set_nz(A);
prefetch();
@ -101,6 +102,7 @@ andl3_acc
prefetch();
eorl0_acc
read_pc_noinc();
A ^= (m_l & 0x000000ff) >> 0;
set_nz(A);
prefetch();
@ -121,23 +123,23 @@ eorl3_acc
prefetch();
adcl0_acc
fatalerror("unhandled opcode %02x%04x: %02x\n", m_codebank, PPC, inst_state);
read_pc_noinc();
do_adc((m_l & 0x000000ff) >> 0);
prefetch();
adcl1_acc
fatalerror("unhandled opcode %02x%04x: %02x\n", m_codebank, PPC, inst_state);
read_pc_noinc();
do_adc((m_l & 0x0000ff00) >> 8);
prefetch();
adcl2_acc
fatalerror("unhandled opcode %02x%04x: %02x\n", m_codebank, PPC, inst_state);
read_pc_noinc();
do_adc((m_l & 0x00ff0000) >> 16);
prefetch();
adcl3_acc
fatalerror("unhandled opcode %02x%04x: %02x\n", m_codebank, PPC, inst_state);
read_pc_noinc();
do_adc((m_l & 0xff000000) >> 24);
prefetch();
stal0_acc
@ -181,43 +183,43 @@ ldal3_acc
prefetch();
cmpl0_acc
fatalerror("unhandled opcode %02x%04x: %02x\n", m_codebank, PPC, inst_state);
read_pc_noinc();
do_cmp(A, (m_l & 0x000000ff) >> 0);
prefetch();
cmpl1_acc
fatalerror("unhandled opcode %02x%04x: %02x\n", m_codebank, PPC, inst_state);
read_pc_noinc();
do_cmp(A, (m_l & 0x0000ff00) >> 8);
prefetch();
cmpl2_acc
fatalerror("unhandled opcode %02x%04x: %02x\n", m_codebank, PPC, inst_state);
read_pc_noinc();
do_cmp(A, (m_l & 0x00ff0000) >> 16);
prefetch();
cmpl3_acc
fatalerror("unhandled opcode %02x%04x: %02x\n", m_codebank, PPC, inst_state);
read_pc_noinc();
do_cmp(A, (m_l & 0xff000000) >> 24);
prefetch();
sbcl0_acc
fatalerror("unhandled opcode %02x%04x: %02x\n", m_codebank, PPC, inst_state);
read_pc_noinc();
do_sbc((m_l & 0x000000ff) >> 0);
prefetch();
sbcl1_acc
fatalerror("unhandled opcode %02x%04x: %02x\n", m_codebank, PPC, inst_state);
read_pc_noinc();
do_sbc((m_l & 0x0000ff00) >> 8);
prefetch();
sbcl2_acc
fatalerror("unhandled opcode %02x%04x: %02x\n", m_codebank, PPC, inst_state);
read_pc_noinc();
do_sbc((m_l & 0x00ff0000) >> 16);
prefetch();
sbcl3_acc
fatalerror("unhandled opcode %02x%04x: %02x\n", m_codebank, PPC, inst_state);
read_pc_noinc();
do_sbc((m_l & 0xff000000) >> 24);
prefetch();
spa0_acc
@ -287,18 +289,21 @@ incpa_imp
prefetch();
incpb_imp
fatalerror("unhandled opcode %02x%04x: %02x\n", m_codebank, PPC, inst_state);
read_pc_noinc();
m_pb++;
set_nz(m_pb&0xff); // startup code seems to require flag to set if low byte is 0x00?
prefetch();
decpa_imp
fatalerror("unhandled opcode %02x%04x: %02x\n", m_codebank, PPC, inst_state);
read_pc_noinc();
m_pa--;
set_nz(m_pa&0xff); // startup code seems to require flag to set if low byte is 0x00?
prefetch();
decpb_imp
fatalerror("unhandled opcode %02x%04x: %02x\n", m_codebank, PPC, inst_state);
read_pc_noinc();
m_pb--;
set_nz(m_pb&0xff); // startup code seems to require flag to set if low byte is 0x00?
prefetch();
orapa_imp
@ -331,8 +336,10 @@ stapa_imp
prefetch();
ldapa_imp
fatalerror("unhandled opcode %02x%04x: %02x\n", m_codebank, PPC, inst_state);
read_pc_noinc();
TMP = m_databank; // TODO: Flags, how does bank boundary crossing get handled?
m_databank = (m_pa & 0xff0000)>>16;
A = read((m_pa&0xffff)+Y);
m_databank = TMP;
prefetch();
cmppa_imp
@ -363,18 +370,24 @@ eorpb_imp
prefetch();
adcpb_imp
fatalerror("unhandled opcode %02x%04x: %02x\n", m_codebank, PPC, inst_state);
read_pc_noinc();
TMP = m_databank; // TODO: Flags, how does bank boundary crossing get handled?
m_databank = (m_pb & 0xff0000)>>16;
do_adc(read((m_pb&0xffff)+Y));
m_databank = TMP;
prefetch();
stapb_imp
fatalerror("unhandled opcode %02x%04x: %02x\n", m_codebank, PPC, inst_state);
read_pc_noinc();
TMP = m_databank; // TODO: Flags, how does bank boundary crossing get handled?
m_databank = (m_pb & 0xff0000)>>16;
write((m_pb&0xffff)+Y, A);
m_databank = TMP;
prefetch();
ldapb_imp
fatalerror("unhandled opcode %02x%04x: %02x\n", m_codebank, PPC, inst_state);
read_pc_noinc();
TMP = m_databank; // TODO: Flags, how does bank boundary crossing get handled?
m_databank = (m_pb & 0xff0000)>>16;
A = read((m_pb&0xffff)+Y);
m_databank = TMP;
prefetch();
cmppb_imp
@ -383,18 +396,22 @@ cmppb_imp
prefetch();
sbcpb_imp
fatalerror("unhandled opcode %02x%04x: %02x\n", m_codebank, PPC, inst_state);
read_pc_noinc();
TMP = m_databank; // TODO: Flags, how does bank boundary crossing get handled?
m_databank = (m_pb & 0xff0000)>>16;
do_sbc(read((m_pb&0xffff)+Y));
m_databank = TMP;
prefetch();
stx_aby
fatalerror("unhandled opcode %02x%04x: %02x\n", m_codebank, PPC, inst_state);
read_pc_noinc();
TMP = read_pc();
TMP = set_h(TMP, read_pc());
write(TMP+Y, X);
prefetch();
sty_abx
fatalerror("unhandled opcode %02x%04x: %02x\n", m_codebank, PPC, inst_state);
read_pc_noinc();
TMP = read_pc();
TMP = set_h(TMP, read_pc());
write(TMP+X, Y);
prefetch();
stz_zpg
@ -442,8 +459,7 @@ asr_zpx
prefetch();
asr_acc
fatalerror("unhandled opcode %02x%04x: %02x\n", m_codebank, PPC, inst_state);
read_pc_noinc();
A = do_asr(A);
prefetch();
asr_abx
@ -457,8 +473,8 @@ cmc_imp
prefetch();
sev_imp
fatalerror("unhandled opcode %02x%04x: %02x\n", m_codebank, PPC, inst_state);
read_pc_noinc();
P |= F_V;
prefetch();
callf_aba

89
src/devices/cpu/m6502/xavix.cpp
View File

@ -32,22 +32,29 @@ DEFINE_DEVICE_TYPE(XAVIX, xavix_device, "xavix", "XaviX (SSD 97 / SSD 98)")
xavix_device::xavix_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) :
m6502_device(mconfig, XAVIX, tag, owner, clock),
XPC(0)
XPC(0),
m_special_data_config("specialdata", ENDIANNESS_LITTLE, 8, 24)
{
program_config.m_addr_width = 24;
program_config.m_logaddr_width = 24;
sprogram_config.m_addr_width = 24;
sprogram_config.m_logaddr_width = 24;
m_special_data_config.m_addr_width = 24;
m_special_data_config.m_logaddr_width = 24;
}
xavix_device::xavix_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock) :
m6502_device(mconfig, type, tag, owner, clock),
XPC(0)
XPC(0),
m_special_data_config("specialdata", ENDIANNESS_LITTLE, 8, 24)
{
program_config.m_addr_width = 24;
program_config.m_logaddr_width = 24;
sprogram_config.m_addr_width = 24;
sprogram_config.m_logaddr_width = 24;
m_special_data_config.m_addr_width = 24;
m_special_data_config.m_logaddr_width = 24;
}
@ -74,6 +81,11 @@ void xavix_device::device_start()
m_vector_callback.bind_relative_to(*owner());
init();
m_special_data_space = &space(4);
state_add(XAVIX_DATABANK, "DATBNK", m_databank).callimport().formatstr("%2s");;
state_add(XAVIX_CODEBANK, "CODBNK", m_codebank).callimport().formatstr("%2s");
}
void xavix_device::device_reset()
@ -83,6 +95,11 @@ void xavix_device::device_reset()
m6502_device::device_reset();
}
uint8_t xavix_device::read_special(uint16_t adr)
{
return m_special_data_space->read_byte(adr | (m_databank<<16));
}
xavix_device::mi_xavix_normal::mi_xavix_normal(xavix_device *_base)
{
base = _base;
@ -101,21 +118,11 @@ uint8_t xavix_device::mi_xavix_normal::read(uint16_t adr)
uint8_t xavix_device::mi_xavix_normal::read_sync(uint16_t adr)
{
if (adr == 0xfe)
return base->m_codebank;
else if (adr == 0xff)
return base->m_databank;
return scache->read_byte(base->adr_with_codebank(adr));
}
uint8_t xavix_device::mi_xavix_normal::read_arg(uint16_t adr)
{
if (adr == 0xfe)
return base->m_codebank;
else if (adr == 0xff)
return base->m_databank;
return cache->read_byte(base->adr_with_codebank(adr));
}
@ -141,21 +148,11 @@ xavix_device::mi_xavix_nd::mi_xavix_nd(xavix_device *_base) : mi_xavix_normal(_b
uint8_t xavix_device::mi_xavix_nd::read_sync(uint16_t adr)
{
if (adr == 0xfe)
return base->m_codebank;
else if (adr == 0xff)
return base->m_databank;
return sprogram->read_byte(base->adr_with_codebank(adr));
}
uint8_t xavix_device::mi_xavix_nd::read_arg(uint16_t adr)
{
if (adr == 0xfe)
return base->m_codebank;
else if (adr == 0xff)
return base->m_databank;
return program->read_byte(base->adr_with_codebank(adr));
}
@ -183,4 +180,52 @@ inline uint8_t xavix_device::get_databank()
return m_databank;
}
device_memory_interface::space_config_vector xavix_device::memory_space_config() const
{
if(has_configured_map(AS_OPCODES))
return space_config_vector {
std::make_pair(AS_PROGRAM, &program_config),
std::make_pair(AS_OPCODES, &sprogram_config),
std::make_pair(4, &m_special_data_config)
};
else
return space_config_vector {
std::make_pair(AS_PROGRAM, &program_config),
std::make_pair(4, &m_special_data_config)
};
}
void xavix_device::state_import(const device_state_entry &entry)
{
m6502_device::state_import(entry);
switch(entry.index())
{
case XAVIX_DATABANK:
break;
case XAVIX_CODEBANK:
break;
}
}
void xavix_device::state_string_export(const device_state_entry &entry, std::string &str) const
{
m6502_device::state_string_export(entry, str);
switch(entry.index())
{
case XAVIX_DATABANK:
str = string_format("%02x", m_databank);
break;
case XAVIX_CODEBANK:
str = string_format("%02x", m_codebank);
break;
}
}
#include "cpu/m6502/xavix.hxx"

18
src/devices/cpu/m6502/xavix.h
View File

@ -32,6 +32,8 @@ public:
O(brk_xav_imp);
O(rti_xav_imp);
O(xa_lda_idy);
typedef device_delegate<int16_t (int which, int half)> xavix_interrupt_vector_delegate;
template <typename Object> void set_vector_callback(Object &&cb) { m_vector_callback = std::forward<Object>(cb); }
@ -71,6 +73,16 @@ protected:
virtual void device_start() override;
virtual void device_reset() override;
virtual offs_t pc_to_external(u16 pc) override;
virtual void state_import(const device_state_entry &entry) override;
virtual void state_string_export(const device_state_entry &entry, std::string &str) const override;
// device_memory_interface overrides
virtual space_config_vector memory_space_config() const override;
address_space_config m_special_data_config;
address_space *m_special_data_space;
uint8_t read_special(uint16_t adr);
protected:
xavix_interrupt_vector_delegate m_vector_callback;
@ -82,6 +94,12 @@ protected:
};
enum {
XAVIX_DATABANK = M6502_IR+1,
XAVIX_CODEBANK,
};
DECLARE_DEVICE_TYPE(XAVIX, xavix_device)
#endif // MAME_CPU_M6502_XAVIX_H

2
src/devices/cpu/m6502/xavix2000.h
View File

@ -151,7 +151,7 @@ public:
};
enum {
SXAVIX_L = M6502_IR+1,
SXAVIX_L = XAVIX_CODEBANK+1,
SXAVIX_PA,
SXAVIX_PB
};

2
src/devices/machine/spg2xx.cpp
View File

@ -349,7 +349,7 @@ void spg2xx_device::blit_page(const rectangle &cliprect, int depth, uint32_t bit
{
for (uint32_t x0 = 0; x0 < wn; x0++)
{
uint16_t tile = (ctrl & PAGE_BLANK_MASK) ? 0 : space.read_word(tilemap + x0 + wn * y0);
uint16_t tile = (ctrl & PAGE_WALLPAPER_MASK) ? space.read_word(tilemap) : space.read_word(tilemap + x0 + wn * y0);
uint16_t palette = 0;
uint32_t xx, yy;

2
src/devices/machine/spg2xx.h
View File

@ -68,7 +68,7 @@ protected:
enum
{
PAGE_ENABLE_MASK = 0x0008,
PAGE_BLANK_MASK = 0x0004,
PAGE_WALLPAPER_MASK = 0x0004,
SPRITE_ENABLE_MASK = 0x0001,
SPRITE_COORD_TL_MASK = 0x0002,

35
src/mame/drivers/vii.cpp
View File

@ -393,7 +393,7 @@ READ16_MEMBER(vsmile_state::portb_r)
//const uint8_t inputs = m_io_p2->read();
//const uint16_t input_bits = BIT(inputs, 0) ? VSMILE_PORTB_ON_SW : 0;
const uint16_t data = VSMILE_PORTB_ON_SW | (m_cart && m_cart->exists() ? VSMILE_PORTB_CART : 0);
logerror("V.Smile Port B read %04x, mask %04x\n", data, mem_mask);
//logerror("V.Smile Port B read %04x, mask %04x\n", data, mem_mask);
//printf("V.Smile Port B read %04x, mask %04x\n", data, mem_mask);
return data;
}
@ -401,47 +401,47 @@ READ16_MEMBER(vsmile_state::portb_r)
READ16_MEMBER(vsmile_state::portc_r)
{
const uint16_t data = VSMILE_PORTC_LOGO | 0x0004;
logerror("V.Smile Port C read %04x, mask %04x\n", data, mem_mask);
//logerror("V.Smile Port C read %04x, mask %04x\n", data, mem_mask);
return data;
}
WRITE16_MEMBER(vsmile_state::portb_w)
{
m_portb_data = data & mem_mask;
logerror("V.Smile Port B write %04x, mask %04x\n", m_portb_data, mem_mask);
//logerror("V.Smile Port B write %04x, mask %04x\n", m_portb_data, mem_mask);
//printf("V.Smile Port B write %04x, mask %04x\n", m_portb_data, mem_mask);
}
WRITE16_MEMBER(vsmile_state::portc_w)
{
m_portc_data = data & mem_mask;
logerror("V.Smile Port C write %04x, mask %04x\n", m_portc_data, mem_mask);
//logerror("V.Smile Port C write %04x, mask %04x\n", m_portc_data, mem_mask);
//printf("V.Smile Port C write %04x, mask %04x\n", m_portc_data, mem_mask);
//printf("%02x ", data >> 8);
}
WRITE8_MEMBER(vsmile_state::uart_tx)
{
logerror("UART Tx: %02x\n", data);
//logerror("UART Tx: %02x\n", data);
}
WRITE8_MEMBER(vsmile_state::chip_sel_w)
{
logerror("Chip select mode: %d\n", data);
//logerror("Chip select mode: %d\n", data);
const uint16_t cart_offset = m_cart && m_cart->exists() ? 4 : 0;
switch (data)
{
case 0:
logerror("Setting bank %d\n", cart_offset);
//logerror("Setting bank %d\n", cart_offset);
m_bankdev->set_bank(cart_offset);
break;
case 1:
logerror("Setting bank %d\n", 1 + cart_offset);
//logerror("Setting bank %d\n", 1 + cart_offset);
m_bankdev->set_bank(1 + cart_offset);
break;
case 2:
case 3:
logerror("Setting bank %d\n", 2 + cart_offset);
//logerror("Setting bank %d\n", 2 + cart_offset);
m_bankdev->set_bank(2 + cart_offset);
break;
}
@ -449,28 +449,11 @@ WRITE8_MEMBER(vsmile_state::chip_sel_w)
READ16_MEMBER(spg2xx_game_state::walle_portc_r)
{
char mask_buf[17];
mask_buf[16] = 0;
for (uint32_t i = 0; i < 16; i++)
{
mask_buf[i] = BIT(mem_mask, 15 - i) ? '1' : '0';
}
logerror("Wall-E Port C read 0000, pull mask %s\n", mask_buf);
return m_i2cmem->read_sda();
}
WRITE16_MEMBER(spg2xx_game_state::walle_portc_w)
{
char data_buf[17];
char mask_buf[17];
data_buf[16] = 0;
mask_buf[16] = 0;
for (uint32_t i = 0; i < 16; i++)
{
data_buf[i] = BIT(data, 15 - i) ? '1' : '0';
mask_buf[i] = BIT(mem_mask, 15 - i) ? '1' : '0';
}
logerror("Wall-E Port C write %s, push mask %s\n", data_buf, mask_buf);
m_walle_portc_data = data & mem_mask;
if (BIT(mem_mask, 1))
m_i2cmem->write_scl(BIT(data, 1));

40
src/mame/drivers/xavix.cpp
View File

@ -252,6 +252,12 @@ WRITE8_MEMBER(xavix_state::main_w)
the value written and puts it in RAM. Is stack actually still memory mapped at this point, or do stack operations always go to stack regardless?
Do reads return databank/codebank/stack, or only zero page? is zero page visibility maybe even conditional on how it gets used?
in namcons1 the code at 00F3F2 has data bank set to 0x84 and expects to read from ROM using lda ($0a), y where the content of 0x0a is 0000
this means that 0a and 0b must be read as zero page, but the actual pointer read from is ROM, bypassing zero page entirely, I currently have a separate
address space called by that single opcode to handle this, it might need expanding to any other opcodes that aren't using zero page directly tho
possible stack is similar?
*/
READ8_MEMBER(xavix_state::main2_r)
{
@ -294,6 +300,24 @@ void xavix_state::xavix_map(address_map &map)
map(0x800000, 0xffffff).rw(FUNC(xavix_state::main2_r), FUNC(xavix_state::main2_w));
}
// used by the xa_lda_idy ( lda ($**), y )opcodes
READ8_MEMBER(xavix_state::main3_r)
{
return m_rgn[(offset) & (m_rgnlen - 1)];
}
WRITE8_MEMBER(xavix_state::main3_w)
{
//
}
void xavix_state::xavix_special_map(address_map &map)
{
map(0x000000, 0x7fffff).rw(FUNC(xavix_state::main_r), FUNC(xavix_state::main_w));
map(0x800000, 0xffffff).rw(FUNC(xavix_state::main3_r), FUNC(xavix_state::main3_w));
}
void xavix_state::xavix_lowbus_map(address_map &map)
{
map(0x0000, 0x3fff).ram().share("mainram");
@ -645,6 +669,16 @@ static INPUT_PORTS_START( rad_bb2 )
PORT_BIT( 0x40, IP_ACTIVE_HIGH, IPT_BUTTON3 ) PORT_NAME(".")
INPUT_PORTS_END
static INPUT_PORTS_START( ttv_mx )
PORT_INCLUDE(xavix)
PORT_MODIFY("IN0")
PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_BUTTON1 ) // Accel
PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_BUTTON2 ) // Brake
PORT_BIT( 0x40, IP_ACTIVE_HIGH, IPT_JOYSTICK_LEFT )
PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_JOYSTICK_RIGHT )
INPUT_PORTS_END
/* correct, 4bpp gfxs */
static const gfx_layout charlayout =
{
@ -703,10 +737,13 @@ MACHINE_CONFIG_START(xavix_state::xavix)
/* basic machine hardware */
MCFG_DEVICE_ADD("maincpu",XAVIX,MAIN_CLOCK)
MCFG_DEVICE_PROGRAM_MAP(xavix_map)
MCFG_DEVICE_ADDRESS_MAP(4, xavix_special_map)
MCFG_M6502_DISABLE_CACHE()
MCFG_DEVICE_VBLANK_INT_DRIVER("screen", xavix_state, interrupt)
MCFG_XAVIX_VECTOR_CALLBACK(xavix_state, get_vectors)
MCFG_TIMER_DRIVER_ADD_SCANLINE("scantimer", xavix_state, scanline_cb, "screen", 0, 1)
ADDRESS_MAP_BANK(config, "lowbus").set_map(&xavix_state::xavix_lowbus_map).set_options(ENDIANNESS_LITTLE, 8, 24, 0x8000);
@ -750,6 +787,7 @@ MACHINE_CONFIG_START(xavix_state::xavix2000)
MCFG_DEVICE_ADD("maincpu",XAVIX2000,MAIN_CLOCK)
MCFG_DEVICE_PROGRAM_MAP(xavix_map)
MCFG_DEVICE_ADDRESS_MAP(4, xavix_special_map)
MCFG_M6502_DISABLE_CACHE()
MCFG_DEVICE_VBLANK_INT_DRIVER("screen", xavix_state, interrupt)
MCFG_XAVIX_VECTOR_CALLBACK(xavix_state, get_vectors)
@ -999,5 +1037,5 @@ CONS( 2004, xavtenni, 0, 0, xavix2000_i2c, xavix, xavix_state, init_xavix, "SSD
CONS( 2005, ttv_sw, 0, 0, xavix2000_i2c, xavix, xavix_state, init_xavix, "Tiger / SSD Company LTD", "Star Wars Saga Edition - Lightsaber Battle Game", MACHINE_IS_SKELETON )
CONS( 2005, ttv_lotr, 0, 0, xavix2000_i2c, xavix, xavix_state, init_xavix, "Tiger / SSD Company LTD", "Lord Of The Rings - Warrior of Middle-Earth", MACHINE_IS_SKELETON )
CONS( 2005, ttv_mx, 0, 0, xavix2000_i2c, xavix, xavix_state, init_xavix, "Tiger / SSD Company LTD", "MX Dirt Rebel", MACHINE_IS_SKELETON )
CONS( 2005, ttv_mx, 0, 0, xavix2000_i2c, ttv_mx, xavix_state, init_xavix, "Tiger / SSD Company LTD", "MX Dirt Rebel", MACHINE_IS_SKELETON )
CONS( 2003, drgqst, 0, 0, xavix2000_i2c, xavix, xavix_state, init_xavix, "Square Enix / SSD Company LTD", "Kenshin Dragon Quest: Yomigaerishi Densetsu no Ken", MACHINE_IS_SKELETON )

4
src/mame/includes/xavix.h
View File

@ -53,6 +53,8 @@ private:
uint32_t screen_update(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect);
void xavix_map(address_map &map);
void xavix_special_map(address_map &map);
void xavix_lowbus_map(address_map &map);
INTERRUPT_GEN_MEMBER(interrupt);
@ -68,6 +70,8 @@ private:
DECLARE_WRITE8_MEMBER(main_w);
DECLARE_READ8_MEMBER(main2_r);
DECLARE_WRITE8_MEMBER(main2_w);
DECLARE_READ8_MEMBER(main3_r);
DECLARE_WRITE8_MEMBER(main3_w);
DECLARE_WRITE8_MEMBER(extintrf_7900_w);
DECLARE_WRITE8_MEMBER(extintrf_7901_w);

16
src/mame/video/namcofl.cpp
View File

@ -60,19 +60,29 @@ void namcofl_state::RozCB(uint16_t code, int *tile, int *mask, int which)
uint32_t namcofl_state::screen_update_namcofl(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect)
{
/* compute window for custom screen blanking */
rectangle clip;
//004c 016b 0021 0101 004a 0060 (finalapr*)
//004b 016b 0021 0101 0144 0047 (speedrcr)
clip.min_x = m_c116->get_reg(0) - 0x4b;
clip.max_x = m_c116->get_reg(1) - 0x4b - 1;
clip.min_y = m_c116->get_reg(2) - 0x21;
clip.max_y = m_c116->get_reg(3) - 0x21 - 1;
/* intersect with master clip rectangle */
clip &= cliprect;
int pri;
bitmap.fill(m_c116->black_pen(), cliprect );
for( pri=0; pri<16; pri++ )
{
m_c169roz->draw(screen, bitmap, cliprect, pri);
m_c169roz->draw(screen, bitmap, clip, pri);
if ((pri & 1) == 0)
{
m_c123tmap->draw(screen, bitmap, cliprect, pri >> 1);
m_c123tmap->draw(screen, bitmap, clip, pri >> 1);
}
m_c355spr->draw(screen, bitmap, cliprect, pri );
m_c355spr->draw(screen, bitmap, clip, pri );
}
return 0;