Complete rewrite of the Z80-PIO implementation. The handshaking signals are now more accurately emulated. As a result, the Merit Megatouch games are no longer working since they relied on the earlier incorrect behavior. [Curt Coder]

This commit is contained in:
Curt Coder 2010-02-17 11:02:33 +00:00
parent 3a53e7d5dd
commit 24daf75e02
8 changed files with 947 additions and 606 deletions

File diff suppressed because it is too large Load Diff

View File

@ -1,6 +1,6 @@
/***************************************************************************
Z80 PIO (Z8420) implementation
Zilog Z80 Parallel Input/Output Controller implementation
Copyright Nicola Salmoria and the MAME Team.
Visit http://mamedev.org for licensing and usage restrictions.
@ -16,8 +16,8 @@
PA7 7 | | 34 PB7
PA6 8 | | 33 PB6
PA5 9 | | 32 PB5
PA4 10 | Z80-PIO | 31 PB4
GND 11 | | 30 PB3
PA4 10 | Z8420 | 31 PB4
GND 11 | | 30 PB3
PA3 12 | | 29 PB2
PA2 13 | | 28 PB1
PA1 14 | | 27 PB0
@ -30,10 +30,21 @@
***************************************************************************/
#ifndef __Z80PIO_H__
#define __Z80PIO_H__
#ifndef __Z80PIO__
#define __Z80PIO__
/***************************************************************************
MACROS / CONSTANTS
***************************************************************************/
#define Z80PIO DEVICE_GET_INFO_NAME(z80pio)
#define MDRV_Z80PIO_ADD(_tag, _clock, _intrf) \
MDRV_DEVICE_ADD(_tag, Z80PIO, _clock) \
MDRV_DEVICE_CONFIG(_intrf)
#define Z80PIO_INTERFACE(_name) \
const z80pio_interface (_name) =
/***************************************************************************
TYPE DEFINITIONS
@ -42,71 +53,47 @@
typedef struct _z80pio_interface z80pio_interface;
struct _z80pio_interface
{
devcb_write_line intr; /* callback when change interrupt status */
devcb_read8 portAread; /* port A read callback */
devcb_read8 portBread; /* port B read callback */
devcb_write8 portAwrite; /* port A write callback */
devcb_write8 portBwrite; /* port B write callback */
devcb_write_line rdyA; /* portA ready active callback */
devcb_write_line rdyB; /* portB ready active callback */
devcb_write_line out_int_func;
devcb_read8 in_pa_func;
devcb_write8 out_pa_func;
devcb_write_line out_ardy_func;
devcb_read8 in_pb_func;
devcb_write8 out_pb_func;
devcb_write_line out_brdy_func;
};
/***************************************************************************
DEVICE CONFIGURATION MACROS
PROTOTYPES
***************************************************************************/
#define MDRV_Z80PIO_ADD(_tag, _intrf) \
MDRV_DEVICE_ADD(_tag, Z80PIO, 0) \
MDRV_DEVICE_CONFIG(_intrf)
/***************************************************************************
CONTROL REGISTER READ/WRITE
***************************************************************************/
WRITE8_DEVICE_HANDLER( z80pio_c_w );
READ8_DEVICE_HANDLER( z80pio_c_r );
/***************************************************************************
DATA REGISTER READ/WRITE
***************************************************************************/
WRITE8_DEVICE_HANDLER( z80pio_d_w );
READ8_DEVICE_HANDLER( z80pio_d_r );
/***************************************************************************
PORT I/O
***************************************************************************/
WRITE8_DEVICE_HANDLER( z80pio_p_w );
READ8_DEVICE_HANDLER( z80pio_p_r );
/***************************************************************************
STROBE STATE MANAGEMENT
***************************************************************************/
void z80pio_astb_w(running_device *device, int state);
void z80pio_bstb_w(running_device *device, int state);
/***************************************************************************
READ/WRITE HANDLERS
***************************************************************************/
READ8_DEVICE_HANDLER(z80pio_r);
WRITE8_DEVICE_HANDLER(z80pio_w);
READ8_DEVICE_HANDLER(z80pio_alt_r);
WRITE8_DEVICE_HANDLER(z80pio_alt_w);
/* ----- device interface ----- */
#define Z80PIO DEVICE_GET_INFO_NAME(z80pio)
DEVICE_GET_INFO( z80pio );
/* control register access */
READ8_DEVICE_HANDLER( z80pio_c_r );
WRITE8_DEVICE_HANDLER( z80pio_c_w );
/* data register access */
READ8_DEVICE_HANDLER( z80pio_d_r );
WRITE8_DEVICE_HANDLER( z80pio_d_w );
/* register access */
READ8_DEVICE_HANDLER( z80pio_cd_ba_r );
WRITE8_DEVICE_HANDLER( z80pio_cd_ba_w );
READ8_DEVICE_HANDLER( z80pio_ba_cd_r );
WRITE8_DEVICE_HANDLER( z80pio_ba_cd_w );
/* port access */
READ8_DEVICE_HANDLER( z80pio_pa_r );
WRITE8_DEVICE_HANDLER( z80pio_pa_w );
READ8_DEVICE_HANDLER( z80pio_pb_r );
WRITE8_DEVICE_HANDLER( z80pio_pb_w );
/* strobe */
WRITE_LINE_DEVICE_HANDLER( z80pio_astb_w );
WRITE_LINE_DEVICE_HANDLER( z80pio_bstb_w );
#endif

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@ -10,7 +10,7 @@
static INT16 *_single;
static int single_rate = 0;
static int single_volume = 0;
UINT8 senjyo_sound_cmd;
const z80_daisy_chain senjyo_daisy_chain[] =
{
@ -22,10 +22,15 @@ const z80_daisy_chain senjyo_daisy_chain[] =
/* z80 pio */
const z80pio_interface senjyo_pio_intf =
READ8_DEVICE_HANDLER( pio_pa_r )
{
return senjyo_sound_cmd;
}
Z80PIO_INTERFACE( senjyo_pio_intf )
{
DEVCB_CPU_INPUT_LINE("sub", INPUT_LINE_IRQ0),
DEVCB_NULL,
DEVCB_HANDLER(pio_pa_r),
DEVCB_NULL,
DEVCB_NULL,
DEVCB_NULL,

View File

@ -708,10 +708,10 @@ ADDRESS_MAP_END
static ADDRESS_MAP_START( ipu_91695_portmap, ADDRESS_SPACE_IO, 8 )
ADDRESS_MAP_UNMAP_HIGH
ADDRESS_MAP_GLOBAL_MASK(0xff)
AM_RANGE(0x00, 0x03) AM_MIRROR(0xe0) AM_DEVREADWRITE("ipu_pio0", z80pio_r, z80pio_w)
AM_RANGE(0x00, 0x03) AM_MIRROR(0xe0) AM_DEVREADWRITE("ipu_pio0", z80pio_cd_ba_r, z80pio_cd_ba_w)
AM_RANGE(0x04, 0x07) AM_MIRROR(0xe0) AM_DEVREADWRITE("ipu_sio", mcr_ipu_sio_r, mcr_ipu_sio_w)
AM_RANGE(0x08, 0x0b) AM_MIRROR(0xe0) AM_DEVREADWRITE("ipu_ctc", z80ctc_r, z80ctc_w)
AM_RANGE(0x0c, 0x0f) AM_MIRROR(0xe0) AM_DEVREADWRITE("ipu_pio1", z80pio_r, z80pio_w)
AM_RANGE(0x0c, 0x0f) AM_MIRROR(0xe0) AM_DEVREADWRITE("ipu_pio1", z80pio_cd_ba_r, z80pio_cd_ba_w)
AM_RANGE(0x10, 0x13) AM_MIRROR(0xe0) AM_WRITE(mcr_ipu_laserdisk_w)
AM_RANGE(0x1c, 0x1f) AM_MIRROR(0xe0) AM_READWRITE(mcr_ipu_watchdog_r, mcr_ipu_watchdog_w)
ADDRESS_MAP_END
@ -1670,8 +1670,8 @@ static MACHINE_DRIVER_START( mcr_91490_ipu )
MDRV_CPU_VBLANK_INT_HACK(mcr_ipu_interrupt,2)
MDRV_Z80CTC_ADD("ipu_ctc", 7372800/2 /* same as "ipu" */, nflfoot_ctc_intf)
MDRV_Z80PIO_ADD("ipu_pio0", nflfoot_pio_intf)
MDRV_Z80PIO_ADD("ipu_pio1", nflfoot_pio_intf)
MDRV_Z80PIO_ADD("ipu_pio0", 7372800/2, nflfoot_pio_intf)
MDRV_Z80PIO_ADD("ipu_pio1", 7372800/2, nflfoot_pio_intf)
MDRV_Z80SIO_ADD("ipu_sio", 7372800/2 /* same as "ipu" */, nflfoot_sio_intf)
MACHINE_DRIVER_END

View File

@ -326,7 +326,7 @@ static void meritm_vdp0_interrupt(running_machine *machine, int i)
meritm_vint |= 0x08;
if(i)
z80pio_p_w(meritm_z80pio[0], 0, meritm_vint);
z80pio_pa_w(meritm_z80pio[0], 0, meritm_vint);
}
}
@ -341,7 +341,7 @@ static void meritm_vdp1_interrupt(running_machine *machine, int i)
meritm_vint |= 0x10;
if(i)
z80pio_p_w(meritm_z80pio[0], 0, meritm_vint);
z80pio_pa_w(meritm_z80pio[0], 0, meritm_vint);
}
}
@ -587,8 +587,8 @@ static ADDRESS_MAP_START( meritm_crt250_io_map, ADDRESS_SPACE_IO, 8 )
AM_RANGE(0x22, 0x22) AM_WRITE(v9938_1_palette_w)
AM_RANGE(0x23, 0x23) AM_WRITE(v9938_1_register_w)
AM_RANGE(0x30, 0x33) AM_DEVREADWRITE("ppi8255", ppi8255_r, ppi8255_w)
AM_RANGE(0x40, 0x43) AM_DEVREADWRITE("z80pio_0", z80pio_r, z80pio_w)
AM_RANGE(0x50, 0x53) AM_DEVREADWRITE("z80pio_1", z80pio_r, z80pio_w)
AM_RANGE(0x40, 0x43) AM_DEVREADWRITE("z80pio_0", z80pio_cd_ba_r, z80pio_cd_ba_w)
AM_RANGE(0x50, 0x53) AM_DEVREADWRITE("z80pio_1", z80pio_cd_ba_r, z80pio_cd_ba_w)
AM_RANGE(0x80, 0x80) AM_DEVREAD("aysnd", ay8910_r)
AM_RANGE(0x80, 0x81) AM_DEVWRITE("aysnd", ay8910_address_data_w)
AM_RANGE(0xff, 0xff) AM_WRITE(meritm_crt250_bank_w)
@ -605,8 +605,8 @@ static ADDRESS_MAP_START( meritm_crt250_crt258_io_map, ADDRESS_SPACE_IO, 8 )
AM_RANGE(0x22, 0x22) AM_WRITE(v9938_1_palette_w)
AM_RANGE(0x23, 0x23) AM_WRITE(v9938_1_register_w)
AM_RANGE(0x30, 0x33) AM_DEVREADWRITE("ppi8255", ppi8255_r, ppi8255_w)
AM_RANGE(0x40, 0x43) AM_DEVREADWRITE("z80pio_0", z80pio_r, z80pio_w)
AM_RANGE(0x50, 0x53) AM_DEVREADWRITE("z80pio_1", z80pio_r, z80pio_w)
AM_RANGE(0x40, 0x43) AM_DEVREADWRITE("z80pio_0", z80pio_cd_ba_r, z80pio_cd_ba_w)
AM_RANGE(0x50, 0x53) AM_DEVREADWRITE("z80pio_1", z80pio_cd_ba_r, z80pio_cd_ba_w)
AM_RANGE(0x60, 0x67) AM_READWRITE(pc16552d_0_r,pc16552d_0_w)
AM_RANGE(0x80, 0x80) AM_DEVREAD("aysnd", ay8910_r)
AM_RANGE(0x80, 0x81) AM_DEVWRITE("aysnd", ay8910_address_data_w)
@ -632,8 +632,8 @@ static ADDRESS_MAP_START( meritm_io_map, ADDRESS_SPACE_IO, 8 )
AM_RANGE(0x22, 0x22) AM_WRITE(v9938_1_palette_w)
AM_RANGE(0x23, 0x23) AM_WRITE(v9938_1_register_w)
AM_RANGE(0x30, 0x33) AM_DEVREADWRITE("ppi8255", ppi8255_r, ppi8255_w)
AM_RANGE(0x40, 0x43) AM_DEVREADWRITE("z80pio_0", z80pio_r, z80pio_w)
AM_RANGE(0x50, 0x53) AM_DEVREADWRITE("z80pio_1", z80pio_r, z80pio_w)
AM_RANGE(0x40, 0x43) AM_DEVREADWRITE("z80pio_0", z80pio_cd_ba_r, z80pio_cd_ba_w)
AM_RANGE(0x50, 0x53) AM_DEVREADWRITE("z80pio_1", z80pio_cd_ba_r, z80pio_cd_ba_w)
AM_RANGE(0x60, 0x67) AM_READWRITE(pc16552d_0_r,pc16552d_0_w)
AM_RANGE(0x80, 0x80) AM_DEVREAD("aysnd", ay8910_r)
AM_RANGE(0x80, 0x81) AM_DEVWRITE("aysnd", ay8910_address_data_w)
@ -833,74 +833,149 @@ static const ay8910_interface ay8910_config =
*
*************************************/
static WRITE_LINE_DEVICE_HANDLER( meritm_audio_pio_interrupt )
{
//logerror( "PIO(0) interrupt line: %d, V = %d, H = %d\n", state, video_screen_get_vpos(0), video_screen_get_hpos(0) );
cputag_set_input_line(device->machine, "maincpu", 0, state);
}
static WRITE_LINE_DEVICE_HANDLER( meritm_io_pio_interrupt )
{
//logerror( "PIO(1) interrupt line: %d, V = %d, H = %d\n", state, video_screen_get_vpos(0), video_screen_get_hpos(0) );
cputag_set_input_line(device->machine, "maincpu", 0, state);
}
static READ8_DEVICE_HANDLER(meritm_audio_pio_port_a_r)
{
/*
bit signal description
0 BANK0
1 BANK1
2 BANK2
3 /VINT1 V9938 #1 INT
4 /VINT2 V9938 #2 INT
5 BANK3
6
7
*/
return meritm_vint;
};
static READ8_DEVICE_HANDLER(meritm_audio_pio_port_b_r)
{
/*
bit description
0 J4 D0
1 J4 D1
2 J4 D2
3 J4 D3
4 J4 D4
5 J4 D5
6 J4 D6
7 J4 D7
*/
return ds1204_r();
};
static WRITE8_DEVICE_HANDLER(meritm_audio_pio_port_a_w)
{
/*
bit signal description
0 BANK0
1 BANK1
2 BANK2
3 /VINT1 V9938 #1 INT
4 /VINT2 V9938 #2 INT
5 BANK3
6
7
*/
meritm_bank = (data & 7) | ((data >> 2) & 0x18);
//logerror("Writing BANK with %x (raw = %x)\n", meritm_bank, data);
};
static WRITE8_DEVICE_HANDLER(meritm_audio_pio_port_b_w)
{
/*
bit description
0 J4 D0
1 J4 D1
2 J4 D2
3 J4 D3
4 J4 D4
5 J4 D5
6 J4 D6
7 J4 D7
*/
ds1204_w((data & 0x4) >> 2, (data & 0x2) >> 1, data & 0x01);
};
static WRITE8_DEVICE_HANDLER(meritm_io_pio_port_a_w)
{
/*
bit description
0 J3 PE0
1 J3 PE1
2 J3 PE2
3 J3 PE3
4 J3 PE4
5 J3 PE5
6 J3 PE6
7 J3 PE7
*/
};
static WRITE8_DEVICE_HANDLER(meritm_io_pio_port_b_w)
{
/*
bit description
0 J3 PF0
1 J3 PF1
2 J3 PF2
3 J3 PF3
4 J3 PF4
5 J3 PF5
6 J3 PF6
7 J3 PF7
*/
};
static const z80pio_interface meritm_audio_pio_intf =
static Z80PIO_INTERFACE( meritm_audio_pio_intf )
{
DEVCB_LINE(meritm_audio_pio_interrupt),
DEVCB_CPU_INPUT_LINE("maincpu", INPUT_LINE_IRQ0),
DEVCB_HANDLER(meritm_audio_pio_port_a_r),
DEVCB_HANDLER(meritm_audio_pio_port_b_r),
DEVCB_HANDLER(meritm_audio_pio_port_a_w),
DEVCB_HANDLER(meritm_audio_pio_port_b_w),
DEVCB_NULL,
DEVCB_HANDLER(meritm_audio_pio_port_b_r),
DEVCB_HANDLER(meritm_audio_pio_port_b_w),
DEVCB_NULL
};
static const z80pio_interface meritm_io_pio_intf =
static Z80PIO_INTERFACE( meritm_io_pio_intf )
{
DEVCB_LINE(meritm_io_pio_interrupt),
DEVCB_CPU_INPUT_LINE("maincpu", INPUT_LINE_IRQ0),
DEVCB_INPUT_PORT("PIO1_PORTA"),
DEVCB_INPUT_PORT("PIO1_PORTB"),
DEVCB_HANDLER(meritm_io_pio_port_a_w),
DEVCB_HANDLER(meritm_io_pio_port_b_w),
DEVCB_NULL,
DEVCB_INPUT_PORT("PIO1_PORTB"),
DEVCB_HANDLER(meritm_io_pio_port_b_w),
DEVCB_NULL
};
static const z80_daisy_chain meritm_daisy_chain[] =
{
{ "z80pio_1" },
{ "z80pio_0" },
{ "z80pio_1" },
{ NULL }
};
@ -909,6 +984,10 @@ static MACHINE_START(merit_common)
meritm_z80pio[0] = devtag_get_device( machine, "z80pio_0" );
meritm_z80pio[1] = devtag_get_device( machine, "z80pio_1" );
z80pio_astb_w(meritm_z80pio[0], 1);
z80pio_bstb_w(meritm_z80pio[0], 1);
z80pio_astb_w(meritm_z80pio[1], 1);
z80pio_bstb_w(meritm_z80pio[1], 1);
};
static MACHINE_START(meritm_crt250)
@ -983,8 +1062,8 @@ static MACHINE_DRIVER_START(meritm_crt250)
MDRV_PPI8255_ADD( "ppi8255", crt250_ppi8255_intf )
MDRV_Z80PIO_ADD( "z80pio_0", meritm_audio_pio_intf )
MDRV_Z80PIO_ADD( "z80pio_1", meritm_io_pio_intf )
MDRV_Z80PIO_ADD( "z80pio_0", SYSTEM_CLK/6, meritm_audio_pio_intf )
MDRV_Z80PIO_ADD( "z80pio_1", SYSTEM_CLK/6, meritm_io_pio_intf )
MDRV_NVRAM_HANDLER(generic_0fill)

View File

@ -75,7 +75,7 @@ I/O read/write
#include "machine/segacrpt.h"
#include "includes/senjyo.h"
extern UINT8 senjyo_sound_cmd;
static int int_delay_kludge;
static MACHINE_RESET( senjyo )
@ -98,6 +98,13 @@ static WRITE8_HANDLER( flip_screen_w )
flip_screen_set(space->machine, data);
}
static WRITE8_DEVICE_HANDLER( sound_cmd_w )
{
senjyo_sound_cmd = data;
z80pio_astb_w(device, 0);
z80pio_astb_w(device, 1);
}
static ADDRESS_MAP_START( senjyo_map, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x0000, 0x7fff) AM_ROM
@ -127,24 +134,10 @@ static ADDRESS_MAP_START( senjyo_map, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0xd000, 0xd000) AM_READ_PORT("P1") AM_WRITE(flip_screen_w)
AM_RANGE(0xd001, 0xd001) AM_READ_PORT("P2")
AM_RANGE(0xd002, 0xd002) AM_READ_PORT("SYSTEM")
AM_RANGE(0xd004, 0xd004) AM_READ_PORT("DSW1") AM_DEVWRITE("z80pio", z80pio_p_w)
AM_RANGE(0xd004, 0xd004) AM_READ_PORT("DSW1") AM_DEVWRITE("z80pio", sound_cmd_w)
AM_RANGE(0xd005, 0xd005) AM_READ_PORT("DSW2")
ADDRESS_MAP_END
static WRITE8_DEVICE_HANDLER( pio_w )
{
if (offset & 1)
z80pio_c_w(device, (offset >> 1) & 1, data);
else
z80pio_d_w(device, (offset >> 1) & 1, data);
}
static READ8_DEVICE_HANDLER( pio_r )
{
return (offset & 1) ? z80pio_c_r(device, (offset >> 1) & 1) : z80pio_d_r(device, (offset >> 1) & 1);
}
static ADDRESS_MAP_START( senjyo_sound_map, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0x0000, 0x3fff) AM_ROM
AM_RANGE(0x4000, 0x43ff) AM_RAM
@ -160,7 +153,7 @@ ADDRESS_MAP_END
static ADDRESS_MAP_START( senjyo_sound_io_map, ADDRESS_SPACE_IO, 8 )
ADDRESS_MAP_GLOBAL_MASK(0xff)
AM_RANGE(0x00, 0x03) AM_DEVREADWRITE("z80pio", pio_r, pio_w)
AM_RANGE(0x00, 0x03) AM_DEVREADWRITE("z80pio", z80pio_ba_cd_r, z80pio_ba_cd_w)
AM_RANGE(0x08, 0x0b) AM_DEVREADWRITE("z80ctc", z80ctc_r, z80ctc_w)
ADDRESS_MAP_END
@ -200,7 +193,7 @@ static ADDRESS_MAP_START( starforb_map, ADDRESS_SPACE_PROGRAM, 8 )
AM_RANGE(0xd000, 0xd000) AM_READ_PORT("P1") AM_WRITE(flip_screen_w)
AM_RANGE(0xd001, 0xd001) AM_READ_PORT("P2")
AM_RANGE(0xd002, 0xd002) AM_READ_PORT("SYSTEM")
AM_RANGE(0xd004, 0xd004) AM_READ_PORT("DSW1") AM_DEVWRITE("z80pio", z80pio_p_w)
AM_RANGE(0xd004, 0xd004) AM_READ_PORT("DSW1") AM_DEVWRITE("z80pio", sound_cmd_w)
AM_RANGE(0xd005, 0xd005) AM_READ_PORT("DSW2")
/* these aren't used / written, left here to make sure memory is allocated */
@ -558,7 +551,7 @@ static MACHINE_DRIVER_START( senjyo )
MDRV_MACHINE_RESET(senjyo)
MDRV_Z80PIO_ADD( "z80pio", senjyo_pio_intf )
MDRV_Z80PIO_ADD( "z80pio", 2000000, senjyo_pio_intf )
MDRV_Z80CTC_ADD( "z80ctc", 2000000 /* same as "sub" */, senjyo_ctc_intf )
/* video hardware */

View File

@ -496,9 +496,13 @@ static READ8_HANDLER( sound_data_r )
return soundlatch_r(space, offset);
}
/* if we have a Z80 PIO, just do a port read which will auto-ack */
/* if we have a Z80 PIO, get the data from the port and toggle the strobe */
else if (pio != NULL)
return z80pio_p_r(pio, 0);
{
z80pio_astb_w(pio, 0);
z80pio_astb_w(pio, 1);
return soundlatch_r(space, offset);
}
return 0xff;
}
@ -519,12 +523,6 @@ static TIMER_DEVICE_CALLBACK( soundirq_gen )
}
static WRITE_LINE_DEVICE_HANDLER( pio_ready_w )
{
cputag_set_input_line(device->machine, "soundcpu", INPUT_LINE_NMI, state ? ASSERT_LINE : CLEAR_LINE);
}
/*************************************
*
@ -756,7 +754,7 @@ static ADDRESS_MAP_START( system1_pio_io_map, ADDRESS_SPACE_IO, 8 )
AM_RANGE(0x0c, 0x0c) AM_MIRROR(0x02) AM_READ_PORT("SWA") /* DIP2 */
AM_RANGE(0x0d, 0x0d) AM_MIRROR(0x02) AM_READ_PORT("SWB") /* DIP1 some games read it from here... */
AM_RANGE(0x10, 0x10) AM_MIRROR(0x03) AM_READ_PORT("SWB") /* DIP1 ... and some others from here but there are games which check BOTH! */
AM_RANGE(0x18, 0x1b) AM_DEVREADWRITE("pio", z80pio_r, z80pio_w)
AM_RANGE(0x18, 0x1b) AM_DEVREADWRITE("pio", z80pio_cd_ba_r, z80pio_cd_ba_w)
ADDRESS_MAP_END
@ -2079,14 +2077,14 @@ static const ppi8255_interface ppi_interface =
DEVCB_HANDLER(sound_control_w)
};
static const z80pio_interface pio_interface =
static Z80PIO_INTERFACE( pio_interface )
{
DEVCB_NULL,
DEVCB_NULL,
DEVCB_NULL,
DEVCB_MEMORY_HANDLER("maincpu", PROGRAM, soundport_w),
DEVCB_CPU_INPUT_LINE("soundcpu", INPUT_LINE_NMI),
DEVCB_NULL,
DEVCB_MEMORY_HANDLER("maincpu", PROGRAM, videomode_w),
DEVCB_LINE(pio_ready_w),
DEVCB_NULL
};
@ -2158,7 +2156,7 @@ static MACHINE_DRIVER_START( sys1pio )
MDRV_CPU_IO_MAP(system1_pio_io_map)
MDRV_DEVICE_REMOVE("ppi")
MDRV_Z80PIO_ADD("pio", pio_interface)
MDRV_Z80PIO_ADD("pio", MASTER_CLOCK, pio_interface)
MACHINE_DRIVER_END
/* reduced visible area for scrolling games */

View File

@ -253,7 +253,7 @@ Z80CTC_INTERFACE( nflfoot_ctc_intf )
};
const z80pio_interface nflfoot_pio_intf =
Z80PIO_INTERFACE( nflfoot_pio_intf )
{
DEVCB_CPU_INPUT_LINE("ipu", INPUT_LINE_IRQ0), /* interrupt handler */
DEVCB_NULL,