New machines marked as NOT_WORKING

---
Omron Luna [Plamen Mihaylov]

scripts/target/mame/mess.lua

@@ -1345,6 +1345,7 @@ function linkProjects_mame_mess(_target, _subtarget)
 		"olivetti",
 		"olympia",
 		"omnibyte",
+		"omron",
 		"openuni",
 		"orion",
 		"osborne",
@@ -3279,6 +3280,11 @@ files {
 	MAME_DIR .. "src/mame/includes/ob68k1a.h",
 }
 
+createMESSProjects(_target, _subtarget, "omron")
+files {
+	MAME_DIR .. "src/mame/drivers/luna_68k.cpp",
+}
+
 createMESSProjects(_target, _subtarget, "openuni")
 files {
 	MAME_DIR .. "src/mame/drivers/hektor.cpp",

src/mame/drivers/luna_68k.cpp

@@ -0,0 +1,151 @@
+// license:BSD-3-Clause
+// copyright-holders:Patrick Mackinlay
+
+/*
+ * Omron Luna M68K systems.
+ *
+ * Sources:
+ *   - https://wiki.netbsd.org/ports/luna68k/
+ *
+ * TODO:
+ *   - skeleton only
+ */
+/*
+ * WIP
+ *
+ * This driver is currently based on a VME-based Luna with a 25MHz 68030, which
+ * differs from the systems supported by NetBSD. Boards installed are:
+ *
+ *  C25   CPU, FPU, serial, RTC, 68030 + 68882 @ 25MHz?
+ *  IOC2  I/O controller (floppy, SCSI, serial), 68000 @ 10MHz?
+ *  GPU8  graphics processor + serial, 68020 @ 20MHz? + +68881 @ 16MHz?
+ *  DPU8  video/framebuffer, Bt458 @ 108MHz
+ *  CMC   communications (GPIB, Ethernet, serial), 68020 @ 12.5MHz?
+ * 
+ */
+#include "emu.h"
+
+#include "cpu/m68000/m68000.h"
+
+// memory
+#include "machine/ram.h"
+
+// various hardware
+#include "machine/mc146818.h"
+#include "machine/z80sio.h"
+#include "machine/am9513.h"
+
+// busses and connectors
+#include "bus/rs232/rs232.h"
+
+#include "debugger.h"
+
+#define VERBOSE 0
+#include "logmacro.h"
+
+namespace {
+
+class luna_68k_state : public driver_device
+{
+public:
+	luna_68k_state(machine_config const &mconfig, device_type type, char const *tag)
+		: driver_device(mconfig, type, tag)
+		, m_cpu(*this, "cpu")
+		, m_ram(*this, "ram")
+		, m_rtc(*this, "rtc")
+		, m_sio(*this, "sio")
+		, m_stc(*this, "stc")
+		, m_serial(*this, "serial%u", 0U)
+	{
+	}
+
+	void luna(machine_config &config);
+	void init();
+
+protected:
+	// driver_device overrides
+	virtual void machine_start() override;
+	virtual void machine_reset() override;
+
+	// address maps
+	void cpu_map(address_map &map);
+	void cpu_autovector_map(address_map &map);
+
+	// machine config
+	void common(machine_config &config);
+
+private:
+	// devices
+	required_device<m68030_device> m_cpu;
+	required_device<ram_device> m_ram;
+	required_device<ds1287_device> m_rtc;
+	required_device<upd7201_device> m_sio;
+	required_device<am9513_device> m_stc;
+	required_device_array<rs232_port_device, 2> m_serial;
+};
+
+void luna_68k_state::init()
+{
+}
+
+void luna_68k_state::machine_start()
+{
+}
+
+void luna_68k_state::machine_reset()
+{
+}
+
+void luna_68k_state::cpu_map(address_map &map)
+{
+	map(0x00000000, 0x0001ffff).rom().region("eprom", 0); // TODO: no doubt this is banked out after boot
+
+	map(0x40000000, 0x4001ffff).rom().region("eprom", 0);
+
+	map(0x50000000, 0x50000007).rw(m_sio, FUNC(upd7201_device::cd_ba_r), FUNC(upd7201_device::cd_ba_w)).umask32(0x00ff00ff);
+	map(0x60000000, 0x60000003).rw(m_stc, FUNC(am9513_device::read16), FUNC(am9513_device::write16));
+
+	map(0x70000000, 0x70000003).lr32([]() { return 0x00fe0000; }, "sw3"); // FIXME: possibly CPU board DIP switch?
+}
+
+void luna_68k_state::cpu_autovector_map(address_map &map)
+{
+	map(0xfffffff3, 0xfffffff3).lr8(NAME([]() { return m68000_base_device::autovector(1); }));
+	map(0xfffffff5, 0xfffffff5).lr8(NAME([]() { return m68000_base_device::autovector(2); }));
+	map(0xfffffff7, 0xfffffff7).lr8(NAME([]() { return m68000_base_device::autovector(3); }));
+	map(0xfffffff9, 0xfffffff9).lr8(NAME([]() { return m68000_base_device::autovector(4); }));
+	map(0xfffffffb, 0xfffffffb).lr8(NAME([]() { return m68000_base_device::autovector(5); }));
+	map(0xfffffffd, 0xfffffffd).lr8(NAME([]() { return m68000_base_device::autovector(6); }));
+	map(0xffffffff, 0xffffffff).lr8(NAME([]() { return m68000_base_device::autovector(7); }));
+}
+
+void luna_68k_state::luna(machine_config &config)
+{
+	M68030(config, m_cpu, 50_MHz_XTAL / 2);
+	m_cpu->set_addrmap(AS_PROGRAM, &luna_68k_state::cpu_map);
+	m_cpu->set_addrmap(m68000_base_device::AS_CPU_SPACE, &luna_68k_state::cpu_autovector_map);
+
+	// 8 SIMMs for RAM arranged as two groups of 4, soldered
+	RAM(config, m_ram);
+	m_ram->set_default_size("16M");
+
+	DS1287(config, m_rtc, 32'768);
+
+	UPD7201(config, m_sio, 9'830'000); // D9.83B0
+
+	// TODO: one of these is for console, other is keyboard
+	RS232_PORT(config, m_serial[0], default_rs232_devices, nullptr);
+	RS232_PORT(config, m_serial[1], default_rs232_devices, nullptr);
+
+	AM9513(config, m_stc, 9'830'000); // FIXME: clock? sources?
+}
+
+ROM_START(luna)
+	ROM_REGION32_BE(0x20000, "eprom", 0)
+	ROM_LOAD16_WORD_SWAP("0283__ac__8117__1.05.ic88", 0x00000, 0x20000, CRC(c46dec54) SHA1(22ef9274f4ef85d446d56cce13a68273dc55f10a))
+ROM_END
+
+} // anonymous namespace
+
+/*   YEAR   NAME  PARENT  COMPAT  MACHINE  INPUT  CLASS           INIT  COMPANY  FULLNAME  FLAGS */
+COMP(1989?, luna, 0,      0,      luna,    0,     luna_68k_state, init, "Omron", "Luna",   MACHINE_IS_SKELETON)

src/mame/mame.lst

@@ -20120,6 +20120,9 @@ luckybalc                       // (c) 1996 Sielcon Games
 luckybald                       // (c) 1996 Sielcon Games
 luckybale                       // (c) 1996 Sielcon Games
 
+@source:luna_68k.cpp
+luna                            // Omron Luna
+
 @source:lvcards.cpp
 lvcards                         // (c) 1985 Tehkan
 lvcardsa                        // (c) 1985 Tehkan