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Fixed M65C02 optimization [Peter Trauner]
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@ -93,16 +93,18 @@
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* extra cycle if page boundary is crossed
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***************************************************************/
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#define BRA(cond) \
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tmp = RDOPARG(); \
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if (cond) \
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{ \
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RDMEM(PCW); \
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EAW = PCW + (signed char)tmp; \
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if ( EAH != PCH ) { \
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RDMEM( (PCH << 8 ) | EAL) ; \
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} \
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PCD = EAD; \
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CHANGE_PC; \
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{ \
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INT8 tmp2 = RDOPARG(); \
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if (cond) \
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{ \
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RDMEM(PCW); \
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EAW = PCW + (signed char)tmp2; \
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if ( EAH != PCH ) { \
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RDMEM( (PCH << 8 ) | EAL) ; \
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} \
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PCD = EAD; \
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CHANGE_PC; \
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} \
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}
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/***************************************************************
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@ -42,14 +42,14 @@ OP(a0) { int tmp; RD_IMM; LDY; } /* 2 LDY IMM */
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OP(c0) { int tmp; RD_IMM; CPY; } /* 2 CPY IMM */
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OP(e0) { int tmp; RD_IMM; CPX; } /* 2 CPX IMM */
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OP(10) { int tmp; BPL; } /* 2-4 BPL REL */
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OP(30) { int tmp; BMI; } /* 2-4 BMI REL */
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OP(50) { int tmp; BVC; } /* 2-4 BVC REL */
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OP(70) { int tmp; BVS; } /* 2-4 BVS REL */
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OP(90) { int tmp; BCC; } /* 2-4 BCC REL */
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OP(b0) { int tmp; BCS; } /* 2-4 BCS REL */
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OP(d0) { int tmp; BNE; } /* 2-4 BNE REL */
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OP(f0) { int tmp; BEQ; } /* 2-4 BEQ REL */
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OP(10) { BPL; } /* 2-4 BPL REL */
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OP(30) { BMI; } /* 2-4 BMI REL */
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OP(50) { BVC; } /* 2-4 BVC REL */
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OP(70) { BVS; } /* 2-4 BVS REL */
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OP(90) { BCC; } /* 2-4 BCC REL */
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OP(b0) { BCS; } /* 2-4 BCS REL */
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OP(d0) { BNE; } /* 2-4 BNE REL */
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OP(f0) { BEQ; } /* 2-4 BEQ REL */
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OP(01) { int tmp; RD_IDX; ORA; } /* 6 ORA IDX */
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OP(21) { int tmp; RD_IDX; AND; } /* 6 AND IDX */
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