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added RAM

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This commit is contained in:
hap 2015-07-19 02:23:00 +02:00
parent 3b35c7a12e
commit 24f8796614
1 changed files with 110 additions and 1 deletions
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111
src/mess/drivers/tb303.c
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@ -28,6 +28,18 @@ public:
required_device<cpu_device> m_maincpu; required_device<cpu_device> m_maincpu;
required_device<timer_device> m_t3_off_timer; required_device<timer_device> m_t3_off_timer;
UINT8 m_mcu_port[9]; // MCU port A-I write data
UINT8 m_ram[0xc00];
UINT16 m_ram_address;
bool m_ram_ce;
bool m_ram_we;
DECLARE_WRITE8_MEMBER(ram_w);
DECLARE_READ8_MEMBER(ram_r);
DECLARE_WRITE8_MEMBER(strobe_w);
void refresh_ram();
TIMER_DEVICE_CALLBACK_MEMBER(t3_clock); TIMER_DEVICE_CALLBACK_MEMBER(t3_clock);
TIMER_DEVICE_CALLBACK_MEMBER(t3_off); TIMER_DEVICE_CALLBACK_MEMBER(t3_off);
@ -36,6 +48,12 @@ public:
}; };
/***************************************************************************
Timer/Interrupt
***************************************************************************/
// T2 to MCU CLK: LC circuit, stable sine wave, 2.2us interval // T2 to MCU CLK: LC circuit, stable sine wave, 2.2us interval
#define TB303_T2_CLOCK_HZ 454545 /* in hz */ #define TB303_T2_CLOCK_HZ 454545 /* in hz */
@ -56,6 +74,75 @@ TIMER_DEVICE_CALLBACK_MEMBER(tb303_state::t3_clock)
/***************************************************************************
I/O
***************************************************************************/
void tb303_state::refresh_ram()
{
// MCU E2,E3 goes through a 4556 IC(pin 14,13) to one of uPD444 _CE:
// _Q0: N/C, _Q1: IC-5, _Q2: IC-3, _Q3: IC-4
m_ram_ce = true;
UINT8 hi = 0;
switch (m_mcu_port[NEC_UCOM4_PORTE] >> 2 & 3)
{
case 0: m_ram_ce = false; break;
case 1: hi = 0; break;
case 2: hi = 1; break;
case 3: hi = 2; break;
}
if (m_ram_ce)
{
// _WE must be high(read mode) for address transitions
if (!m_ram_we)
m_ram_address = hi << 10 | (m_mcu_port[NEC_UCOM4_PORTE] << 8 & 0x300) | m_mcu_port[NEC_UCOM4_PORTF] << 4 | m_mcu_port[NEC_UCOM4_PORTD];
else
m_ram[m_ram_address] = m_mcu_port[NEC_UCOM4_PORTC];
}
// to switchboard pin 19-22
//..
}
WRITE8_MEMBER(tb303_state::ram_w)
{
// MCU C: RAM data
// MCU D,F,E: RAM address
m_mcu_port[offset] = data;
refresh_ram();
// MCU D,F01: pitch data
//..
}
READ8_MEMBER(tb303_state::ram_r)
{
// MCU C: RAM data
if (m_ram_ce && !m_ram_we)
return m_ram[m_ram_address];
else
return 0;
}
WRITE8_MEMBER(tb303_state::strobe_w)
{
// MCU I0: RAM _WE
m_ram_we = (data & 1) ? false : true;
refresh_ram();
// MCU I1: pitch data latch strobe
// MCU I2: gate signal
}
/***************************************************************************
Inputs
***************************************************************************/
static INPUT_PORTS_START( tb303 ) static INPUT_PORTS_START( tb303 )
INPUT_PORTS_END INPUT_PORTS_END
@ -70,13 +157,35 @@ INPUT_PORTS_END
void tb303_state::machine_start() void tb303_state::machine_start()
{ {
// zerofill
memset(m_mcu_port, 0, sizeof(m_mcu_port));
memset(m_ram, 0, sizeof(m_ram));
m_ram_address = 0;
m_ram_ce = false;
m_ram_we = false;
// register for savestates
save_item(NAME(m_mcu_port));
save_item(NAME(m_ram));
save_item(NAME(m_ram_address));
save_item(NAME(m_ram_ce));
save_item(NAME(m_ram_we));
} }
static MACHINE_CONFIG_START( tb303, tb303_state ) static MACHINE_CONFIG_START( tb303, tb303_state )
/* basic machine hardware */ /* basic machine hardware */
MCFG_CPU_ADD("maincpu", NEC_D650, TB303_T2_CLOCK_HZ) MCFG_CPU_ADD("maincpu", NEC_D650, TB303_T2_CLOCK_HZ)
//MCFG_UCOM4_READ_A_CB
//MCFG_UCOM4_READ_B_CB
MCFG_UCOM4_READ_C_CB(READ8(tb303_state, ram_r))
MCFG_UCOM4_WRITE_C_CB(WRITE8(tb303_state, ram_w))
MCFG_UCOM4_WRITE_D_CB(WRITE8(tb303_state, ram_w))
MCFG_UCOM4_WRITE_E_CB(WRITE8(tb303_state, ram_w))
MCFG_UCOM4_WRITE_F_CB(WRITE8(tb303_state, ram_w))
//MCFG_UCOM4_WRITE_G_CB
//MCFG_UCOM4_WRITE_H_CB
MCFG_UCOM4_WRITE_I_CB(WRITE8(tb303_state, strobe_w))
MCFG_TIMER_DRIVER_ADD_PERIODIC("t3_clock", tb303_state, t3_clock, TB303_T3_CLOCK) MCFG_TIMER_DRIVER_ADD_PERIODIC("t3_clock", tb303_state, t3_clock, TB303_T3_CLOCK)
MCFG_TIMER_START_DELAY(TB303_T3_CLOCK) MCFG_TIMER_START_DELAY(TB303_T3_CLOCK)