Imported RP5C01 RTC from MESS. (no whatsnew)
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.gitattributes
vendored
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.gitattributes
vendored
@ -858,6 +858,8 @@ src/emu/machine/ram.h svneol=native#text/plain
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src/emu/machine/rescap.h svneol=native#text/plain
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src/emu/machine/roc10937.c svneol=native#text/plain
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src/emu/machine/roc10937.h svneol=native#text/plain
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src/emu/machine/rp5c01.c svneol=native#text/plain
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src/emu/machine/rp5c01.h svneol=native#text/plain
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src/emu/machine/rp5h01.c svneol=native#text/plain
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src/emu/machine/rp5h01.h svneol=native#text/plain
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src/emu/machine/rtc65271.c svneol=native#text/plain
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@ -204,6 +204,7 @@ EMUMACHINEOBJS = \
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$(EMUMACHINE)/pit8253.o \
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$(EMUMACHINE)/ram.o \
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$(EMUMACHINE)/roc10937.o \
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$(EMUMACHINE)/rp5c01.o \
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$(EMUMACHINE)/rp5h01.o \
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$(EMUMACHINE)/rtc65271.o \
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$(EMUMACHINE)/s3c2400.o \
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526
src/emu/machine/rp5c01.c
Normal file
526
src/emu/machine/rp5c01.c
Normal file
@ -0,0 +1,526 @@
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/**********************************************************************
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Ricoh RP5C01(A) Real Time Clock With Internal RAM emulation
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Copyright MESS Team.
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Visit http://mamedev.org for licensing and usage restrictions.
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*********************************************************************/
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/*
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TODO:
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- 12 hour clock
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- test register
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- timer reset
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*/
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#include "rp5c01.h"
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//**************************************************************************
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// MACROS / CONSTANTS
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//**************************************************************************
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#define LOG 0
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#define RAM_SIZE 13
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// registers
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enum
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{
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REGISTER_1_SECOND = 0,
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REGISTER_10_SECOND,
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REGISTER_1_MINUTE,
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REGISTER_10_MINUTE,
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REGISTER_1_HOUR,
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REGISTER_10_HOUR,
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REGISTER_DAY_OF_THE_WEEK,
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REGISTER_1_DAY,
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REGISTER_10_DAY,
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REGISTER_1_MONTH,
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REGISTER_10_MONTH, REGISTER_12_24_SELECT = REGISTER_10_MONTH,
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REGISTER_1_YEAR, REGISTER_LEAP_YEAR = REGISTER_1_YEAR,
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REGISTER_10_YEAR,
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REGISTER_MODE,
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REGISTER_TEST,
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REGISTER_RESET
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};
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// register write mask
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static const int REGISTER_WRITE_MASK[2][16] =
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{
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{ 0xf, 0x7, 0xf, 0x7, 0xf, 0x3, 0x7, 0xf, 0x3, 0xf, 0x1, 0xf, 0xf, 0xf, 0xf, 0xf },
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{ 0x0, 0x0, 0xf, 0x7, 0xf, 0x3, 0x7, 0xf, 0x3, 0x0, 0x1, 0x3, 0x0, 0xf, 0xf, 0xf }
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};
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// days per month
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static const int DAYS_PER_MONTH[12] = { 31, 28, 31, 30, 31, 30, 31, 31, 30, 31, 30, 31 };
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// modes
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enum
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{
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MODE00 = 0,
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MODE01,
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BLOCK10,
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BLOCK11
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};
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// mode register
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#define MODE_TIMER_EN 0x08
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#define MODE_ALARM_EN 0x04
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#define MODE_MASK 0x03
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// test register
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#define TEST_3 0x08
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#define TEST_2 0x04
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#define TEST_1 0x02
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#define TEST_0 0x01
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// reset register
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#define RESET_ALARM 0x08
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#define RESET_TIMER 0x04
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#define RESET_16_HZ 0x02
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#define RESET_1_HZ 0x01
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//**************************************************************************
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// GLOBAL VARIABLES
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//**************************************************************************
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// devices
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const device_type RP5C01 = rp5c01_device_config::static_alloc_device_config;
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//**************************************************************************
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// DEVICE CONFIGURATION
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//**************************************************************************
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//-------------------------------------------------
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// rp5c01_device_config - constructor
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//-------------------------------------------------
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rp5c01_device_config::rp5c01_device_config(const machine_config &mconfig, const char *tag, const device_config *owner, UINT32 clock)
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: device_config(mconfig, static_alloc_device_config, "RP5C01", tag, owner, clock),
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device_config_nvram_interface(mconfig, *this)
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{
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}
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//-------------------------------------------------
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// static_alloc_device_config - allocate a new
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// configuration object
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//-------------------------------------------------
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device_config *rp5c01_device_config::static_alloc_device_config(const machine_config &mconfig, const char *tag, const device_config *owner, UINT32 clock)
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{
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return global_alloc(rp5c01_device_config(mconfig, tag, owner, clock));
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}
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//-------------------------------------------------
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// alloc_device - allocate a new device object
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//-------------------------------------------------
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device_t *rp5c01_device_config::alloc_device(running_machine &machine) const
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{
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return auto_alloc(machine, rp5c01_device(machine, *this));
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}
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//-------------------------------------------------
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// device_config_complete - perform any
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// operations now that the configuration is
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// complete
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//-------------------------------------------------
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void rp5c01_device_config::device_config_complete()
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{
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// inherit a copy of the static data
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const rp5c01_interface *intf = reinterpret_cast<const rp5c01_interface *>(static_config());
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if (intf != NULL)
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*static_cast<rp5c01_interface *>(this) = *intf;
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// or initialize to defaults if none provided
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else
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{
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memset(&m_out_alarm_func, 0, sizeof(m_out_alarm_func));
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}
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}
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//**************************************************************************
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// INLINE HELPERS
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//**************************************************************************
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//-------------------------------------------------
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// read_counter -
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//-------------------------------------------------
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inline int rp5c01_device::read_counter(int counter)
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{
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return (m_reg[MODE00][counter + 1] * 10) + m_reg[MODE00][counter];
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}
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//-------------------------------------------------
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// write_counter -
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//-------------------------------------------------
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inline void rp5c01_device::write_counter(int counter, int value)
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{
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m_reg[MODE00][counter] = value % 10;
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m_reg[MODE00][counter + 1] = value / 10;
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}
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//-------------------------------------------------
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// advance_seconds -
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//-------------------------------------------------
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inline void rp5c01_device::advance_seconds()
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{
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int seconds = read_counter(REGISTER_1_SECOND);
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seconds++;
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if (seconds > 59)
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{
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seconds = 0;
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advance_minutes();
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}
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write_counter(REGISTER_1_SECOND, seconds);
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if (!(m_mode & RESET_1_HZ))
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{
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// pulse 1Hz alarm signal
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trigger_alarm();
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}
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}
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//-------------------------------------------------
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// advance_minutes -
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//-------------------------------------------------
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inline void rp5c01_device::advance_minutes()
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{
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int minutes = read_counter(REGISTER_1_MINUTE);
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int hours = read_counter(REGISTER_1_HOUR);
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int days = read_counter(REGISTER_1_DAY);
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int month = read_counter(REGISTER_1_MONTH);
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int year = read_counter(REGISTER_1_YEAR);
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int day_of_week = m_reg[MODE00][REGISTER_DAY_OF_THE_WEEK];
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minutes++;
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if (minutes > 59)
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{
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minutes = 0;
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hours++;
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}
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if (hours > 23)
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{
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hours = 0;
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days++;
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day_of_week++;
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}
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if (day_of_week > 6)
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{
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day_of_week++;
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}
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if (days > DAYS_PER_MONTH[month - 1])
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{
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days = 1;
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month++;
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}
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if (month > 12)
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{
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month = 1;
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year++;
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m_reg[MODE01][REGISTER_LEAP_YEAR]++;
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m_reg[MODE01][REGISTER_LEAP_YEAR] &= 0x03;
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}
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if (year > 99)
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{
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year = 0;
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}
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write_counter(REGISTER_1_MINUTE, minutes);
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write_counter(REGISTER_1_HOUR, hours);
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write_counter(REGISTER_1_DAY, days);
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write_counter(REGISTER_1_MONTH, month);
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write_counter(REGISTER_1_YEAR, year);
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m_reg[MODE00][REGISTER_DAY_OF_THE_WEEK] = day_of_week;
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check_alarm();
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}
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//-------------------------------------------------
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// check_alarm -
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//-------------------------------------------------
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inline void rp5c01_device::check_alarm()
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{
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if (m_mode & MODE_ALARM_EN)
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{
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for (int i = REGISTER_1_MINUTE; i < REGISTER_1_MONTH; i++)
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{
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if (m_reg[MODE01][i] != m_reg[MODE00][i]) return;
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}
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trigger_alarm();
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}
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}
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//-------------------------------------------------
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// trigger_alarm -
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//-------------------------------------------------
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inline void rp5c01_device::trigger_alarm()
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{
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devcb_call_write_line(&m_out_alarm_func, 0);
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devcb_call_write_line(&m_out_alarm_func, 1);
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}
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//**************************************************************************
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// LIVE DEVICE
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//**************************************************************************
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//-------------------------------------------------
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// rp5c01_device - constructor
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//-------------------------------------------------
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rp5c01_device::rp5c01_device(running_machine &_machine, const rp5c01_device_config &config)
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: device_t(_machine, config),
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device_nvram_interface(_machine, config, *this),
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m_config(config)
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{
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}
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//-------------------------------------------------
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// device_start - device-specific startup
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//-------------------------------------------------
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void rp5c01_device::device_start()
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{
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// resolve callbacks
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devcb_resolve_write_line(&m_out_alarm_func, &m_config.m_out_alarm_func, this);
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// allocate timers
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m_clock_timer = timer_alloc(TIMER_CLOCK);
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m_clock_timer->adjust(attotime::from_hz(clock() / 32768), 0, attotime::from_hz(clock() / 32768));
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m_alarm_timer = timer_alloc(TIMER_ALARM);
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m_alarm_timer->adjust(attotime::from_hz(clock() / 2048), 0, attotime::from_hz(clock() / 2048));
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// state saving
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save_item(NAME(m_reg[MODE00]));
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save_item(NAME(m_reg[MODE01]));
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save_item(NAME(m_mode));
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save_item(NAME(m_reset));
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}
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//-------------------------------------------------
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// device_timer - handler timer events
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//-------------------------------------------------
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void rp5c01_device::device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr)
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{
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switch (id)
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{
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case TIMER_CLOCK:
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advance_seconds();
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break;
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case TIMER_ALARM:
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if (!(m_reset & RESET_16_HZ))
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{
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trigger_alarm();
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}
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break;
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}
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}
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//-------------------------------------------------
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// nvram_default - called to initialize NVRAM to
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// its default state
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//-------------------------------------------------
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void rp5c01_device::nvram_default()
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{
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}
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//-------------------------------------------------
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// nvram_read - called to read NVRAM from the
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// .nv file
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//-------------------------------------------------
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void rp5c01_device::nvram_read(emu_file &file)
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{
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file.read(m_ram, RAM_SIZE);
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}
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//-------------------------------------------------
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// nvram_write - called to write NVRAM to the
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// .nv file
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//-------------------------------------------------
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void rp5c01_device::nvram_write(emu_file &file)
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{
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file.write(m_ram, RAM_SIZE);
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}
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//-------------------------------------------------
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// adj_w -
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//-------------------------------------------------
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WRITE_LINE_MEMBER( rp5c01_device::adj_w )
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{
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if (state)
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{
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int seconds = read_counter(REGISTER_1_SECOND);
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if (seconds < 30)
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{
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write_counter(REGISTER_1_SECOND, 0);
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}
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else
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{
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write_counter(REGISTER_1_SECOND, 0);
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advance_minutes();
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}
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}
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}
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//-------------------------------------------------
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// read -
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//-------------------------------------------------
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READ8_MEMBER( rp5c01_device::read )
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{
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UINT8 data = 0;
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switch (offset & 0x0f)
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{
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case REGISTER_MODE:
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data = m_mode;
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break;
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case REGISTER_TEST:
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case REGISTER_RESET:
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// write only
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break;
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default:
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data = m_reg[m_mode & MODE_MASK][offset];
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break;
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}
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return data;
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}
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//-------------------------------------------------
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// write -
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//-------------------------------------------------
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WRITE8_MEMBER( rp5c01_device::write )
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{
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int mode = m_mode & MODE_MASK;
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switch (offset & 0x0f)
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{
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case REGISTER_MODE:
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m_mode = data;
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m_clock_timer->enable(data & MODE_TIMER_EN);
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if (LOG)
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{
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logerror("RP5C01 '%s' Mode %u\n", tag(), data & MODE_MASK);
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logerror("RP5C01 '%s' Timer %s\n", tag(), (data & MODE_TIMER_EN) ? "enabled" : "disabled");
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logerror("RP5C01 '%s' Alarm %s\n", tag(), (data & MODE_ALARM_EN) ? "enabled" : "disabled");
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}
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break;
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case REGISTER_TEST:
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if (LOG) logerror("RP5C01 '%s' Test %u not supported!\n", tag(), data);
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break;
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case REGISTER_RESET:
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m_reset = data;
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if (data & RESET_ALARM)
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{
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int i;
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// reset alarm registers
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for (i = REGISTER_1_MINUTE; i < REGISTER_1_MONTH; i++)
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{
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m_reg[MODE01][i] = 0;
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}
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}
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if (LOG)
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{
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if (data & RESET_ALARM) logerror("RP5C01 '%s' Alarm Reset\n", tag());
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if (data & RESET_TIMER) logerror("RP5C01 '%s' Timer Reset not supported!\n", tag());
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logerror("RP5C01 '%s' 16Hz Signal %s\n", tag(), (data & RESET_16_HZ) ? "disabled" : "enabled");
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logerror("RP5C01 '%s' 1Hz Signal %s\n", tag(), (data & RESET_1_HZ) ? "disabled" : "enabled");
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}
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break;
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default:
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switch (mode)
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{
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case MODE00:
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case MODE01:
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m_reg[mode][offset & 0x0f] = data & REGISTER_WRITE_MASK[mode][offset & 0x0f];
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break;
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case BLOCK10:
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m_ram[offset & 0x0f] = (m_ram[offset & 0x0f] & 0xf0) | (data & 0x0f);
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break;
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case BLOCK11:
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m_ram[offset & 0x0f] = (data << 4) | (m_ram[offset & 0x0f] & 0x0f);
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break;
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}
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if (LOG) logerror("RP5C01 '%s' Register %u Write %02x\n", tag(), offset & 0x0f, data);
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break;
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||||
}
|
||||
}
|
138
src/emu/machine/rp5c01.h
Normal file
138
src/emu/machine/rp5c01.h
Normal file
@ -0,0 +1,138 @@
|
||||
/**********************************************************************
|
||||
|
||||
Ricoh RP5C01(A) Real Time Clock With Internal RAM emulation
|
||||
|
||||
Copyright MESS Team.
|
||||
Visit http://mamedev.org for licensing and usage restrictions.
|
||||
|
||||
**********************************************************************
|
||||
_____ _____
|
||||
_CS 1 |* \_/ | 18 Vcc
|
||||
CS 2 | | 17 OSCOUT
|
||||
ADJ 3 | | 16 OSCIN
|
||||
A0 4 | RP5C01 | 15 _ALARM
|
||||
A1 5 | RP5C01 | 14 D3
|
||||
A2 6 | RF5C01A | 13 D2
|
||||
A3 7 | | 12 D1
|
||||
_RD 8 | | 11 D0
|
||||
GND 9 |_____________| 10 _WR
|
||||
|
||||
**********************************************************************/
|
||||
|
||||
#pragma once
|
||||
|
||||
#ifndef __RP5C01__
|
||||
#define __RP5C01__
|
||||
|
||||
#include "emu.h"
|
||||
|
||||
|
||||
|
||||
//**************************************************************************
|
||||
// INTERFACE CONFIGURATION MACROS
|
||||
//**************************************************************************
|
||||
|
||||
#define MCFG_RP5C01_ADD(_tag, _clock, _config) \
|
||||
MCFG_DEVICE_ADD((_tag), RP5C01, _clock) \
|
||||
MCFG_DEVICE_CONFIG(_config)
|
||||
|
||||
|
||||
#define RP5C01_INTERFACE(name) \
|
||||
const rp5c01_interface (name) =
|
||||
|
||||
|
||||
|
||||
//**************************************************************************
|
||||
// TYPE DEFINITIONS
|
||||
//**************************************************************************
|
||||
|
||||
// ======================> rp5c01_interface
|
||||
|
||||
struct rp5c01_interface
|
||||
{
|
||||
devcb_write_line m_out_alarm_func;
|
||||
};
|
||||
|
||||
|
||||
|
||||
// ======================> rp5c01_device_config
|
||||
|
||||
class rp5c01_device_config : public device_config,
|
||||
public device_config_nvram_interface,
|
||||
public rp5c01_interface
|
||||
{
|
||||
friend class rp5c01_device;
|
||||
|
||||
// construction/destruction
|
||||
rp5c01_device_config(const machine_config &mconfig, const char *tag, const device_config *owner, UINT32 clock);
|
||||
|
||||
public:
|
||||
// allocators
|
||||
static device_config *static_alloc_device_config(const machine_config &mconfig, const char *tag, const device_config *owner, UINT32 clock);
|
||||
virtual device_t *alloc_device(running_machine &machine) const;
|
||||
|
||||
protected:
|
||||
// device_config overrides
|
||||
virtual void device_config_complete();
|
||||
};
|
||||
|
||||
|
||||
|
||||
// ======================> rp5c01_device
|
||||
|
||||
class rp5c01_device : public device_t,
|
||||
public device_nvram_interface
|
||||
{
|
||||
friend class rp5c01_device_config;
|
||||
|
||||
// construction/destruction
|
||||
rp5c01_device(running_machine &_machine, const rp5c01_device_config &_config);
|
||||
|
||||
public:
|
||||
DECLARE_READ8_MEMBER( read );
|
||||
DECLARE_WRITE8_MEMBER( write );
|
||||
DECLARE_WRITE_LINE_MEMBER( adj_w );
|
||||
|
||||
protected:
|
||||
// device-level overrides
|
||||
virtual void device_start();
|
||||
virtual void device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr);
|
||||
|
||||
// device_nvram_interface overrides
|
||||
virtual void nvram_default();
|
||||
virtual void nvram_read(emu_file &file);
|
||||
virtual void nvram_write(emu_file &file);
|
||||
|
||||
private:
|
||||
inline int read_counter(int counter);
|
||||
inline void write_counter(int counter, int value);
|
||||
inline void advance_seconds();
|
||||
inline void advance_minutes();
|
||||
inline void trigger_alarm();
|
||||
inline void check_alarm();
|
||||
|
||||
static const device_timer_id TIMER_CLOCK = 0;
|
||||
static const device_timer_id TIMER_ALARM = 1;
|
||||
|
||||
devcb_resolved_write_line m_out_alarm_func;
|
||||
|
||||
UINT8 m_reg[2][13]; // clock registers
|
||||
UINT8 m_ram[13]; // RAM
|
||||
|
||||
UINT8 m_mode; // mode register
|
||||
UINT8 m_reset; // reset register
|
||||
|
||||
// timers
|
||||
emu_timer *m_clock_timer;
|
||||
emu_timer *m_alarm_timer;
|
||||
|
||||
const rp5c01_device_config &m_config;
|
||||
};
|
||||
|
||||
|
||||
// device type definition
|
||||
extern const device_type RP5C01;
|
||||
|
||||
|
||||
|
||||
#endif
|
Loading…
Reference in New Issue
Block a user