mirror of
https://github.com/holub/mame
synced 2025-04-23 17:00:53 +03:00
trivial stuff (nw)
This commit is contained in:
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6a267ea40d
commit
254aeff5c7
@ -18,8 +18,8 @@
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DEFINE_DEVICE_TYPE(I82439TX_LEGACY, i82439tx_device, "i82439tx_legacy", "Intel 82439TX")
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i82439tx_device::i82439tx_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
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: northbridge_device(mconfig, I82439TX_LEGACY, tag, owner, clock),
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i82439tx_device::i82439tx_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) :
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northbridge_device(mconfig, I82439TX_LEGACY, tag, owner, clock),
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pci_device_interface(mconfig, *this),
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m_cpu_tag(nullptr),
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m_region_tag(nullptr),
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@ -776,8 +776,8 @@ void blitz68k_state::bankrob_map(address_map &map)
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map(0x400005, 0x400005).rw(this, FUNC(blitz68k_state::bankrob_mcu1_r), FUNC(blitz68k_state::bankrob_mcu1_w));
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map(0x400006, 0x400006).rw(this, FUNC(blitz68k_state::bankrob_mcu2_r), FUNC(blitz68k_state::bankrob_mcu2_w));
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map(0x800000, 0x800000).rw("crtc", FUNC(mc6845_device::status_r), FUNC(mc6845_device::address_w)); // triggered by MCU?
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map(0x800002, 0x800002).rw("crtc", FUNC(mc6845_device::register_r), FUNC(mc6845_device::register_w));
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map(0x800000, 0x800000).rw(m_crtc, FUNC(mc6845_device::status_r), FUNC(mc6845_device::address_w)); // triggered by MCU?
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map(0x800002, 0x800002).rw(m_crtc, FUNC(mc6845_device::register_r), FUNC(mc6845_device::register_w));
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}
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// bankroba:
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@ -1181,8 +1181,8 @@ void blitz68k_state::dualgame_map(address_map &map)
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map(0x400005, 0x400005).rw(this, FUNC(blitz68k_state::dualgame_mcu1_r), FUNC(blitz68k_state::dualgame_mcu1_w));
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map(0x400006, 0x400006).rw(this, FUNC(blitz68k_state::dualgame_mcu2_r), FUNC(blitz68k_state::dualgame_mcu2_w));
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map(0x800000, 0x800000).rw("crtc", FUNC(mc6845_device::status_r), FUNC(mc6845_device::address_w));
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map(0x800002, 0x800002).rw("crtc", FUNC(mc6845_device::register_r), FUNC(mc6845_device::register_w));
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map(0x800000, 0x800000).rw(m_crtc, FUNC(mc6845_device::status_r), FUNC(mc6845_device::address_w));
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map(0x800002, 0x800002).rw(m_crtc, FUNC(mc6845_device::register_r), FUNC(mc6845_device::register_w));
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}
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/*************************************************************************************************************
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@ -1324,8 +1324,8 @@ void blitz68k_state::maxidbl_map(address_map &map)
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map(0x500005, 0x500005).rw(this, FUNC(blitz68k_state::maxidbl_mcu1_r), FUNC(blitz68k_state::maxidbl_mcu1_w));
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map(0x500006, 0x500006).rw(this, FUNC(blitz68k_state::maxidbl_mcu2_r), FUNC(blitz68k_state::maxidbl_mcu2_w));
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map(0x600000, 0x600000).rw("crtc", FUNC(mc6845_device::status_r), FUNC(mc6845_device::address_w)); // triggered by MCU?
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map(0x600002, 0x600002).rw("crtc", FUNC(mc6845_device::register_r), FUNC(mc6845_device::register_w));
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map(0x600000, 0x600000).rw(m_crtc, FUNC(mc6845_device::status_r), FUNC(mc6845_device::address_w)); // triggered by MCU?
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map(0x600002, 0x600002).rw(m_crtc, FUNC(mc6845_device::register_r), FUNC(mc6845_device::register_w));
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}
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@ -1710,7 +1710,7 @@ void blitz68k_state::ramdac_map(address_map &map)
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}
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MACHINE_CONFIG_START(blitz68k_state::ilpag)
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MCFG_DEVICE_ADD("maincpu", M68000, 11059200 ) // ?
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MCFG_DEVICE_ADD(m_maincpu, M68000, 11059200 ) // ?
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MCFG_DEVICE_PROGRAM_MAP(ilpag_map)
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MCFG_DEVICE_VBLANK_INT_DRIVER("screen", blitz68k_state, irq4_line_hold) //3 & 6 used, mcu comms?
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@ -1723,7 +1723,7 @@ MACHINE_CONFIG_START(blitz68k_state::ilpag)
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MCFG_NVRAM_ADD_0FILL("nvram")
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MCFG_PALETTE_ADD("palette", 0x100)
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MCFG_PALETTE_ADD(m_palette, 0x100)
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MCFG_VIDEO_START_OVERRIDE(blitz68k_state,blitz68k)
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@ -1778,7 +1778,7 @@ MACHINE_CONFIG_START(blitz68k_state::steaser)
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MACHINE_CONFIG_END
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MACHINE_CONFIG_START(blitz68k_state::cjffruit)
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MCFG_DEVICE_ADD("maincpu", M68000, XTAL(22'118'400)/2)
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MCFG_DEVICE_ADD(m_maincpu, M68000, XTAL(22'118'400)/2)
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MCFG_DEVICE_PROGRAM_MAP(cjffruit_map)
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// MC68HC705C8P (Sound MCU)
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@ -1792,13 +1792,13 @@ MACHINE_CONFIG_START(blitz68k_state::cjffruit)
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MCFG_SCREEN_VISIBLE_AREA(0, 512-1, 0, 256-8-1)
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MCFG_SCREEN_UPDATE_DRIVER(blitz68k_state, screen_update_blitz68k)
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MCFG_MC6845_ADD("crtc", R6545_1, "screen", XTAL(22'118'400)/8)
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MCFG_MC6845_ADD(m_crtc, R6545_1, "screen", XTAL(22'118'400)/8)
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MCFG_MC6845_SHOW_BORDER_AREA(false)
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MCFG_MC6845_CHAR_WIDTH(4)
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MCFG_MC6845_ADDR_CHANGED_CB(blitz68k_state, crtc_addr)
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MCFG_MC6845_OUT_VSYNC_CB(WRITELINE(*this, blitz68k_state, crtc_vsync_irq1))
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MCFG_PALETTE_ADD("palette", 0x100)
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MCFG_PALETTE_ADD(m_palette, 0x100)
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MCFG_VIDEO_START_OVERRIDE(blitz68k_state,blitz68k)
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MCFG_RAMDAC_ADD("ramdac", ramdac_map, "palette")
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@ -1806,7 +1806,7 @@ MACHINE_CONFIG_END
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MACHINE_CONFIG_START(blitz68k_state::bankrob)
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MCFG_DEVICE_ADD("maincpu", M68000, XTAL(11'059'200))
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MCFG_DEVICE_ADD(m_maincpu, M68000, XTAL(11'059'200))
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MCFG_DEVICE_PROGRAM_MAP(bankrob_map)
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MCFG_DEVICE_VBLANK_INT_DRIVER("screen", blitz68k_state, irq3_line_hold) // protection prevents correct irq frequency by crtc
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// irq 2 reads from MCUs
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@ -1824,13 +1824,13 @@ MACHINE_CONFIG_START(blitz68k_state::bankrob)
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MCFG_SCREEN_VISIBLE_AREA(0, 512-1, 0+4, 256-1-4)
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MCFG_SCREEN_UPDATE_DRIVER(blitz68k_state, screen_update_blitz68k)
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MCFG_MC6845_ADD("crtc", H46505, "screen", XTAL(11'059'200)/4)
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MCFG_MC6845_ADD(m_crtc, H46505, "screen", XTAL(11'059'200)/4)
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MCFG_MC6845_SHOW_BORDER_AREA(false)
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MCFG_MC6845_CHAR_WIDTH(4)
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MCFG_MC6845_ADDR_CHANGED_CB(blitz68k_state, crtc_addr)
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MCFG_MC6845_OUT_VSYNC_CB(WRITELINE(*this, blitz68k_state, crtc_vsync_irq3))
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MCFG_PALETTE_ADD("palette", 0x100)
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MCFG_PALETTE_ADD(m_palette, 0x100)
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MCFG_VIDEO_START_OVERRIDE(blitz68k_state,blitz68k)
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MCFG_RAMDAC_ADD("ramdac", ramdac_map, "palette")
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@ -1838,7 +1838,7 @@ MACHINE_CONFIG_END
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MACHINE_CONFIG_START(blitz68k_state::bankroba)
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MCFG_DEVICE_ADD("maincpu", M68000, XTAL(11'059'200) )
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MCFG_DEVICE_ADD(m_maincpu, M68000, XTAL(11'059'200) )
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MCFG_DEVICE_PROGRAM_MAP(bankroba_map)
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MCFG_DEVICE_VBLANK_INT_DRIVER("screen", blitz68k_state, irq5_line_hold) // protection prevents correct irq frequency by crtc
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// irq 3,4 read from MCUs
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@ -1854,13 +1854,13 @@ MACHINE_CONFIG_START(blitz68k_state::bankroba)
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MCFG_SCREEN_VISIBLE_AREA(0, 512-1, 0+7, 256-1)
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MCFG_SCREEN_UPDATE_DRIVER(blitz68k_state, screen_update_blitz68k)
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MCFG_MC6845_ADD("crtc", H46505, "screen", XTAL(11'059'200)/4)
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MCFG_MC6845_ADD(m_crtc, H46505, "screen", XTAL(11'059'200)/4)
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MCFG_MC6845_SHOW_BORDER_AREA(false)
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MCFG_MC6845_CHAR_WIDTH(4)
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MCFG_MC6845_ADDR_CHANGED_CB(blitz68k_state, crtc_addr)
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MCFG_MC6845_OUT_VSYNC_CB(WRITELINE(*this, blitz68k_state, crtc_vsync_irq5))
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MCFG_PALETTE_ADD("palette", 0x100)
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MCFG_PALETTE_ADD(m_palette, 0x100)
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MCFG_VIDEO_START_OVERRIDE(blitz68k_state,blitz68k_addr_factor1)
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MCFG_RAMDAC_ADD("ramdac", ramdac_map, "palette")
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@ -1868,7 +1868,7 @@ MACHINE_CONFIG_END
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MACHINE_CONFIG_START(blitz68k_state::deucesw2)
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MCFG_DEVICE_ADD("maincpu", M68000, XTAL(22'118'400) / 2)
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MCFG_DEVICE_ADD(m_maincpu, M68000, XTAL(22'118'400) / 2)
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MCFG_DEVICE_PROGRAM_MAP(deucesw2_map)
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// irq 2 reads from MCUs
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@ -1883,13 +1883,13 @@ MACHINE_CONFIG_START(blitz68k_state::deucesw2)
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MCFG_SCREEN_VISIBLE_AREA(0, 512-1, 0, 256-1)
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MCFG_SCREEN_UPDATE_DRIVER(blitz68k_state, screen_update_blitz68k)
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MCFG_MC6845_ADD("crtc", R6545_1, "screen", XTAL(22'118'400)/8)
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MCFG_MC6845_ADD(m_crtc, R6545_1, "screen", XTAL(22'118'400)/8)
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MCFG_MC6845_SHOW_BORDER_AREA(false)
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MCFG_MC6845_CHAR_WIDTH(4)
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MCFG_MC6845_ADDR_CHANGED_CB(blitz68k_state, crtc_addr)
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MCFG_MC6845_OUT_VSYNC_CB(WRITELINE(*this, blitz68k_state, crtc_vsync_irq3))
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MCFG_PALETTE_ADD("palette", 0x100)
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MCFG_PALETTE_ADD(m_palette, 0x100)
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MCFG_VIDEO_START_OVERRIDE(blitz68k_state,blitz68k)
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MCFG_RAMDAC_ADD("ramdac", ramdac_map, "palette")
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@ -1897,7 +1897,7 @@ MACHINE_CONFIG_END
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MACHINE_CONFIG_START(blitz68k_state::dualgame)
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MCFG_DEVICE_ADD("maincpu", M68000, XTAL(11'059'200) )
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MCFG_DEVICE_ADD(m_maincpu, M68000, XTAL(11'059'200) )
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MCFG_DEVICE_PROGRAM_MAP(dualgame_map)
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MCFG_DEVICE_VBLANK_INT_DRIVER("screen", blitz68k_state, irq2_line_hold) // lev 2 = MCUs, lev 3 = vblank
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@ -1914,13 +1914,13 @@ MACHINE_CONFIG_START(blitz68k_state::dualgame)
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MCFG_SCREEN_VISIBLE_AREA(0, 512-1, 0+4, 256-1-4)
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MCFG_SCREEN_UPDATE_DRIVER(blitz68k_state, screen_update_blitz68k)
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MCFG_MC6845_ADD("crtc", H46505, "screen", XTAL(11'059'200)/4)
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MCFG_MC6845_ADD(m_crtc, H46505, "screen", XTAL(11'059'200)/4)
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MCFG_MC6845_SHOW_BORDER_AREA(false)
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MCFG_MC6845_CHAR_WIDTH(4)
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MCFG_MC6845_ADDR_CHANGED_CB(blitz68k_state, crtc_addr)
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MCFG_MC6845_OUT_VSYNC_CB(WRITELINE(*this, blitz68k_state, crtc_vsync_irq3))
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MCFG_PALETTE_ADD("palette", 0x100)
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MCFG_PALETTE_ADD(m_palette, 0x100)
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MCFG_VIDEO_START_OVERRIDE(blitz68k_state,blitz68k)
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MCFG_RAMDAC_ADD("ramdac", ramdac_map, "palette")
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@ -1928,7 +1928,7 @@ MACHINE_CONFIG_END
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MACHINE_CONFIG_START(blitz68k_state::hermit)
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MCFG_DEVICE_ADD("maincpu", M68000, XTAL(22'118'400)/2 )
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MCFG_DEVICE_ADD(m_maincpu, M68000, XTAL(22'118'400)/2 )
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MCFG_DEVICE_PROGRAM_MAP(hermit_map)
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MCFG_DEVICE_VBLANK_INT_DRIVER("screen", blitz68k_state, irq1_line_hold) // protection prevents correct irq frequency by crtc
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@ -1943,13 +1943,13 @@ MACHINE_CONFIG_START(blitz68k_state::hermit)
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MCFG_SCREEN_VISIBLE_AREA(0, 512-1, 0+4, 256-1-4)
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MCFG_SCREEN_UPDATE_DRIVER(blitz68k_state, screen_update_blitz68k)
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MCFG_MC6845_ADD("crtc", H46505, "screen", XTAL(22'118'400)/8)
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MCFG_MC6845_ADD(m_crtc, H46505, "screen", XTAL(22'118'400)/8)
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MCFG_MC6845_SHOW_BORDER_AREA(false)
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MCFG_MC6845_CHAR_WIDTH(4)
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MCFG_MC6845_ADDR_CHANGED_CB(blitz68k_state, crtc_addr)
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MCFG_MC6845_OUT_VSYNC_CB(WRITELINE(*this, blitz68k_state, crtc_vsync_irq1))
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MCFG_PALETTE_ADD("palette", 0x100)
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MCFG_PALETTE_ADD(m_palette, 0x100)
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MCFG_VIDEO_START_OVERRIDE(blitz68k_state,blitz68k)
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MCFG_RAMDAC_ADD("ramdac", ramdac_map, "palette")
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@ -1957,7 +1957,7 @@ MACHINE_CONFIG_END
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MACHINE_CONFIG_START(blitz68k_state::maxidbl)
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MCFG_DEVICE_ADD("maincpu", M68000, XTAL(11'059'200))
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MCFG_DEVICE_ADD(m_maincpu, M68000, XTAL(11'059'200))
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MCFG_DEVICE_PROGRAM_MAP(maxidbl_map)
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MCFG_DEVICE_VBLANK_INT_DRIVER("screen", blitz68k_state, irq3_line_hold) // protection prevents correct irq frequency by crtc
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// irq 2 reads from MCUs
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@ -1977,13 +1977,13 @@ MACHINE_CONFIG_START(blitz68k_state::maxidbl)
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MCFG_SCREEN_VISIBLE_AREA(0, 512-1, 0, 256-1)
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MCFG_SCREEN_UPDATE_DRIVER(blitz68k_state, screen_update_blitz68k_noblit)
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MCFG_MC6845_ADD("crtc", H46505, "screen", XTAL(11'059'200)/4)
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MCFG_MC6845_ADD(m_crtc, H46505, "screen", XTAL(11'059'200)/4)
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MCFG_MC6845_SHOW_BORDER_AREA(false)
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MCFG_MC6845_CHAR_WIDTH(4)
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MCFG_MC6845_ADDR_CHANGED_CB(blitz68k_state, crtc_addr)
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MCFG_MC6845_OUT_VSYNC_CB(WRITELINE(*this, blitz68k_state, crtc_vsync_irq3))
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MCFG_PALETTE_ADD("palette", 0x100)
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MCFG_PALETTE_ADD(m_palette, 0x100)
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MCFG_RAMDAC_ADD("ramdac", ramdac_map, "palette")
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SPEAKER(config, "mono").front_center();
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@ -454,14 +454,14 @@ MACHINE_CONFIG_START(rungun_state::rng)
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MCFG_K054321_ADD("k054321", "lspeaker", "rspeaker")
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// SFX
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MCFG_DEVICE_ADD("k054539_1", K054539, XTAL(18'432'000))
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MCFG_DEVICE_ADD("k054539_1", K054539, 18.432_MHz_XTAL)
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MCFG_DEVICE_ADDRESS_MAP(0, k054539_map)
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MCFG_K054539_TIMER_HANDLER(WRITELINE(*this, rungun_state, k054539_nmi_gen))
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MCFG_SOUND_ROUTE(0, "lspeaker", 1.0)
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MCFG_SOUND_ROUTE(1, "rspeaker", 1.0)
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// BGM, volumes handtuned to make SFXs heardable (still not 100% right tho)
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MCFG_DEVICE_ADD("k054539_2", K054539, XTAL(18'432'000))
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// BGM, volumes handtuned to make SFXs audible (still not 100% right tho)
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MCFG_DEVICE_ADD("k054539_2", K054539, 18.432_MHz_XTAL)
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MCFG_DEVICE_ADDRESS_MAP(0, k054539_map)
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MCFG_SOUND_ROUTE(0, "lspeaker", 0.25)
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MCFG_SOUND_ROUTE(1, "rspeaker", 0.25)
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