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small update

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This commit is contained in:
hap 2015-10-31 20:12:48 +01:00
parent ebf0f64422
commit 256169ff3a
3 changed files with 42 additions and 32 deletions
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45
src/mame/drivers/shougi.c
View File

@ -3,7 +3,6 @@
/***************************************************************************
Driver by Jarek Burczynski, started by Tomasz Slanina dox@space.pl
ALPHA 8201 MCU handling by Tatsuyuki satoh
Lots of hardware info from Guru
memory map :
@ -103,11 +102,12 @@ public:
required_shared_ptr<UINT8> m_videoram;
int m_nmi_enabled;
UINT8 m_control[8];
UINT8 m_nmi_enabled;
int m_r;
DECLARE_WRITE8_MEMBER(control_w);
DECLARE_READ8_MEMBER(dummy_r);
DECLARE_READ8_MEMBER(semaphore_r);
DECLARE_PALETTE_INIT(shougi);
@ -116,18 +116,30 @@ public:
protected:
virtual void machine_start();
virtual void machine_reset();
};
void shougi_state::machine_start()
{
// zerofill
memset(m_control, 0, sizeof(m_control));
m_nmi_enabled = 0;
m_r = 0;
// register for savestates
save_item(NAME(m_control));
save_item(NAME(m_nmi_enabled));
save_item(NAME(m_r));
}
void shougi_state::machine_reset()
{
// 74LS259 is auto CLR on reset
for (int i = 0; i < 8; i++)
control_w(m_maincpu->space(), i, 0);
}
/***************************************************************************
@ -232,12 +244,6 @@ WRITE8_MEMBER(shougi_state::control_w)
switch (offset)
{
case 0:
// TODO
// 0: sharedram = sub
// 1: sharedram = main
break;
case 1:
m_nmi_enabled = data;
@ -260,9 +266,13 @@ WRITE8_MEMBER(shougi_state::control_w)
break;
default:
// 7: ?????? connected to +5v via resistor
// 0: 0: sharedram = sub, 1: sharedram = main (TODO!)
// 2: ?
// 7: nothing? connected to +5v via resistor
break;
}
m_control[offset] = data;
}
@ -275,7 +285,7 @@ static ADDRESS_MAP_START( main_map, AS_PROGRAM, 8, shougi_state )
AM_RANGE(0x5800, 0x5800) AM_READ_PORT("P2") AM_WRITE(watchdog_reset_w) /* game won't boot if watchdog doesn't work */
AM_RANGE(0x6000, 0x6000) AM_DEVWRITE("aysnd", ay8910_device, address_w)
AM_RANGE(0x6800, 0x6800) AM_DEVWRITE("aysnd", ay8910_device, data_w)
AM_RANGE(0x7000, 0x73ff) AM_DEVREADWRITE("alpha_8201", alpha_8201_device, main_ram_r, main_ram_w) /* 2114 x 2 (0x400 x 4bit each) */
AM_RANGE(0x7000, 0x73ff) AM_DEVREADWRITE("alpha_8201", alpha_8201_device, ext_ram_r, ext_ram_w)
AM_RANGE(0x7800, 0x7bff) AM_RAM AM_SHARE("sharedram") /* 2114 x 2 (0x400 x 4bit each) */
AM_RANGE(0x8000, 0xffff) AM_RAM AM_SHARE("videoram") /* 4116 x 16 (32K) */
ADDRESS_MAP_END
@ -283,15 +293,12 @@ ADDRESS_MAP_END
// subcpu side
READ8_MEMBER(shougi_state::dummy_r)
READ8_MEMBER(shougi_state::semaphore_r)
{
// ?
// d0: waits for it to be set before handling NMI routine
// hmm it must be a signal from maincpu, but what?
m_r ^= 1;
if (m_r)
return 0xff;
else
return 0;
return m_r;
}
@ -302,7 +309,7 @@ ADDRESS_MAP_END
static ADDRESS_MAP_START( readport_sub, AS_IO, 8, shougi_state )
ADDRESS_MAP_GLOBAL_MASK(0x00ff)
AM_RANGE(0x00, 0x00) AM_READ(dummy_r)
AM_RANGE(0x00, 0x00) AM_READ(semaphore_r)
ADDRESS_MAP_END

23
src/mame/machine/alpha8201.c
View File

@ -62,6 +62,7 @@ pin HD44801 Alpha
TODO:
- bus conflicts?
- support larger RAM size, if any game uses it
----------------------------------------------------------------------------
@ -297,14 +298,14 @@ void alpha_8201_device::device_start()
m_shared_ram = auto_alloc_array_clear(machine(), UINT8, 0x400);
// zerofill
m_dir = 0;
m_bus = 0;
m_mcu_address = 0;
m_mcu_d = 0;
memset(m_mcu_r, 0, sizeof(m_mcu_r));
// register for savestates
save_pointer(NAME(m_shared_ram), 0x400);
save_item(NAME(m_dir));
save_item(NAME(m_bus));
save_item(NAME(m_mcu_address));
save_item(NAME(m_mcu_d));
save_item(NAME(m_mcu_r));
@ -335,7 +336,7 @@ machine_config_constructor alpha_8201_device::device_mconfig_additions() const
void alpha_8201_device::device_reset()
{
m_dir = 0;
m_bus = 0;
m_mcu->set_input_line(0, CLEAR_LINE);
}
@ -350,7 +351,7 @@ void alpha_8201_device::device_reset()
void alpha_8201_device::mcu_writeram()
{
// RAM WR is level-triggered
if (m_dir && (m_mcu_d & 0xc) == 0xc)
if (m_bus && (m_mcu_d & 0xc) == 0xc)
m_shared_ram[m_mcu_address] = m_mcu_r[0] << 4 | m_mcu_r[1];
}
@ -365,7 +366,7 @@ READ8_MEMBER(alpha_8201_device::mcu_data_r)
{
UINT8 ret = 0;
if (m_dir && ~m_mcu_d & 4)
if (m_bus && ~m_mcu_d & 4)
ret = m_shared_ram[m_mcu_address];
else
logerror("%s: MCU side invalid read\n", tag());
@ -403,7 +404,9 @@ WRITE16_MEMBER(alpha_8201_device::mcu_d_w)
WRITE_LINE_MEMBER(alpha_8201_device::bus_dir_w)
{
// set bus direction to 0: external, 1: MCU side
m_dir = (state) ? 1 : 0;
// selects one of two 74LS245 (octal bus transceiver) for databus, addressbus via
// a couple of 74LS157 (2-input multiplexer)
m_bus = (state) ? 1 : 0;
mcu_writeram();
}
@ -413,17 +416,17 @@ WRITE_LINE_MEMBER(alpha_8201_device::mcu_start_w)
m_mcu->set_input_line(0, (state) ? ASSERT_LINE : CLEAR_LINE);
}
READ8_MEMBER(alpha_8201_device::main_ram_r)
READ8_MEMBER(alpha_8201_device::ext_ram_r)
{
if (m_dir)
if (m_bus)
logerror("%s: EXT side read bus conflict\n", tag());
return m_shared_ram[offset & 0x3ff];
}
WRITE8_MEMBER(alpha_8201_device::main_ram_w)
WRITE8_MEMBER(alpha_8201_device::ext_ram_w)
{
if (!m_dir)
if (!m_bus)
m_shared_ram[offset & 0x3ff] = data;
else
logerror("%s: EXT side write bus conflict\n", tag());

6
src/mame/machine/alpha8201.h
View File

@ -24,8 +24,8 @@ public:
// external I/O
DECLARE_WRITE_LINE_MEMBER(bus_dir_w);
DECLARE_WRITE_LINE_MEMBER(mcu_start_w);
DECLARE_READ8_MEMBER(main_ram_r);
DECLARE_WRITE8_MEMBER(main_ram_w);
DECLARE_READ8_MEMBER(ext_ram_r);
DECLARE_WRITE8_MEMBER(ext_ram_w);
protected:
// device-level overrides
@ -38,7 +38,7 @@ private:
required_device<cpu_device> m_mcu;
// internal state
int m_dir; // shared RAM bus direction
int m_bus; // shared RAM bus direction
UINT16 m_mcu_address; // MCU side RAM address
UINT16 m_mcu_d; // MCU D output data
UINT8 m_mcu_r[4]; // MCU R0-R3 output data