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Merge pull request #1834 from Bavarese/patch-22
DEC Rainbow 100 : implement NMI for parity test / fix aspect ratio
This commit is contained in:
R. Belmont
GitHub
commit
25b03299ba
@ -2,7 +2,7 @@
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// ENABLE BY UNCOMMENTING. ADDITIONALLY, SET SMOOTH SCROLL IN EMULATION (DISABLE BY SETTING JUMP SCROLL. To enter SETUP hit ScrollLock)-
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//#define BOOST_DEBUG_PERFORMANCE
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/* GDC COLOR EMULATION
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//-------------------- Differences to VT240: ---------------------------------------------------
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// - Registers of graphics option not directly mapped (indirect access via mode register)
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@ -40,32 +40,34 @@ Details
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a. (Rainbow driver) : interaction between DEC's external hardware and the NEC 7220 isn't fully understood (see page 173 of AA-AE36A)
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It is also unclear what port $50 actually does when it 'synchronizes R-M-W cycles'.
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For now, we provide sane defaults for both vector and bitmap units without disturbing display mode(s) or the NEC 7220.
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b. the HBLANK / VBLANK ratio is plainly wrong (QUICK TEST / subtest #6),
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c. IRQs are flagged as 'erratic' (QUICK TEST / subtest #12).
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d. (7220) : incorrect fifo stati are handed out (GDC reports FIFO_EMPTY instead of _FULL when QUICK TEST #4 floods the queue)
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b. the HBLANK / VBLANK ratio is plainly wrong (quick test / subtest #6),
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c. IRQs are flagged as 'erratic' (quick test / subtest #12).
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d. (7220) : incorrect fifo stati are handed out (GDC reports FIFO_EMPTY instead of _FULL when quick test #4 floods the queue)
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e. (7220) : RDAT with MOD 2 used extensively here, but unimplemented (modes other than 0 undocumented by NEC / Intel)
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Programs with initialization / redraw / reentrance problems (invocation order after reset * matters *, at least in emulation):
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- CANON (high resolution + vectors), Solitaire (SOLIT.EXE) and GDEMO (from GRPHCS.ARC, interactive graphics interpreter '85),
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plus the Monitor Aligment Test (from the GDC test disk).
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Graphical apps. that work well: MMIND (MasterMind), PACMAN, SCRAM, (G)OTELO.
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UNIMPLEMENTED:
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// - Rainbow 100 A palette quirks (2 bit palette... applies to certain modes only)
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- Rainbow 100 A palette quirks (2 bit palette... applies to certain modes only)
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UNKNOWN IMPLEMENTATION DETAILS:
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// 1. READBACK (hard copy programs like JOBSDUMP definitely use it. See also GDC diagnostics). VRAM_R ?
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1. READBACK (hard copy programs like JOBSDUMP definitely use it. See also GDC diagnostics). VRAM_R ?
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// 2. UNVERIFIED DIVIDER (31.188 Mhz / 32) is at least close to 1 Mhz (as on the VT240, which uses a very similar design)
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2. UNVERIFIED DIVIDERS (31.188 Mhz / 32) is at least close to 1 Mhz (as on the VT240, which uses a very similar design)
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// 3. UPD7220 / CORE oddities:
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// 3.1. occasional redraw problems (only when screen 1 runs at 60 Hz and screen 2 at 29.99 Hz interlaced = HIRES ?).
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// Quote from Haze: "if you have 2 screens running at different refresh rates one of them won't update properly
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// (the partial update system gets very confused because it expects both the screens to end at the same time
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// and if that isn't the case large parts of one screen end up not updating at all)
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3. UPD7220 / CORE oddities
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3.2 pixels are stretched out too wide at 384 x 240 (not fixable in Rainbow driver, -keepaspect seems to have no effect)
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To obtain pixel exact graphics use 'Graphics Only' in Video Options plus command line switches -nowindow -aspect1 auto -nokeepaspect
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(Over-Under or Side-by-Side modes always distorted on my 1600 x 900 laptop)
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Programs with initialization / redraw / reentrance problems (invocation order after reset matters in emulation):
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- CANON (high resolution + vectors), Solitaire (SOLIT.EXE) and GDEMO (from GRPHCS.ARC, interactive graphics interpreter '85),
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plus 'Monitor Aligment' (from the GDC test disk). Sloppy programming or a bug related to a) to e)...?
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Quote from Haze: "if you have 2 screens running at different refresh rates one of them won't update properly
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(the partial update system gets very confused because it expects both the screens to end at the same time
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and if that isn't the case large parts of one screen end up not updating at all)
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The following games work well: MMIND (MasterMind), (G)OTELO (requires GSX), PACMAN, SCRAM (last one uses scroll extensively).
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*/
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// license:GPL-2.0+
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@ -126,9 +128,7 @@ CURRENTY UNEMULATED
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(a) the serial port does work one way only (incomplete null modem or wiring?), no reception yet.
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The printer interface does not work, so a non fatal ERROR 40 (serial printer interface) will appear.
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(b1) LOOPBACK circuit not emulated, NMI from RAM card also unemulated (NMI vector 02).
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The former is used in startup tests, the latter seems less relevant (must use menu self test "S"
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or memory diagnostic test. TODO: mem.test causes a CPU crash when reaching higher RAM regions.
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(b1) LOOPBACK circuit not emulated ( used in startup tests ).
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(b2) system interaction tests HALT Z80 CPU at location $0211 (forever). Boot the RX50 diag.disk
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to see what happens (key 3 - individual tests, then 12 - system interaction). Uses LOOPBACK too?
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@ -308,14 +308,14 @@ W17 pulls J1 serial port pin 1 to GND when set (chassis to logical GND).
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#define RD51_SECTORS_PER_TRACK 17 // OLD: #define RD51_SECTORS_PER_TRACK 16
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#define RTC_BASE 0xFC000
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// Do not pretend to emulate newer RAM board; stick with the old one:
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// (only affects presence bit in 'system_parameter_r')
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#define OLD_RAM_BOARD_PRESENT
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#ifdef ASSUME_MODEL_A_HARDWARE
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// Define standard and maximum RAM sizes (A model):
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#define MOTHERBOARD_RAM 0x0ffff // 64 K base RAM (100-A)
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#define END_OF_RAM 0xcffff // Very last byte (theretical; on 100-A) DO NOT CHANGE.
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// Pretend to emulate older RAM board (no NMI, also affects presence bit in 'system_parameter_r'):
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#define OLD_RAM_BOARD_PRESENT
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#else
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// DEC-100-B probes until a 'flaky' area is found (BOOT ROM around F400:0E04).
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// It is no longer possible to key in the RAM size from within the 100-B BIOS.
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@ -468,6 +468,7 @@ public:
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m_p_nvram(*this, "nvram"),
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m_shared(*this, "sh_ram"),
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m_ext_ram(*this, "ext_ram"),
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m_rtc(*this, "rtc"),
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m_hgdc(*this, "upd7220"), // GDC-NEW
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@ -537,6 +538,8 @@ public:
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DECLARE_READ8_MEMBER(rtc_enable);
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DECLARE_READ8_MEMBER(rtc_r);
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DECLARE_WRITE8_MEMBER(ext_ram_w);
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DECLARE_WRITE_LINE_MEMBER(mpsc_irq);
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DECLARE_WRITE8_MEMBER(comm_bitrate_w);
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DECLARE_WRITE8_MEMBER(printer_bitrate_w);
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@ -608,6 +611,7 @@ private:
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required_shared_ptr<uint8_t> m_p_vol_ram;
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required_shared_ptr<uint8_t> m_p_nvram;
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required_shared_ptr<uint8_t> m_shared;
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required_shared_ptr<uint8_t> m_ext_ram;
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optional_device<ds1315_device> m_rtc;
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@ -838,7 +842,7 @@ void rainbow_state::machine_start()
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static ADDRESS_MAP_START(rainbow8088_map, AS_PROGRAM, 8, rainbow_state)
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ADDRESS_MAP_UNMAP_HIGH
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AM_RANGE(0x00000, 0x0ffff) AM_RAM AM_SHARE("sh_ram")
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AM_RANGE(0x10000, END_OF_RAM) AM_RAM
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AM_RANGE(0x10000, END_OF_RAM) AM_RAM AM_SHARE("ext_ram") AM_WRITE(ext_ram_w)
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// There is a 2212 (256 x 4 bit) NVRAM from 0xed000 to 0xed0ff (*)
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// shadowed at $ec000 - $ecfff and from $ed100 - $edfff.
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@ -1065,6 +1069,10 @@ INPUT_PORTS_END
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void rainbow_state::machine_reset()
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{
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// 'F3' (in partial emulation) here replaces 'CTRL-SETUP' (soft reboot on an original Rainbow)
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// FIXME: BIOS reports error 19 when CTRL-SETUP is pressed (Z80 or flags aren't fully reset then?)
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popmessage("Reset");
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// Configure RAM
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address_space &program = machine().device<cpu_device>("maincpu")->space(AS_PROGRAM);
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uint32_t unmap_start = m_inp8->read();
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@ -1099,7 +1107,10 @@ void rainbow_state::machine_reset()
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printf("\nNOTE: RAM configuration does not match NVRAM.\nUNMAP_START = %05x NVRAM VALUE = %02x SHOULD BE: %02x\n", unmap_start, NVRAM_LOCATION, check);
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if(END_OF_RAM > unmap_start)
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{
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printf("\nUnmapping from %x to %x",unmap_start, END_OF_RAM);
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program.unmap_readwrite(unmap_start, END_OF_RAM);
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}
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m_crtc->MHFU(MHFU_RESET_and_DISABLE);
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@ -1112,7 +1123,6 @@ void rainbow_state::machine_reset()
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m_rtc->chip_reset(); // * Reset RTC to a defined state *
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// *********** HARD DISK CONTROLLER...
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if (m_inp5->read() == 0x01) // ...PRESENT?
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{
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@ -1200,9 +1210,6 @@ void rainbow_state::machine_reset()
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output().set_value("led_compose", 0); // led9
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output().set_value("led_lock", 0); // led10
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output().set_value("led_hold", 0); // led11
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if (m_POWER_GOOD) // When user presses F3, a hard reset is executed.
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machine().schedule_hard_reset(); // better ask via GUI? How...?
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}
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// Simulate AC_OK signal (power good) and RESET after ~ 108 ms.
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@ -1410,6 +1417,17 @@ WRITE8_MEMBER(rainbow_state::share_z80_w)
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return;
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}
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// NMI logic (parity test)
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WRITE8_MEMBER(rainbow_state::ext_ram_w)
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{
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m_ext_ram[offset] = data;
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#ifndef OLD_RAM_BOARD_PRESENT
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if(m_diagnostic & 0x08)
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if( (offset + 0x10000) >= (MOTHERBOARD_RAM + 1))
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m_i8088->set_input_line(INPUT_LINE_NMI, PULSE_LINE);
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#endif
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}
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// ------------------------ClikClok (for model B; DS1315) ---------------------------------
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// DESCRIPTION: version for 100-A plugs into NVRAM chip socket (unemulated yet)
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@ -1524,18 +1542,15 @@ hard_disk_file *(rainbow_state::rainbow_hdc_file(int drv))
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}
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else
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{
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printf("\n <<< === REJECTED = (SANITY CHECK FAILED) === >>> \n");
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uint32_t max_sector = info->cylinders * info->heads * info->sectors;
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printf("\n%u (%3.2f) MB HARD DISK REJECTED. GEOMETRY: %d HEADS (1..%d ARE OK).\n%d CYLINDERS (151 to %d ARE OK).\n%d SECTORS / TRACK (up to %d ARE OK). \n%d BYTES / SECTOR (128 to 1024 ARE OK).\n",
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popmessage("\n%u (%3.2f) MB HARD DISK REJECTED. GEOMETRY: %d HEADS (1..%d ARE OK).\n%d CYLINDERS (151 to %d ARE OK).\n%d SECTORS / TRACK (up to %d ARE OK). \n%d BYTES / SECTOR (128 to 1024 ARE OK).\n",
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max_sector * info->sectorbytes / 1000000,
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(float)max_sector * (float)info->sectorbytes / 1048576.0f,
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info->heads, RD51_MAX_HEAD,
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info->cylinders, RD51_MAX_CYLINDER,
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info->sectors, RD51_SECTORS_PER_TRACK,
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info->sectorbytes);
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printf("\n <<< === REJECTED = (SANITY CHECK FAILED) === >>> \n");
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printf("\n <<< === HARD DISK IMAGE REJECTED = (invalid geometry) === >>> \n");
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return nullptr;
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}
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}
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@ -2478,7 +2493,6 @@ WRITE_LINE_MEMBER(rainbow_state::GDC_vblank_irq)
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printf(" [HINT: DUAL MONITOR (DIP SWITCH) WRONG! NO GREEN PALETTE] ");
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} // color map changed?
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} // 7220 vblank IRQ
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@ -2508,7 +2522,7 @@ WRITE_LINE_MEMBER(rainbow_state::clear_video_interrupt)
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// Reflects bits from 'diagnostic_w' (1:1), except test jumpers
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READ8_MEMBER(rainbow_state::diagnostic_r) // 8088 (port 0A READ). Fig.4-29 + table 4-15
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{
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{
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return ((m_diagnostic & (0xf1)) |
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m_inp1->read() |
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m_inp2->read() |
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@ -2565,13 +2579,9 @@ WRITE8_MEMBER(rainbow_state::diagnostic_w) // 8088 (port 0A WRITTEN). Fig.4-28 +
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printf("DATA: %x (PC=%x)\n", data, machine().device("maincpu")->safe_pc());
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}
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// BIT 3: PARITY TEST (1 = enables parity test on memory option board).
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if(data & 0x08)
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{
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printf("\n*** UNEMULATED PARITY TEST [on RAM EXTENSION] - (bit 3 in diagnostic_w) ");
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// FIXME: parity test = NMI? When should NMI fire? Per RAM bank?
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// m_i8088->set_input_line_and_vector(INPUT_LINE_NMI, ASSERT_LINE, 0x02);
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}
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// BIT 3: PARITY (1 enables parity test on memory board. Usually 64K per bank). -> ext_ram_w.
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if(data & 0x08)
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printf("\n*** PARITY TEST [on RAM EXTENSION] - (bit 3 - diagnostic_w) ");
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// MISSING BITS (* not vital for normal operation, see diag.disk) -
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// * BIT 4: DIAG LOOPBACK (0 at power-up; 1 directs RX50 and DC12 output to printer port)
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@ -3071,10 +3081,7 @@ MCFG_CPU_VBLANK_INT_DRIVER("screen", rainbow_state, vblank_irq)
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/* video hardware */
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MCFG_SCREEN_ADD("screen", RASTER)
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MCFG_SCREEN_REFRESH_RATE(60)
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MCFG_SCREEN_VBLANK_TIME(ATTOSECONDS_IN_USEC(2500)) /* not accurate */
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MCFG_SCREEN_SIZE(132 * 10, 49 * 10)
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MCFG_SCREEN_VISIBLE_AREA(0, 80 * 10 - 1, 0, 48 * 10 - 1)
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MCFG_SCREEN_RAW_PARAMS(XTAL_24_0734MHz / 6, 442, 0, 400, 264, 0, 240) // ~NTSC compatible video timing (?)
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MCFG_SCREEN_UPDATE_DRIVER(rainbow_state, screen_update_rainbow)
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MCFG_SCREEN_PALETTE("vt100_video:palette")
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@ -3088,7 +3095,7 @@ MCFG_VT_VIDEO_RAM_CALLBACK(READ8(rainbow_state, read_video_ram_r))
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MCFG_VT_VIDEO_CLEAR_VIDEO_INTERRUPT_CALLBACK(WRITELINE(rainbow_state, clear_video_interrupt))
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// *************************** COLOR GRAPHICS (OPTION) **************************************
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// While the OSC frequency is confirmed, the divider is not. Refresh rate is ~60 Hz with 32.
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// While the OSC frequency is confirmed, the divider is not (refresh rate is ~60 Hz with 32).
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MCFG_DEVICE_ADD("upd7220", UPD7220, 31188000 / 32) // Duell schematics shows a 31.188 Mhz oscillator (confirmed by RFKA).
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MCFG_UPD7220_VSYNC_CALLBACK(WRITELINE(rainbow_state, GDC_vblank_irq)) // "The vsync callback line needs to be below the 7220 DEVICE_ADD line."
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@ -3099,12 +3106,15 @@ MCFG_PALETTE_ADD("palette2", 32)
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MCFG_SCREEN_ADD("screen2", RASTER)
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MCFG_SCREEN_VIDEO_ATTRIBUTES(VIDEO_UPDATE_AFTER_VBLANK | VIDEO_ALWAYS_UPDATE)
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MCFG_SCREEN_REFRESH_RATE(60)
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MCFG_SCREEN_UPDATE_DEVICE("upd7220", upd7220_device, screen_update)
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MCFG_SCREEN_VBLANK_TIME(ATTOSECONDS_IN_USEC(2500)) // not accurate
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MCFG_SCREEN_SIZE(800, 256) // should be 240
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MCFG_SCREEN_VISIBLE_AREA(0, 800-1, 0, 256-1) // should be 240
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// VR241 color monitor is specified for 20 MHz bandwidth ( 60 Hz / 15.72 kHz horizontal rate )
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// - sufficient for 800 x 240 non-interlaced at 60 Hz (non interlaced).
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//MCFG_SCREEN_RAW_PARAMS(31188000 / 2 , 992, 0, 800, 262, 0, 240)
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// Alternate configuration:
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MCFG_SCREEN_RAW_PARAMS(31188000 / 4 , 496, 0, 400, 262, 0, 240)
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MCFG_SCREEN_UPDATE_DEVICE("upd7220", upd7220_device, screen_update)
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MCFG_FD1793_ADD(FD1793_TAG, XTAL_24_0734MHz / 24) // no separate 1 Mhz quartz
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MCFG_FLOPPY_DRIVE_ADD(FD1793_TAG ":0", rainbow_floppies, "525qd0", rainbow_state::floppy_formats)
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