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srcclean and manual cleanups (nw)

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please people, remember to keep source UTF-8 and if you're committing on behalf of others, clean up indents to meet MAME conventions
anyone can run srcclean over a submission and see what will get hit
This commit is contained in:
Vas Crabb 2017-12-24 15:03:04 +11:00
parent ef82d89e3a
commit 25f84e3bf0
87 changed files with 692 additions and 706 deletions
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2
hash/ibm5170_cdrom.xml
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@ -24,7 +24,7 @@
Alien Incident Alien Incident
English - French - German English - French - German
Gametek(R) compro games Gametek(R) compro games
(C) 1996 Gametek UK (C) 1996 Gametek UK
All rights reserved All rights reserved

2
hash/ti95_cart.xml
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@ -7,7 +7,7 @@
Library functions can be reached from [RUN], [F3] Library functions can be reached from [RUN], [F3]
Not dumped yet: Not dumped yet:
- Chemical Engineering Library - Chemical Engineering Library
Not included in list: Not included in list:

2
plugins/hiscore/sort_hiscore.lua
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@ -144,7 +144,7 @@ for num1, entry in ipairs(sorted) do
entry.comment[#entry.comment + 1] = comment entry.comment[#entry.comment + 1] = comment
end end
end end
sorted[num2] = {} sorted[num2] = {}
end end
end end
end end

2
scripts/src/3rdparty.lua
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@ -786,7 +786,7 @@ project "bx"
} }
files { files {
MAME_DIR .. "3rdparty/bx/src/allocator.cpp", MAME_DIR .. "3rdparty/bx/src/allocator.cpp",
MAME_DIR .. "3rdparty/bx/src/bx.cpp", MAME_DIR .. "3rdparty/bx/src/bx.cpp",
MAME_DIR .. "3rdparty/bx/src/commandline.cpp", MAME_DIR .. "3rdparty/bx/src/commandline.cpp",
MAME_DIR .. "3rdparty/bx/src/crtnone.cpp", MAME_DIR .. "3rdparty/bx/src/crtnone.cpp",

7
scripts/target/mame/mess.lua
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@ -1370,7 +1370,6 @@ files {
MAME_DIR .. "src/mame/machine/apricotkb.cpp", MAME_DIR .. "src/mame/machine/apricotkb.cpp",
MAME_DIR .. "src/mame/machine/apricotkb.h", MAME_DIR .. "src/mame/machine/apricotkb.h",
MAME_DIR .. "src/mame/drivers/victor9k.cpp", MAME_DIR .. "src/mame/drivers/victor9k.cpp",
-- MAME_DIR .. "src/mame/includes/victor9k.h",
MAME_DIR .. "src/mame/machine/victor9k_kb.cpp", MAME_DIR .. "src/mame/machine/victor9k_kb.cpp",
MAME_DIR .. "src/mame/machine/victor9k_kb.h", MAME_DIR .. "src/mame/machine/victor9k_kb.h",
MAME_DIR .. "src/mame/machine/victor9k_fdc.cpp", MAME_DIR .. "src/mame/machine/victor9k_fdc.cpp",
@ -2141,8 +2140,8 @@ files {
MAME_DIR .. "src/mame/drivers/hp48.cpp", MAME_DIR .. "src/mame/drivers/hp48.cpp",
MAME_DIR .. "src/mame/includes/hp48.h", MAME_DIR .. "src/mame/includes/hp48.h",
MAME_DIR .. "src/mame/machine/hp48.cpp", MAME_DIR .. "src/mame/machine/hp48.cpp",
MAME_DIR .. "src/mame/machine/hp9845_printer.cpp", MAME_DIR .. "src/mame/machine/hp9845_printer.cpp",
MAME_DIR .. "src/mame/machine/hp9845_printer.h", MAME_DIR .. "src/mame/machine/hp9845_printer.h",
MAME_DIR .. "src/mame/video/hp48.cpp", MAME_DIR .. "src/mame/video/hp48.cpp",
MAME_DIR .. "src/mame/drivers/hp49gp.cpp", MAME_DIR .. "src/mame/drivers/hp49gp.cpp",
MAME_DIR .. "src/mame/drivers/hp9845.cpp", MAME_DIR .. "src/mame/drivers/hp9845.cpp",
@ -2681,7 +2680,7 @@ files {
MAME_DIR .. "src/mame/drivers/prodigy.cpp", MAME_DIR .. "src/mame/drivers/prodigy.cpp",
MAME_DIR .. "src/mame/machine/nl_prodigy.cpp", MAME_DIR .. "src/mame/machine/nl_prodigy.cpp",
MAME_DIR .. "src/mame/machine/nl_prodigy.h", MAME_DIR .. "src/mame/machine/nl_prodigy.h",
} }
includedirs { includedirs {
MAME_DIR .. "3rdparty/rapidjson/include", MAME_DIR .. "3rdparty/rapidjson/include",
} }

32
src/devices/bus/a2bus/agat840k_hle.cpp
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@ -66,7 +66,7 @@ MACHINE_CONFIG_MEMBER( a2bus_agat840k_hle_device::device_add_mconfig )
MCFG_DEVICE_ADD("d15", I8255, 0) MCFG_DEVICE_ADD("d15", I8255, 0)
MCFG_I8255_IN_PORTA_CB(READ8(a2bus_agat840k_hle_device, d15_i_a)) // read data MCFG_I8255_IN_PORTA_CB(READ8(a2bus_agat840k_hle_device, d15_i_a)) // read data
// MCFG_I8255_OUT_PORTB_CB(WRITE8(a2bus_agat840k_hle_device, d15_o_b)) // write data // MCFG_I8255_OUT_PORTB_CB(WRITE8(a2bus_agat840k_hle_device, d15_o_b)) // write data
MCFG_I8255_IN_PORTC_CB(READ8(a2bus_agat840k_hle_device, d15_i_c)) MCFG_I8255_IN_PORTC_CB(READ8(a2bus_agat840k_hle_device, d15_i_c))
MCFG_I8255_OUT_PORTC_CB(WRITE8(a2bus_agat840k_hle_device, d15_o_c)) MCFG_I8255_OUT_PORTC_CB(WRITE8(a2bus_agat840k_hle_device, d15_o_c))
MACHINE_CONFIG_END MACHINE_CONFIG_END
@ -352,7 +352,7 @@ READ8_MEMBER(a2bus_agat840k_hle_device::d14_i_b)
m_floppy->floppy_drive_set_ready_state(FLOPPY_DRIVE_READY, 1); m_floppy->floppy_drive_set_ready_state(FLOPPY_DRIVE_READY, 1);
data |= (m_floppy->floppy_index_r() << 4) ^ 0x10; data |= (m_floppy->floppy_index_r() << 4) ^ 0x10;
// data |= m_floppy->floppy_wpt_r() << 5; // data |= m_floppy->floppy_wpt_r() << 5;
data |= m_floppy->floppy_tk00_r() << 6; data |= m_floppy->floppy_tk00_r() << 6;
data |= m_floppy->floppy_ready_r() << 7; data |= m_floppy->floppy_ready_r() << 7;
@ -364,14 +364,14 @@ READ8_MEMBER(a2bus_agat840k_hle_device::d14_i_b)
} }
/* /*
* b0 AH strong write precomp * b0 AH strong write precomp
* b1 -- NC * b1 -- NC
* b2 -- step direction (1 - inward, 0 - outward) * b2 -- step direction (1 - inward, 0 - outward)
* b3 -- drive select (0 - drive 1, 1 - drive 2) * b3 -- drive select (0 - drive 1, 1 - drive 2)
* b4 -- head select (0 - bottom, 1 - top) * b4 -- head select (0 - bottom, 1 - top)
* b5 AH write precomp off * b5 AH write precomp off
* b6 AH write enable * b6 AH write enable
* b7 AH motor on * b7 AH motor on
* *
* C0x2 * C0x2
*/ */
@ -419,8 +419,8 @@ READ8_MEMBER(a2bus_agat840k_hle_device::d15_i_a)
// C0x6 // C0x6
// //
// b6 AL desync detected // b6 AL desync detected
// b7 AH read or write data ready // b7 AH read or write data ready
READ8_MEMBER(a2bus_agat840k_hle_device::d15_i_c) READ8_MEMBER(a2bus_agat840k_hle_device::d15_i_c)
{ {
LOG("status B: @ %4d %s %s (%s)\n", m_count_read, LOG("status B: @ %4d %s %s (%s)\n", m_count_read,
@ -432,10 +432,10 @@ READ8_MEMBER(a2bus_agat840k_hle_device::d15_i_c)
// C0x7 // C0x7
// //
// b0 -- connected to b7, set if m_intr[PORT_B] // b0 -- connected to b7, set if m_intr[PORT_B]
// b2 AH b7 = ready for write data // b2 AH b7 = ready for write data
// b3 -- connected to b7, set if m_intr[PORT_A] // b3 -- connected to b7, set if m_intr[PORT_A]
// b4 AH b7 = read data ready // b4 AH b7 = read data ready
WRITE8_MEMBER(a2bus_agat840k_hle_device::d15_o_c) WRITE8_MEMBER(a2bus_agat840k_hle_device::d15_o_c)
{ {
if (BIT(data, 0) || BIT(data, 3)) if (BIT(data, 0) || BIT(data, 3))

18
src/devices/bus/isa/myb3k_com.cpp
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@ -192,10 +192,10 @@ void isa8_myb3k_com_device::com_int()
// Schematics allows for more than one interrupt to be triggered but there is probably only one jumper // Schematics allows for more than one interrupt to be triggered but there is probably only one jumper
switch (m_irq) switch (m_irq)
{ {
case 2: m_isa->irq2_w(state); break; case 2: m_isa->irq2_w(state); break;
case 3: m_isa->irq3_w(state); break; case 3: m_isa->irq3_w(state); break;
case 4: m_isa->irq4_w(state); break; case 4: m_isa->irq4_w(state); break;
case 5: m_isa->irq5_w(state); break; case 5: m_isa->irq5_w(state); break;
} }
} }
@ -260,13 +260,13 @@ READ8_MEMBER(isa8_myb3k_com_device::dce_status)
static INPUT_PORTS_START( myb3k_com_dpsw ) static INPUT_PORTS_START( myb3k_com_dpsw )
PORT_START("DPSW2") PORT_START("DPSW2")
PORT_DIPNAME( 0x0f, 0x04, "USART ISA IRQ") PORT_DIPNAME( 0x0f, 0x04, "USART ISA IRQ")
PORT_DIPSETTING( 0x01, "IRQ2" ) PORT_DIPSETTING( 0x01, "IRQ2" )
PORT_DIPSETTING( 0x02, "IRQ3" ) PORT_DIPSETTING( 0x02, "IRQ3" )
PORT_DIPSETTING( 0x04, "IRQ4" ) PORT_DIPSETTING( 0x04, "IRQ4" )
PORT_DIPSETTING( 0x08, "IRQ5" ) PORT_DIPSETTING( 0x08, "IRQ5" )
PORT_START("DPSW1") PORT_START("DPSW1")
PORT_DIPNAME( 0x7fc, 0x530, "I/O Base address") PORT_DIPNAME( 0x7fc, 0x530, "I/O Base address")
PORT_DIPSETTING( 0x000, "0x000" ) PORT_DIPSETTING( 0x000, "0x000" )
PORT_DIPSETTING( 0x008, "0x008" ) PORT_DIPSETTING( 0x008, "0x008" )
PORT_DIPSETTING( 0x010, "0x010" ) PORT_DIPSETTING( 0x010, "0x010" )
PORT_DIPSETTING( 0x018, "0x018" ) PORT_DIPSETTING( 0x018, "0x018" )

4
src/devices/bus/isa/myb3k_com.h
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@ -8,11 +8,11 @@
/* /*
* This card is part of Matsushita MyBrain 3000 and branded Panasonic JB-3000 * This card is part of Matsushita MyBrain 3000 and branded Panasonic JB-3000
* and Ericsson Step/One computers. These are not really PC compatibles but * and Ericsson Step/One computers. These are not really PC compatibles but
* mimics the IBM PC in feature set and stays close on hardware but not 100% * mimic the IBM PC in feature set and stay close on hardware but not 100%
* *
* Serial connector from Step/One service manual * Serial connector from Step/One service manual
* --------------------------------------------- * ---------------------------------------------
* Pin numbering------====------------------+ 1 - FG (AA) Chassi GND * Pin numbering------====------------------+ 1 - FG (AA) Chassis GND
* | 25 23 21 19 17 15 13 11 9 7 5 3 1 | 3 - SD (BA) TxD * | 25 23 21 19 17 15 13 11 9 7 5 3 1 | 3 - SD (BA) TxD
* | 26 24 22 20 18 16 14 12 10 8 6 4 2 | 4 - ST (DB) TxC * | 26 24 22 20 18 16 14 12 10 8 6 4 2 | 4 - ST (DB) TxC
* +----------------------------------------+ 5 - RD (BB) RxD * +----------------------------------------+ 5 - RD (BB) RxD

4
src/devices/bus/isa/myb3k_fdc.cpp
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@ -52,14 +52,14 @@ DEFINE_DEVICE_TYPE(ISA8_MYB3K_FDC4710, isa8_myb3k_fdc4710_device, "isa8_myb3k_fd
DEFINE_DEVICE_TYPE(ISA8_MYB3K_FDC4711, isa8_myb3k_fdc4711_device, "isa8_myb3k_fdc4711", "FDC4711 DSDD Floppy Disk Controller") DEFINE_DEVICE_TYPE(ISA8_MYB3K_FDC4711, isa8_myb3k_fdc4711_device, "isa8_myb3k_fdc4711", "FDC4711 DSDD Floppy Disk Controller")
DEVICE_ADDRESS_MAP_START(map, 8, isa8_myb3k_fdc4710_device) DEVICE_ADDRESS_MAP_START(map, 8, isa8_myb3k_fdc4710_device)
// AM_RANGE(0x00, 0x03) AM_DEVREADWRITE("fdc", mb8876_device, read, write) AM_MIRROR(0x500) // AM_RANGE(0x00, 0x03) AM_DEVREADWRITE("fdc", mb8876_device, read, write) AM_MIRROR(0x500)
AM_RANGE(0x00, 0x03) AM_READ(myb3k_inv_fdc_data_r) AM_WRITE(myb3k_inv_fdc_data_w) AM_MIRROR(0x500) AM_RANGE(0x00, 0x03) AM_READ(myb3k_inv_fdc_data_r) AM_WRITE(myb3k_inv_fdc_data_w) AM_MIRROR(0x500)
AM_RANGE(0x04, 0x04) AM_WRITE(myb3k_fdc_command) AM_MIRROR(0x500) AM_RANGE(0x04, 0x04) AM_WRITE(myb3k_fdc_command) AM_MIRROR(0x500)
AM_RANGE(0x05, 0x05) AM_READ(myb3k_fdc_status) AM_MIRROR(0x500) AM_RANGE(0x05, 0x05) AM_READ(myb3k_fdc_status) AM_MIRROR(0x500)
ADDRESS_MAP_END ADDRESS_MAP_END
DEVICE_ADDRESS_MAP_START(map, 8, isa8_myb3k_fdc4711_device) DEVICE_ADDRESS_MAP_START(map, 8, isa8_myb3k_fdc4711_device)
// AM_RANGE(0x00, 0x03) AM_DEVREADWRITE("fdc", fd1791_device, read, write) AM_MIRROR(0x500) // AM_RANGE(0x00, 0x03) AM_DEVREADWRITE("fdc", fd1791_device, read, write) AM_MIRROR(0x500)
AM_RANGE(0x00, 0x03) AM_READ(myb3k_inv_fdc_data_r) AM_WRITE(myb3k_inv_fdc_data_w) AM_MIRROR(0x500) AM_RANGE(0x00, 0x03) AM_READ(myb3k_inv_fdc_data_r) AM_WRITE(myb3k_inv_fdc_data_w) AM_MIRROR(0x500)
AM_RANGE(0x04, 0x04) AM_WRITE(myb3k_fdc_command) AM_MIRROR(0x500) AM_RANGE(0x04, 0x04) AM_WRITE(myb3k_fdc_command) AM_MIRROR(0x500)
AM_RANGE(0x05, 0x05) AM_READ(myb3k_fdc_status) AM_MIRROR(0x500) AM_RANGE(0x05, 0x05) AM_READ(myb3k_fdc_status) AM_MIRROR(0x500)

2
src/devices/bus/isa/myb3k_fdc.h
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@ -33,7 +33,7 @@ protected:
virtual uint8_t dack_r(int line) override; virtual uint8_t dack_r(int line) override;
virtual void dack_w(int line, uint8_t data) override; virtual void dack_w(int line, uint8_t data) override;
// virtual void eop_w(int state) override; // virtual void eop_w(int state) override;
DECLARE_READ8_MEMBER(myb3k_inv_fdc_data_r); DECLARE_READ8_MEMBER(myb3k_inv_fdc_data_r);
DECLARE_WRITE8_MEMBER(myb3k_inv_fdc_data_w); DECLARE_WRITE8_MEMBER(myb3k_inv_fdc_data_w);

2
src/devices/cpu/e132xs/e132xs.cpp
View File

@ -640,7 +640,7 @@ do
if (m_delay_slot) \ if (m_delay_slot) \
{ \ { \
PC = m_delay_pc; \ PC = m_delay_pc; \
m_delay_slot = 0; \ m_delay_slot = 0; \
} \ } \
} while (0) } while (0)

18
src/devices/cpu/f8/f8.cpp
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@ -61,15 +61,15 @@ uint8_t f8_cpu_device::do_ad(uint8_t augend, uint8_t addend)
{ {
/* SKR from F8 Guide To programming description of AMD /* SKR from F8 Guide To programming description of AMD
* binary add the addend to the binary sum of the augend and $66 * binary add the addend to the binary sum of the augend and $66
* *NOTE* the binary addition of the augend to $66 is done before AMD is called * *NOTE* the binary addition of the augend to $66 is done before AMD is called
* record the status of the carry and intermediate carry * record the status of the carry and intermediate carry
* add a factor to the sum based on the carry and intermediate carry: * add a factor to the sum based on the carry and intermediate carry:
* - no carry, no intermediate carry, add $AA * - no carry, no intermediate carry, add $AA
* - no carry, intermediate carry, add $A0 * - no carry, intermediate carry, add $A0
* - carry, no intermediate carry, add $0A * - carry, no intermediate carry, add $0A
* - carry, intermediate carry, add $00 * - carry, intermediate carry, add $00
* any carry from the low-order digit is suppressed * any carry from the low-order digit is suppressed
* *NOTE* status flags are updated prior to the factor being added * *NOTE* status flags are updated prior to the factor being added
*/ */
uint8_t tmp = augend + addend; uint8_t tmp = augend + addend;

2
src/devices/cpu/i386/i386.h
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@ -29,7 +29,7 @@
devcb = &i386_device::set_smiact(*device, DEVCB_##_devcb); devcb = &i386_device::set_smiact(*device, DEVCB_##_devcb);
#define MCFG_I486_FERR_HANDLER(_devcb) \ #define MCFG_I486_FERR_HANDLER(_devcb) \
devcb = &i386_device::set_ferr(*device, DEVCB_##_devcb); devcb = &i386_device::set_ferr(*device, DEVCB_##_devcb);
#define X86_NUM_CPUS 4 #define X86_NUM_CPUS 4

2
src/devices/cpu/tms34010/34010gfx.hxx
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@ -210,7 +210,7 @@ void tms340x0_device::memory_w(address_space &space, offs_t offset,uint16_t data
//logerror("memory_w %08x %04x\n", offset << 3, data); //logerror("memory_w %08x %04x\n", offset << 3, data);
if((offset << 3) == 0x02005010 && data == 0x0000) { if((offset << 3) == 0x02005010 && data == 0x0000) {
machine().debug_break(); machine().debug_break();
// abort(); // abort();
} }
space.write_word(offset, data); space.write_word(offset, data);
} }

2
src/devices/cpu/tms34010/34010ops.h
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@ -126,7 +126,7 @@ inline void tms340x0_device::TMS34010_WRMEM_DWORD(offs_t A, uint32_t V)
offset = offset & 0xfffffff0; \ offset = offset & 0xfffffff0; \
\ \
if (shift >= MAX) \ if (shift >= MAX) \
ret = (TMS34010_RDMEM_DWORD(offset) >> shift) & (MASK); \ ret = (TMS34010_RDMEM_DWORD(offset) >> shift) & (MASK); \
else \ else \
ret = (TMS34010_RDMEM_WORD(offset) >> shift) & (MASK); ret = (TMS34010_RDMEM_WORD(offset) >> shift) & (MASK);

2
src/devices/cpu/tms9900/9900dasm.h
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@ -58,7 +58,7 @@ private:
/* processor set on which opcodes are available */ /* processor set on which opcodes are available */
ps_any = 0x01, /* every processor in the tms9900/ti990 family */ ps_any = 0x01, /* every processor in the tms9900/ti990 family */
ps_mapper = 0x02, /* processors with memory mapper (ti990/10, ti990/12, ps_mapper = 0x02, /* processors with memory mapper (ti990/10, ti990/12,
and tms99000 with mapper coprocessor) */ and tms99000 with mapper coprocessor) */
ps_tms9995 = 0x04, /* ti990/12, tms9995, and later */ ps_tms9995 = 0x04, /* ti990/12, tms9995, and later */
ps_tms99000 = 0x08, /* ti990/12, tms99000, and later */ ps_tms99000 = 0x08, /* ti990/12, tms99000, and later */
ps_ti990_12 = 0x10, /* ti990/12 only */ ps_ti990_12 = 0x10, /* ti990/12 only */

6
src/devices/machine/atmel_arm_aic.cpp
View File

@ -10,8 +10,8 @@
the CPU folder alongside the ARM instead the CPU folder alongside the ARM instead
TODO: TODO:
low/high input source types low/high input source types
check if level/edge input source types logic correct check if level/edge input source types logic correct
FIQ output FIQ output
*/ */
#include "emu.h" #include "emu.h"
@ -67,7 +67,7 @@ READ32_MEMBER(arm_aic_device::irq_vector_r)
m_current_irq_vector = m_aic_svr[midx]; m_current_irq_vector = m_aic_svr[midx];
// note: Debug PROTect mode not implemented (new level pushed on stack and pending line clear only when this register writen after read) // note: Debug PROTect mode not implemented (new level pushed on stack and pending line clear only when this register writen after read)
push_level(m_aic_smr[midx] & 7); push_level(m_aic_smr[midx] & 7);
if (m_aic_smr[midx] & 0x20) // auto clear pending if edge trigger mode if (m_aic_smr[midx] & 0x20) // auto clear pending if edge trigger mode
m_irqs_pending ^= 1 << midx; m_irqs_pending ^= 1 << midx;
} }
} }

84
src/devices/machine/myb3k_kbd.cpp
View File

@ -2,7 +2,7 @@
// copyright-holders:Fredrik Öhrström // copyright-holders:Fredrik Öhrström
/********************************************************************** /**********************************************************************
myb3k_kbd.h myb3k_kbd.cpp
Matsushita My Brain 3000 -- Panasonic JB-3000 -- Ericsson Step/One Matsushita My Brain 3000 -- Panasonic JB-3000 -- Ericsson Step/One
keyboard emulation. keyboard emulation.
@ -142,14 +142,14 @@
INPUT_PORTS_START( myb3k_keyboard ) INPUT_PORTS_START( myb3k_keyboard )
PORT_START("MYB3K_T0") PORT_START("MYB3K_T0")
PORT_BIT( 0x0001U, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_LCONTROL) PORT_NAME("Control") PORT_CHAR(UCHAR_MAMEKEY(LCONTROL)) // 44 PORT_BIT( 0x0001U, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_LCONTROL) PORT_NAME("Control") PORT_CHAR(UCHAR_MAMEKEY(LCONTROL)) // 44
PORT_BIT( 0x0002U, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_LSHIFT) PORT_NAME("Left Shift") PORT_CHAR(UCHAR_SHIFT_1) // 58 PORT_BIT( 0x0002U, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_LSHIFT) PORT_NAME("Left Shift") PORT_CHAR(UCHAR_SHIFT_1) // 58
PORT_BIT( 0x0004U, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_CAPSLOCK) PORT_NAME("Caps lock") PORT_CHAR(UCHAR_MAMEKEY(CAPSLOCK)) // 71 PORT_BIT( 0x0004U, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_CAPSLOCK) PORT_NAME("Caps lock") PORT_CHAR(UCHAR_MAMEKEY(CAPSLOCK)) // 71
PORT_BIT( 0x0008U, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_LALT) PORT_NAME("Graph") PORT_CHAR(UCHAR_MAMEKEY(LALT)) // 72 PORT_BIT( 0x0008U, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_LALT) PORT_NAME("Graph") PORT_CHAR(UCHAR_MAMEKEY(LALT)) // 72
// Bit 0x0010U not used in keyboard. // Bit 0x0010U not used in keyboard.
PORT_BIT( 0x0020U, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_RSHIFT) PORT_NAME("Right Shift") PORT_CHAR(UCHAR_SHIFT_1) // 70 PORT_BIT( 0x0020U, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_RSHIFT) PORT_NAME("Right Shift") PORT_CHAR(UCHAR_SHIFT_1) // 70
PORT_BIT( 0x0040U, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_0_PAD) PORT_NAME("KP 0") // 94 PORT_BIT( 0x0040U, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_0_PAD) PORT_NAME("KP 0") // 94
// PORT_BIT( 0x0080U, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_STOP) PORT_NAME("KP .") // 95 // PORT_BIT( 0x0080U, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_STOP) PORT_NAME("KP .") // 95
PORT_START("MYB3K_T1") PORT_START("MYB3K_T1")
PORT_BIT( 0x0001U, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_F1) PORT_NAME("PF1") PORT_CHAR(UCHAR_MAMEKEY(F1)) // 1 PORT_BIT( 0x0001U, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_F1) PORT_NAME("PF1") PORT_CHAR(UCHAR_MAMEKEY(F1)) // 1
@ -182,7 +182,7 @@ INPUT_PORTS_START( myb3k_keyboard )
PORT_BIT( 0x0080U, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_1) PORT_NAME("1 !") PORT_CHAR('1') PORT_CHAR('!') // 16 PORT_BIT( 0x0080U, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_1) PORT_NAME("1 !") PORT_CHAR('1') PORT_CHAR('!') // 16
PORT_START("MYB3K_T4") PORT_START("MYB3K_T4")
PORT_BIT( 0x0001U, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_2) PORT_NAME("2 \"") PORT_CHAR('2') PORT_CHAR('"') // 17 PORT_BIT( 0x0001U, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_2) PORT_NAME("2 \"") PORT_CHAR('2') PORT_CHAR('"') // 17
PORT_BIT( 0x0002U, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_3) PORT_NAME("3 #") PORT_CHAR('3') PORT_CHAR('#') // 18 PORT_BIT( 0x0002U, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_3) PORT_NAME("3 #") PORT_CHAR('3') PORT_CHAR('#') // 18
PORT_BIT( 0x0004U, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_4) PORT_NAME("4 $") PORT_CHAR('4') PORT_CHAR('$') // 19 PORT_BIT( 0x0004U, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_4) PORT_NAME("4 $") PORT_CHAR('4') PORT_CHAR('$') // 19
PORT_BIT( 0x0008U, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_5) PORT_NAME("5 %") PORT_CHAR('5') PORT_CHAR('%') // 20 PORT_BIT( 0x0008U, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_5) PORT_NAME("5 %") PORT_CHAR('5') PORT_CHAR('%') // 20
@ -192,17 +192,17 @@ INPUT_PORTS_START( myb3k_keyboard )
PORT_BIT( 0x0080U, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_9) PORT_NAME("9 )") PORT_CHAR('9') PORT_CHAR(')') // 24 PORT_BIT( 0x0080U, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_9) PORT_NAME("9 )") PORT_CHAR('9') PORT_CHAR(')') // 24
PORT_START("MYB3K_T5") PORT_START("MYB3K_T5")
PORT_BIT( 0x0001U, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_0) PORT_NAME("0 =") PORT_CHAR('0') PORT_CHAR('=') // 25 PORT_BIT( 0x0001U, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_0) PORT_NAME("0 =") PORT_CHAR('0') PORT_CHAR('=') // 25
PORT_BIT( 0x0002U, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_MINUS) PORT_NAME("+ ?") PORT_CHAR('+') PORT_CHAR('?') // 26 PORT_BIT( 0x0002U, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_MINUS) PORT_NAME("+ ?") PORT_CHAR('+') PORT_CHAR('?') // 26
PORT_BIT( 0x0004U, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_EQUALS) PORT_NAME("é É") PORT_CHAR(0x00E9) PORT_CHAR(0x00C9) // 27 PORT_BIT( 0x0004U, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_EQUALS) PORT_NAME("é É") PORT_CHAR(0x00E9) PORT_CHAR(0x00C9) // 27
PORT_BIT( 0x0008U, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_BACKSLASH) PORT_NAME("< >") PORT_CHAR('<') PORT_CHAR('>') // 28 PORT_BIT( 0x0008U, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_BACKSLASH) PORT_NAME("< >") PORT_CHAR('<') PORT_CHAR('>') // 28
PORT_BIT( 0x0010U, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_BACKSPACE) PORT_NAME("Backspace") PORT_CHAR(8)// 29 PORT_BIT( 0x0010U, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_BACKSPACE) PORT_NAME("Backspace") PORT_CHAR(8)// 29
PORT_BIT( 0x0020U, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_TAB) PORT_NAME("Tab") PORT_CHAR(9)// 30 PORT_BIT( 0x0020U, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_TAB) PORT_NAME("Tab") PORT_CHAR(9)// 30
PORT_BIT( 0x0040U, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_Q) PORT_NAME("q Q") PORT_CHAR('q') PORT_CHAR('Q') // 31 PORT_BIT( 0x0040U, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_Q) PORT_NAME("q Q") PORT_CHAR('q') PORT_CHAR('Q') // 31
PORT_BIT( 0x0080U, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_W) PORT_NAME("w W") PORT_CHAR('w') PORT_CHAR('W') // 32 PORT_BIT( 0x0080U, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_W) PORT_NAME("w W") PORT_CHAR('w') PORT_CHAR('W') // 32
PORT_START("MYB3K_T6") PORT_START("MYB3K_T6")
PORT_BIT( 0x0001U, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_E) PORT_NAME("e E") PORT_CHAR('e') PORT_CHAR('E') // 33 PORT_BIT( 0x0001U, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_E) PORT_NAME("e E") PORT_CHAR('e') PORT_CHAR('E') // 33
PORT_BIT( 0x0002U, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_R) PORT_NAME("r R") PORT_CHAR('r') PORT_CHAR('R') // 34 PORT_BIT( 0x0002U, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_R) PORT_NAME("r R") PORT_CHAR('r') PORT_CHAR('R') // 34
PORT_BIT( 0x0004U, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_T) PORT_NAME("t T") PORT_CHAR('t') PORT_CHAR('T') // 35 PORT_BIT( 0x0004U, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_T) PORT_NAME("t T") PORT_CHAR('t') PORT_CHAR('T') // 35
PORT_BIT( 0x0008U, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_Y) PORT_NAME("y Y") PORT_CHAR('y') PORT_CHAR('Y') // 36 PORT_BIT( 0x0008U, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_Y) PORT_NAME("y Y") PORT_CHAR('y') PORT_CHAR('Y') // 36
@ -211,28 +211,28 @@ INPUT_PORTS_START( myb3k_keyboard )
PORT_BIT( 0x0040U, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_O) PORT_NAME("o O") PORT_CHAR('o') PORT_CHAR('O') // 39 PORT_BIT( 0x0040U, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_O) PORT_NAME("o O") PORT_CHAR('o') PORT_CHAR('O') // 39
PORT_BIT( 0x0080U, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_P) PORT_NAME("p P") PORT_CHAR('p') PORT_CHAR('P') // 40 PORT_BIT( 0x0080U, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_P) PORT_NAME("p P") PORT_CHAR('p') PORT_CHAR('P') // 40
PORT_START("MYB3K_T7") PORT_START("MYB3K_T7")
PORT_BIT( 0x0001U, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_OPENBRACE) PORT_NAME("å Å") PORT_CHAR(0x00E5) PORT_CHAR(0x00C5) // 41 PORT_BIT( 0x0001U, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_OPENBRACE) PORT_NAME("å Å") PORT_CHAR(0x00E5) PORT_CHAR(0x00C5) // 41
PORT_BIT( 0x0002U, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_CLOSEBRACE) PORT_NAME("ü Ü") PORT_CHAR(0x00FC) PORT_CHAR(0x00DC) // 42 PORT_BIT( 0x0002U, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_CLOSEBRACE) PORT_NAME("ü Ü") PORT_CHAR(0x00FC) PORT_CHAR(0x00DC) // 42
PORT_BIT( 0x0004U, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_ENTER) PORT_NAME("Enter") PORT_CHAR(13) // 43 PORT_BIT( 0x0004U, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_ENTER) PORT_NAME("Enter") PORT_CHAR(13) // 43
PORT_BIT( 0x0008U, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_A) PORT_NAME("a A") PORT_CHAR('a') PORT_CHAR('A') // 45 PORT_BIT( 0x0008U, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_A) PORT_NAME("a A") PORT_CHAR('a') PORT_CHAR('A') // 45
PORT_BIT( 0x0010U, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_S) PORT_NAME("s S") PORT_CHAR('s') PORT_CHAR('S') // 46 PORT_BIT( 0x0010U, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_S) PORT_NAME("s S") PORT_CHAR('s') PORT_CHAR('S') // 46
PORT_BIT( 0x0020U, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_D) PORT_NAME("d D") PORT_CHAR('d') PORT_CHAR('D') // 47 PORT_BIT( 0x0020U, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_D) PORT_NAME("d D") PORT_CHAR('d') PORT_CHAR('D') // 47
PORT_BIT( 0x0040U, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_F) PORT_NAME("f F") PORT_CHAR('f') PORT_CHAR('F') // 48 PORT_BIT( 0x0040U, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_F) PORT_NAME("f F") PORT_CHAR('f') PORT_CHAR('F') // 48
PORT_BIT( 0x0080U, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_G) PORT_NAME("g G") PORT_CHAR('g') PORT_CHAR('G') // 49 PORT_BIT( 0x0080U, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_G) PORT_NAME("g G") PORT_CHAR('g') PORT_CHAR('G') // 49
PORT_START("MYB3K_T8") PORT_START("MYB3K_T8")
PORT_BIT( 0x0001U, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_H) PORT_NAME("h H") PORT_CHAR('h') PORT_CHAR('H') // 50 PORT_BIT( 0x0001U, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_H) PORT_NAME("h H") PORT_CHAR('h') PORT_CHAR('H') // 50
PORT_BIT( 0x0002U, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_J) PORT_NAME("j J") PORT_CHAR('j') PORT_CHAR('J') // 51 PORT_BIT( 0x0002U, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_J) PORT_NAME("j J") PORT_CHAR('j') PORT_CHAR('J') // 51
PORT_BIT( 0x0004U, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_K) PORT_NAME("k K") PORT_CHAR('k') PORT_CHAR('K') // 52 PORT_BIT( 0x0004U, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_K) PORT_NAME("k K") PORT_CHAR('k') PORT_CHAR('K') // 52
PORT_BIT( 0x0008U, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_L) PORT_NAME("l L") PORT_CHAR('l') PORT_CHAR('L') // 53 PORT_BIT( 0x0008U, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_L) PORT_NAME("l L") PORT_CHAR('l') PORT_CHAR('L') // 53
PORT_BIT( 0x0010U, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_COLON) PORT_NAME("ö Ö") PORT_CHAR(0x00F6) PORT_CHAR(0x00D6) // 54 PORT_BIT( 0x0010U, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_COLON) PORT_NAME("ö Ö") PORT_CHAR(0x00F6) PORT_CHAR(0x00D6) // 54
PORT_BIT( 0x0020U, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_QUOTE) PORT_NAME("ä Ä") PORT_CHAR(0x00E4) PORT_CHAR(0x00C4) // 55 PORT_BIT( 0x0020U, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_QUOTE) PORT_NAME("ä Ä") PORT_CHAR(0x00E4) PORT_CHAR(0x00C4) // 55
// PORT_BIT( 0x0040U, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_) PORT_NAME("' *") PORT_CHAR('\'') PORT_CHAR('*') // 56 // PORT_BIT( 0x0040U, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_) PORT_NAME("' *") PORT_CHAR('\'') PORT_CHAR('*') // 56
PORT_BIT( 0x0080U, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_Z) PORT_NAME("z Z") PORT_CHAR('z') PORT_CHAR('Z') // 59 PORT_BIT( 0x0080U, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_Z) PORT_NAME("z Z") PORT_CHAR('z') PORT_CHAR('Z') // 59
PORT_START("MYB3K_T9") PORT_START("MYB3K_T9")
PORT_BIT( 0x0001U, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_X) PORT_NAME("x X") PORT_CHAR('x') PORT_CHAR('X') // 60 PORT_BIT( 0x0001U, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_X) PORT_NAME("x X") PORT_CHAR('x') PORT_CHAR('X') // 60
PORT_BIT( 0x0002U, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_C) PORT_NAME("c C") PORT_CHAR('c') PORT_CHAR('C') // 61 PORT_BIT( 0x0002U, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_C) PORT_NAME("c C") PORT_CHAR('c') PORT_CHAR('C') // 61
PORT_BIT( 0x0004U, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_V) PORT_NAME("g G") PORT_CHAR('v') PORT_CHAR('V') // 62 PORT_BIT( 0x0004U, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_V) PORT_NAME("g G") PORT_CHAR('v') PORT_CHAR('V') // 62
PORT_BIT( 0x0008U, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_B) PORT_NAME("b B") PORT_CHAR('b') PORT_CHAR('B') // 63 PORT_BIT( 0x0008U, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_B) PORT_NAME("b B") PORT_CHAR('b') PORT_CHAR('B') // 63
@ -241,25 +241,25 @@ INPUT_PORTS_START( myb3k_keyboard )
PORT_BIT( 0x0040U, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_COMMA) PORT_NAME(", ;") PORT_CHAR(',') PORT_CHAR(';') // 66 PORT_BIT( 0x0040U, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_COMMA) PORT_NAME(", ;") PORT_CHAR(',') PORT_CHAR(';') // 66
PORT_BIT( 0x0080U, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_STOP) PORT_NAME(". :") PORT_CHAR('.') PORT_CHAR(':') // 67 PORT_BIT( 0x0080U, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_STOP) PORT_NAME(". :") PORT_CHAR('.') PORT_CHAR(':') // 67
PORT_START("MYB3K_TA") PORT_START("MYB3K_TA")
PORT_BIT( 0x0001U, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_SLASH) PORT_NAME("- _") PORT_CHAR('-') PORT_CHAR('_') // 68 PORT_BIT( 0x0001U, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_SLASH) PORT_NAME("- _") PORT_CHAR('-') PORT_CHAR('_') // 68
// Not electrically connected 0x0002U // Not electrically connected 0x0002U
PORT_BIT( 0x0004U, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_SPACE) PORT_NAME("Space") PORT_CHAR(' ') // 73 PORT_BIT( 0x0004U, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_SPACE) PORT_NAME("Space") PORT_CHAR(' ') // 73
PORT_BIT( 0x0008U, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_7_PAD) PORT_NAME("KP 7") // 82 PORT_BIT( 0x0008U, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_7_PAD) PORT_NAME("KP 7") // 82
PORT_BIT( 0x0010U, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_8_PAD) PORT_NAME("KP 8") // 83 PORT_BIT( 0x0010U, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_8_PAD) PORT_NAME("KP 8") // 83
PORT_BIT( 0x0020U, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_9_PAD) PORT_NAME("KP 9") // 84 PORT_BIT( 0x0020U, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_9_PAD) PORT_NAME("KP 9") // 84
PORT_BIT( 0x0040U, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_MINUS_PAD) PORT_NAME("KP -") // 85 PORT_BIT( 0x0040U, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_MINUS_PAD) PORT_NAME("KP -") // 85
PORT_BIT( 0x0080U, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_4_PAD) PORT_NAME("KP 4") // 86 PORT_BIT( 0x0080U, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_4_PAD) PORT_NAME("KP 4") // 86
PORT_START("MYB3K_TB") PORT_START("MYB3K_TB")
PORT_BIT( 0x0001U, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_5_PAD) PORT_NAME("KP 5") // 87 PORT_BIT( 0x0001U, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_5_PAD) PORT_NAME("KP 5") // 87
PORT_BIT( 0x0002U, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_6_PAD) PORT_NAME("KP 6") // 88 PORT_BIT( 0x0002U, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_6_PAD) PORT_NAME("KP 6") // 88
// PORT_BIT( 0x0004U, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_COMMA_PAD) PORT_NAME("KP ,") // 89 // PORT_BIT( 0x0004U, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_COMMA_PAD) PORT_NAME("KP ,") // 89
PORT_BIT( 0x0008U, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_1_PAD) PORT_NAME("KP 1") // 90 PORT_BIT( 0x0008U, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_1_PAD) PORT_NAME("KP 1") // 90
PORT_BIT( 0x0010U, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_2_PAD) PORT_NAME("KP 2") // 91 PORT_BIT( 0x0010U, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_2_PAD) PORT_NAME("KP 2") // 91
PORT_BIT( 0x0020U, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_3_PAD) PORT_NAME("KP 3") // 92 PORT_BIT( 0x0020U, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_3_PAD) PORT_NAME("KP 3") // 92
PORT_BIT( 0x0040U, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_ENTER_PAD) PORT_NAME("KP Enter") // 93 PORT_BIT( 0x0040U, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_CODE(KEYCODE_ENTER_PAD) PORT_NAME("KP Enter") // 93
// Not electrically connected 0x0080U // Not electrically connected 0x0080U
INPUT_PORTS_END INPUT_PORTS_END
@ -288,9 +288,7 @@ myb3k_keyboard_device::myb3k_keyboard_device(
u32 clock) u32 clock)
: device_t(mconfig, type, tag, owner, clock) : device_t(mconfig, type, tag, owner, clock)
, m_keyboard_cb() , m_keyboard_cb()
, m_io_kbd_t{ {*this, "MYB3K_T0"}, {*this, "MYB3K_T1"}, {*this, "MYB3K_T2"}, {*this, "MYB3K_T3"}, , m_io_kbd_t(*this, "MYB3K_T%X", 0U)
{*this, "MYB3K_T4"}, {*this, "MYB3K_T5"}, {*this, "MYB3K_T6"}, {*this, "MYB3K_T7"},
{*this, "MYB3K_T8"}, {*this, "MYB3K_T9"}, {*this, "MYB3K_TA"}, {*this, "MYB3K_TB"} }
{ {
} }
@ -349,7 +347,7 @@ void myb3k_keyboard_device::scan_keys()
// and for each column iterate over all rows (m_y) // and for each column iterate over all rows (m_y)
bool wait_for_timer = false; bool wait_for_timer = false;
while (!wait_for_timer) { while (!wait_for_timer) {
ioport_value bit = 0x01 & (m_io_kbd_t[m_x]->read() >> m_y); ioport_value bit = BIT(m_io_kbd_t[m_x]->read(), m_y);
ioport_value bit_toggled = bit ^ m_io_kbd_state[m_x][m_y]; ioport_value bit_toggled = bit ^ m_io_kbd_state[m_x][m_y];
if (bit_toggled) { if (bit_toggled) {
@ -390,16 +388,16 @@ void myb3k_keyboard_device::update_modifiers(int y, bool down)
case CTRL_Y: case CTRL_Y:
bit = MYB3K_KEY_CTRL; bit = MYB3K_KEY_CTRL;
break; break;
case LSHIFT_Y: case LSHIFT_Y:
bit = MYB3K_KEY_LSHIFT; bit = MYB3K_KEY_LSHIFT;
break; break;
case CAP_Y: case CAP_Y:
bit = MYB3K_KEY_CAP; bit = MYB3K_KEY_CAP;
break; break;
case GRAPH_Y: case GRAPH_Y:
bit = MYB3K_KEY_GRAPH; bit = MYB3K_KEY_GRAPH;
break; break;
case RSHIFT_Y: case RSHIFT_Y:
bit = MYB3K_KEY_RSHIFT; bit = MYB3K_KEY_RSHIFT;
break; break;
} }
@ -418,16 +416,16 @@ void myb3k_keyboard_device::device_timer(emu_timer &timer, device_timer_id id, i
case TIMER_ID_FIRST_BYTE: case TIMER_ID_FIRST_BYTE:
LOGBYTES("FIRST_BYTE %02x %s (with modifiers %s%s%s%s%s)\n", m_first_byte, LOGBYTES("FIRST_BYTE %02x %s (with modifiers %s%s%s%s%s)\n", m_first_byte,
(m_first_byte&MYB3K_KEY_ON)?"Pressed":"Released", (m_first_byte&MYB3K_KEY_ON)?"Pressed":"Released",
(m_first_byte&MYB3K_KEY_CTRL)?"CTRL ":"", (m_first_byte&MYB3K_KEY_CTRL)?"CTRL ":"",
(m_first_byte&MYB3K_KEY_GRAPH)?"GRAPH ":"", (m_first_byte&MYB3K_KEY_GRAPH)?"GRAPH ":"",
(m_first_byte&MYB3K_KEY_LSHIFT)?"LSHIFT ":"", (m_first_byte&MYB3K_KEY_LSHIFT)?"LSHIFT ":"",
(m_first_byte&MYB3K_KEY_RSHIFT)?"RSHIFT ":"", (m_first_byte&MYB3K_KEY_RSHIFT)?"RSHIFT ":"",
(m_first_byte&MYB3K_KEY_CAP)?"CAP ":""); (m_first_byte&MYB3K_KEY_CAP)?"CAP ":"");
send_byte(m_first_byte); send_byte(m_first_byte);
timer_set(attotime::from_msec(3), TIMER_ID_SECOND_BYTE); timer_set(attotime::from_msec(3), TIMER_ID_SECOND_BYTE);
break; break;
case TIMER_ID_SECOND_BYTE: case TIMER_ID_SECOND_BYTE:
LOGBYTES("SECOND_BYTE %02x x=%d y=%d \n\n\n", m_second_byte, (m_second_byte >> 3)&0xf, (m_second_byte)&0x7); LOGBYTES("SECOND_BYTE %02x x=%d y=%d \n\n\n", m_second_byte, (m_second_byte >> 3)&0xf, (m_second_byte)&0x7);
send_byte(m_second_byte); send_byte(m_second_byte);
timer_set(attotime::from_msec(10), TIMER_ID_SCAN_KEYS); timer_set(attotime::from_msec(10), TIMER_ID_SCAN_KEYS);

8
src/devices/machine/myb3k_kbd.h
View File

@ -1,5 +1,5 @@
// license:BSD-3-Clause // license:BSD-3-Clause
// copyright-holders:Fredrik Öhrström // copyright-holders:Fredrik Öhrström
/********************************************************************** /**********************************************************************
myb3k_kbd.h myb3k_kbd.h
@ -74,9 +74,9 @@ protected:
private: private:
output_delegate m_keyboard_cb; output_delegate m_keyboard_cb;
required_ioport m_io_kbd_t[12]; required_ioport_array<12> m_io_kbd_t;
u8 m_io_kbd_state[12][8]; u8 m_io_kbd_state[12][8];
int m_x, m_y; int m_x, m_y;
u8 m_first_byte; u8 m_first_byte;

4
src/devices/machine/smc91c9x.cpp
View File

@ -460,10 +460,10 @@ void smc91c9x_device::update_ethernet_irq()
m_reg[EREG_INTERRUPT] &= ~EINT_TX_EMPTY; m_reg[EREG_INTERRUPT] &= ~EINT_TX_EMPTY;
} }
//if (m_comp_tx.empty()) { //if (m_comp_tx.empty()) {
// m_reg[EREG_INTERRUPT] &= ~EINT_TX; // m_reg[EREG_INTERRUPT] &= ~EINT_TX;
//} //}
//else { //else {
// m_reg[EREG_INTERRUPT] |= EINT_TX; // m_reg[EREG_INTERRUPT] |= EINT_TX;
//} //}
// Check rx completion fifo empty // Check rx completion fifo empty
if (m_comp_rx.empty()) if (m_comp_rx.empty())

50
src/devices/machine/wd_fdc.cpp
View File

@ -6,34 +6,34 @@
#include "debugger.h" #include "debugger.h"
//#define LOG_GENERAL (1U << 0) //defined in logmacro.h already //#define LOG_GENERAL (1U << 0) //defined in logmacro.h already
#define LOG_SETUP (1U << 1) // Shows register setup #define LOG_SETUP (1U << 1) // Shows register setup
#define LOG_SHIFT (1U << 2) // Shows shift register contents #define LOG_SHIFT (1U << 2) // Shows shift register contents
#define LOG_COMP (1U << 3) // Shows operations on the CPU side #define LOG_COMP (1U << 3) // Shows operations on the CPU side
#define LOG_COMMAND (1U << 4) // Shows command invocation #define LOG_COMMAND (1U << 4) // Shows command invocation
#define LOG_SYNC (1U << 5) // Shows sync actions #define LOG_SYNC (1U << 5) // Shows sync actions
#define LOG_LINES (1U << 6) // Show control lines #define LOG_LINES (1U << 6) // Show control lines
#define LOG_EVENT (1U << 7) // Show events #define LOG_EVENT (1U << 7) // Show events
#define LOG_MATCH (1U << 8) // Show sector match operation #define LOG_MATCH (1U << 8) // Show sector match operation
#define LOG_DESC (1U << 9) // Show track description #define LOG_DESC (1U << 9) // Show track description
#define LOG_WRITE (1U << 10) // Show write operation on image #define LOG_WRITE (1U << 10) // Show write operation on image
#define LOG_TRANSITION (1U << 11) // Show transitions #define LOG_TRANSITION (1U << 11) // Show transitions
#define LOG_STATE (1U << 12) // Show state machine #define LOG_STATE (1U << 12) // Show state machine
//#define VERBOSE (LOG_GENERAL | LOG_SETUP| LOG_COMMAND | LOG_STATE | LOG_LINES ) //#define VERBOSE (LOG_GENERAL | LOG_SETUP| LOG_COMMAND | LOG_STATE | LOG_LINES )
//#define LOG_OUTPUT_STREAM std::cout //#define LOG_OUTPUT_STREAM std::cout
#include "logmacro.h" #include "logmacro.h"
#define LOGSETUP(...) LOGMASKED(LOG_SETUP, __VA_ARGS__) #define LOGSETUP(...) LOGMASKED(LOG_SETUP, __VA_ARGS__)
#define LOGSHIFT(...) LOGMASKED(LOG_SHIFT, __VA_ARGS__) #define LOGSHIFT(...) LOGMASKED(LOG_SHIFT, __VA_ARGS__)
#define LOGCOMP(...) LOGMASKED(LOG_COMP, __VA_ARGS__) #define LOGCOMP(...) LOGMASKED(LOG_COMP, __VA_ARGS__)
#define LOGCOMMAND(...) LOGMASKED(LOG_COMMAND, __VA_ARGS__) #define LOGCOMMAND(...) LOGMASKED(LOG_COMMAND, __VA_ARGS__)
#define LOGSYNC(...) LOGMASKED(LOG_SYNC, __VA_ARGS__) #define LOGSYNC(...) LOGMASKED(LOG_SYNC, __VA_ARGS__)
#define LOGLINES(...) LOGMASKED(LOG_LINES, __VA_ARGS__) #define LOGLINES(...) LOGMASKED(LOG_LINES, __VA_ARGS__)
#define LOGEVENT(...) LOGMASKED(LOG_EVENT, __VA_ARGS__) #define LOGEVENT(...) LOGMASKED(LOG_EVENT, __VA_ARGS__)
#define LOGMATCH(...) LOGMASKED(LOG_MATCH, __VA_ARGS__) #define LOGMATCH(...) LOGMASKED(LOG_MATCH, __VA_ARGS__)
#define LOGDESC(...) LOGMASKED(LOG_DESC, __VA_ARGS__) #define LOGDESC(...) LOGMASKED(LOG_DESC, __VA_ARGS__)
#define LOGWRITE(...) LOGMASKED(LOG_WRITE, __VA_ARGS__) #define LOGWRITE(...) LOGMASKED(LOG_WRITE, __VA_ARGS__)
#define LOGTRANSITION(...) LOGMASKED(LOG_TRANSITION, __VA_ARGS__) #define LOGTRANSITION(...) LOGMASKED(LOG_TRANSITION, __VA_ARGS__)
#define LOGSTATE(...) LOGMASKED(LOG_STATE, __VA_ARGS__) #define LOGSTATE(...) LOGMASKED(LOG_STATE, __VA_ARGS__)
@ -421,7 +421,7 @@ void wd_fdc_device_base::seek_continue()
bool wd_fdc_device_base::sector_matches() const bool wd_fdc_device_base::sector_matches() const
{ {
LOGMATCH("matching read T=%02x H=%02x S=%02x L=%02x - searched T=%02x S=%02x\n", LOGMATCH("matching read T=%02x H=%02x S=%02x L=%02x - searched T=%02x S=%02x\n",
cur_live.idbuf[0], cur_live.idbuf[1], cur_live.idbuf[2], cur_live.idbuf[3], cur_live.idbuf[0], cur_live.idbuf[1], cur_live.idbuf[2], cur_live.idbuf[3],
track, sector); track, sector);
@ -1031,8 +1031,8 @@ void wd_fdc_device_base::do_cmd_w()
LOGCOMMAND("%s %02x: %s\n", FUNCNAME, cmd_buffer, std::array<char const *, 16> LOGCOMMAND("%s %02x: %s\n", FUNCNAME, cmd_buffer, std::array<char const *, 16>
{{"RESTORE", "SEEK", "STEP", "STEP", "STEP", "STEP", "STEP", "STEP", {{"RESTORE", "SEEK", "STEP", "STEP", "STEP", "STEP", "STEP", "STEP",
"READ sector start", "READ sector start", "WRITE sector start", "WRITE sector start", "READ sector start", "READ sector start", "WRITE sector start", "WRITE sector start",
"READ ID start", "INTERRUPT start", "READ track start", "WRITE track start"}}[(command >> 4) & 0x0f]); "READ ID start", "INTERRUPT start", "READ track start", "WRITE track start"}}[(command >> 4) & 0x0f]);
switch(command & 0xf0) { switch(command & 0xf0) {
case 0x00: case 0x00:
last_dir = 1; last_dir = 1;
@ -1558,7 +1558,7 @@ void wd_fdc_device_base::live_write_fm(uint8_t fm)
void wd_fdc_device_base::live_run(attotime limit) void wd_fdc_device_base::live_run(attotime limit)
{ {
// LOG("%s\n", FUNCNAME); // LOG("%s\n", FUNCNAME);
if(cur_live.state == IDLE || cur_live.next_state != -1) if(cur_live.state == IDLE || cur_live.next_state != -1)
return; return;

2
src/devices/sound/ymz770.cpp
View File

@ -717,7 +717,7 @@ void ymz774_device::sequencer()
switch (reg) switch (reg)
{ {
case 0xff: // end case 0xff: // end
for (int ch = 0; ch < 16; ch++) // might be wrong, ie not needed in case of loop for (int ch = 0; ch < 16; ch++) // might be wrong, ie not needed in case of loop
if (sequence.stopchan & (1 << ch)) if (sequence.stopchan & (1 << ch))
m_channels[ch].is_playing = false; m_channels[ch].is_playing = false;
if (sequence.loop) if (sequence.loop)

16
src/devices/video/imagetek_i4100.cpp
View File

@ -13,15 +13,15 @@
- inputs for i4300; - inputs for i4300;
- hyprduel.cpp uses scanline attribute which crawls to unusable state - hyprduel.cpp uses scanline attribute which crawls to unusable state
with current video routines here; with current video routines here;
- CRT Controller, also understand why it needs so many writes before actual parameters; - CRT Controller, also understand why it needs so many writes before actual parameters;
- Wrong color bars in service mode (e.g. balcube, toride2g). They use solid color tiles (80xx), - Wrong color bars in service mode (e.g. balcube, toride2g). They use solid color tiles (80xx),
but the right palette is not at 00-ff. but the right palette is not at 00-ff.
Related to the unknown table in the RAM mapped just before the palette? Related to the unknown table in the RAM mapped just before the palette?
Update: the colors should have a common bank of 0xb (so 0x8bxx), it's unknown why the values Update: the colors should have a common bank of 0xb (so 0x8bxx), it's unknown why the values
diverges, the blitter is responsible of that upload fwiw; diverges, the blitter is responsible of that upload fwiw;
- Some gfx problems in ladykill, 3kokushi, puzzli, gakusai, seem related to how we handle - Some gfx problems in ladykill, 3kokushi, puzzli, gakusai, seem related to how we handle
windows, wrapping, read-modify-write areas; windows, wrapping, read-modify-write areas;
- puzzli: emulate hblank irq and fix video routines here (water effect not emulated?); - puzzli: emulate hblank irq and fix video routines here (water effect not emulated?);
============================================================================ ============================================================================

329
src/mame/drivers/alphatpx.cpp
View File

@ -4,61 +4,61 @@
/*************************************************************************** /***************************************************************************
Triumph-Adler Alphatronic Px series Triumph-Adler Alphatronic Px series
=================================== ===================================
The Px series was designed by SKS, like the ITT3030 and the SKS Nano, The Px series was designed by SKS, like the ITT3030 and the SKS Nano,
the boards are closely related. the boards are closely related.
Keyboard and floppy stuff was copypasted from ITT3030 and adapted to the best of knowledge. Keyboard and floppy stuff was copypasted from ITT3030 and adapted to the best of knowledge.
P1, P2 and P2S: no paging P1, P2 and P2S: no paging
Lower 16K for P1, P2 and P2 S: Lower 16K for P1, P2 and P2 S:
0x0000 - 0x17ff ROM monitor (MOS) 0x0000 - 0x17ff ROM monitor (MOS)
0x1800 - 0x1bff 1K RAM 0x1800 - 0x1bff 1K RAM
0x1c00 - 0x1fff reserved 0x1c00 - 0x1fff reserved
0x2000 - 0x2fff reserved, belonging to the video card's memory space (video ROM?) 0x2000 - 0x2fff reserved, belonging to the video card's memory space (video ROM?)
0x3000 - 0x3fff actual video memory 0x3000 - 0x3fff actual video memory
P1 P1
== ==
Upper 32K: Upper 32K:
0x4000 - 0x400a reserved 0x4000 - 0x400a reserved
0x4010 - 0xc000 32K RAM 0x4010 - 0xc000 32K RAM
1x 160K, single sided, 40 tracks, 16 sectors/track, 256 bytes/sector floppy disk drive 1x 160K, single sided, 40 tracks, 16 sectors/track, 256 bytes/sector floppy disk drive
P2, P2S P2, P2S
======= =======
Upper 48K: Upper 48K:
0x4000 - 0x400a reserved 0x4000 - 0x400a reserved
0x4010 - 0xfff 48K RAM 0x4010 - 0xfff 48K RAM
P2: 2x 160K, single sided, 40 tracks, 16 sectors/track, 256 bytes/sector floppy disk drives P2: 2x 160K, single sided, 40 tracks, 16 sectors/track, 256 bytes/sector floppy disk drives
There is a non-standard CP/M for the P2 and P2S with the program origin at 0x4300 instead of 0x0100 There is a non-standard CP/M for the P2 and P2S with the program origin at 0x4300 instead of 0x0100
P2U P2U
=== ===
For paging via port 0x78A, a 16K RAM card with RAM at 0x0000 and 0x3fff and the banking logic (see above) is added to the the standard 48K memory card. For paging via port 0x78A, a 16K RAM card with RAM at 0x0000 and 0x3fff and the banking logic (see above) is added to the the standard 48K memory card.
P2S, P2U: 2x 320K, double sided, 40 tracks, 16 sectors/track, 256 bytes/sector floppy disk drives P2S, P2U: 2x 320K, double sided, 40 tracks, 16 sectors/track, 256 bytes/sector floppy disk drives
P3, P4 P3, P4
====== ======
0x0000 - 0x0fff ROM monitor (MOS) 0x0000 - 0x0fff ROM monitor (MOS)
0x1000 - 0x17ff free 0x1000 - 0x17ff free
0x1800 - 0x1bff monitor stack (RAM) 0x1800 - 0x1bff monitor stack (RAM)
0x1c00 - 0x2fff free 0x1c00 - 0x2fff free
0x3000 - 0x3fff video memory 0x3000 - 0x3fff video memory
0x4000 - 0xffff RAM 0x4000 - 0xffff RAM
P3: 2x785K, double sided, 80 tracks, 5 sectors/track, 1024 bytes/sector floppy disk drives P3: 2x785K, double sided, 80 tracks, 5 sectors/track, 1024 bytes/sector floppy disk drives
P4: 1x785K, double sided, 80 tracks, 5 sectors/track, 1024 bytes/sector floppy disk drive, 1x harddisk 360 tracks, 4 heads, 17 sectors/track, 512 bytes/sector P4: 1x785K, double sided, 80 tracks, 5 sectors/track, 1024 bytes/sector floppy disk drive, 1x harddisk 360 tracks, 4 heads, 17 sectors/track, 512 bytes/sector
P2U and P3 support regular CP/M use with a full 64K RAM complement. P2U and P3 support regular CP/M use with a full 64K RAM complement.
Still, the video RAM is at 0x3000 and 0x3ffff even for these machines, and from what I've read they also use the routine present in the ROM monitor, the MOS. Still, the video RAM is at 0x3000 and 0x3ffff even for these machines, and from what I've read they also use the routine present in the ROM monitor, the MOS.
That means, that in order to update the video RAM and probably other I/O the lower 16K (page 0) are constantly paged in and paged out. That means, that in order to update the video RAM and probably other I/O the lower 16K (page 0) are constantly paged in and paged out.
This is accomplished by writing 2FH to port 0x78 in order to switch in the ROM (and assorted, see below) area and by writing 63H to port 0x78 in order to swap the full 64K RAM back in. This is accomplished by writing 2FH to port 0x78 in order to switch in the ROM (and assorted, see below) area and by writing 63H to port 0x78 in order to swap the full 64K RAM back in.
P30 and P40 P30 and P40
=========== ===========
Those were P3 and P4's with an additional 8088 card, a 128K RAM card (some with an extra 32K graphics extension) to support MS-DOS. Those were P3 and P4's with an additional 8088 card, a 128K RAM card (some with an extra 32K graphics extension) to support MS-DOS.
***************************************************************************/ ***************************************************************************/
@ -82,24 +82,23 @@ class alphatpx_state : public driver_device
{ {
public: public:
alphatpx_state(const machine_config &mconfig, device_type type, const char *tag) : alphatpx_state(const machine_config &mconfig, device_type type, const char *tag) :
driver_device(mconfig, type, tag), driver_device(mconfig, type, tag),
m_bankdev(*this, "bankdev"), m_bankdev(*this, "bankdev"),
m_kbdmcu(*this, "kbdmcu"), m_kbdmcu(*this, "kbdmcu"),
m_crtc(*this, "crtc"), m_crtc(*this, "crtc"),
m_fdc (*this, "fdc"), m_fdc (*this, "fdc"),
m_floppy0(*this, "fdc:0"), m_floppy0(*this, "fdc:0"),
m_floppy1(*this, "fdc:1"), m_floppy1(*this, "fdc:1"),
m_beep(*this, "beeper"), m_beep(*this, "beeper"),
m_keycols(*this, "COL.%u", 0), m_keycols(*this, "COL.%u", 0),
m_palette(*this, "palette"), m_palette(*this, "palette"),
m_vram(*this, "vram"), m_vram(*this, "vram"),
m_gfx(*this, "gfx"), m_gfx(*this, "gfx"),
m_ram(*this, "ram") m_ram(*this, "ram")
{ } { }
uint32_t screen_update(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect); uint32_t screen_update(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect);
public:
DECLARE_READ_LINE_MEMBER(kbd_matrix_r); DECLARE_READ_LINE_MEMBER(kbd_matrix_r);
DECLARE_WRITE8_MEMBER(kbd_matrix_w); DECLARE_WRITE8_MEMBER(kbd_matrix_w);
DECLARE_READ8_MEMBER(kbd_port2_r); DECLARE_READ8_MEMBER(kbd_port2_r);
@ -119,6 +118,7 @@ public:
protected: protected:
virtual void machine_start() override; virtual void machine_start() override;
virtual void machine_reset() override; virtual void machine_reset() override;
required_device<address_map_bank_device> m_bankdev; required_device<address_map_bank_device> m_bankdev;
required_device<i8041_device> m_kbdmcu; required_device<i8041_device> m_kbdmcu;
required_device<crt5037_device> m_crtc; required_device<crt5037_device> m_crtc;
@ -129,7 +129,6 @@ protected:
required_ioport_array<16> m_keycols; required_ioport_array<16> m_keycols;
private: private:
uint8_t m_kbdclk, m_kbdread, m_kbdport2; uint8_t m_kbdclk, m_kbdread, m_kbdport2;
required_device<palette_device> m_palette; required_device<palette_device> m_palette;
required_shared_ptr<u8> m_vram; required_shared_ptr<u8> m_vram;
@ -137,8 +136,6 @@ private:
required_shared_ptr<u8> m_ram; required_shared_ptr<u8> m_ram;
floppy_image_device *m_curfloppy; floppy_image_device *m_curfloppy;
bool m_fdc_irq, m_fdc_drq, m_fdc_hld; bool m_fdc_irq, m_fdc_drq, m_fdc_hld;
floppy_connector *m_con1, *m_con2;
}; };
@ -280,123 +277,123 @@ C can be used as ALT(ernate) in DOS
static INPUT_PORTS_START( alphatp3 ) static INPUT_PORTS_START( alphatp3 )
PORT_START("COL.0") PORT_START("COL.0")
PORT_BIT(0x0001, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("W") PORT_CODE(KEYCODE_W) PORT_CHAR('w') PORT_CHAR('W') PORT_BIT(0x0001, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("W") PORT_CODE(KEYCODE_W) PORT_CHAR('w') PORT_CHAR('W')
PORT_BIT(0x0002, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("S") PORT_CODE(KEYCODE_S) PORT_CHAR('s') PORT_CHAR('S') PORT_BIT(0x0002, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("S") PORT_CODE(KEYCODE_S) PORT_CHAR('s') PORT_CHAR('S')
PORT_BIT(0x0004, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("X") PORT_CODE(KEYCODE_X) PORT_CHAR('x') PORT_CHAR('X') PORT_BIT(0x0004, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("X") PORT_CODE(KEYCODE_X) PORT_CHAR('x') PORT_CHAR('X')
PORT_BIT(0x0008, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("LEFT") PORT_CODE(KEYCODE_LEFT) PORT_CHAR(8) // left arrow works as backspace PORT_BIT(0x0008, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("LEFT") PORT_CODE(KEYCODE_LEFT) PORT_CHAR(8) // left arrow works as backspace
PORT_BIT(0x0010, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("Q") PORT_CODE(KEYCODE_Q) PORT_CHAR('q') PORT_CHAR('Q') PORT_BIT(0x0010, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("Q") PORT_CODE(KEYCODE_Q) PORT_CHAR('q') PORT_CHAR('Q')
PORT_BIT(0x0080, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("1") PORT_CODE(KEYCODE_1) PORT_CHAR('1') PORT_CHAR('!') PORT_BIT(0x0080, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("1") PORT_CODE(KEYCODE_1) PORT_CHAR('1') PORT_CHAR('!')
PORT_START("COL.1") PORT_START("COL.1")
PORT_BIT(0x0001, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("E") PORT_CODE(KEYCODE_E) PORT_CHAR('e') PORT_CHAR('E') PORT_BIT(0x0001, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("E") PORT_CODE(KEYCODE_E) PORT_CHAR('e') PORT_CHAR('E')
PORT_BIT(0x0002, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("D") PORT_CODE(KEYCODE_D) PORT_CHAR('d') PORT_CHAR('D') PORT_BIT(0x0002, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("D") PORT_CODE(KEYCODE_D) PORT_CHAR('d') PORT_CHAR('D')
PORT_BIT(0x0004, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("C") PORT_CODE(KEYCODE_C) PORT_CHAR('c') PORT_CHAR('C') PORT_BIT(0x0004, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("C") PORT_CODE(KEYCODE_C) PORT_CHAR('c') PORT_CHAR('C')
PORT_BIT(0x0008, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("SPACE") PORT_CODE(KEYCODE_SPACE) PORT_CHAR(' ') PORT_BIT(0x0008, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("SPACE") PORT_CODE(KEYCODE_SPACE) PORT_CHAR(' ')
PORT_BIT(0x0010, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("F5") PORT_CODE(KEYCODE_F5) PORT_CHAR(UCHAR_MAMEKEY(F5)) // SCAN:=0Dh ->8Ah-funct F5 ok PORT_BIT(0x0010, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("F5") PORT_CODE(KEYCODE_F5) PORT_CHAR(UCHAR_MAMEKEY(F5)) // SCAN:=0Dh ->8Ah-funct F5 ok
PORT_BIT(0x0080, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("2") PORT_CODE(KEYCODE_2) PORT_CHAR('2') PORT_CHAR('"') PORT_BIT(0x0080, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("2") PORT_CODE(KEYCODE_2) PORT_CHAR('2') PORT_CHAR('"')
PORT_START("COL.2") PORT_START("COL.2")
PORT_BIT(0x0001, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("R") PORT_CODE(KEYCODE_R) PORT_CHAR('r') PORT_CHAR('R') PORT_BIT(0x0001, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("R") PORT_CODE(KEYCODE_R) PORT_CHAR('r') PORT_CHAR('R')
PORT_BIT(0x0002, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("F") PORT_CODE(KEYCODE_F) PORT_CHAR('f') PORT_CHAR('F') PORT_BIT(0x0002, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("F") PORT_CODE(KEYCODE_F) PORT_CHAR('f') PORT_CHAR('F')
PORT_BIT(0x0004, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("V") PORT_CODE(KEYCODE_V) PORT_CHAR('v') PORT_CHAR('V') PORT_BIT(0x0004, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("V") PORT_CODE(KEYCODE_V) PORT_CHAR('v') PORT_CHAR('V')
PORT_BIT(0x0008, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("RIGHT") PORT_CODE(KEYCODE_RIGHT) PORT_CHAR(UCHAR_MAMEKEY(RIGHT)) // 0x82 PORT_BIT(0x0008, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("RIGHT") PORT_CODE(KEYCODE_RIGHT) PORT_CHAR(UCHAR_MAMEKEY(RIGHT)) // 0x82
PORT_BIT(0x0010, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("F6") PORT_CODE(KEYCODE_F6) PORT_CHAR(UCHAR_MAMEKEY(F6)) // scan:=15h 8Ch-> F6 ok PORT_BIT(0x0010, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("F6") PORT_CODE(KEYCODE_F6) PORT_CHAR(UCHAR_MAMEKEY(F6)) // scan:=15h 8Ch-> F6 ok
PORT_BIT(0x0080, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("3") PORT_CODE(KEYCODE_3) PORT_CHAR('3') PORT_CHAR(0x00a7) PORT_BIT(0x0080, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("3") PORT_CODE(KEYCODE_3) PORT_CHAR('3') PORT_CHAR(0x00a7)
PORT_START("COL.3") PORT_START("COL.3")
PORT_BIT(0x0001, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("T") PORT_CODE(KEYCODE_T) PORT_CHAR('t') PORT_CHAR('T') PORT_BIT(0x0001, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("T") PORT_CODE(KEYCODE_T) PORT_CHAR('t') PORT_CHAR('T')
PORT_BIT(0x0002, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("G") PORT_CODE(KEYCODE_G) PORT_CHAR('g') PORT_CHAR('G') PORT_BIT(0x0002, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("G") PORT_CODE(KEYCODE_G) PORT_CHAR('g') PORT_CHAR('G')
PORT_BIT(0x0004, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("B") PORT_CODE(KEYCODE_B) PORT_CHAR('b') PORT_CHAR('B') PORT_BIT(0x0004, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("B") PORT_CODE(KEYCODE_B) PORT_CHAR('b') PORT_CHAR('B')
PORT_BIT(0x0008, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("DOWN") PORT_CODE(KEYCODE_DOWN) PORT_CHAR(UCHAR_MAMEKEY(DOWN)) // 0x8b PORT_BIT(0x0008, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("DOWN") PORT_CODE(KEYCODE_DOWN) PORT_CHAR(UCHAR_MAMEKEY(DOWN)) // 0x8b
PORT_BIT(0x0010, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("A") PORT_CODE(KEYCODE_A) PORT_CHAR('a') PORT_CHAR('A') PORT_BIT(0x0010, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("A") PORT_CODE(KEYCODE_A) PORT_CHAR('a') PORT_CHAR('A')
PORT_BIT(0x0080, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("4") PORT_CODE(KEYCODE_4) PORT_CHAR('4') PORT_CHAR('$') PORT_BIT(0x0080, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("4") PORT_CODE(KEYCODE_4) PORT_CHAR('4') PORT_CHAR('$')
PORT_START("COL.4") PORT_START("COL.4")
PORT_BIT(0x0001, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("Z") PORT_CODE(KEYCODE_Z) PORT_CHAR('z') PORT_CHAR('Z') PORT_BIT(0x0001, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("Z") PORT_CODE(KEYCODE_Z) PORT_CHAR('z') PORT_CHAR('Z')
PORT_BIT(0x0002, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("H") PORT_CODE(KEYCODE_H) PORT_CHAR('h') PORT_CHAR('H') PORT_BIT(0x0002, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("H") PORT_CODE(KEYCODE_H) PORT_CHAR('h') PORT_CHAR('H')
PORT_BIT(0x0004, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("N") PORT_CODE(KEYCODE_N) PORT_CHAR('n') PORT_CHAR('N') PORT_BIT(0x0004, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("N") PORT_CODE(KEYCODE_N) PORT_CHAR('n') PORT_CHAR('N')
PORT_BIT(0x0010, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("CAPS") PORT_CODE(KEYCODE_CAPSLOCK) PORT_CHAR(UCHAR_MAMEKEY(CAPSLOCK)) // scan:=25h ->0xc0 ?capslock ? PORT_BIT(0x0010, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("CAPS") PORT_CODE(KEYCODE_CAPSLOCK) PORT_CHAR(UCHAR_MAMEKEY(CAPSLOCK)) // scan:=25h ->0xc0 ?capslock ?
PORT_BIT(0x0080, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("5") PORT_CODE(KEYCODE_5) PORT_CHAR('5') PORT_CHAR('%') PORT_BIT(0x0080, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("5") PORT_CODE(KEYCODE_5) PORT_CHAR('5') PORT_CHAR('%')
PORT_START("COL.5") PORT_START("COL.5")
PORT_BIT(0x0001, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("U") PORT_CODE(KEYCODE_U) PORT_CHAR('u') PORT_CHAR('U') PORT_BIT(0x0001, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("U") PORT_CODE(KEYCODE_U) PORT_CHAR('u') PORT_CHAR('U')
PORT_BIT(0x0002, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("J") PORT_CODE(KEYCODE_J) PORT_CHAR('j') PORT_CHAR('J') PORT_BIT(0x0002, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("J") PORT_CODE(KEYCODE_J) PORT_CHAR('j') PORT_CHAR('J')
PORT_BIT(0x0004, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("M") PORT_CODE(KEYCODE_M) PORT_CHAR('m') PORT_CHAR('M') PORT_BIT(0x0004, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("M") PORT_CODE(KEYCODE_M) PORT_CHAR('m') PORT_CHAR('M')
PORT_BIT(0x0008, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("UP") PORT_CODE(KEYCODE_UP) PORT_CHAR(UCHAR_MAMEKEY(UP)) // 0x89 PORT_BIT(0x0008, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("UP") PORT_CODE(KEYCODE_UP) PORT_CHAR(UCHAR_MAMEKEY(UP)) // 0x89
PORT_BIT(0x0010, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("Y") PORT_CODE(KEYCODE_Y) PORT_CHAR('y') PORT_CHAR('Y') PORT_BIT(0x0010, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("Y") PORT_CODE(KEYCODE_Y) PORT_CHAR('y') PORT_CHAR('Y')
PORT_BIT(0x0080, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("6") PORT_CODE(KEYCODE_6) PORT_CHAR('6') PORT_CHAR('&') PORT_BIT(0x0080, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("6") PORT_CODE(KEYCODE_6) PORT_CHAR('6') PORT_CHAR('&')
PORT_START("COL.6") PORT_START("COL.6")
PORT_BIT(0x0001, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("I") PORT_CODE(KEYCODE_I) PORT_CHAR('i') PORT_CHAR('I') PORT_BIT(0x0001, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("I") PORT_CODE(KEYCODE_I) PORT_CHAR('i') PORT_CHAR('I')
PORT_BIT(0x0002, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("K") PORT_CODE(KEYCODE_K) PORT_CHAR('k') PORT_CHAR('k') PORT_BIT(0x0002, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("K") PORT_CODE(KEYCODE_K) PORT_CHAR('k') PORT_CHAR('k')
PORT_BIT(0x0004, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME(", ;") PORT_CODE(KEYCODE_COMMA) PORT_CHAR(',') PORT_CHAR(';') PORT_BIT(0x0004, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME(", ;") PORT_CODE(KEYCODE_COMMA) PORT_CHAR(',') PORT_CHAR(';')
PORT_BIT(0x0008, IP_ACTIVE_HIGH, IPT_UNKNOWN) PORT_BIT(0x0008, IP_ACTIVE_HIGH, IPT_UNKNOWN)
PORT_BIT(0x0010, IP_ACTIVE_HIGH, IPT_UNKNOWN) PORT_BIT(0x0010, IP_ACTIVE_HIGH, IPT_UNKNOWN)
PORT_BIT(0x0080, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("7") PORT_CODE(KEYCODE_7) PORT_CHAR('7') PORT_CHAR('/') PORT_BIT(0x0080, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("7") PORT_CODE(KEYCODE_7) PORT_CHAR('7') PORT_CHAR('/')
PORT_START("COL.7") PORT_START("COL.7")
PORT_BIT(0x0001, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("O") PORT_CODE(KEYCODE_O) PORT_CHAR('o') PORT_CHAR('O') PORT_BIT(0x0001, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("O") PORT_CODE(KEYCODE_O) PORT_CHAR('o') PORT_CHAR('O')
PORT_BIT(0x0002, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("L") PORT_CODE(KEYCODE_L) PORT_CHAR('l') PORT_CHAR('L') PORT_BIT(0x0002, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("L") PORT_CODE(KEYCODE_L) PORT_CHAR('l') PORT_CHAR('L')
PORT_BIT(0x0004, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME(". :") PORT_CODE(KEYCODE_STOP) PORT_CHAR('.') PORT_CHAR(':') PORT_BIT(0x0004, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME(". :") PORT_CODE(KEYCODE_STOP) PORT_CHAR('.') PORT_CHAR(':')
PORT_BIT(0x0008, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("Pos 1") PORT_CODE(KEYCODE_HOME) PORT_CHAR(UCHAR_MAMEKEY(HOME)) // 0x8f PORT_BIT(0x0008, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("Pos 1") PORT_CODE(KEYCODE_HOME) PORT_CHAR(UCHAR_MAMEKEY(HOME)) // 0x8f
PORT_BIT(0x0010, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("L_SHIFT") PORT_CODE(KEYCODE_LSHIFT) PORT_CHAR(UCHAR_MAMEKEY(LSHIFT)) // 3Dh ->C1h-function P3 key left PORT_BIT(0x0010, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("L_SHIFT") PORT_CODE(KEYCODE_LSHIFT) PORT_CHAR(UCHAR_MAMEKEY(LSHIFT)) // 3Dh ->C1h-function P3 key left
PORT_BIT(0x0080, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("8") PORT_CODE(KEYCODE_8) PORT_CHAR('8') PORT_CHAR('(') PORT_BIT(0x0080, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("8") PORT_CODE(KEYCODE_8) PORT_CHAR('8') PORT_CHAR('(')
PORT_START("COL.8") PORT_START("COL.8")
PORT_BIT(0x0001, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("P") PORT_CODE(KEYCODE_P) PORT_CHAR('p') PORT_CHAR('P') PORT_BIT(0x0001, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("P") PORT_CODE(KEYCODE_P) PORT_CHAR('p') PORT_CHAR('P')
PORT_BIT(0x0002, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("ö Ö") PORT_CODE(KEYCODE_COLON) PORT_CHAR(0x00f6) PORT_CHAR(0x00d6) PORT_BIT(0x0002, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("ö Ö") PORT_CODE(KEYCODE_COLON) PORT_CHAR(0x00f6) PORT_CHAR(0x00d6)
PORT_BIT(0x0004, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("- _") PORT_CODE(KEYCODE_SLASH) PORT_CHAR('-') PORT_CHAR('_') PORT_BIT(0x0004, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("- _") PORT_CODE(KEYCODE_SLASH) PORT_CHAR('-') PORT_CHAR('_')
PORT_BIT(0x0008, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("R_CTRL") PORT_CODE(KEYCODE_RCONTROL) PORT_CHAR(UCHAR_MAMEKEY(RCONTROL)) // 44h ->84h clear ? PORT_BIT(0x0008, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("R_CTRL") PORT_CODE(KEYCODE_RCONTROL) PORT_CHAR(UCHAR_MAMEKEY(RCONTROL)) // 44h ->84h clear ?
PORT_BIT(0x0010, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("ENTER Pad") PORT_CODE(KEYCODE_ENTER_PAD)PORT_CHAR(UCHAR_MAMEKEY(ENTER_PAD)) PORT_BIT(0x0010, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("ENTER Pad") PORT_CODE(KEYCODE_ENTER_PAD)PORT_CHAR(UCHAR_MAMEKEY(ENTER_PAD))
PORT_BIT(0x0080, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("9") PORT_CODE(KEYCODE_9) PORT_CHAR('9') PORT_CHAR(')') PORT_BIT(0x0080, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("9") PORT_CODE(KEYCODE_9) PORT_CHAR('9') PORT_CHAR(')')
PORT_START("COL.9") PORT_START("COL.9")
PORT_BIT(0x0001, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("ü Ü") PORT_CODE(KEYCODE_OPENBRACE)PORT_CHAR(0x00fc) PORT_CHAR(0x00dc) PORT_BIT(0x0001, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("ü Ü") PORT_CODE(KEYCODE_OPENBRACE)PORT_CHAR(0x00fc) PORT_CHAR(0x00dc)
PORT_BIT(0x0002, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("ä Ä") PORT_CODE(KEYCODE_QUOTE) PORT_CHAR(0x00e4) PORT_CHAR(0x00c4) PORT_BIT(0x0002, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("ä Ä") PORT_CODE(KEYCODE_QUOTE) PORT_CHAR(0x00e4) PORT_CHAR(0x00c4)
PORT_BIT(0x0004, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("R_SHIFT") PORT_CODE(KEYCODE_RSHIFT) PORT_CHAR(UCHAR_MAMEKEY(RSHIFT)) PORT_BIT(0x0004, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("R_SHIFT") PORT_CODE(KEYCODE_RSHIFT) PORT_CHAR(UCHAR_MAMEKEY(RSHIFT))
PORT_BIT(0x0008, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("0 Pad") PORT_CODE(KEYCODE_0_PAD) PORT_CHAR(UCHAR_MAMEKEY(0_PAD)) PORT_BIT(0x0008, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("0 Pad") PORT_CODE(KEYCODE_0_PAD) PORT_CHAR(UCHAR_MAMEKEY(0_PAD))
PORT_BIT(0x0080, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("0") PORT_CODE(KEYCODE_0) PORT_CHAR('0') PORT_CHAR('=') PORT_BIT(0x0080, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("0") PORT_CODE(KEYCODE_0) PORT_CHAR('0') PORT_CHAR('=')
PORT_START("COL.10") PORT_START("COL.10")
PORT_BIT(0x0001, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("+ *") PORT_CODE(KEYCODE_CLOSEBRACE)PORT_CHAR('+') PORT_CHAR('*') PORT_BIT(0x0001, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("+ *") PORT_CODE(KEYCODE_CLOSEBRACE)PORT_CHAR('+') PORT_CHAR('*')
PORT_BIT(0x0002, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("# ^") PORT_CODE(KEYCODE_BACKSLASH)PORT_CHAR('#') PORT_CHAR('^') PORT_BIT(0x0002, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("# ^") PORT_CODE(KEYCODE_BACKSLASH)PORT_CHAR('#') PORT_CHAR('^')
PORT_BIT(0x0004, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("[][]/ESC") PORT_CODE(KEYCODE_ESC) PORT_CHAR(UCHAR_MAMEKEY(ESC)) // Esc test this work ?! PORT_BIT(0x0004, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("[][]/ESC") PORT_CODE(KEYCODE_ESC) PORT_CHAR(UCHAR_MAMEKEY(ESC)) // Esc test this work ?!
PORT_BIT(0x0008, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("DEL Pad") PORT_CODE(KEYCODE_DEL_PAD) PORT_CHAR(UCHAR_MAMEKEY(DEL_PAD)) PORT_BIT(0x0008, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("DEL Pad") PORT_CODE(KEYCODE_DEL_PAD) PORT_CHAR(UCHAR_MAMEKEY(DEL_PAD))
PORT_BIT(0x0080, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("ß ?") PORT_CODE(KEYCODE_MINUS) PORT_CHAR(0x00df) PORT_CHAR('?') // ß and ? PORT_BIT(0x0080, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("ß ?") PORT_CODE(KEYCODE_MINUS) PORT_CHAR(0x00df) PORT_CHAR('?') // ß and ?
PORT_START("COL.11") PORT_START("COL.11")
PORT_BIT(0x0001, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("TAB") PORT_CODE(KEYCODE_TAB) PORT_CHAR(UCHAR_MAMEKEY(TAB)) PORT_BIT(0x0001, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("TAB") PORT_CODE(KEYCODE_TAB) PORT_CHAR(UCHAR_MAMEKEY(TAB))
PORT_BIT(0x0002, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("ENTER") PORT_CODE(KEYCODE_ENTER) PORT_CHAR(13) PORT_BIT(0x0002, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("ENTER") PORT_CODE(KEYCODE_ENTER) PORT_CHAR(13)
PORT_BIT(0x0004, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("1 Pad") PORT_CODE(KEYCODE_1_PAD) PORT_CHAR(UCHAR_MAMEKEY(1_PAD)) PORT_BIT(0x0004, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("1 Pad") PORT_CODE(KEYCODE_1_PAD) PORT_CHAR(UCHAR_MAMEKEY(1_PAD))
PORT_BIT(0x0008, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("+ Pad") PORT_CODE(KEYCODE_PLUS_PAD) PORT_CHAR(UCHAR_MAMEKEY(PLUS_PAD)) PORT_BIT(0x0008, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("+ Pad") PORT_CODE(KEYCODE_PLUS_PAD) PORT_CHAR(UCHAR_MAMEKEY(PLUS_PAD))
PORT_BIT(0x0080, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("´ `") PORT_CODE(KEYCODE_EQUALS) PORT_CHAR(0x00b4) PORT_CHAR(0x0060) PORT_BIT(0x0080, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("´ `") PORT_CODE(KEYCODE_EQUALS) PORT_CHAR(0x00b4) PORT_CHAR(0x0060)
PORT_START("COL.12") PORT_START("COL.12")
PORT_BIT(0x0001, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("7 Pad") PORT_CODE(KEYCODE_7_PAD) PORT_CHAR(UCHAR_MAMEKEY(7_PAD)) PORT_BIT(0x0001, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("7 Pad") PORT_CODE(KEYCODE_7_PAD) PORT_CHAR(UCHAR_MAMEKEY(7_PAD))
PORT_BIT(0x0002, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("4 Pad") PORT_CODE(KEYCODE_4_PAD) PORT_CHAR(UCHAR_MAMEKEY(4_PAD)) PORT_BIT(0x0002, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("4 Pad") PORT_CODE(KEYCODE_4_PAD) PORT_CHAR(UCHAR_MAMEKEY(4_PAD))
PORT_BIT(0x0004, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("2 Pad") PORT_CODE(KEYCODE_2_PAD) PORT_CHAR(UCHAR_MAMEKEY(2_PAD)) PORT_BIT(0x0004, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("2 Pad") PORT_CODE(KEYCODE_2_PAD) PORT_CHAR(UCHAR_MAMEKEY(2_PAD))
PORT_BIT(0x0080, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("F4") PORT_CODE(KEYCODE_F4) PORT_CHAR(UCHAR_MAMEKEY(F4)) // scan 68h -> 88h func. F4 PORT_BIT(0x0080, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("F4") PORT_CODE(KEYCODE_F4) PORT_CHAR(UCHAR_MAMEKEY(F4)) // scan 68h -> 88h func. F4
PORT_START("COL.13") PORT_START("COL.13")
PORT_BIT(0x0001, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("/ Pad") PORT_CODE(KEYCODE_SLASH_PAD)PORT_CHAR(UCHAR_MAMEKEY(SLASH_PAD)) PORT_BIT(0x0001, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("/ Pad") PORT_CODE(KEYCODE_SLASH_PAD)PORT_CHAR(UCHAR_MAMEKEY(SLASH_PAD))
PORT_BIT(0x0002, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("*") PORT_CODE(KEYCODE_ASTERISK) PORT_CHAR(UCHAR_MAMEKEY(ASTERISK)) // test ? PORT_BIT(0x0002, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("*") PORT_CODE(KEYCODE_ASTERISK) PORT_CHAR(UCHAR_MAMEKEY(ASTERISK)) // test ?
PORT_BIT(0x0004, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("\xc2\xae /Ctrl")PORT_CODE(KEYCODE_LCONTROL) PORT_CODE(KEYCODE_LCONTROL) // scan 6Bh -> C2h funct. PORT_BIT(0x0004, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("\xc2\xae /Ctrl")PORT_CODE(KEYCODE_LCONTROL) PORT_CODE(KEYCODE_LCONTROL) // scan 6Bh -> C2h funct.
PORT_BIT(0x0008, IP_ACTIVE_HIGH, IPT_UNKNOWN) // 0xc2 ?? PORT_BIT(0x0008, IP_ACTIVE_HIGH, IPT_UNKNOWN) // 0xc2 ??
PORT_BIT(0x0010, IP_ACTIVE_HIGH, IPT_UNKNOWN) PORT_BIT(0x0010, IP_ACTIVE_HIGH, IPT_UNKNOWN)
PORT_BIT(0x0080, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("F3") PORT_CODE(KEYCODE_F3) PORT_CHAR(UCHAR_MAMEKEY(F3)) // scan:=68h 88h-> F3 ok PORT_BIT(0x0080, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("F3") PORT_CODE(KEYCODE_F3) PORT_CHAR(UCHAR_MAMEKEY(F3)) // scan:=68h 88h-> F3 ok
PORT_START("COL.14") PORT_START("COL.14")
PORT_BIT(0x0001, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("9 Pad") PORT_CODE(KEYCODE_9_PAD) PORT_CHAR(UCHAR_MAMEKEY(9_PAD)) PORT_BIT(0x0001, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("9 Pad") PORT_CODE(KEYCODE_9_PAD) PORT_CHAR(UCHAR_MAMEKEY(9_PAD))
PORT_BIT(0x0002, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("6 Pad") PORT_CODE(KEYCODE_6_PAD) PORT_CHAR(UCHAR_MAMEKEY(6_PAD)) PORT_BIT(0x0002, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("6 Pad") PORT_CODE(KEYCODE_6_PAD) PORT_CHAR(UCHAR_MAMEKEY(6_PAD))
PORT_BIT(0x0004, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("- Pad") PORT_CODE(KEYCODE_MINUS_PAD)PORT_CHAR(UCHAR_MAMEKEY(MINUS_PAD)) PORT_BIT(0x0004, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("- Pad") PORT_CODE(KEYCODE_MINUS_PAD)PORT_CHAR(UCHAR_MAMEKEY(MINUS_PAD))
PORT_BIT(0x0080, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("F2") PORT_CODE(KEYCODE_F2) PORT_CHAR(UCHAR_MAMEKEY(F2)) // 70h -> 87h func.F2 ok PORT_BIT(0x0080, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("F2") PORT_CODE(KEYCODE_F2) PORT_CHAR(UCHAR_MAMEKEY(F2)) // 70h -> 87h func.F2 ok
PORT_START("COL.15") PORT_START("COL.15")
PORT_BIT(0x0001, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("8 Pad") PORT_CODE(KEYCODE_8_PAD) PORT_CHAR(UCHAR_MAMEKEY(8_PAD)) PORT_BIT(0x0001, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("8 Pad") PORT_CODE(KEYCODE_8_PAD) PORT_CHAR(UCHAR_MAMEKEY(8_PAD))
PORT_BIT(0x0002, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("5 Pad") PORT_CODE(KEYCODE_5_PAD) PORT_CHAR(UCHAR_MAMEKEY(5_PAD)) PORT_BIT(0x0002, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("5 Pad") PORT_CODE(KEYCODE_5_PAD) PORT_CHAR(UCHAR_MAMEKEY(5_PAD))
PORT_BIT(0x0004, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("3 Pad") PORT_CODE(KEYCODE_3_PAD) PORT_CHAR(UCHAR_MAMEKEY(3_PAD)) PORT_BIT(0x0004, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("3 Pad") PORT_CODE(KEYCODE_3_PAD) PORT_CHAR(UCHAR_MAMEKEY(3_PAD))
PORT_BIT(0x0010, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("F1") PORT_CODE(KEYCODE_F1) PORT_CHAR(UCHAR_MAMEKEY(F1)) // 7Dh -> 85H func. F1 ok PORT_BIT(0x0010, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("F1") PORT_CODE(KEYCODE_F1) PORT_CHAR(UCHAR_MAMEKEY(F1)) // 7Dh -> 85H func. F1 ok
PORT_BIT(0x0080, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("SM") PORT_CODE(KEYCODE_NUMLOCK) PORT_CHAR(UCHAR_MAMEKEY(NUMLOCK))// SM (typewriter) mode key */ PORT_BIT(0x0080, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("SM") PORT_CODE(KEYCODE_NUMLOCK) PORT_CHAR(UCHAR_MAMEKEY(NUMLOCK))// SM (typewriter) mode key */
INPUT_PORTS_END INPUT_PORTS_END
@ -492,8 +489,8 @@ WRITE_LINE_MEMBER(alphatpx_state::fdchld_w)
READ8_MEMBER(alphatpx_state::fdc_stat_r) READ8_MEMBER(alphatpx_state::fdc_stat_r)
{ {
uint8_t res = 0; uint8_t res = 0;
floppy_image_device *floppy1 = m_con1 ? m_con1->get_device() : nullptr; floppy_image_device *floppy1 = m_floppy0->get_device();
floppy_image_device *floppy2 = m_con2 ? m_con2->get_device() : nullptr; floppy_image_device *floppy2 = m_floppy1->get_device();
res = m_fdc_drq ? 0x80 : 0x00; res = m_fdc_drq ? 0x80 : 0x00;
res |= m_fdc_irq ? 0x40 : 0x00; res |= m_fdc_irq ? 0x40 : 0x00;
@ -534,13 +531,9 @@ WRITE8_MEMBER(alphatpx_state::fdc_cmd_w)
// select drive // select drive
if (!(data & 0x80)) if (!(data & 0x80))
{ floppy = m_floppy0->get_device();
floppy = m_con1 ? m_con1->get_device() : nullptr;
}
else if (!(data & 0x40)) else if (!(data & 0x40))
{ floppy = m_floppy1->get_device();
floppy = m_con2 ? m_con2->get_device() : nullptr;
}
// selecting a new drive? // selecting a new drive?
if (floppy != m_curfloppy) if (floppy != m_curfloppy)
@ -560,7 +553,7 @@ WRITE8_MEMBER(alphatpx_state::fdc_cmd_w)
} }
static SLOT_INTERFACE_START( alphatp2_floppies ) // P3: two BASF 6106 drives static SLOT_INTERFACE_START( alphatp2_floppies ) // P3: two BASF 6106 drives
SLOT_INTERFACE("525ssdd", FLOPPY_525_SSDD) // P30: two Shugart SA465-3AA drives SLOT_INTERFACE("525ssdd", FLOPPY_525_SSDD) // P30: two Shugart SA465-3AA drives
SLOT_INTERFACE_END SLOT_INTERFACE_END
static SLOT_INTERFACE_START( alphatp2su_floppies ) static SLOT_INTERFACE_START( alphatp2su_floppies )
@ -587,12 +580,8 @@ void alphatpx_state::machine_start()
void alphatpx_state::machine_reset() void alphatpx_state::machine_reset()
{ {
m_kbdread = 1; m_kbdread = 1;
m_kbdclk = 1; m_fdc_irq = m_fdc_drq = m_fdc_hld = 0; m_kbdclk = 1; m_fdc_irq = m_fdc_drq = m_fdc_hld = 0;
m_curfloppy = nullptr; m_curfloppy = nullptr;
// look up floppies in advance
m_con1 = machine().device<floppy_connector>("fdc:0");
m_con2 = machine().device<floppy_connector>("fdc:1");
} }
//************************************************************************** //**************************************************************************
@ -684,7 +673,7 @@ ROM_START( alphatp2 ) // P2 ROM space 0x1800
ROMX_LOAD("caap_05_01_12.bin", 0x0800, 0x0800, CRC(98c5ec7a) SHA1(b170e9a73b0b64d4111fa1170af6e333793da479), ROM_BIOS(2) ) ROMX_LOAD("caap_05_01_12.bin", 0x0800, 0x0800, CRC(98c5ec7a) SHA1(b170e9a73b0b64d4111fa1170af6e333793da479), ROM_BIOS(2) )
ROMX_LOAD("caap_04_01_03.bin", 0x1000, 0x0800, CRC(f304c3aa) SHA1(92213e77e4e6de12a4eaee25a9c1ec0ab54e93d4), ROM_BIOS(2) ) ROMX_LOAD("caap_04_01_03.bin", 0x1000, 0x0800, CRC(f304c3aa) SHA1(92213e77e4e6de12a4eaee25a9c1ec0ab54e93d4), ROM_BIOS(2) )
ROMX_LOAD("caap_p2_es_1.bin", 0x0000, 0x0800, CRC(91b58eb3) SHA1(a4467cf9a14366198ee5f676b9471734e820522d), ROM_BIOS(3) ) // P2 Spain ROMX_LOAD("caap_p2_es_1.bin", 0x0000, 0x0800, CRC(91b58eb3) SHA1(a4467cf9a14366198ee5f676b9471734e820522d), ROM_BIOS(3) ) // P2 Spain
ROMX_LOAD("caap_p2_es_2.bin", 0x0800, 0x0800, CRC(f4dfac82) SHA1(266d1fdaef875515d9c68ae3e67ec88831bb55cb), ROM_BIOS(3) ) ROMX_LOAD("caap_p2_es_2.bin", 0x0800, 0x0800, CRC(f4dfac82) SHA1(266d1fdaef875515d9c68ae3e67ec88831bb55cb), ROM_BIOS(3) )
ROMX_LOAD("caap_p2_es_3.bin", 0x1000, 0x0800, CRC(6f6918ba) SHA1(8dc9f5e337df8abf42e5b55f5f1a1a9d61c42d78), ROM_BIOS(3) ) ROMX_LOAD("caap_p2_es_3.bin", 0x1000, 0x0800, CRC(6f6918ba) SHA1(8dc9f5e337df8abf42e5b55f5f1a1a9d61c42d78), ROM_BIOS(3) )
@ -692,8 +681,8 @@ ROM_START( alphatp2 ) // P2 ROM space 0x1800
ROMX_LOAD("mos3-p2_sks_2.bin", 0x0800, 0x0800, CRC(14f19693) SHA1(7ecb66818a3e352fede1857a18cd12bf742603a9), ROM_BIOS(4) ) ROMX_LOAD("mos3-p2_sks_2.bin", 0x0800, 0x0800, CRC(14f19693) SHA1(7ecb66818a3e352fede1857a18cd12bf742603a9), ROM_BIOS(4) )
ROMX_LOAD("mos3-p2_sks_3.bin", 0x1000, 0x0800, CRC(f304c3aa) SHA1(92213e77e4e6de12a4eaee25a9c1ec0ab54e93d4), ROM_BIOS(4) ) ROMX_LOAD("mos3-p2_sks_3.bin", 0x1000, 0x0800, CRC(f304c3aa) SHA1(92213e77e4e6de12a4eaee25a9c1ec0ab54e93d4), ROM_BIOS(4) )
ROM_REGION(0x400, "kbdmcu", 0) // same across all dumped P2 and P3 machines so far ROM_REGION(0x400, "kbdmcu", 0) // same across all dumped P2 and P3 machines so far
ROM_LOAD("p2_keyboard_ip8041a_8278.bin", 0x000, 0x400, CRC(5db00d85) SHA1(0dc8e274a5aece261ef60494901601c0d8b1eb51)) // needs to be checked with P2 sks and Spain ROM_LOAD("p2_keyboard_ip8041a_8278.bin", 0x000, 0x400, CRC(5db00d85) SHA1(0dc8e274a5aece261ef60494901601c0d8b1eb51)) // needs to be checked with P2 sks and Spain
ROM_REGION(0x800, "gfx", 0) ROM_REGION(0x800, "gfx", 0)
ROMX_LOAD("cajp_97_00_5a.bin", 0x000, 0x800, CRC(aa5eab85) SHA1(2718924f5520e7e9aad635786847e78e3096b285), ROM_BIOS(1)) // came with caap94-96 ROMX_LOAD("cajp_97_00_5a.bin", 0x000, 0x800, CRC(aa5eab85) SHA1(2718924f5520e7e9aad635786847e78e3096b285), ROM_BIOS(1)) // came with caap94-96
@ -709,11 +698,11 @@ ROM_START (alphatp2u)
ROM_LOAD("prom2p01.bin", 0x0800, 0x0800, CRC(14f19693) SHA1(7ecb66818a3e352fede1857a18cd12bf742603a9) ) ROM_LOAD("prom2p01.bin", 0x0800, 0x0800, CRC(14f19693) SHA1(7ecb66818a3e352fede1857a18cd12bf742603a9) )
ROM_LOAD("prom2p02.bin", 0x1000, 0x0800, CRC(f304c3aa) SHA1(92213e77e4e6de12a4eaee25a9c1ec0ab54e93d4) ) ROM_LOAD("prom2p02.bin", 0x1000, 0x0800, CRC(f304c3aa) SHA1(92213e77e4e6de12a4eaee25a9c1ec0ab54e93d4) )
ROM_REGION(0x400, "kbdmcu", 0) // same across all dumped P2 and P3 machines so far ROM_REGION(0x400, "kbdmcu", 0) // same across all dumped P2 and P3 machines so far
ROM_LOAD("p2_keyboard_ip8041a_8278.bin", 0x000, 0x400, CRC(5db00d85) SHA1(0dc8e274a5aece261ef60494901601c0d8b1eb51)) // needs to be checked for P2U ROM_LOAD("p2_keyboard_ip8041a_8278.bin", 0x000, 0x400, CRC(5db00d85) SHA1(0dc8e274a5aece261ef60494901601c0d8b1eb51)) // needs to be checked for P2U
ROM_REGION(0x800, "gfx", 0) ROM_REGION(0x800, "gfx", 0)
ROM_LOAD("cajp_01_01_28.bin", 0x000, 0x800, CRC(d6248209) SHA1(21689703de7183ecffb410eb8a6d516efe27da9d)) // P2U chargen needs to be dumped ROM_LOAD("cajp_01_01_28.bin", 0x000, 0x800, CRC(d6248209) SHA1(21689703de7183ecffb410eb8a6d516efe27da9d)) // P2U chargen needs to be dumped
ROM_END ROM_END
// Alphatronic P3 // Alphatronic P3
@ -735,7 +724,7 @@ ROM_END
// Alphatronic P30 // Alphatronic P30
ROM_START( alphatp30 ) // P30 add-on card with 8088 needs to be emulated to boot DOS ROM_START( alphatp30 ) // P30 add-on card with 8088 needs to be emulated to boot DOS
ROM_REGION(0x1800, "boot", 0) ROM_REGION(0x1800, "boot", 0)
ROM_LOAD("hasl17.07.84.bin", 0x0000, 0x1000, CRC(6A91701B) SHA1(8A4F925D0FABAB37852A54D04E06DEB2AEAA349C)) // ...wait for INT6.5 or INT5.5 with RIM to write char in hsync or hsync GAP-time !! ROM_LOAD("hasl17.07.84.bin", 0x0000, 0x1000, CRC(6A91701B) SHA1(8A4F925D0FABAB37852A54D04E06DEB2AEAA349C)) // ...wait for INT6.5 or INT5.5 with RIM to write char in hsync or hsync GAP-time !!
ROM_REGION(0x400, "kbdmcu", 0) ROM_REGION(0x400, "kbdmcu", 0)
ROM_LOAD("caju_01_01_01.bin", 0x000, 0x400, CRC(e9b4359f) SHA1(835f4a580b4c108ef2f239039b765324adc7f078)) ROM_LOAD("caju_01_01_01.bin", 0x000, 0x400, CRC(e9b4359f) SHA1(835f4a580b4c108ef2f239039b765324adc7f078))
@ -744,7 +733,7 @@ ROM_START( alphatp30 ) // P30 add-on card with 8088 needs to be emulated to boot
ROM_LOAD("cajp08_01_15.bin", 0x000, 0x800, CRC(4ed11dac) SHA1(9db9b8e0edf471faaddbb5521d6223121146bab8)) ROM_LOAD("cajp08_01_15.bin", 0x000, 0x800, CRC(4ed11dac) SHA1(9db9b8e0edf471faaddbb5521d6223121146bab8))
ROM_REGION(0x4000, "16bit", 0) ROM_REGION(0x4000, "16bit", 0)
ROM_LOAD("caxp_02_02_13.bin", 0x00000, 0x2000, CRC(e6bf6dd5) SHA1(dc87210bbcd96f3c1370565174a45199e3c1bc70)) // P30 ROM from 8088 card ROM_LOAD("caxp_02_02_13.bin", 0x00000, 0x2000, CRC(e6bf6dd5) SHA1(dc87210bbcd96f3c1370565174a45199e3c1bc70)) // P30 ROM from 8088 card
ROM_END ROM_END
@ -756,4 +745,4 @@ ROM_END
COMP( 198?, alphatp2, alphatp3, 0, alphatp2, alphatp3, alphatpx_state, 0, "Triumph-Adler", "alphatronic P2", MACHINE_NOT_WORKING | MACHINE_NO_SOUND ) COMP( 198?, alphatp2, alphatp3, 0, alphatp2, alphatp3, alphatpx_state, 0, "Triumph-Adler", "alphatronic P2", MACHINE_NOT_WORKING | MACHINE_NO_SOUND )
COMP( 198?, alphatp2u, alphatp3, 0, alphatp2u,alphatp3, alphatpx_state, 0, "Triumph-Adler", "alphatronic P2U", MACHINE_NOT_WORKING | MACHINE_NO_SOUND ) COMP( 198?, alphatp2u, alphatp3, 0, alphatp2u,alphatp3, alphatpx_state, 0, "Triumph-Adler", "alphatronic P2U", MACHINE_NOT_WORKING | MACHINE_NO_SOUND )
COMP( 1982, alphatp3, 0, 0, alphatp3, alphatp3, alphatpx_state, 0, "Triumph-Adler", "alphatronic P3", MACHINE_NOT_WORKING ) COMP( 1982, alphatp3, 0, 0, alphatp3, alphatp3, alphatpx_state, 0, "Triumph-Adler", "alphatronic P3", MACHINE_NOT_WORKING )
COMP( 198?, alphatp30, alphatp3, 0, alphatp3, alphatp3, alphatpx_state, 0, "Triumph-Adler", "alphatronic P30",MACHINE_NOT_WORKING | MACHINE_NO_SOUND ) COMP( 198?, alphatp30, alphatp3, 0, alphatp3, alphatp3, alphatpx_state, 0, "Triumph-Adler", "alphatronic P30",MACHINE_NOT_WORKING | MACHINE_NO_SOUND )

6
src/mame/drivers/amaticmg.cpp
View File

@ -681,7 +681,7 @@ static ADDRESS_MAP_START( amaticmg4_portmap, AS_IO, 8, amaticmg_state )
AM_RANGE(0x50, 0x51) AM_DEVWRITE("ymsnd", ym3812_device, write) AM_RANGE(0x50, 0x51) AM_DEVWRITE("ymsnd", ym3812_device, write)
AM_RANGE(0x0e, 0x0e) AM_DEVWRITE("crtc", mc6845_device, address_w) AM_RANGE(0x0e, 0x0e) AM_DEVWRITE("crtc", mc6845_device, address_w)
AM_RANGE(0x0f, 0x0f) AM_DEVREADWRITE("crtc", mc6845_device, register_r, register_w) AM_RANGE(0x0f, 0x0f) AM_DEVREADWRITE("crtc", mc6845_device, register_r, register_w)
// AM_RANGE(0xc0, 0xc0) AM_WRITE(rombank_w) // AM_RANGE(0xc0, 0xc0) AM_WRITE(rombank_w)
AM_RANGE(0xe6, 0xe6) AM_WRITE(nmi_mask_w) AM_RANGE(0xe6, 0xe6) AM_WRITE(nmi_mask_w)
ADDRESS_MAP_END ADDRESS_MAP_END
@ -880,7 +880,7 @@ static MACHINE_CONFIG_DERIVED( amaticmg2, amaticmg )
MCFG_CPU_IO_MAP(amaticmg2_portmap) MCFG_CPU_IO_MAP(amaticmg2_portmap)
MCFG_CPU_VBLANK_INT_DRIVER("screen", amaticmg_state, amaticmg2_irq) MCFG_CPU_VBLANK_INT_DRIVER("screen", amaticmg_state, amaticmg2_irq)
MCFG_DEVICE_ADD("ppi8255_2", I8255A, 0) // MG4: 0x89 -> A:out; B:out; C(h):in; C(l):in. MCFG_DEVICE_ADD("ppi8255_2", I8255A, 0) // MG4: 0x89 -> A:out; B:out; C(h):in; C(l):in.
MCFG_SCREEN_MODIFY("screen") MCFG_SCREEN_MODIFY("screen")
MCFG_SCREEN_UPDATE_DRIVER(amaticmg_state, screen_update_amaticmg2) MCFG_SCREEN_UPDATE_DRIVER(amaticmg_state, screen_update_amaticmg2)
@ -898,7 +898,7 @@ static MACHINE_CONFIG_DERIVED( amaticmg4, amaticmg )
MCFG_CPU_IO_MAP(amaticmg4_portmap) MCFG_CPU_IO_MAP(amaticmg4_portmap)
MCFG_CPU_VBLANK_INT_DRIVER("screen", amaticmg_state, amaticmg2_irq) MCFG_CPU_VBLANK_INT_DRIVER("screen", amaticmg_state, amaticmg2_irq)
MCFG_DEVICE_ADD("ppi8255_2", I8255A, 0) // MG4: 0x89 -> A:out; B:out; C(h):in; C(l):in. MCFG_DEVICE_ADD("ppi8255_2", I8255A, 0) // MG4: 0x89 -> A:out; B:out; C(h):in; C(l):in.
MCFG_SCREEN_MODIFY("screen") MCFG_SCREEN_MODIFY("screen")
MCFG_SCREEN_UPDATE_DRIVER(amaticmg_state, screen_update_amaticmg2) MCFG_SCREEN_UPDATE_DRIVER(amaticmg_state, screen_update_amaticmg2)

14
src/mame/drivers/aristmk5.cpp
View File

@ -2965,7 +2965,7 @@ ROM_END
ROM_START( chickna5b ) ROM_START( chickna5b )
ARISTOCRAT_MK5_BIOS ARISTOCRAT_MK5_BIOS
/* /*
(need proper info about the checksum routines). (need proper info about the checksum routines).
*/ */
ROM_REGION( 0x400000, "game_prg", ROMREGION_ERASEFF ) ROM_REGION( 0x400000, "game_prg", ROMREGION_ERASEFF )
ROM_LOAD32_WORD( "01j01886.u7", 0x000000, 0x80000, CRC(6852bf73) SHA1(a53c8467f4a128da26707a1fe239f32330dffe0a) ) ROM_LOAD32_WORD( "01j01886.u7", 0x000000, 0x80000, CRC(6852bf73) SHA1(a53c8467f4a128da26707a1fe239f32330dffe0a) )
@ -4548,12 +4548,12 @@ ROM_END
ROM_START( locolootu ) ROM_START( locolootu )
ARISTOCRAT_MK5_BIOS ARISTOCRAT_MK5_BIOS
/* /*
Checksum code found at 0x000d18 Checksum code found at 0x000d18
0x000000-0x0e94fb is the Checksummed Range (excluding 0x000020-0x000027 where Checksum is stored) 0x000000-0x0e94fb is the Checksummed Range (excluding 0x000020-0x000027 where Checksum is stored)
Expected Checksum 0xbd28f614 Expected Checksum 0xbd28f614
Calculated Checksum 0xbd28f614 (OK) Calculated Checksum 0xbd28f614 (OK)
0x0e94fc-0x170993 is the non-Checksummed range still containing data but NOT covered by Checksum 0x0e94fc-0x170993 is the non-Checksummed range still containing data but NOT covered by Checksum
0x0e94fc-0x1fffff is the non-Checksummed range if the additional vectors? at the end are included 0x0e94fc-0x1fffff is the non-Checksummed range if the additional vectors? at the end are included
*/ */
ROM_REGION( 0x400000, "game_prg", ROMREGION_ERASEFF ) ROM_REGION( 0x400000, "game_prg", ROMREGION_ERASEFF )
ROM_LOAD32_WORD( "ahg1513.u7", 0x000000, 0x80000, CRC(16854250) SHA1(a3b6e112dcce38310ca13eb9e9851901ee213fcf) ) ROM_LOAD32_WORD( "ahg1513.u7", 0x000000, 0x80000, CRC(16854250) SHA1(a3b6e112dcce38310ca13eb9e9851901ee213fcf) )

2
src/mame/drivers/atlantis.cpp
View File

@ -21,7 +21,7 @@
* Actiontec PM560LKI PCI Data/Fax Modem (PCI\VEN_11C1&DEV_0480&SUBSYS_04801668) * Actiontec PM560LKI PCI Data/Fax Modem (PCI\VEN_11C1&DEV_0480&SUBSYS_04801668)
* TL16c552 dual UART * TL16c552 dual UART
* ADSP-2181 based DCS2 audio (unclear which variant) * ADSP-2181 based DCS2 audio (unclear which variant)
* Micron MT48LC1M16A1 1Mx16 SDRAM, 2X (4MB) for audio * Micron MT48LC1M16A1 1Mx16 SDRAM, 2X (4MB) for audio
* ICS AV9110 Serially Programmable Frequency Generator. Programmed through ADSP FL0,FL1,FL2 pins. * ICS AV9110 Serially Programmable Frequency Generator. Programmed through ADSP FL0,FL1,FL2 pins.
* Cirrus Logic CS4338 16 bit stereo audio serial DAC, PCB has space for 3 chips (6-channels), only 1 is populated * Cirrus Logic CS4338 16 bit stereo audio serial DAC, PCB has space for 3 chips (6-channels), only 1 is populated
* Maxim MAX192 8 channel 10 bit serial ADC * Maxim MAX192 8 channel 10 bit serial ADC

8
src/mame/drivers/calcune.cpp
View File

@ -128,7 +128,7 @@ static ADDRESS_MAP_START( calcune_map, AS_PROGRAM, 16, calcune_state )
AM_RANGE(0x710000, 0x710001) AM_READ_PORT("710000") AM_RANGE(0x710000, 0x710001) AM_READ_PORT("710000")
AM_RANGE(0x720000, 0x720001) AM_READ_PORT("720000") AM_RANGE(0x720000, 0x720001) AM_READ_PORT("720000")
// AM_RANGE(0x730000, 0x730001) possible Z80 control? // AM_RANGE(0x730000, 0x730001) possible Z80 control?
AM_RANGE(0x760000, 0x760003) AM_DEVREADWRITE8("ymz", ymz280b_device, read, write, 0xff00) AM_RANGE(0x760000, 0x760003) AM_DEVREADWRITE8("ymz", ymz280b_device, read, write, 0xff00)
AM_RANGE(0x770000, 0x770001) AM_WRITE(cal_770000_w) AM_RANGE(0x770000, 0x770001) AM_WRITE(cal_770000_w)
@ -275,9 +275,9 @@ static MACHINE_CONFIG_START( calcune )
MCFG_DEVICE_ADD("gen_vdp2", SEGA315_5313, 0) MCFG_DEVICE_ADD("gen_vdp2", SEGA315_5313, 0)
MCFG_SEGA315_5313_IS_PAL(false) MCFG_SEGA315_5313_IS_PAL(false)
// are these not hooked up or should they OR with the other lines? // are these not hooked up or should they OR with the other lines?
// MCFG_SEGA315_5313_SND_IRQ_CALLBACK(WRITELINE(calcune_state, vdp_sndirqline_callback_genesis_z80)); // MCFG_SEGA315_5313_SND_IRQ_CALLBACK(WRITELINE(calcune_state, vdp_sndirqline_callback_genesis_z80));
// MCFG_SEGA315_5313_LV6_IRQ_CALLBACK(WRITELINE(calcune_state, vdp_lv6irqline_callback_genesis_68k)); // MCFG_SEGA315_5313_LV6_IRQ_CALLBACK(WRITELINE(calcune_state, vdp_lv6irqline_callback_genesis_68k));
// MCFG_SEGA315_5313_LV4_IRQ_CALLBACK(WRITELINE(calcune_state, vdp_lv4irqline_callback_genesis_68k)); // MCFG_SEGA315_5313_LV4_IRQ_CALLBACK(WRITELINE(calcune_state, vdp_lv4irqline_callback_genesis_68k));
MCFG_SEGA315_5313_ALT_TIMING(1); MCFG_SEGA315_5313_ALT_TIMING(1);
MCFG_SEGA315_5313_PAL_WRITE_BASE(0x0c0); MCFG_SEGA315_5313_PAL_WRITE_BASE(0x0c0);
MCFG_SEGA315_5313_PALETTE("palette") MCFG_SEGA315_5313_PALETTE("palette")

10
src/mame/drivers/chqflag.cpp
View File

@ -8,11 +8,11 @@
- 007232 volume & panning control is almost certainly wrong; - 007232 volume & panning control is almost certainly wrong;
- 051733 opponent cars have wrong RNG colors compared to references; - 051733 opponent cars have wrong RNG colors compared to references;
- 051733 opponent car-to-car collisions direction are wrong, according - 051733 opponent car-to-car collisions direction are wrong, according
to reference orange car should shift to the left instead (current emulation to reference orange car should shift to the left instead (current emulation
makes them to wall crash most of the time instead); makes them to wall crash most of the time instead);
- needs proper shadow/highlight factor values for sprites and tilemap; - needs proper shadow/highlight factor values for sprites and tilemap;
- compared to references, emulation is a bit slower (around 2/3 seconds - compared to references, emulation is a bit slower (around 2/3 seconds
behind on a full lap of stage 2); behind on a full lap of stage 2);
2008-07 2008-07
Dip locations and recommended settings verified with manual Dip locations and recommended settings verified with manual

4
src/mame/drivers/ckz80.cpp
View File

@ -12,8 +12,8 @@
TODO: TODO:
- ckmaster 1 WAIT CLK per M1, workaround with z80_set_cycle_tables is possible - ckmaster 1 WAIT CLK per M1, workaround with z80_set_cycle_tables is possible
(wait state is similar to MSX) but I can't be bothered, better solution (wait state is similar to MSX) but I can't be bothered, better solution
is to add M1 pin to the z80 core. Until then, it'll run ~20% too fast. is to add M1 pin to the z80 core. Until then, it'll run ~20% too fast.
****************************************************************************** ******************************************************************************

20
src/mame/drivers/fmtowns.cpp
View File

@ -2443,18 +2443,18 @@ static INPUT_PORTS_START( towns )
PORT_BIT(0x08000000,IP_ACTIVE_HIGH,IPT_KEYBOARD) PORT_NAME("@ ` \xE2\x80\x9D") PORT_CODE(KEYCODE_OPENBRACE) PORT_CHAR('@') PORT_BIT(0x08000000,IP_ACTIVE_HIGH,IPT_KEYBOARD) PORT_NAME("@ ` \xE2\x80\x9D") PORT_CODE(KEYCODE_OPENBRACE) PORT_CHAR('@')
PORT_BIT(0x10000000,IP_ACTIVE_HIGH,IPT_KEYBOARD) PORT_NAME("[ { \xE3\x82\x9C \xE3\x80\x8C") PORT_CODE(KEYCODE_CLOSEBRACE) PORT_CHAR('[') PORT_BIT(0x10000000,IP_ACTIVE_HIGH,IPT_KEYBOARD) PORT_NAME("[ { \xE3\x82\x9C \xE3\x80\x8C") PORT_CODE(KEYCODE_CLOSEBRACE) PORT_CHAR('[')
PORT_BIT(0x20000000,IP_ACTIVE_HIGH,IPT_KEYBOARD) PORT_NAME("RETURN") PORT_CODE(KEYCODE_ENTER) PORT_CHAR(27) PORT_BIT(0x20000000,IP_ACTIVE_HIGH,IPT_KEYBOARD) PORT_NAME("RETURN") PORT_CODE(KEYCODE_ENTER) PORT_CHAR(27)
PORT_BIT(0x40000000,IP_ACTIVE_HIGH,IPT_KEYBOARD) PORT_NAME("A　\xE3\x81\xA1") PORT_CODE(KEYCODE_A) PORT_CHAR('A') PORT_BIT(0x40000000,IP_ACTIVE_HIGH,IPT_KEYBOARD) PORT_NAME("A?\xE3\x81\xA1") PORT_CODE(KEYCODE_A) PORT_CHAR('A')
PORT_BIT(0x80000000,IP_ACTIVE_HIGH,IPT_KEYBOARD) PORT_NAME("S　\xE3\x81\xA8") PORT_CODE(KEYCODE_S) PORT_CHAR('S') PORT_BIT(0x80000000,IP_ACTIVE_HIGH,IPT_KEYBOARD) PORT_NAME("S?\xE3\x81\xA8") PORT_CODE(KEYCODE_S) PORT_CHAR('S')
PORT_START( "key2" ) // scancodes 0x20-0x3f PORT_START( "key2" ) // scancodes 0x20-0x3f
PORT_BIT(0x00000001,IP_ACTIVE_HIGH,IPT_KEYBOARD) PORT_NAME("D　\xE3\x81\x97") PORT_CODE(KEYCODE_D) PORT_CHAR('D') PORT_BIT(0x00000001,IP_ACTIVE_HIGH,IPT_KEYBOARD) PORT_NAME("D?\xE3\x81\x97") PORT_CODE(KEYCODE_D) PORT_CHAR('D')
PORT_BIT(0x00000002,IP_ACTIVE_HIGH,IPT_KEYBOARD) PORT_NAME("F　\xE3\x81\xAF") PORT_CODE(KEYCODE_F) PORT_CHAR('F') PORT_BIT(0x00000002,IP_ACTIVE_HIGH,IPT_KEYBOARD) PORT_NAME("F?\xE3\x81\xAF") PORT_CODE(KEYCODE_F) PORT_CHAR('F')
PORT_BIT(0x00000004,IP_ACTIVE_HIGH,IPT_KEYBOARD) PORT_NAME("G　\xE3\x81\x8D") PORT_CODE(KEYCODE_G) PORT_CHAR('G') PORT_BIT(0x00000004,IP_ACTIVE_HIGH,IPT_KEYBOARD) PORT_NAME("G?\xE3\x81\x8D") PORT_CODE(KEYCODE_G) PORT_CHAR('G')
PORT_BIT(0x00000008,IP_ACTIVE_HIGH,IPT_KEYBOARD) PORT_NAME("H　\xE3\x81\x8F") PORT_CODE(KEYCODE_H) PORT_CHAR('H') PORT_BIT(0x00000008,IP_ACTIVE_HIGH,IPT_KEYBOARD) PORT_NAME("H?\xE3\x81\x8F") PORT_CODE(KEYCODE_H) PORT_CHAR('H')
PORT_BIT(0x00000010,IP_ACTIVE_HIGH,IPT_KEYBOARD) PORT_NAME("J　\xE3\x81\xBE") PORT_CODE(KEYCODE_J) PORT_CHAR('J') PORT_BIT(0x00000010,IP_ACTIVE_HIGH,IPT_KEYBOARD) PORT_NAME("J?\xE3\x81\xBE") PORT_CODE(KEYCODE_J) PORT_CHAR('J')
PORT_BIT(0x00000020,IP_ACTIVE_HIGH,IPT_KEYBOARD) PORT_NAME("K　\xE3\x81\xAE") PORT_CODE(KEYCODE_K) PORT_CHAR('K') PORT_BIT(0x00000020,IP_ACTIVE_HIGH,IPT_KEYBOARD) PORT_NAME("K?\xE3\x81\xAE") PORT_CODE(KEYCODE_K) PORT_CHAR('K')
PORT_BIT(0x00000040,IP_ACTIVE_HIGH,IPT_KEYBOARD) PORT_NAME("L　\xE3\x82\x8A") PORT_CODE(KEYCODE_L) PORT_CHAR('L') PORT_BIT(0x00000040,IP_ACTIVE_HIGH,IPT_KEYBOARD) PORT_NAME("L?\xE3\x82\x8A") PORT_CODE(KEYCODE_L) PORT_CHAR('L')
PORT_BIT(0x00000080,IP_ACTIVE_HIGH,IPT_KEYBOARD) PORT_NAME(";　+ \xE3\x82\x8C") PORT_CODE(KEYCODE_COLON) PORT_CHAR(';') PORT_BIT(0x00000080,IP_ACTIVE_HIGH,IPT_KEYBOARD) PORT_NAME(";?+ \xE3\x82\x8C") PORT_CODE(KEYCODE_COLON) PORT_CHAR(';')
PORT_BIT(0x00000100,IP_ACTIVE_HIGH,IPT_KEYBOARD) PORT_NAME(": * \xE3\x81\x91") PORT_CODE(KEYCODE_QUOTE) PORT_CHAR(':') PORT_BIT(0x00000100,IP_ACTIVE_HIGH,IPT_KEYBOARD) PORT_NAME(": * \xE3\x81\x91") PORT_CODE(KEYCODE_QUOTE) PORT_CHAR(':')
PORT_BIT(0x00000200,IP_ACTIVE_HIGH,IPT_KEYBOARD) PORT_NAME("] } \xE3\x82\x80 \xE3\x80\x8D") PORT_CODE(KEYCODE_BACKSLASH) PORT_CHAR(']') PORT_BIT(0x00000200,IP_ACTIVE_HIGH,IPT_KEYBOARD) PORT_NAME("] } \xE3\x82\x80 \xE3\x80\x8D") PORT_CODE(KEYCODE_BACKSLASH) PORT_CHAR(']')
PORT_BIT(0x00000400,IP_ACTIVE_HIGH,IPT_KEYBOARD) PORT_NAME("Z \xE3\x81\xA4 \xE3\x81\xA3") PORT_CODE(KEYCODE_Z) PORT_CHAR('Z') PORT_BIT(0x00000400,IP_ACTIVE_HIGH,IPT_KEYBOARD) PORT_NAME("Z \xE3\x81\xA4 \xE3\x81\xA3") PORT_CODE(KEYCODE_Z) PORT_CHAR('Z')

2
src/mame/drivers/hp9845.cpp
View File

@ -188,7 +188,7 @@ constexpr unsigned LP_FOV = 9; // Field of view
constexpr unsigned LP_XOFFSET = 5; // x-offset of LP (due to delay in hit recognition) constexpr unsigned LP_XOFFSET = 5; // x-offset of LP (due to delay in hit recognition)
// Peripheral Addresses (PA) // Peripheral Addresses (PA)
#define PRINTER_PA 0 #define PRINTER_PA 0
#define IO_SLOT_FIRST_PA 1 #define IO_SLOT_FIRST_PA 1
#define IO_SLOT_LAST_PA 12 #define IO_SLOT_LAST_PA 12
#define GVIDEO_PA 13 #define GVIDEO_PA 13

6
src/mame/drivers/metro.cpp
View File

@ -117,9 +117,9 @@ READ16_MEMBER(metro_state::metro_irq_cause_r)
int[0] vblank int[0] vblank
int[1] hblank (bangball for faster intermission skip, int[1] hblank (bangball for faster intermission skip,
puzzli for gameplay water effect, puzzli for gameplay water effect,
blzntrnd title screen scroll (enabled all the time then?), blzntrnd title screen scroll (enabled all the time then?),
unused/empty in balcube, daitoride, karatour, unused/empty in balcube, daitoride, karatour,
unchecked mouja & other i4300 games ) unchecked mouja & other i4300 games )
int[2] blitter int[2] blitter
int[3] ? KARATOUR int[3] ? KARATOUR
int[4] ? int[4] ?

2
src/mame/drivers/murogmbl.cpp
View File

@ -157,7 +157,7 @@ static ADDRESS_MAP_START( slotunbl_map, AS_PROGRAM, 8, slotunbl_state )
AM_RANGE(0x4000, 0x43ff) AM_RAM AM_RANGE(0x4000, 0x43ff) AM_RAM
AM_RANGE(0x4800, 0x4fff) AM_RAM AM_RANGE(0x4800, 0x4fff) AM_RAM
AM_RANGE(0x5000, 0x53ff) AM_RAM AM_SHARE("video") AM_RANGE(0x5000, 0x53ff) AM_RAM AM_SHARE("video")
// AM_RANGE(0x5400, 0x5fff) AM_RAM // AM_RANGE(0x5400, 0x5fff) AM_RAM
AM_RANGE(0x6000, 0x6000) AM_READ_PORT("IN0") AM_RANGE(0x6000, 0x6000) AM_READ_PORT("IN0")
AM_RANGE(0x6800, 0x6800) AM_READ_PORT("DSW") AM_RANGE(0x6800, 0x6800) AM_READ_PORT("DSW")
AM_RANGE(0x7000, 0x7000) AM_READ_PORT("IN1") AM_RANGE(0x7000, 0x7000) AM_READ_PORT("IN1")

44
src/mame/drivers/myb3k.cpp
View File

@ -330,7 +330,7 @@ static ADDRESS_MAP_START(myb3k_io, AS_IO, 8, myb3k_state)
// Discrete latches // Discrete latches
AM_RANGE(0x04, 0x04) AM_READ(myb3k_kbd_r) AM_RANGE(0x04, 0x04) AM_READ(myb3k_kbd_r)
AM_RANGE(0x04, 0x04) AM_WRITE(myb3k_video_mode_w) // b0=40CH, b1=80CH, b2=16 raster AM_RANGE(0x04, 0x04) AM_WRITE(myb3k_video_mode_w) // b0=40CH, b1=80CH, b2=16 raster
// AM_RANGE(0x05, 0x05) AM_READ(myb3k_io_status_r) // AM_RANGE(0x05, 0x05) AM_READ(myb3k_io_status_r)
AM_RANGE(0x05, 0x05) AM_WRITE(dma_segment_w) // b0-b3=addr, b6=A b7=B AM_RANGE(0x05, 0x05) AM_WRITE(dma_segment_w) // b0-b3=addr, b6=A b7=B
AM_RANGE(0x06, 0x06) AM_READ_PORT("DSW2") AM_RANGE(0x06, 0x06) AM_READ_PORT("DSW2")
// 8-9 8259A interrupt controller // 8-9 8259A interrupt controller
@ -342,7 +342,7 @@ static ADDRESS_MAP_START(myb3k_io, AS_IO, 8, myb3k_state)
// 1c-1d HD46505S CRTC // 1c-1d HD46505S CRTC
AM_RANGE(0x1c, 0x1c) AM_WRITE(myb3k_6845_address_w) AM_RANGE(0x1c, 0x1c) AM_WRITE(myb3k_6845_address_w)
AM_RANGE(0x1d, 0x1d) AM_WRITE(myb3k_6845_data_w) AM_RANGE(0x1d, 0x1d) AM_WRITE(myb3k_6845_data_w)
// AM_RANGE(0x800,0xfff) // Expansion Unit // AM_RANGE(0x800,0xfff) // Expansion Unit
ADDRESS_MAP_END ADDRESS_MAP_END
/* Input ports - from Step/One service manual */ /* Input ports - from Step/One service manual */
@ -547,7 +547,7 @@ static MACHINE_CONFIG_START( myb3k )
MCFG_ISA_OUT_IRQ5_CB(DEVWRITELINE("pic", pic8259_device, ir5_w)) // Jumper J4 selectable MCFG_ISA_OUT_IRQ5_CB(DEVWRITELINE("pic", pic8259_device, ir5_w)) // Jumper J4 selectable
MCFG_ISA_OUT_IRQ6_CB(DEVWRITELINE("pic", pic8259_device, ir6_w)) MCFG_ISA_OUT_IRQ6_CB(DEVWRITELINE("pic", pic8259_device, ir6_w))
MCFG_ISA_OUT_IRQ7_CB(DEVWRITELINE("pic", pic8259_device, ir7_w)) // Jumper J5 selectable MCFG_ISA_OUT_IRQ7_CB(DEVWRITELINE("pic", pic8259_device, ir7_w)) // Jumper J5 selectable
// MCFG_ISA_OUT_DRQ0_CB(DEVWRITELINE("dma", i8257_device, dreq0_w)) // Part of ISA16 but not ISA8 standard but implemented on ISA8 B8 (SRDY) on this motherboard // MCFG_ISA_OUT_DRQ0_CB(DEVWRITELINE("dma", i8257_device, dreq0_w)) // Part of ISA16 but not ISA8 standard but implemented on ISA8 B8 (SRDY) on this motherboard
MCFG_ISA_OUT_DRQ1_CB(DEVWRITELINE("dma", i8257_device, dreq1_w)) MCFG_ISA_OUT_DRQ1_CB(DEVWRITELINE("dma", i8257_device, dreq1_w))
MCFG_ISA_OUT_DRQ2_CB(DEVWRITELINE("dma", i8257_device, dreq2_w)) MCFG_ISA_OUT_DRQ2_CB(DEVWRITELINE("dma", i8257_device, dreq2_w))
MCFG_ISA_OUT_DRQ3_CB(DEVWRITELINE("dma", i8257_device, dreq3_w)) MCFG_ISA_OUT_DRQ3_CB(DEVWRITELINE("dma", i8257_device, dreq3_w))
@ -568,22 +568,22 @@ static MACHINE_CONFIG_START( myb3k )
/* DMA chip */ /* DMA chip */
MCFG_DEVICE_ADD("dma", I8257, XTAL_14_31818MHz / 6) MCFG_DEVICE_ADD("dma", I8257, XTAL_14_31818MHz / 6)
MCFG_I8257_OUT_HRQ_CB(WRITELINE(myb3k_state, hrq_w)) MCFG_I8257_OUT_HRQ_CB(WRITELINE(myb3k_state, hrq_w))
MCFG_I8257_OUT_TC_CB(WRITELINE(myb3k_state, tc_w)) MCFG_I8257_OUT_TC_CB(WRITELINE(myb3k_state, tc_w))
MCFG_I8257_IN_MEMR_CB(READ8(myb3k_state, dma_memory_read_byte)) MCFG_I8257_IN_MEMR_CB(READ8(myb3k_state, dma_memory_read_byte))
MCFG_I8257_OUT_MEMW_CB(WRITE8(myb3k_state, dma_memory_write_byte)) MCFG_I8257_OUT_MEMW_CB(WRITE8(myb3k_state, dma_memory_write_byte))
MCFG_I8257_IN_IOR_0_CB(READ8(myb3k_state, io_dack0_r)) MCFG_I8257_IN_IOR_0_CB(READ8(myb3k_state, io_dack0_r))
MCFG_I8257_IN_IOR_1_CB(READ8(myb3k_state, io_dack1_r)) MCFG_I8257_IN_IOR_1_CB(READ8(myb3k_state, io_dack1_r))
MCFG_I8257_IN_IOR_2_CB(READ8(myb3k_state, io_dack2_r)) MCFG_I8257_IN_IOR_2_CB(READ8(myb3k_state, io_dack2_r))
MCFG_I8257_IN_IOR_3_CB(READ8(myb3k_state, io_dack3_r)) MCFG_I8257_IN_IOR_3_CB(READ8(myb3k_state, io_dack3_r))
MCFG_I8257_OUT_IOW_0_CB(WRITE8(myb3k_state, io_dack0_w)) MCFG_I8257_OUT_IOW_0_CB(WRITE8(myb3k_state, io_dack0_w))
MCFG_I8257_OUT_IOW_1_CB(WRITE8(myb3k_state, io_dack1_w)) MCFG_I8257_OUT_IOW_1_CB(WRITE8(myb3k_state, io_dack1_w))
MCFG_I8257_OUT_IOW_2_CB(WRITE8(myb3k_state, io_dack2_w)) MCFG_I8257_OUT_IOW_2_CB(WRITE8(myb3k_state, io_dack2_w))
MCFG_I8257_OUT_IOW_3_CB(WRITE8(myb3k_state, io_dack3_w)) MCFG_I8257_OUT_IOW_3_CB(WRITE8(myb3k_state, io_dack3_w))
MCFG_I8257_OUT_DACK_0_CB(WRITELINE(myb3k_state, dack0_w)) MCFG_I8257_OUT_DACK_0_CB(WRITELINE(myb3k_state, dack0_w))
MCFG_I8257_OUT_DACK_1_CB(WRITELINE(myb3k_state, dack1_w)) MCFG_I8257_OUT_DACK_1_CB(WRITELINE(myb3k_state, dack1_w))
MCFG_I8257_OUT_DACK_2_CB(WRITELINE(myb3k_state, dack2_w)) MCFG_I8257_OUT_DACK_2_CB(WRITELINE(myb3k_state, dack2_w))
MCFG_I8257_OUT_DACK_3_CB(WRITELINE(myb3k_state, dack3_w)) MCFG_I8257_OUT_DACK_3_CB(WRITELINE(myb3k_state, dack3_w))
/* Timer chip */ /* Timer chip */
MCFG_DEVICE_ADD("pit", PIT8253, 0) MCFG_DEVICE_ADD("pit", PIT8253, 0)
@ -591,8 +591,8 @@ static MACHINE_CONFIG_START( myb3k )
MCFG_PIT8253_OUT0_HANDLER(DEVWRITELINE("pic", pic8259_device, ir0_w)) MCFG_PIT8253_OUT0_HANDLER(DEVWRITELINE("pic", pic8259_device, ir0_w))
MCFG_PIT8253_CLK1(XTAL_14_31818MHz / 12.0) /* speaker if port c bit 5 is low */ MCFG_PIT8253_CLK1(XTAL_14_31818MHz / 12.0) /* speaker if port c bit 5 is low */
MCFG_PIT8253_OUT1_HANDLER(WRITELINE(myb3k_state, pit_out1_changed)) MCFG_PIT8253_OUT1_HANDLER(WRITELINE(myb3k_state, pit_out1_changed))
// MCFG_PIT8253_CLK2(XTAL_14_31818MHz / 12.0) /* ANDed with port c bit 6 but marked as "not use"*/ // MCFG_PIT8253_CLK2(XTAL_14_31818MHz / 12.0) /* ANDed with port c bit 6 but marked as "not use"*/
// MCFG_PIT8253_OUT2_HANDLER(WRITELINE(myb3k_state, pit_out2_changed)) // MCFG_PIT8253_OUT2_HANDLER(WRITELINE(myb3k_state, pit_out2_changed))
/* sound hardware */ /* sound hardware */
MCFG_SPEAKER_STANDARD_MONO("mono") MCFG_SPEAKER_STANDARD_MONO("mono")
@ -600,7 +600,7 @@ static MACHINE_CONFIG_START( myb3k )
MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 1.00) MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 1.00)
MCFG_DEVICE_ADD("myb3k_keyboard", MYB3K_KEYBOARD, 0) MCFG_DEVICE_ADD("myb3k_keyboard", MYB3K_KEYBOARD, 0)
MCFG_MYB3K_KEYBOARD_CB(PUT(myb3k_state, kbd_set_data_and_interrupt)) MCFG_MYB3K_KEYBOARD_CB(PUT(myb3k_state, kbd_set_data_and_interrupt))
/* video hardware */ /* video hardware */
MCFG_SCREEN_ADD_MONOCHROME("screen", RASTER, rgb_t::green()) MCFG_SCREEN_ADD_MONOCHROME("screen", RASTER, rgb_t::green())

4
src/mame/drivers/novagf8.cpp
View File

@ -7,8 +7,8 @@
TODO: TODO:
- ccdelta1 doesn't work, goes bonkers when you press Enter. CPU core bug? - ccdelta1 doesn't work, goes bonkers when you press Enter. CPU core bug?
- hardware is similar to MK I, the drivers can be merged in theory. - hardware is similar to MK I, the drivers can be merged in theory.
But I prefer my source code to be licensed BSD3, mk1.cpp is GPL2. But I prefer my source code to be licensed BSD3, mk1.cpp is GPL2.
****************************************************************************** ******************************************************************************

72
src/mame/drivers/pgm2.cpp
View File

@ -49,43 +49,43 @@
Verify Sprite Zoom (check exactly which pixels are doubled / missed on hardware for flipped , non-flipped cases etc.) Verify Sprite Zoom (check exactly which pixels are doubled / missed on hardware for flipped , non-flipped cases etc.)
Fix Save States (is this a driver problem or an ARM core problem, they don't work unless you get through the startup tests) Fix Save States (is this a driver problem or an ARM core problem, they don't work unless you get through the startup tests)
Debug features (require DIP SW1:8 On and SW1:1 Off): Debug features (require DIP SW1:8 On and SW1:1 Off):
- QC TEST mode: hold P1 A+B during boot - QC TEST mode: hold P1 A+B during boot
- Debug/Cheat mode: hold P1 B+C during boot, when ingame pressing P1 Start skips to next location, where might be more unknown debug features. - Debug/Cheat mode: hold P1 B+C during boot, when ingame pressing P1 Start skips to next location, where might be more unknown debug features.
works for both currently dumped games (orleg2, kov2nl) works for both currently dumped games (orleg2, kov2nl)
Holographic Stickers Holographic Stickers
The IGS036 CPUs have holographic stickers on them, there is a number printed on each sticker but it doesn't seem connected to the The IGS036 CPUs have holographic stickers on them, there is a number printed on each sticker but it doesn't seem connected to the
game code / revision contained within, it might just be to mark the date the board was produced as it seems to coincide with the game code / revision contained within, it might just be to mark the date the board was produced as it seems to coincide with the
design of the hologram. For reference the ones being used for dumping are design of the hologram. For reference the ones being used for dumping are
Dodonpachi Daioujou Tamashi (China) - W10 Dodonpachi Daioujou Tamashi (China) - W10
King of Fighter 98 UMH (China) - C11 King of Fighter 98 UMH (China) - C11
Knights of Valour 2 (China) - V21 Knights of Valour 2 (China) - V21
Knights of Valour 3 (China) - V21 Knights of Valour 3 (China) - V21
Oriental Legend 2 (Oversea) - V21 Oriental Legend 2 (Oversea) - V21
Oriental Legend 2 (China) - A8 Oriental Legend 2 (China) - A8
GPU registers, located at 301200xx, 16bit access. GPU registers, located at 301200xx, 16bit access.
00 - bg scroll x 00 - bg scroll x
02 - bg scroll y 02 - bg scroll y
04 - zoom something, 0F-7F, default 1F 04 - zoom something, 0F-7F, default 1F
06 - zoom something, 0F-7F, default 1F 06 - zoom something, 0F-7F, default 1F
08 - fg scroll x 08 - fg scroll x
0a - fg scroll y 0a - fg scroll y
0e - resolution, 0 - low (kof98), 1 - high (rest of games) 0e - resolution, 0 - low (kof98), 1 - high (rest of games)
10 - ? orleg2 - 0x13, kov2nl, kof98 - 0x14 at init 10 - ? orleg2 - 0x13, kov2nl, kof98 - 0x14 at init
14 - sprite enable ? set to 0 before spriteram update, to 1 after 14 - sprite enable ? set to 0 before spriteram update, to 1 after
16 - enable access to vrams/palettes/etc ? (bitmask) 16 - enable access to vrams/palettes/etc ? (bitmask)
18 - vblank ack 18 - vblank ack
1a - ? 0 at init 1a - ? 0 at init
1c - ? orleg2 - 5, kov2nl, kof - 7 at init 1c - ? orleg2 - 5, kov2nl, kof - 7 at init
1e - ? 2 at init 1e - ? 2 at init
32 - shared RAM bank 32 - shared RAM bank
34, 36 - ? 0 at init, some unused xor feature ? 34, 36 - ? 0 at init, some unused xor feature ?
38, 3a - sprite mask xor key 38, 3a - sprite mask xor key
*/ */
@ -173,8 +173,8 @@ TIMER_DEVICE_CALLBACK_MEMBER(pgm2_state::igs_interrupt2)
void pgm2_state::mcu_command(address_space &space, bool is_command) void pgm2_state::mcu_command(address_space &space, bool is_command)
{ {
uint8_t cmd = m_mcu_regs[0] & 0xff; uint8_t cmd = m_mcu_regs[0] & 0xff;
// if (is_command && cmd != 0xf6) // if (is_command && cmd != 0xf6)
// logerror("MCU command %08x %08x\n", m_mcu_regs[0], m_mcu_regs[1]); // logerror("MCU command %08x %08x\n", m_mcu_regs[0], m_mcu_regs[1]);
if (is_command) if (is_command)
{ {
@ -187,7 +187,7 @@ void pgm2_state::mcu_command(address_space &space, bool is_command)
uint8_t arg3 = m_mcu_regs[0] >> 24; uint8_t arg3 = m_mcu_regs[0] >> 24;
switch (cmd) switch (cmd)
{ {
case 0xf6: // get result case 0xf6: // get result
m_mcu_regs[3] = m_mcu_result0; m_mcu_regs[3] = m_mcu_result0;
m_mcu_regs[4] = m_mcu_result1; m_mcu_regs[4] = m_mcu_result1;
m_mcu_last_cmd = 0; m_mcu_last_cmd = 0;
@ -304,7 +304,7 @@ void pgm2_state::mcu_command(address_space &space, bool is_command)
{ {
if (m_mcu_last_cmd) if (m_mcu_last_cmd)
{ {
m_mcu_regs[3] = (m_mcu_regs[3] & 0xff00ffff) | 0x00F20000; // set "command done and return data" status m_mcu_regs[3] = (m_mcu_regs[3] & 0xff00ffff) | 0x00F20000; // set "command done and return data" status
m_mcu_timer->adjust(attotime::from_usec(100)); m_mcu_timer->adjust(attotime::from_usec(100));
m_mcu_last_cmd = 0; m_mcu_last_cmd = 0;
} }

10
src/mame/drivers/prodigy.cpp
View File

@ -218,11 +218,11 @@ void prodigy_state::device_start()
using namespace std::placeholders; using namespace std::placeholders;
m_server->add_http_handler("/layout*", std::bind(&prodigy_state::on_update, this, _1, _2)); m_server->add_http_handler("/layout*", std::bind(&prodigy_state::on_update, this, _1, _2));
m_server->add_endpoint("/socket", m_server->add_endpoint("/socket",
std::bind(&prodigy_state::on_open, this, _1), std::bind(&prodigy_state::on_open, this, _1),
std::bind(&prodigy_state::on_message, this, _1, _2, _3), std::bind(&prodigy_state::on_message, this, _1, _2, _3),
std::bind(&prodigy_state::on_close, this, _1, _2, _3), std::bind(&prodigy_state::on_close, this, _1, _2, _3),
std::bind(&prodigy_state::on_error, this, _1, _2) std::bind(&prodigy_state::on_error, this, _1, _2)
); );
} }
#endif #endif
} }

36
src/mame/drivers/smsmcorp.cpp
View File

@ -848,30 +848,30 @@ ROM_END
ROM_START( sms4in1 ) ROM_START( sms4in1 )
ROM_REGION( 0x100000, "maincpu", 0 ) ROM_REGION( 0x100000, "maincpu", 0 )
ROM_LOAD( "set4_u19_2764.bin", 0xf8000, 0x02000, CRC(6f6116b9) SHA1(f91412ca9b911e2a822dab91c96e5f655e7ebb1b) ) ROM_LOAD( "set4_u19_2764.bin", 0xf8000, 0x02000, CRC(6f6116b9) SHA1(f91412ca9b911e2a822dab91c96e5f655e7ebb1b) )
ROM_LOAD( "set4_u18_2764.bin", 0xfa000, 0x02000, CRC(cc13a404) SHA1(1c00d173706c5e88cee69f9c52efa64dbdf4c15b) ) ROM_LOAD( "set4_u18_2764.bin", 0xfa000, 0x02000, CRC(cc13a404) SHA1(1c00d173706c5e88cee69f9c52efa64dbdf4c15b) )
ROM_LOAD( "set4_u17_2764.bin", 0xfc000, 0x02000, CRC(fee0f422) SHA1(56ffafce78cf96c0b91b44a8408909b06499c960) ) ROM_LOAD( "set4_u17_2764.bin", 0xfc000, 0x02000, CRC(fee0f422) SHA1(56ffafce78cf96c0b91b44a8408909b06499c960) )
ROM_LOAD( "set4_u16_2764.bin", 0xfe000, 0x02000, CRC(87ed2873) SHA1(daa13f20cac4a41335d972be6772dff5d7555c10) ) ROM_LOAD( "set4_u16_2764.bin", 0xfe000, 0x02000, CRC(87ed2873) SHA1(daa13f20cac4a41335d972be6772dff5d7555c10) )
ROM_COPY( "maincpu", 0xf8000, 0x08000, 0x8000 ) ROM_COPY( "maincpu", 0xf8000, 0x08000, 0x8000 )
ROM_REGION( 0x10000, "soundcpu", 0 ) ROM_REGION( 0x10000, "soundcpu", 0 )
ROM_LOAD( "set4_u26_73184_2732.bin", 0x0000, 0x1000, CRC(e04bb922) SHA1(1df90720f11a5b736273f43272d7727b3020f848) ) ROM_LOAD( "set4_u26_73184_2732.bin", 0x0000, 0x1000, CRC(e04bb922) SHA1(1df90720f11a5b736273f43272d7727b3020f848) )
ROM_RELOAD( 0x1000, 0x1000 ) ROM_RELOAD( 0x1000, 0x1000 )
ROM_END ROM_END
ROM_START( smsjoker ) ROM_START( smsjoker )
ROM_REGION( 0x100000, "maincpu", 0 ) ROM_REGION( 0x100000, "maincpu", 0 )
// U19 was not populated // U19 was not populated
ROM_LOAD( "set3_u18_hl_dlxe_080585.bin", 0xfa000, 0x02000, CRC(70614c00) SHA1(90c53e892ece4ceca0476be3653f160a49fd4bc9) ) ROM_LOAD( "set3_u18_hl_dlxe_080585.bin", 0xfa000, 0x02000, CRC(70614c00) SHA1(90c53e892ece4ceca0476be3653f160a49fd4bc9) )
ROM_LOAD( "set3_u17_hl_dlxe_080585.bin", 0xfc000, 0x02000, CRC(872fb1c4) SHA1(a23d093b26c42aa66279d6dfa6d59789f5862d96) ) ROM_LOAD( "set3_u17_hl_dlxe_080585.bin", 0xfc000, 0x02000, CRC(872fb1c4) SHA1(a23d093b26c42aa66279d6dfa6d59789f5862d96) )
ROM_LOAD( "set3_u16_hl_dlxe_080585.bin", 0xfe000, 0x02000, CRC(786c0792) SHA1(a7eea01c79b0d8baecdbda06ddbca40b39d8513a) ) ROM_LOAD( "set3_u16_hl_dlxe_080585.bin", 0xfe000, 0x02000, CRC(786c0792) SHA1(a7eea01c79b0d8baecdbda06ddbca40b39d8513a) )
ROM_COPY( "maincpu", 0xf8000, 0x08000, 0x8000 ) ROM_COPY( "maincpu", 0xf8000, 0x08000, 0x8000 )
ROM_REGION( 0x10000, "soundcpu", 0 ) ROM_REGION( 0x10000, "soundcpu", 0 )
ROM_LOAD( "set3_u26_26_73184_2732.bin", 0x0000, 0x1000, CRC(e04bb922) SHA1(1df90720f11a5b736273f43272d7727b3020f848) ) ROM_LOAD( "set3_u26_26_73184_2732.bin", 0x0000, 0x1000, CRC(e04bb922) SHA1(1df90720f11a5b736273f43272d7727b3020f848) )
ROM_RELOAD( 0x1000, 0x1000 ) ROM_RELOAD( 0x1000, 0x1000 )
ROM_END ROM_END

2
src/mame/includes/pgm2.h
View File

@ -115,7 +115,7 @@ private:
void common_encryption_init(); void common_encryption_init();
uint8_t m_encryption_table[0x100]; uint8_t m_encryption_table[0x100];
int m_has_decrypted; // so we only do it once. int m_has_decrypted; // so we only do it once.
uint32_t m_spritekey; uint32_t m_spritekey;
uint32_t m_realspritekey; uint32_t m_realspritekey;
int m_sprite_predecrypted; int m_sprite_predecrypted;

4
src/mame/layout/checkma5.lay
View File

@ -340,7 +340,7 @@
<bounds x="1.09" y="3.28" width="0.31" height="0.24" /> <bounds x="1.09" y="3.28" width="0.31" height="0.24" />
</bezel> </bezel>
<bezel name="lamp4" element="BET3" inputtag="P1" inputmask="0x10"> <bezel name="lamp4" element="BET3" inputtag="P1" inputmask="0x10">
<bounds x="1.51" y="3.28" width="0.31" height="0.24" /> <bounds x="1.51" y="3.28" width="0.31" height="0.24" />
</bezel> </bezel>
<bezel name="lamp3" element="BET4" inputtag="P1" inputmask="0x08"> <bezel name="lamp3" element="BET4" inputtag="P1" inputmask="0x08">
<bounds x="1.91" y="3.28" width="0.31" height="0.24" /> <bounds x="1.91" y="3.28" width="0.31" height="0.24" />
@ -405,7 +405,7 @@
<bounds x="1.09" y="3.28" width="0.31" height="0.24" /> <bounds x="1.09" y="3.28" width="0.31" height="0.24" />
</bezel> </bezel>
<bezel name="lamp4" element="BET3" inputtag="P1" inputmask="0x10"> <bezel name="lamp4" element="BET3" inputtag="P1" inputmask="0x10">
<bounds x="1.51" y="3.28" width="0.31" height="0.24" /> <bounds x="1.51" y="3.28" width="0.31" height="0.24" />
</bezel> </bezel>
<bezel name="lamp3" element="BET5" inputtag="P1" inputmask="0x08"> <bezel name="lamp3" element="BET5" inputtag="P1" inputmask="0x08">
<bounds x="1.91" y="3.28" width="0.31" height="0.24" /> <bounds x="1.91" y="3.28" width="0.31" height="0.24" />

4
src/mame/machine/apollo.cpp
View File

@ -1316,8 +1316,8 @@ void apollo_stdio_device::device_reset()
void apollo_stdio_device::device_timer(emu_timer &timer, device_timer_id id, void apollo_stdio_device::device_timer(emu_timer &timer, device_timer_id id,
int param, void *ptr) int param, void *ptr)
{ {
// FIXME? // FIXME?
// device_serial_interface::device_timer(timer, id, param, ptr); // device_serial_interface::device_timer(timer, id, param, ptr);
} }
void apollo_stdio_device::rcv_complete() // Rx completed receiving byte void apollo_stdio_device::rcv_complete() // Rx completed receiving byte

2
src/mame/machine/pgm2_memcard.cpp
View File

@ -5,7 +5,7 @@
pgm2_memcard.cpp pgm2_memcard.cpp
PGM2 Memory card functions. PGM2 Memory card functions.
Presumable Siemens SLE 4442 or compatible. Presumably Siemens SLE 4442 or compatible.
*********************************************************************/ *********************************************************************/

2
src/mame/machine/pgm2_memcard.h
View File

@ -5,7 +5,7 @@
pgm2_memcard.h pgm2_memcard.h
PGM2 Memory card functions. PGM2 Memory card functions.
(based on ng_memcard.h) (based on ng_memcard.h)
*********************************************************************/ *********************************************************************/
#ifndef MAME_MACHINE_PGM2_MEMCARD_H #ifndef MAME_MACHINE_PGM2_MEMCARD_H

4
src/mame/mame.lst
View File

@ -10642,7 +10642,7 @@ pokoachu // (c) 1999
renaimj // (c) 1999 renaimj // (c) 1999
sengomjk // (c) 1998 sengomjk // (c) 1998
thenanpa // (c) 1999 thenanpa // (c) 1999
torarech // (c) 2000 torarech // (c) 2000
tsuwaku // (c) 2000 tsuwaku // (c) 2000
@source:cswat.cpp @source:cswat.cpp
@ -31364,7 +31364,7 @@ orleg2_101 //
orleg2_104cn // orleg2_104cn //
orleg2_103cn // orleg2_103cn //
orleg2_101cn // orleg2_101cn //
kof98umh // (c) 2009 kof98umh // (c) 2009
@source:pgm3.cpp @source:pgm3.cpp
kov3hd kov3hd

8
src/tools/unidasm.cpp
View File

@ -315,15 +315,15 @@ static const dasm_table_entry dasm_table[] =
{ "dsp32c", le, 0, []() -> util::disasm_interface * { return new dsp32c_disassembler; } }, { "dsp32c", le, 0, []() -> util::disasm_interface * { return new dsp32c_disassembler; } },
{ "dsp56k", le, -1, []() -> util::disasm_interface * { return new dsp56k_disassembler; } }, { "dsp56k", le, -1, []() -> util::disasm_interface * { return new dsp56k_disassembler; } },
{ "e0c6200", be, -1, []() -> util::disasm_interface * { return new e0c6200_disassembler; } }, { "e0c6200", be, -1, []() -> util::disasm_interface * { return new e0c6200_disassembler; } },
// { "es5510", be, 0, []() -> util::disasm_interface * { return new es5510_disassembler; } }, // Currently does nothing // { "es5510", be, 0, []() -> util::disasm_interface * { return new es5510_disassembler; } }, // Currently does nothing
{ "esrip", be, 0, []() -> util::disasm_interface * { return new esrip_disassembler; } }, { "esrip", be, 0, []() -> util::disasm_interface * { return new esrip_disassembler; } },
{ "f8", le, 0, []() -> util::disasm_interface * { return new f8_disassembler; } }, { "f8", le, 0, []() -> util::disasm_interface * { return new f8_disassembler; } },
{ "g65816", le, 0, []() -> util::disasm_interface * { return new g65816_disassembler(&g65816_unidasm); } }, { "g65816", le, 0, []() -> util::disasm_interface * { return new g65816_disassembler(&g65816_unidasm); } },
{ "h6280", le, 0, []() -> util::disasm_interface * { return new h6280_disassembler; } }, { "h6280", le, 0, []() -> util::disasm_interface * { return new h6280_disassembler; } },
{ "h8", be, 0, []() -> util::disasm_interface * { return new h8_disassembler; } }, { "h8", be, 0, []() -> util::disasm_interface * { return new h8_disassembler; } },
{ "h8h", be, 0, []() -> util::disasm_interface * { return new h8h_disassembler; } }, { "h8h", be, 0, []() -> util::disasm_interface * { return new h8h_disassembler; } },
{ "h8s2000", be, 0, []() -> util::disasm_interface * { return new h8s2000_disassembler; } }, { "h8s2000", be, 0, []() -> util::disasm_interface * { return new h8s2000_disassembler; } },
{ "h8s2600", be, 0, []() -> util::disasm_interface * { return new h8s2600_disassembler; } }, { "h8s2600", be, 0, []() -> util::disasm_interface * { return new h8s2600_disassembler; } },
{ "hc11", le, 0, []() -> util::disasm_interface * { return new hc11_disassembler; } }, { "hc11", le, 0, []() -> util::disasm_interface * { return new hc11_disassembler; } },
{ "hcd62121", le, 0, []() -> util::disasm_interface * { return new hcd62121_disassembler; } }, { "hcd62121", le, 0, []() -> util::disasm_interface * { return new hcd62121_disassembler; } },
{ "hd61700", le, 0, []() -> util::disasm_interface * { return new hd61700_disassembler; } }, { "hd61700", le, 0, []() -> util::disasm_interface * { return new hd61700_disassembler; } },