mirror of
https://github.com/holub/mame
synced 2025-04-21 16:01:56 +03:00
drivers starting with r: removed read and write macros (nw)
This commit is contained in:
Ivan Vangelista
parent
284f196df1
commit
25fae739bc
@ -231,9 +231,9 @@ void redbaron_sound_device::sounds_w(uint8_t data)
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#ifdef UNUSED_FUNCTION
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WRITE8_MEMBER( redbaron_sound_device::pokey_w )
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void redbaron_sound_device::pokey_w(offs_t offset, uint8_t data)
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{
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if( m_latch & 0x20 )
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pokey_w(device, offset, data);
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m_pokey->write(offset, data);
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}
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#endif
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@ -76,7 +76,7 @@ void rampart_state::machine_reset()
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*
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*************************************/
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WRITE16_MEMBER(rampart_state::latch_w)
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void rampart_state::latch_w(offs_t offset, uint16_t data, uint16_t mem_mask)
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{
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/* bit layout in this register:
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@ -332,7 +332,7 @@ Stephh's notes (based on the game M68000 code and some tests) :
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#include "speaker.h"
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WRITE16_MEMBER(rbisland_state::jumping_sound_w)
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void rbisland_state::jumping_sound_w(offs_t offset, uint16_t data, uint16_t mem_mask)
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{
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if (ACCESSING_BITS_0_7)
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{
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@ -406,7 +406,7 @@ void rbisland_state::bankswitch_w(uint8_t data)
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membank("bank1")->set_entry(data & 3);
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}
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READ8_MEMBER(rbisland_state::jumping_latch_r)
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uint8_t rbisland_state::jumping_latch_r()
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{
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return m_jumping_latch;
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}
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@ -31,12 +31,12 @@ TODO:
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#include "speaker.h"
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WRITE8_MEMBER( redclash_state::irqack_w )
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void redclash_state::irqack_w(uint8_t data)
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{
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m_maincpu->set_input_line(0, CLEAR_LINE);
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}
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template <unsigned B> WRITE8_MEMBER(redclash_state::star_w)
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template <unsigned B> void redclash_state::star_w(uint8_t data)
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{
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m_stars->set_speed(BIT(data, 0) << B, 1U << B);
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}
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@ -99,7 +99,7 @@ void relief_state::machine_reset()
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*
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*************************************/
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READ16_MEMBER(relief_state::special_port2_r)
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uint16_t relief_state::special_port2_r()
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{
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int result = ioport("260010")->read();
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if (!(result & 0x0080) || m_screen->hblank()) result ^= 0x0001;
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@ -114,7 +114,7 @@ READ16_MEMBER(relief_state::special_port2_r)
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*
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*************************************/
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WRITE16_MEMBER(relief_state::audio_control_w)
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void relief_state::audio_control_w(offs_t offset, uint16_t data, uint16_t mem_mask)
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{
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if (ACCESSING_BITS_0_7)
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{
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@ -129,7 +129,7 @@ WRITE16_MEMBER(relief_state::audio_control_w)
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}
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WRITE16_MEMBER(relief_state::audio_volume_w)
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void relief_state::audio_volume_w(offs_t offset, uint16_t data, uint16_t mem_mask)
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{
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if (ACCESSING_BITS_0_7)
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{
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@ -133,13 +133,13 @@ $8000 - $ffff ROM
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** playback to work, but seems to be what the code expects
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*/
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WRITE8_MEMBER(renegade_state::adpcm_start_w)
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void renegade_state::adpcm_start_w(uint8_t data)
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{
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m_msm->reset_w(0);
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m_adpcm_playing = true;
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}
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WRITE8_MEMBER(renegade_state::adpcm_addr_w)
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void renegade_state::adpcm_addr_w(uint8_t data)
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{
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// table at $CB52 in audiocpu program:
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// 38 38 39 3A 3B 34 35 36 37 2C 2D 2E 2F
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@ -159,7 +159,7 @@ WRITE8_MEMBER(renegade_state::adpcm_addr_w)
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m_adpcm_end = m_adpcm_pos + 0x2000 * 2;
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}
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WRITE8_MEMBER(renegade_state::adpcm_stop_w)
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void renegade_state::adpcm_stop_w(uint8_t data)
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{
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m_msm->reset_w(1);
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m_adpcm_playing = false;
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@ -199,7 +199,7 @@ void renegade_state::machine_start()
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***************************************************************************/
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READ8_MEMBER(renegade_state::mcu_reset_r)
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uint8_t renegade_state::mcu_reset_r()
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{
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if (!machine().side_effects_disabled())
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{
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@ -225,7 +225,7 @@ CUSTOM_INPUT_MEMBER(renegade_state::mcu_status_r)
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/********************************************************************************************/
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WRITE8_MEMBER(renegade_state::bankswitch_w)
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void renegade_state::bankswitch_w(uint8_t data)
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{
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m_rombank->set_entry(data & 1);
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}
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@ -239,12 +239,12 @@ TIMER_DEVICE_CALLBACK_MEMBER(renegade_state::interrupt)
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m_maincpu->set_input_line(INPUT_LINE_NMI, ASSERT_LINE);
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}
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WRITE8_MEMBER(renegade_state::nmi_ack_w)
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void renegade_state::nmi_ack_w(uint8_t data)
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{
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m_maincpu->set_input_line(INPUT_LINE_NMI, CLEAR_LINE);
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}
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WRITE8_MEMBER(renegade_state::irq_ack_w)
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void renegade_state::irq_ack_w(uint8_t data)
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{
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if (data != 0xff)
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{
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@ -121,12 +121,12 @@ void retofinv_state::machine_start()
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save_item(NAME(m_cpu2_m6000));
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}
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WRITE8_MEMBER(retofinv_state::cpu2_m6000_w)
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void retofinv_state::cpu2_m6000_w(uint8_t data)
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{
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m_cpu2_m6000 = data;
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}
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READ8_MEMBER(retofinv_state::cpu0_mf800_r)
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uint8_t retofinv_state::cpu0_mf800_r()
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{
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return m_cpu2_m6000;
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}
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@ -145,7 +145,7 @@ WRITE_LINE_MEMBER(retofinv_state::irq1_ack_w)
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m_subcpu->set_input_line(0, CLEAR_LINE);
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}
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WRITE8_MEMBER(retofinv_state::coincounter_w)
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void retofinv_state::coincounter_w(uint8_t data)
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{
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machine().bookkeeping().coin_counter_w(0, data & 1);
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}
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@ -155,7 +155,7 @@ WRITE_LINE_MEMBER(retofinv_state::coinlockout_w)
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machine().bookkeeping().coin_lockout_w(0, !state);
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}
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READ8_MEMBER(retofinv_state::mcu_status_r)
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uint8_t retofinv_state::mcu_status_r()
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{
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/* bit 4 = when 1, mcu is ready to receive data from main cpu */
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/* bit 5 = when 1, mcu has sent data to the main cpu */
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@ -76,17 +76,17 @@ player - when there's nothing to play - first, empty 2k of ROMs are selected.
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#define RLT_TIMER_FREQ (RLT_REFRESH_RATE*256)
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#define RLT_XTAL XTAL(12'000'000)
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READ16_MEMBER(rltennis_state::io_r)
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uint16_t rltennis_state::io_r()
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{
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return (ioport("P1" )->read()&0x1fff) | (m_unk_counter<<13); /* top 3 bits controls smaple address update */
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}
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WRITE16_MEMBER(rltennis_state::snd1_w)
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void rltennis_state::snd1_w(offs_t offset, uint16_t data, uint16_t mem_mask)
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{
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COMBINE_DATA(&m_data760000);
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}
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WRITE16_MEMBER(rltennis_state::snd2_w)
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void rltennis_state::snd2_w(offs_t offset, uint16_t data, uint16_t mem_mask)
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{
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COMBINE_DATA(&m_data740000);
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}
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@ -67,7 +67,7 @@ WRITE_LINE_MEMBER(rockrage_state::vblank_irq)
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m_maincpu->set_input_line(HD6309_IRQ_LINE, HOLD_LINE);
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}
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WRITE8_MEMBER(rockrage_state::rockrage_bankswitch_w)
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void rockrage_state::rockrage_bankswitch_w(uint8_t data)
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{
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/* bits 4-6 = bank number */
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m_rombank->set_entry((data & 0x70) >> 4);
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@ -79,18 +79,18 @@ WRITE8_MEMBER(rockrage_state::rockrage_bankswitch_w)
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/* other bits unknown */
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}
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WRITE8_MEMBER(rockrage_state::rockrage_sh_irqtrigger_w)
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void rockrage_state::rockrage_sh_irqtrigger_w(uint8_t data)
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{
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m_soundlatch->write(data);
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m_audiocpu->set_input_line(M6809_IRQ_LINE, HOLD_LINE);
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}
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READ8_MEMBER(rockrage_state::rockrage_VLM5030_busy_r)
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uint8_t rockrage_state::rockrage_VLM5030_busy_r()
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{
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return (m_vlm->bsy() ? 1 : 0);
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}
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WRITE8_MEMBER(rockrage_state::rockrage_speech_w)
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void rockrage_state::rockrage_speech_w(uint8_t data)
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{
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/* bit2 = data bus enable */
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m_vlm->rst((data >> 1) & 0x01);
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@ -30,7 +30,7 @@
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*************************************/
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/* Roc'n'Rope has the IRQ vectors in RAM. The rom contains $FFFF at this address! */
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WRITE8_MEMBER(rocnrope_state::rocnrope_interrupt_vector_w)
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void rocnrope_state::rocnrope_interrupt_vector_w(offs_t offset, uint8_t data)
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{
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uint8_t *RAM = memregion("maincpu")->base();
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@ -24,7 +24,7 @@
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#include "speaker.h"
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WRITE8_MEMBER(rollerg_state::rollerg_0010_w)
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void rollerg_state::rollerg_0010_w(uint8_t data)
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{
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logerror("%04x: write %02x to 0010\n",m_maincpu->pc(), data);
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@ -41,7 +41,7 @@ WRITE8_MEMBER(rollerg_state::rollerg_0010_w)
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/* other bits unknown */
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}
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READ8_MEMBER(rollerg_state::rollerg_k051316_r)
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uint8_t rollerg_state::rollerg_k051316_r(offs_t offset)
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{
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if (m_readzoomroms)
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return m_k051316->rom_r(offset);
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@ -49,7 +49,7 @@ READ8_MEMBER(rollerg_state::rollerg_k051316_r)
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return m_k051316->read(offset);
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}
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WRITE8_MEMBER(rollerg_state::soundirq_w)
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void rollerg_state::soundirq_w(uint8_t data)
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{
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m_audiocpu->set_input_line_and_vector(0, HOLD_LINE, 0xff); // Z80
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}
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@ -66,13 +66,13 @@ void rollerg_state::device_timer(emu_timer &timer, device_timer_id id, int param
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}
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}
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WRITE8_MEMBER(rollerg_state::sound_arm_nmi_w)
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void rollerg_state::sound_arm_nmi_w(uint8_t data)
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{
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m_audiocpu->set_input_line(INPUT_LINE_NMI, CLEAR_LINE);
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m_nmi_timer->adjust(attotime::from_usec(50)); /* kludge until the K053260 is emulated correctly */
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}
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READ8_MEMBER(rollerg_state::pip_r)
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uint8_t rollerg_state::pip_r()
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{
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return 0x7f;
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}
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@ -34,12 +34,12 @@ void rollrace_state::machine_start()
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save_item(NAME(m_sound_nmi_mask));
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}
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READ8_MEMBER(rollrace_state::fake_d800_r)
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uint8_t rollrace_state::fake_d800_r()
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{
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return 0x51;
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}
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WRITE8_MEMBER(rollrace_state::fake_d800_w)
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void rollrace_state::fake_d800_w(uint8_t data)
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{
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/* logerror("d900: %02X\n",data);*/
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}
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@ -51,7 +51,7 @@ WRITE_LINE_MEMBER(rollrace_state::nmi_mask_w)
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m_maincpu->set_input_line(INPUT_LINE_NMI, CLEAR_LINE);
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}
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WRITE8_MEMBER(rollrace_state::sound_nmi_mask_w)
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void rollrace_state::sound_nmi_mask_w(uint8_t data)
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{
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m_sound_nmi_mask = data & 1;
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}
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@ -49,7 +49,7 @@ void runaway_state::machine_reset()
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}
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READ8_MEMBER(runaway_state::runaway_input_r)
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uint8_t runaway_state::runaway_input_r(offs_t offset)
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{
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uint8_t val = 0;
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@ -72,18 +72,18 @@ uint8_t runaway_state::runaway_pot_r(offs_t offset)
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}
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WRITE8_MEMBER(runaway_state::runaway_irq_ack_w)
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void runaway_state::runaway_irq_ack_w(uint8_t data)
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{
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m_maincpu->set_input_line(0, CLEAR_LINE);
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}
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READ8_MEMBER(runaway_state::earom_read)
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uint8_t runaway_state::earom_read()
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{
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return m_earom->data();
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}
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WRITE8_MEMBER(runaway_state::earom_write)
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void runaway_state::earom_write(offs_t offset, uint8_t data)
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{
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m_earom->set_address(offset & 0x3f);
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m_earom->set_data(data);
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@ -50,7 +50,7 @@
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READ16_MEMBER(rungun_state::sysregs_r)
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uint16_t rungun_state::sysregs_r(offs_t offset, uint16_t mem_mask)
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{
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uint16_t data = 0;
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@ -86,7 +86,7 @@ READ16_MEMBER(rungun_state::sysregs_r)
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return m_sysreg[offset];
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}
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WRITE16_MEMBER(rungun_state::sysregs_w)
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void rungun_state::sysregs_w(offs_t offset, uint16_t data, uint16_t mem_mask)
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{
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COMBINE_DATA(m_sysreg + offset);
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@ -136,7 +136,7 @@ WRITE16_MEMBER(rungun_state::sysregs_w)
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}
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}
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WRITE16_MEMBER(rungun_state::sound_irq_w)
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void rungun_state::sound_irq_w(offs_t offset, uint16_t data, uint16_t mem_mask)
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{
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if (ACCESSING_BITS_8_15)
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m_soundcpu->set_input_line(0, HOLD_LINE);
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@ -152,7 +152,7 @@ INTERRUPT_GEN_MEMBER(rungun_state::rng_interrupt)
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device.execute().set_input_line(M68K_IRQ_5, ASSERT_LINE);
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}
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READ8_MEMBER(rungun_state::k53936_rom_r)
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uint8_t rungun_state::k53936_rom_r(offs_t offset)
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{
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// TODO: odd addresses returns ...?
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uint32_t rom_addr = offset;
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@ -160,12 +160,12 @@ READ8_MEMBER(rungun_state::k53936_rom_r)
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return m_roz_rom[rom_addr];
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}
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READ16_MEMBER(rungun_state::palette_read)
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uint16_t rungun_state::palette_read(offs_t offset)
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{
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return m_pal_ram[offset + m_video_mux_bank*0x800/2];
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}
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WRITE16_MEMBER(rungun_state::palette_write)
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void rungun_state::palette_write(offs_t offset, uint16_t data, uint16_t mem_mask)
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{
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palette_device &cur_paldevice = m_video_mux_bank == 0 ? *m_palette : *m_palette2;
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uint32_t addr = offset + m_video_mux_bank*0x800/2;
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@ -204,12 +204,12 @@ void rungun_state::rungun_map(address_map &map)
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/**********************************************************************************/
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WRITE8_MEMBER(rungun_state::sound_status_w)
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void rungun_state::sound_status_w(uint8_t data)
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{
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m_sound_status = data;
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}
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WRITE8_MEMBER(rungun_state::sound_ctrl_w)
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void rungun_state::sound_ctrl_w(uint8_t data)
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{
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/*
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.... xxxx - Z80 ROM bank
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@ -54,7 +54,7 @@ protected:
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uint32_t screen_update_common(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect, uint16_t *scrollregs);
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DECLARE_WRITE16_MEMBER(raiden_text_w);
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void raiden_text_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0);
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void common_video_start();
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@ -73,9 +73,9 @@ protected:
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tilemap_t *m_fg_layer;
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tilemap_t *m_tx_layer;
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DECLARE_WRITE16_MEMBER(raiden_background_w);
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DECLARE_WRITE16_MEMBER(raiden_foreground_w);
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DECLARE_WRITE8_MEMBER(raiden_control_w);
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void raiden_background_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0);
|
||||
void raiden_foreground_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0);
|
||||
void raiden_control_w(uint8_t data);
|
||||
|
||||
TILE_GET_INFO_MEMBER(get_back_tile_info);
|
||||
TILE_GET_INFO_MEMBER(get_fore_tile_info);
|
||||
@ -113,7 +113,7 @@ private:
|
||||
|
||||
uint32_t screen_update_raidenb(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect);
|
||||
|
||||
DECLARE_WRITE8_MEMBER(raidenb_control_w);
|
||||
void raidenb_control_w(uint8_t data);
|
||||
void raidenb_layer_enable_w(uint16_t data);
|
||||
void raidenb_layer_scroll_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0);
|
||||
|
||||
|
||||
@ -42,7 +42,7 @@ protected:
|
||||
private:
|
||||
TIMER_DEVICE_CALLBACK_MEMBER(scanline_interrupt);
|
||||
void scanline_int_ack_w(uint16_t data);
|
||||
DECLARE_WRITE16_MEMBER(latch_w);
|
||||
void latch_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0);
|
||||
uint32_t screen_update_rampart(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect);
|
||||
void rampart_bitmap_render(bitmap_ind16 &bitmap, const rectangle &cliprect);
|
||||
|
||||
|
||||
@ -45,15 +45,9 @@ protected:
|
||||
virtual void machine_start() override;
|
||||
|
||||
private:
|
||||
DECLARE_WRITE16_MEMBER(jumping_sound_w);
|
||||
DECLARE_READ8_MEMBER(jumping_latch_r);
|
||||
DECLARE_WRITE16_MEMBER(rbisland_cchip_ctrl_w);
|
||||
DECLARE_WRITE16_MEMBER(rbisland_cchip_bank_w);
|
||||
DECLARE_WRITE16_MEMBER(rbisland_cchip_ram_w);
|
||||
DECLARE_READ16_MEMBER(rbisland_cchip_ctrl_r);
|
||||
DECLARE_READ16_MEMBER(rbisland_cchip_ram_r);
|
||||
DECLARE_WRITE16_MEMBER(rbisland_spritectrl_w);
|
||||
DECLARE_WRITE16_MEMBER(jumping_spritectrl_w);
|
||||
void jumping_sound_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0);
|
||||
uint8_t jumping_latch_r();
|
||||
void jumping_spritectrl_w(offs_t offset, uint16_t data);
|
||||
void bankswitch_w(uint8_t data);
|
||||
void counters_w(uint8_t data);
|
||||
DECLARE_VIDEO_START(jumping);
|
||||
|
||||
@ -113,7 +113,7 @@ private:
|
||||
void get_redalert_pens(pen_t *pens);
|
||||
void get_panther_pens(pen_t *pens);
|
||||
void get_demoneye_pens(pen_t *pens);
|
||||
WRITE8_MEMBER(demoneye_bitmap_layer_w);
|
||||
void demoneye_bitmap_layer_w(offs_t offset, uint8_t data);
|
||||
void demoneye_bitmap_ypos_w(u8 data);
|
||||
|
||||
virtual void sound_start() override;
|
||||
|
||||
@ -44,12 +44,12 @@ protected:
|
||||
|
||||
private:
|
||||
DECLARE_WRITE_LINE_MEMBER(screen_vblank);
|
||||
DECLARE_WRITE8_MEMBER(videoram_w);
|
||||
DECLARE_WRITE8_MEMBER(gfxbank_w);
|
||||
DECLARE_WRITE8_MEMBER(flipscreen_w);
|
||||
DECLARE_WRITE8_MEMBER(irqack_w);
|
||||
DECLARE_WRITE8_MEMBER(star_reset_w);
|
||||
template <unsigned B> DECLARE_WRITE8_MEMBER(star_w);
|
||||
void videoram_w(offs_t offset, uint8_t data);
|
||||
void gfxbank_w(uint8_t data);
|
||||
void flipscreen_w(uint8_t data);
|
||||
void irqack_w(uint8_t data);
|
||||
void star_reset_w(uint8_t data);
|
||||
template <unsigned B> void star_w(uint8_t data);
|
||||
void palette(palette_device &palette) const;
|
||||
TILE_GET_INFO_MEMBER(get_fg_tile_info);
|
||||
|
||||
|
||||
@ -38,9 +38,9 @@ public:
|
||||
private:
|
||||
virtual void machine_reset() override;
|
||||
virtual void video_start() override;
|
||||
DECLARE_READ16_MEMBER(special_port2_r);
|
||||
DECLARE_WRITE16_MEMBER(audio_control_w);
|
||||
DECLARE_WRITE16_MEMBER(audio_volume_w);
|
||||
uint16_t special_port2_r();
|
||||
void audio_control_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0);
|
||||
void audio_volume_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0);
|
||||
TILE_GET_INFO_MEMBER(get_playfield_tile_info);
|
||||
TILE_GET_INFO_MEMBER(get_playfield2_tile_info);
|
||||
uint32_t screen_update_relief(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect);
|
||||
|
||||
@ -69,18 +69,18 @@ private:
|
||||
tilemap_t *m_bg_tilemap;
|
||||
tilemap_t *m_fg_tilemap;
|
||||
|
||||
DECLARE_READ8_MEMBER(mcu_reset_r);
|
||||
DECLARE_WRITE8_MEMBER(bankswitch_w);
|
||||
DECLARE_WRITE8_MEMBER(irq_ack_w);
|
||||
DECLARE_WRITE8_MEMBER(nmi_ack_w);
|
||||
DECLARE_WRITE8_MEMBER(fg_videoram_w);
|
||||
DECLARE_WRITE8_MEMBER(bg_videoram_w);
|
||||
DECLARE_WRITE8_MEMBER(flipscreen_w);
|
||||
DECLARE_WRITE8_MEMBER(scroll_lsb_w);
|
||||
DECLARE_WRITE8_MEMBER(scroll_msb_w);
|
||||
DECLARE_WRITE8_MEMBER(adpcm_start_w);
|
||||
DECLARE_WRITE8_MEMBER(adpcm_addr_w);
|
||||
DECLARE_WRITE8_MEMBER(adpcm_stop_w);
|
||||
uint8_t mcu_reset_r();
|
||||
void bankswitch_w(uint8_t data);
|
||||
void irq_ack_w(uint8_t data);
|
||||
void nmi_ack_w(uint8_t data);
|
||||
void fg_videoram_w(offs_t offset, uint8_t data);
|
||||
void bg_videoram_w(offs_t offset, uint8_t data);
|
||||
void flipscreen_w(uint8_t data);
|
||||
void scroll_lsb_w(uint8_t data);
|
||||
void scroll_msb_w(uint8_t data);
|
||||
void adpcm_start_w(uint8_t data);
|
||||
void adpcm_addr_w(uint8_t data);
|
||||
void adpcm_stop_w(uint8_t data);
|
||||
DECLARE_WRITE_LINE_MEMBER(adpcm_int);
|
||||
|
||||
TILE_GET_INFO_MEMBER(get_bg_tilemap_info);
|
||||
|
||||
@ -38,16 +38,16 @@ protected:
|
||||
virtual void video_start() override;
|
||||
|
||||
private:
|
||||
DECLARE_WRITE8_MEMBER(cpu2_m6000_w);
|
||||
DECLARE_READ8_MEMBER(cpu0_mf800_r);
|
||||
void cpu2_m6000_w(uint8_t data);
|
||||
uint8_t cpu0_mf800_r();
|
||||
DECLARE_WRITE_LINE_MEMBER(irq0_ack_w);
|
||||
DECLARE_WRITE_LINE_MEMBER(irq1_ack_w);
|
||||
DECLARE_WRITE8_MEMBER(coincounter_w);
|
||||
void coincounter_w(uint8_t data);
|
||||
DECLARE_WRITE_LINE_MEMBER(coinlockout_w);
|
||||
DECLARE_READ8_MEMBER(mcu_status_r);
|
||||
DECLARE_WRITE8_MEMBER(bg_videoram_w);
|
||||
DECLARE_WRITE8_MEMBER(fg_videoram_w);
|
||||
DECLARE_WRITE8_MEMBER(gfx_ctrl_w);
|
||||
uint8_t mcu_status_r();
|
||||
void bg_videoram_w(offs_t offset, uint8_t data);
|
||||
void fg_videoram_w(offs_t offset, uint8_t data);
|
||||
void gfx_ctrl_w(offs_t offset, uint8_t data);
|
||||
|
||||
TILEMAP_MAPPER_MEMBER(tilemap_scan);
|
||||
TILE_GET_INFO_MEMBER(bg_get_tile_info);
|
||||
|
||||
@ -39,10 +39,10 @@ private:
|
||||
std::unique_ptr<bitmap_ind16> m_tmp_bitmap[RLT_NUM_BITMAPS];
|
||||
emu_timer *m_timer;
|
||||
|
||||
DECLARE_READ16_MEMBER(io_r);
|
||||
DECLARE_WRITE16_MEMBER(snd1_w);
|
||||
DECLARE_WRITE16_MEMBER(snd2_w);
|
||||
DECLARE_WRITE16_MEMBER(blitter_w);
|
||||
uint16_t io_r();
|
||||
void snd1_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0);
|
||||
void snd2_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0);
|
||||
void blitter_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0);
|
||||
|
||||
virtual void machine_start() override;
|
||||
virtual void machine_reset() override;
|
||||
|
||||
@ -115,24 +115,24 @@ private:
|
||||
optional_device<floppy_connector> m_floppy0;
|
||||
optional_device<floppy_connector> m_floppy1;
|
||||
|
||||
DECLARE_WRITE8_MEMBER( port_write );
|
||||
DECLARE_READ8_MEMBER( port_read );
|
||||
DECLARE_WRITE8_MEMBER( port_write_1b00 );
|
||||
DECLARE_READ8_MEMBER( port_read_1b00 );
|
||||
void port_write(offs_t offset, uint8_t data);
|
||||
uint8_t port_read(offs_t offset);
|
||||
void port_write_1b00(offs_t offset, uint8_t data);
|
||||
uint8_t port_read_1b00(offs_t offset);
|
||||
|
||||
DECLARE_READ8_MEMBER( videoram_read );
|
||||
DECLARE_WRITE8_MEMBER( videoram_write );
|
||||
uint8_t videoram_read(offs_t offset);
|
||||
void videoram_write(offs_t offset, uint8_t data);
|
||||
|
||||
uint8_t hiram[0x1000];
|
||||
DECLARE_READ8_MEMBER( hiram_read );
|
||||
DECLARE_WRITE8_MEMBER( hiram_write );
|
||||
uint8_t hiram_read(offs_t offset);
|
||||
void hiram_write(offs_t offset, uint8_t data);
|
||||
|
||||
DECLARE_READ8_MEMBER( rm380z_portlow_r );
|
||||
DECLARE_WRITE8_MEMBER( rm380z_portlow_w );
|
||||
DECLARE_READ8_MEMBER( rm380z_porthi_r );
|
||||
DECLARE_WRITE8_MEMBER( rm380z_porthi_w );
|
||||
uint8_t rm380z_portlow_r();
|
||||
void rm380z_portlow_w(offs_t offset, uint8_t data);
|
||||
uint8_t rm380z_porthi_r();
|
||||
void rm380z_porthi_w(offs_t offset, uint8_t data);
|
||||
|
||||
DECLARE_WRITE8_MEMBER(disk_0_control);
|
||||
void disk_0_control(uint8_t data);
|
||||
|
||||
void keyboard_put(u8 data);
|
||||
|
||||
|
||||
@ -127,27 +127,27 @@ private:
|
||||
uint8_t m_eeprom_bits;
|
||||
uint8_t m_eeprom_state;
|
||||
|
||||
DECLARE_READ8_MEMBER(nimbus_mcu_r);
|
||||
DECLARE_WRITE8_MEMBER(nimbus_mcu_w);
|
||||
DECLARE_READ8_MEMBER(scsi_r);
|
||||
DECLARE_WRITE8_MEMBER(scsi_w);
|
||||
DECLARE_WRITE8_MEMBER(fdc_ctl_w);
|
||||
uint8_t nimbus_mcu_r();
|
||||
void nimbus_mcu_w(uint8_t data);
|
||||
uint8_t scsi_r(offs_t offset);
|
||||
void scsi_w(offs_t offset, uint8_t data);
|
||||
void fdc_ctl_w(uint8_t data);
|
||||
uint8_t nimbus_pc8031_r(offs_t offset);
|
||||
void nimbus_pc8031_w(offs_t offset, uint8_t data);
|
||||
DECLARE_READ8_MEMBER(nimbus_pc8031_iou_r);
|
||||
DECLARE_WRITE8_MEMBER(nimbus_pc8031_iou_w);
|
||||
uint8_t nimbus_pc8031_iou_r(offs_t offset);
|
||||
void nimbus_pc8031_iou_w(offs_t offset, uint8_t data);
|
||||
uint8_t nimbus_pc8031_port1_r();
|
||||
void nimbus_pc8031_port1_w(uint8_t data);
|
||||
uint8_t nimbus_pc8031_port3_r();
|
||||
void nimbus_pc8031_port3_w(uint8_t data);
|
||||
DECLARE_READ8_MEMBER(nimbus_iou_r);
|
||||
DECLARE_WRITE8_MEMBER(nimbus_iou_w);
|
||||
uint8_t nimbus_iou_r(offs_t offset);
|
||||
void nimbus_iou_w(offs_t offset, uint8_t data);
|
||||
void nimbus_sound_ay8910_porta_w(uint8_t data);
|
||||
void nimbus_sound_ay8910_portb_w(uint8_t data);
|
||||
DECLARE_READ8_MEMBER(nimbus_mouse_js_r);
|
||||
DECLARE_WRITE8_MEMBER(nimbus_mouse_js_w);
|
||||
DECLARE_READ16_MEMBER(nimbus_video_io_r);
|
||||
DECLARE_WRITE16_MEMBER(nimbus_video_io_w);
|
||||
uint8_t nimbus_mouse_js_r();
|
||||
void nimbus_mouse_js_w(uint8_t data);
|
||||
uint16_t nimbus_video_io_r(offs_t offset, uint16_t mem_mask = ~0);
|
||||
void nimbus_video_io_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0);
|
||||
virtual void machine_start() override;
|
||||
virtual void machine_reset() override;
|
||||
virtual void video_start() override;
|
||||
|
||||
@ -51,11 +51,11 @@ private:
|
||||
/* video-related */
|
||||
int m_vreg;
|
||||
|
||||
DECLARE_WRITE8_MEMBER(rockrage_bankswitch_w);
|
||||
DECLARE_WRITE8_MEMBER(rockrage_sh_irqtrigger_w);
|
||||
DECLARE_WRITE8_MEMBER(rockrage_vreg_w);
|
||||
DECLARE_READ8_MEMBER(rockrage_VLM5030_busy_r);
|
||||
DECLARE_WRITE8_MEMBER(rockrage_speech_w);
|
||||
void rockrage_bankswitch_w(uint8_t data);
|
||||
void rockrage_sh_irqtrigger_w(uint8_t data);
|
||||
void rockrage_vreg_w(uint8_t data);
|
||||
uint8_t rockrage_VLM5030_busy_r();
|
||||
void rockrage_speech_w(uint8_t data);
|
||||
virtual void machine_start() override;
|
||||
virtual void machine_reset() override;
|
||||
void rockrage_palette(palette_device &palette) const;
|
||||
|
||||
@ -41,12 +41,12 @@ private:
|
||||
tilemap_t *m_bg_tilemap;
|
||||
uint8_t m_irq_mask;
|
||||
|
||||
DECLARE_WRITE8_MEMBER(rocnrope_interrupt_vector_w);
|
||||
void rocnrope_interrupt_vector_w(offs_t offset, uint8_t data);
|
||||
DECLARE_WRITE_LINE_MEMBER(irq_mask_w);
|
||||
DECLARE_WRITE_LINE_MEMBER(coin_counter_1_w);
|
||||
DECLARE_WRITE_LINE_MEMBER(coin_counter_2_w);
|
||||
DECLARE_WRITE8_MEMBER(rocnrope_videoram_w);
|
||||
DECLARE_WRITE8_MEMBER(rocnrope_colorram_w);
|
||||
void rocnrope_videoram_w(offs_t offset, uint8_t data);
|
||||
void rocnrope_colorram_w(offs_t offset, uint8_t data);
|
||||
DECLARE_WRITE_LINE_MEMBER(flip_screen_w);
|
||||
|
||||
TILE_GET_INFO_MEMBER(get_bg_tile_info);
|
||||
|
||||
@ -46,11 +46,11 @@ private:
|
||||
required_device<k05324x_device> m_k053244;
|
||||
required_device<k051316_device> m_k051316;
|
||||
required_device<k053252_device> m_k053252;
|
||||
DECLARE_WRITE8_MEMBER(rollerg_0010_w);
|
||||
DECLARE_READ8_MEMBER(rollerg_k051316_r);
|
||||
DECLARE_WRITE8_MEMBER(soundirq_w);
|
||||
DECLARE_WRITE8_MEMBER(sound_arm_nmi_w);
|
||||
DECLARE_READ8_MEMBER(pip_r);
|
||||
void rollerg_0010_w(uint8_t data);
|
||||
uint8_t rollerg_k051316_r(offs_t offset);
|
||||
void soundirq_w(uint8_t data);
|
||||
void sound_arm_nmi_w(uint8_t data);
|
||||
uint8_t pip_r();
|
||||
DECLARE_WRITE_LINE_MEMBER(rollerg_irq_ack_w);
|
||||
virtual void machine_start() override;
|
||||
virtual void machine_reset() override;
|
||||
|
||||
@ -49,22 +49,22 @@ private:
|
||||
uint8_t m_nmi_mask;
|
||||
uint8_t m_sound_nmi_mask;
|
||||
|
||||
DECLARE_READ8_MEMBER(fake_d800_r);
|
||||
DECLARE_WRITE8_MEMBER(fake_d800_w);
|
||||
uint8_t fake_d800_r();
|
||||
void fake_d800_w(uint8_t data);
|
||||
DECLARE_WRITE_LINE_MEMBER(nmi_mask_w);
|
||||
DECLARE_WRITE8_MEMBER(sound_nmi_mask_w);
|
||||
void sound_nmi_mask_w(uint8_t data);
|
||||
DECLARE_WRITE_LINE_MEMBER(coin_counter_1_w);
|
||||
DECLARE_WRITE_LINE_MEMBER(coin_counter_2_w);
|
||||
DECLARE_WRITE_LINE_MEMBER(charbank_0_w);
|
||||
DECLARE_WRITE_LINE_MEMBER(charbank_1_w);
|
||||
DECLARE_WRITE8_MEMBER(bkgpen_w);
|
||||
void bkgpen_w(uint8_t data);
|
||||
DECLARE_WRITE_LINE_MEMBER(spritebank_w);
|
||||
DECLARE_WRITE8_MEMBER(backgroundpage_w);
|
||||
DECLARE_WRITE8_MEMBER(backgroundcolor_w);
|
||||
DECLARE_WRITE8_MEMBER(flipy_w);
|
||||
void backgroundpage_w(uint8_t data);
|
||||
void backgroundcolor_w(uint8_t data);
|
||||
void flipy_w(uint8_t data);
|
||||
DECLARE_WRITE_LINE_MEMBER(flipx_w);
|
||||
DECLARE_WRITE8_MEMBER(vram_w);
|
||||
DECLARE_WRITE8_MEMBER(cram_w);
|
||||
void vram_w(offs_t offset, uint8_t data);
|
||||
void cram_w(offs_t offset, uint8_t data);
|
||||
TILE_GET_INFO_MEMBER(get_fg_tile_info);
|
||||
void tilemap_refresh_flip();
|
||||
|
||||
|
||||
@ -71,7 +71,7 @@ private:
|
||||
void videoram_w(offs_t offset, u16 data, u16 mem_mask = ~0);
|
||||
void videoreg_w(offs_t offset, u16 data, u16 mem_mask = ~0);
|
||||
void scrollreg_w(offs_t offset, u16 data, u16 mem_mask = ~0);
|
||||
DECLARE_WRITE8_MEMBER(gga_w);
|
||||
void gga_w(offs_t offset, u8 data);
|
||||
void gga_data_w(offs_t offset, u8 data);
|
||||
void sprite_ctrl_w(offs_t offset, u8 data);
|
||||
void upd_control_w(u8 data);
|
||||
|
||||
@ -28,13 +28,13 @@ public:
|
||||
void runaway(machine_config &config);
|
||||
|
||||
private:
|
||||
DECLARE_READ8_MEMBER(runaway_input_r);
|
||||
DECLARE_WRITE8_MEMBER(runaway_irq_ack_w);
|
||||
DECLARE_READ8_MEMBER(earom_read);
|
||||
DECLARE_WRITE8_MEMBER(earom_write);
|
||||
uint8_t runaway_input_r(offs_t offset);
|
||||
void runaway_irq_ack_w(uint8_t data);
|
||||
uint8_t earom_read();
|
||||
void earom_write(offs_t offset, uint8_t data);
|
||||
void earom_control_w(uint8_t data);
|
||||
DECLARE_WRITE8_MEMBER(runaway_paletteram_w);
|
||||
DECLARE_WRITE8_MEMBER(runaway_video_ram_w);
|
||||
void runaway_paletteram_w(offs_t offset, uint8_t data);
|
||||
void runaway_video_ram_w(offs_t offset, uint8_t data);
|
||||
DECLARE_WRITE_LINE_MEMBER(tile_bank_w);
|
||||
uint8_t runaway_pot_r(offs_t offset);
|
||||
TILE_GET_INFO_MEMBER(runaway_get_tile_info);
|
||||
|
||||
@ -89,24 +89,21 @@ private:
|
||||
bool m_single_screen_mode;
|
||||
uint8_t m_video_mux_bank;
|
||||
|
||||
DECLARE_READ16_MEMBER(sysregs_r);
|
||||
DECLARE_WRITE16_MEMBER(sysregs_w);
|
||||
DECLARE_WRITE16_MEMBER(sound_cmd1_w);
|
||||
DECLARE_WRITE16_MEMBER(sound_cmd2_w);
|
||||
DECLARE_WRITE16_MEMBER(sound_irq_w);
|
||||
DECLARE_READ16_MEMBER(sound_status_msb_r);
|
||||
DECLARE_WRITE8_MEMBER(sound_status_w);
|
||||
DECLARE_WRITE8_MEMBER(sound_ctrl_w);
|
||||
DECLARE_READ16_MEMBER(ttl_ram_r);
|
||||
DECLARE_WRITE16_MEMBER(ttl_ram_w);
|
||||
DECLARE_READ16_MEMBER(psac2_videoram_r);
|
||||
DECLARE_WRITE16_MEMBER(psac2_videoram_w);
|
||||
DECLARE_READ8_MEMBER(k53936_rom_r);
|
||||
uint16_t sysregs_r(offs_t offset, uint16_t mem_mask = ~0);
|
||||
void sysregs_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0);
|
||||
void sound_irq_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0);
|
||||
void sound_status_w(uint8_t data);
|
||||
void sound_ctrl_w(uint8_t data);
|
||||
uint16_t ttl_ram_r(offs_t offset);
|
||||
void ttl_ram_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0);
|
||||
uint16_t psac2_videoram_r(offs_t offset);
|
||||
void psac2_videoram_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0);
|
||||
uint8_t k53936_rom_r(offs_t offset);
|
||||
TILE_GET_INFO_MEMBER(ttl_get_tile_info);
|
||||
TILE_GET_INFO_MEMBER(get_rng_936_tile_info);
|
||||
DECLARE_WRITE_LINE_MEMBER(k054539_nmi_gen);
|
||||
DECLARE_READ16_MEMBER(palette_read);
|
||||
DECLARE_WRITE16_MEMBER(palette_write);
|
||||
uint16_t palette_read(offs_t offset);
|
||||
void palette_write(offs_t offset, uint16_t data, uint16_t mem_mask = ~0);
|
||||
|
||||
|
||||
K055673_CB_MEMBER(sprite_callback);
|
||||
|
||||
@ -27,7 +27,7 @@ bit7: 1=map ROM at 0000-0fff/0=RAM
|
||||
|
||||
*/
|
||||
|
||||
WRITE8_MEMBER( rm380z_state::port_write )
|
||||
void rm380z_state::port_write(offs_t offset, uint8_t data)
|
||||
{
|
||||
switch ( offset )
|
||||
{
|
||||
@ -78,7 +78,7 @@ WRITE8_MEMBER( rm380z_state::port_write )
|
||||
}
|
||||
}
|
||||
|
||||
READ8_MEMBER( rm380z_state::port_read )
|
||||
uint8_t rm380z_state::port_read(offs_t offset)
|
||||
{
|
||||
uint8_t data = 0xFF;
|
||||
|
||||
@ -118,44 +118,42 @@ READ8_MEMBER( rm380z_state::port_read )
|
||||
return data;
|
||||
}
|
||||
|
||||
WRITE8_MEMBER( rm380z_state::port_write_1b00 )
|
||||
void rm380z_state::port_write_1b00(offs_t offset, uint8_t data)
|
||||
{
|
||||
address_space &program = m_maincpu->space(AS_PROGRAM);
|
||||
port_write(program,offset+0xfc,data);
|
||||
port_write(offset+0xfc,data);
|
||||
}
|
||||
|
||||
READ8_MEMBER( rm380z_state::port_read_1b00 )
|
||||
uint8_t rm380z_state::port_read_1b00(offs_t offset)
|
||||
{
|
||||
address_space &program = m_maincpu->space(AS_PROGRAM);
|
||||
return port_read(program,offset+0xfc);
|
||||
return port_read(offset+0xfc);
|
||||
}
|
||||
|
||||
READ8_MEMBER( rm380z_state::hiram_read )
|
||||
uint8_t rm380z_state::hiram_read(offs_t offset)
|
||||
{
|
||||
return hiram[offset];
|
||||
}
|
||||
|
||||
WRITE8_MEMBER( rm380z_state::hiram_write )
|
||||
void rm380z_state::hiram_write(offs_t offset, uint8_t data)
|
||||
{
|
||||
hiram[offset]=data;
|
||||
}
|
||||
|
||||
READ8_MEMBER( rm380z_state::rm380z_portlow_r )
|
||||
uint8_t rm380z_state::rm380z_portlow_r()
|
||||
{
|
||||
return 0xff;
|
||||
}
|
||||
|
||||
WRITE8_MEMBER( rm380z_state::rm380z_portlow_w )
|
||||
void rm380z_state::rm380z_portlow_w(offs_t offset, uint8_t data)
|
||||
{
|
||||
//printf("%s port write [%x] [%x]\n",machine().describe_context().c_str(),offset,data);
|
||||
}
|
||||
|
||||
READ8_MEMBER( rm380z_state::rm380z_porthi_r )
|
||||
uint8_t rm380z_state::rm380z_porthi_r()
|
||||
{
|
||||
return 0xff;
|
||||
}
|
||||
|
||||
WRITE8_MEMBER( rm380z_state::rm380z_porthi_w )
|
||||
void rm380z_state::rm380z_porthi_w(offs_t offset, uint8_t data)
|
||||
{
|
||||
//printf("port write [%x] [%x]\n",offset+0xc5,data);
|
||||
}
|
||||
@ -219,7 +217,7 @@ void rm380z_state::keyboard_put(u8 data)
|
||||
// at 0x0080 to 0x00FF, then jumps to it if there is no error."
|
||||
//
|
||||
|
||||
WRITE8_MEMBER( rm380z_state::disk_0_control )
|
||||
void rm380z_state::disk_0_control(uint8_t data)
|
||||
{
|
||||
floppy_image_device *floppy = nullptr;
|
||||
|
||||
@ -305,7 +303,7 @@ void rm380z_state::config_memory_map()
|
||||
else
|
||||
{
|
||||
program.install_rom( 0x0000, 0x0FFF, rom );
|
||||
program.install_readwrite_handler(0x1BFC, 0x1BFF, read8_delegate(*this, FUNC(rm380z_state::port_read_1b00)), write8_delegate(*this, FUNC(rm380z_state::port_write_1b00)));
|
||||
program.install_readwrite_handler(0x1BFC, 0x1BFF, read8sm_delegate(*this, FUNC(rm380z_state::port_read_1b00)), write8sm_delegate(*this, FUNC(rm380z_state::port_write_1b00)));
|
||||
program.install_rom( 0x1C00, 0x1DFF, rom + 0x1400 );
|
||||
program.install_ram( 0x4000, 0xDFFF, m_ram_p );
|
||||
}
|
||||
|
||||
@ -956,12 +956,12 @@ void rmnimbus_state::nimbus_bank_memory()
|
||||
}
|
||||
}
|
||||
|
||||
READ8_MEMBER(rmnimbus_state::nimbus_mcu_r)
|
||||
uint8_t rmnimbus_state::nimbus_mcu_r()
|
||||
{
|
||||
return m_mcu_reg080;
|
||||
}
|
||||
|
||||
WRITE8_MEMBER(rmnimbus_state::nimbus_mcu_w)
|
||||
void rmnimbus_state::nimbus_mcu_w(uint8_t data)
|
||||
{
|
||||
m_mcu_reg080=data;
|
||||
|
||||
@ -1046,7 +1046,7 @@ uint8_t rmnimbus_state::fdc_driveno(uint8_t drivesel)
|
||||
7 !REQ from HDD
|
||||
*/
|
||||
|
||||
READ8_MEMBER(rmnimbus_state::scsi_r)
|
||||
uint8_t rmnimbus_state::scsi_r(offs_t offset)
|
||||
{
|
||||
int result = 0;
|
||||
|
||||
@ -1097,7 +1097,7 @@ READ8_MEMBER(rmnimbus_state::scsi_r)
|
||||
6 hdc drq enabled
|
||||
7 fdc drq enabled
|
||||
*/
|
||||
WRITE8_MEMBER(rmnimbus_state::fdc_ctl_w)
|
||||
void rmnimbus_state::fdc_ctl_w(uint8_t data)
|
||||
{
|
||||
uint8_t reg400_old = m_nimbus_drives.reg400;
|
||||
char drive[5];
|
||||
@ -1128,7 +1128,7 @@ WRITE8_MEMBER(rmnimbus_state::fdc_ctl_w)
|
||||
2 SCSI IRQ Enable
|
||||
*/
|
||||
|
||||
WRITE8_MEMBER(rmnimbus_state::scsi_w)
|
||||
void rmnimbus_state::scsi_w(offs_t offset, uint8_t data)
|
||||
{
|
||||
int pc=m_maincpu->pc();
|
||||
|
||||
@ -1297,7 +1297,7 @@ void rmnimbus_state::nimbus_pc8031_w(offs_t offset, uint8_t data)
|
||||
|
||||
/* 8031/8051 Peripheral controller 8031/8051 side */
|
||||
|
||||
READ8_MEMBER(rmnimbus_state::nimbus_pc8031_iou_r)
|
||||
uint8_t rmnimbus_state::nimbus_pc8031_iou_r(offs_t offset)
|
||||
{
|
||||
int pc=m_iocpu->pc();
|
||||
uint8_t result = 0;
|
||||
@ -1322,7 +1322,7 @@ READ8_MEMBER(rmnimbus_state::nimbus_pc8031_iou_r)
|
||||
return result;
|
||||
}
|
||||
|
||||
WRITE8_MEMBER(rmnimbus_state::nimbus_pc8031_iou_w)
|
||||
void rmnimbus_state::nimbus_pc8031_iou_w(offs_t offset, uint8_t data)
|
||||
{
|
||||
int pc=m_iocpu->pc();
|
||||
|
||||
@ -1416,7 +1416,7 @@ void rmnimbus_state::nimbus_pc8031_port3_w(uint8_t data)
|
||||
|
||||
|
||||
/* IO Unit */
|
||||
READ8_MEMBER(rmnimbus_state::nimbus_iou_r)
|
||||
uint8_t rmnimbus_state::nimbus_iou_r(offs_t offset)
|
||||
{
|
||||
int pc=m_maincpu->pc();
|
||||
uint8_t result=0;
|
||||
@ -1432,7 +1432,7 @@ READ8_MEMBER(rmnimbus_state::nimbus_iou_r)
|
||||
return result;
|
||||
}
|
||||
|
||||
WRITE8_MEMBER(rmnimbus_state::nimbus_iou_w)
|
||||
void rmnimbus_state::nimbus_iou_w(offs_t offset, uint8_t data)
|
||||
{
|
||||
int pc=m_maincpu->pc();
|
||||
|
||||
@ -1650,7 +1650,7 @@ void rmnimbus_state::device_timer(emu_timer &timer, device_timer_id id, int para
|
||||
m_nimbus_mouse.m_intstate_y=intstate_y;
|
||||
}
|
||||
|
||||
READ8_MEMBER(rmnimbus_state::nimbus_mouse_js_r)
|
||||
uint8_t rmnimbus_state::nimbus_mouse_js_r()
|
||||
{
|
||||
/*
|
||||
|
||||
@ -1682,20 +1682,20 @@ READ8_MEMBER(rmnimbus_state::nimbus_mouse_js_r)
|
||||
return result;
|
||||
}
|
||||
|
||||
WRITE8_MEMBER(rmnimbus_state::nimbus_mouse_js_w)
|
||||
void rmnimbus_state::nimbus_mouse_js_w(uint8_t data)
|
||||
{
|
||||
}
|
||||
|
||||
/**********************************************************************
|
||||
Paralell printer / User port.
|
||||
The Nimbus paralell printer port card is almost identical to the circuit
|
||||
Parallel printer / User port.
|
||||
The Nimbus parallel printer port card is almost identical to the circuit
|
||||
in the BBC micro, so I have borrowed the driver code from the BBC :)
|
||||
|
||||
Port A output is buffered before being connected to the printer connector.
|
||||
This means that they can only be operated as output lines.
|
||||
CA1 is pulled high by a 4K7 resistor. CA1 normally acts as an acknowledge
|
||||
line when a printer is used. CA2 is buffered so that it has become an open
|
||||
collector output only. It usially acts as the printer strobe line.
|
||||
collector output only. It usually acts as the printer strobe line.
|
||||
***********************************************************************/
|
||||
|
||||
/* USER VIA 6522 port B is connected to the BBC user port */
|
||||
|
||||
@ -14,26 +14,26 @@
|
||||
|
||||
/******************************************************************************/
|
||||
|
||||
WRITE16_MEMBER(raiden_state::raiden_background_w)
|
||||
void raiden_state::raiden_background_w(offs_t offset, uint16_t data, uint16_t mem_mask)
|
||||
{
|
||||
COMBINE_DATA(&m_back_data[offset]);
|
||||
m_bg_layer->mark_tile_dirty(offset);
|
||||
}
|
||||
|
||||
WRITE16_MEMBER(raiden_state::raiden_foreground_w)
|
||||
void raiden_state::raiden_foreground_w(offs_t offset, uint16_t data, uint16_t mem_mask)
|
||||
{
|
||||
COMBINE_DATA(&m_fore_data[offset]);
|
||||
m_fg_layer->mark_tile_dirty(offset);
|
||||
}
|
||||
|
||||
WRITE16_MEMBER(raiden_state::raiden_text_w)
|
||||
void raiden_state::raiden_text_w(offs_t offset, uint16_t data, uint16_t mem_mask)
|
||||
{
|
||||
COMBINE_DATA(&m_videoram[offset]);
|
||||
m_tx_layer->mark_tile_dirty(offset);
|
||||
}
|
||||
|
||||
|
||||
WRITE8_MEMBER(raiden_state::raiden_control_w)
|
||||
void raiden_state::raiden_control_w(uint8_t data)
|
||||
{
|
||||
// d0: back layer disable
|
||||
// d1: fore layer disable
|
||||
@ -52,7 +52,7 @@ WRITE8_MEMBER(raiden_state::raiden_control_w)
|
||||
machine().tilemap().set_flip_all(m_flipscreen ? (TILEMAP_FLIPY | TILEMAP_FLIPX) : 0);
|
||||
}
|
||||
|
||||
WRITE8_MEMBER(raidenb_state::raidenb_control_w)
|
||||
void raidenb_state::raidenb_control_w(uint8_t data)
|
||||
{
|
||||
// d1: flipscreen
|
||||
// d2: toggles, maybe spriteram bank? (for buffering)
|
||||
|
||||
@ -24,7 +24,7 @@ void rbisland_state::rbisland_colpri_cb(u32 &sprite_colbank, u32 &pri_mask, u16
|
||||
pri_mask = 0xfc; /* sprites under top bg layer */
|
||||
}
|
||||
|
||||
WRITE16_MEMBER(rbisland_state::jumping_spritectrl_w)
|
||||
void rbisland_state::jumping_spritectrl_w(offs_t offset, uint16_t data)
|
||||
{
|
||||
if (offset == 0)
|
||||
{
|
||||
|
||||
@ -343,7 +343,7 @@ uint32_t redalert_state::screen_update_redalert(screen_device &screen, bitmap_rg
|
||||
[3]
|
||||
---- --xx <3 on normal/first form boss, 1 on second form>
|
||||
*/
|
||||
WRITE8_MEMBER(redalert_state::demoneye_bitmap_layer_w)
|
||||
void redalert_state::demoneye_bitmap_layer_w(offs_t offset, uint8_t data)
|
||||
{
|
||||
m_demoneye_bitmap_reg[offset] = data;
|
||||
}
|
||||
|
||||
@ -98,13 +98,13 @@ void redclash_state::palette(palette_device &palette) const
|
||||
}
|
||||
|
||||
|
||||
WRITE8_MEMBER( redclash_state::videoram_w )
|
||||
void redclash_state::videoram_w(offs_t offset, uint8_t data)
|
||||
{
|
||||
m_videoram[offset] = data;
|
||||
m_fg_tilemap->mark_tile_dirty(offset);
|
||||
}
|
||||
|
||||
WRITE8_MEMBER( redclash_state::gfxbank_w )
|
||||
void redclash_state::gfxbank_w(uint8_t data)
|
||||
{
|
||||
if (m_gfxbank != (data & 0x01))
|
||||
{
|
||||
@ -113,12 +113,12 @@ WRITE8_MEMBER( redclash_state::gfxbank_w )
|
||||
}
|
||||
}
|
||||
|
||||
WRITE8_MEMBER( redclash_state::flipscreen_w )
|
||||
void redclash_state::flipscreen_w(uint8_t data)
|
||||
{
|
||||
flip_screen_set(data & 0x01);
|
||||
}
|
||||
|
||||
WRITE8_MEMBER( redclash_state::star_reset_w )
|
||||
void redclash_state::star_reset_w(uint8_t data)
|
||||
{
|
||||
m_stars->set_enable(true);
|
||||
}
|
||||
|
||||
@ -10,29 +10,29 @@
|
||||
#include "includes/renegade.h"
|
||||
|
||||
|
||||
WRITE8_MEMBER(renegade_state::bg_videoram_w)
|
||||
void renegade_state::bg_videoram_w(offs_t offset, uint8_t data)
|
||||
{
|
||||
m_bg_videoram[offset] = data;
|
||||
m_bg_tilemap->mark_tile_dirty(offset & 0x3ff);
|
||||
}
|
||||
|
||||
WRITE8_MEMBER(renegade_state::fg_videoram_w)
|
||||
void renegade_state::fg_videoram_w(offs_t offset, uint8_t data)
|
||||
{
|
||||
m_fg_videoram[offset] = data;
|
||||
m_fg_tilemap->mark_tile_dirty(offset & 0x3ff);
|
||||
}
|
||||
|
||||
WRITE8_MEMBER(renegade_state::flipscreen_w)
|
||||
void renegade_state::flipscreen_w(uint8_t data)
|
||||
{
|
||||
flip_screen_set(~data & 0x01);
|
||||
}
|
||||
|
||||
WRITE8_MEMBER(renegade_state::scroll_lsb_w)
|
||||
void renegade_state::scroll_lsb_w(uint8_t data)
|
||||
{
|
||||
m_scrollx = (m_scrollx & 0xff00) | data;
|
||||
}
|
||||
|
||||
WRITE8_MEMBER(renegade_state::scroll_msb_w)
|
||||
void renegade_state::scroll_msb_w(uint8_t data)
|
||||
{
|
||||
m_scrollx = (m_scrollx & 0xff) | (data << 8);
|
||||
}
|
||||
|
||||
@ -141,19 +141,19 @@ void retofinv_state::video_start()
|
||||
|
||||
***************************************************************************/
|
||||
|
||||
WRITE8_MEMBER(retofinv_state::bg_videoram_w)
|
||||
void retofinv_state::bg_videoram_w(offs_t offset, uint8_t data)
|
||||
{
|
||||
m_bg_videoram[offset] = data;
|
||||
m_bg_tilemap->mark_tile_dirty(offset & 0x3ff);
|
||||
}
|
||||
|
||||
WRITE8_MEMBER(retofinv_state::fg_videoram_w)
|
||||
void retofinv_state::fg_videoram_w(offs_t offset, uint8_t data)
|
||||
{
|
||||
m_fg_videoram[offset] = data;
|
||||
m_fg_tilemap->mark_tile_dirty(offset & 0x3ff);
|
||||
}
|
||||
|
||||
WRITE8_MEMBER(retofinv_state::gfx_ctrl_w)
|
||||
void retofinv_state::gfx_ctrl_w(offs_t offset, uint8_t data)
|
||||
{
|
||||
switch (offset)
|
||||
{
|
||||
|
||||
@ -112,7 +112,7 @@ enum
|
||||
|
||||
#define SRC_SHIFT 8
|
||||
|
||||
WRITE16_MEMBER(rltennis_state::blitter_w)
|
||||
void rltennis_state::blitter_w(offs_t offset, uint16_t data, uint16_t mem_mask)
|
||||
{
|
||||
int old_data=m_blitter[offset];
|
||||
COMBINE_DATA(&m_blitter[offset]);
|
||||
|
||||
@ -193,7 +193,7 @@ void rm380z_state::check_scroll_register()
|
||||
// 20e2: prints "Ready:"
|
||||
// 0195: prints "\n"
|
||||
|
||||
WRITE8_MEMBER( rm380z_state::videoram_write )
|
||||
void rm380z_state::videoram_write(offs_t offset, uint8_t data)
|
||||
{
|
||||
//printf("%s vramw [%2.2x][%2.2x] port0 [%2.2x] fbfd [%2.2x] fbfe [%2.2x]\n",machine().describe_context().c_str(),offset,data,m_port0,m_fbfd,m_fbfe);
|
||||
|
||||
@ -226,7 +226,7 @@ WRITE8_MEMBER( rm380z_state::videoram_write )
|
||||
m_mainVideoram[offset]=data;
|
||||
}
|
||||
|
||||
READ8_MEMBER( rm380z_state::videoram_read )
|
||||
uint8_t rm380z_state::videoram_read(offs_t offset)
|
||||
{
|
||||
return m_mainVideoram[offset];
|
||||
}
|
||||
|
||||
@ -47,7 +47,7 @@
|
||||
|
||||
#define DEBUG_SET(flags) ((m_debug_video & (flags))==(flags))
|
||||
|
||||
READ16_MEMBER(rmnimbus_state::nimbus_video_io_r)
|
||||
uint16_t rmnimbus_state::nimbus_video_io_r(offs_t offset, uint16_t mem_mask)
|
||||
{
|
||||
uint16_t result = 0;
|
||||
|
||||
@ -202,7 +202,7 @@ uint16_t rmnimbus_state::read_pixel_data(uint16_t x, uint16_t y)
|
||||
|
||||
*/
|
||||
|
||||
WRITE16_MEMBER(rmnimbus_state::nimbus_video_io_w)
|
||||
void rmnimbus_state::nimbus_video_io_w(offs_t offset, uint16_t data, uint16_t mem_mask)
|
||||
{
|
||||
uint16_t colours = data;
|
||||
if(offset < 0x14)
|
||||
|
||||
@ -47,7 +47,7 @@ K007420_CALLBACK_MEMBER(rockrage_state::rockrage_sprite_callback)
|
||||
}
|
||||
|
||||
|
||||
WRITE8_MEMBER(rockrage_state::rockrage_vreg_w)
|
||||
void rockrage_state::rockrage_vreg_w(uint8_t data)
|
||||
{
|
||||
/* bits 4-7: unused */
|
||||
/* bit 3: bit 4 of bank # (layer 0) */
|
||||
|
||||
@ -80,13 +80,13 @@ void rocnrope_state::rocnrope_palette(palette_device &palette) const
|
||||
}
|
||||
}
|
||||
|
||||
WRITE8_MEMBER(rocnrope_state::rocnrope_videoram_w)
|
||||
void rocnrope_state::rocnrope_videoram_w(offs_t offset, uint8_t data)
|
||||
{
|
||||
m_videoram[offset] = data;
|
||||
m_bg_tilemap->mark_tile_dirty(offset);
|
||||
}
|
||||
|
||||
WRITE8_MEMBER(rocnrope_state::rocnrope_colorram_w)
|
||||
void rocnrope_state::rocnrope_colorram_w(offs_t offset, uint8_t data)
|
||||
{
|
||||
m_colorram[offset] = data;
|
||||
m_bg_tilemap->mark_tile_dirty(offset);
|
||||
|
||||
@ -28,13 +28,13 @@ void rollrace_state::video_start()
|
||||
m_fg_tilemap->set_scroll_cols(32);
|
||||
}
|
||||
|
||||
WRITE8_MEMBER(rollrace_state::vram_w)
|
||||
void rollrace_state::vram_w(offs_t offset, uint8_t data)
|
||||
{
|
||||
m_videoram[offset] = data;
|
||||
m_fg_tilemap->mark_tile_dirty(offset);
|
||||
}
|
||||
|
||||
WRITE8_MEMBER(rollrace_state::cram_w)
|
||||
void rollrace_state::cram_w(offs_t offset, uint8_t data)
|
||||
{
|
||||
m_colorram[offset] = data;
|
||||
if(offset & 1)
|
||||
@ -105,7 +105,7 @@ WRITE_LINE_MEMBER(rollrace_state::charbank_1_w)
|
||||
m_fg_tilemap->mark_all_dirty();
|
||||
}
|
||||
|
||||
WRITE8_MEMBER(rollrace_state::bkgpen_w)
|
||||
void rollrace_state::bkgpen_w(uint8_t data)
|
||||
{
|
||||
m_bkgpen = data;
|
||||
}
|
||||
@ -115,7 +115,7 @@ WRITE_LINE_MEMBER(rollrace_state::spritebank_w)
|
||||
m_spritebank = state;
|
||||
}
|
||||
|
||||
WRITE8_MEMBER(rollrace_state::backgroundpage_w)
|
||||
void rollrace_state::backgroundpage_w(uint8_t data)
|
||||
{
|
||||
m_bkgpage = data & 0x1f;
|
||||
m_bkgflip = ( data & 0x80 ) >> 7;
|
||||
@ -123,12 +123,12 @@ WRITE8_MEMBER(rollrace_state::backgroundpage_w)
|
||||
/* 0x80 flip vertical */
|
||||
}
|
||||
|
||||
WRITE8_MEMBER(rollrace_state::backgroundcolor_w)
|
||||
void rollrace_state::backgroundcolor_w(uint8_t data)
|
||||
{
|
||||
m_bkgcol = data;
|
||||
}
|
||||
|
||||
WRITE8_MEMBER(rollrace_state::flipy_w)
|
||||
void rollrace_state::flipy_w(uint8_t data)
|
||||
{
|
||||
m_flipy = data & 0x01;
|
||||
// bit 2: cleared at night stage in attract, unknown purpose
|
||||
|
||||
@ -163,7 +163,7 @@ void rpunch_state::scrollreg_w(offs_t offset, u16 data, u16 mem_mask)
|
||||
}
|
||||
|
||||
|
||||
WRITE8_MEMBER(rpunch_state::gga_w)
|
||||
void rpunch_state::gga_w(offs_t offset, u8 data)
|
||||
{
|
||||
m_gga->write(offset >> 5, data & 0xff);
|
||||
}
|
||||
|
||||
@ -10,7 +10,7 @@
|
||||
#include "includes/runaway.h"
|
||||
|
||||
|
||||
WRITE8_MEMBER(runaway_state::runaway_paletteram_w)
|
||||
void runaway_state::runaway_paletteram_w(offs_t offset, uint8_t data)
|
||||
{
|
||||
int R =
|
||||
0x21 * ((~data >> 2) & 1) +
|
||||
@ -32,7 +32,7 @@ WRITE8_MEMBER(runaway_state::runaway_paletteram_w)
|
||||
|
||||
|
||||
|
||||
WRITE8_MEMBER(runaway_state::runaway_video_ram_w)
|
||||
void runaway_state::runaway_video_ram_w(offs_t offset, uint8_t data)
|
||||
{
|
||||
m_video_ram[offset] = data;
|
||||
m_bg_tilemap->mark_tile_dirty(offset);
|
||||
|
||||
@ -33,24 +33,24 @@ K055673_CB_MEMBER(rungun_state::sprite_callback)
|
||||
*color = m_sprite_colorbase | (*color & 0x001f);
|
||||
}
|
||||
|
||||
READ16_MEMBER(rungun_state::ttl_ram_r)
|
||||
uint16_t rungun_state::ttl_ram_r(offs_t offset)
|
||||
{
|
||||
return m_ttl_vram[offset+(m_video_mux_bank*0x1000)];
|
||||
}
|
||||
|
||||
WRITE16_MEMBER(rungun_state::ttl_ram_w)
|
||||
void rungun_state::ttl_ram_w(offs_t offset, uint16_t data, uint16_t mem_mask)
|
||||
{
|
||||
COMBINE_DATA(&m_ttl_vram[offset+(m_video_mux_bank*0x1000)]);
|
||||
m_ttl_tilemap[m_video_mux_bank]->mark_tile_dirty(offset / 2);
|
||||
}
|
||||
|
||||
/* 53936 (PSAC2) rotation/zoom plane */
|
||||
READ16_MEMBER(rungun_state::psac2_videoram_r)
|
||||
uint16_t rungun_state::psac2_videoram_r(offs_t offset)
|
||||
{
|
||||
return m_psac2_vram[offset+(m_video_mux_bank*0x80000)];
|
||||
}
|
||||
|
||||
WRITE16_MEMBER(rungun_state::psac2_videoram_w)
|
||||
void rungun_state::psac2_videoram_w(offs_t offset, uint16_t data, uint16_t mem_mask)
|
||||
{
|
||||
COMBINE_DATA(&m_psac2_vram[offset+(m_video_mux_bank*0x80000)]);
|
||||
m_936_tilemap[m_video_mux_bank]->mark_tile_dirty(offset / 2);
|
||||
@ -154,7 +154,7 @@ uint32_t rungun_state::screen_update_rng_dual_left(screen_device &screen, bitmap
|
||||
return 0;
|
||||
}
|
||||
|
||||
// this depends upon the fisrt screen being updated, and the bitmap being copied to the temp bitmap
|
||||
// this depends upon the first screen being updated, and the bitmap being copied to the temp bitmap
|
||||
uint32_t rungun_state::screen_update_rng_dual_right(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect)
|
||||
{
|
||||
copybitmap( bitmap, m_rng_dual_demultiplex_right_temp, 0, 0, 0, 0, cliprect);
|
||||
|
||||
Loading…
Reference in New Issue
Block a user