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https://github.com/holub/mame
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pcd: reverse video (nw)
pc9801: configurable ide support (nw)
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997c5b1ca1
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@ -2215,7 +2215,7 @@ static ADDRESS_MAP_START( pc9801ux_io, AS_IO, 16, pc9801_state )
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ADDRESS_MAP_END
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ADDRESS_MAP_END
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static ADDRESS_MAP_START( pc9801rs_map, AS_PROGRAM, 16, pc9801_state )
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static ADDRESS_MAP_START( pc9801rs_map, AS_PROGRAM, 16, pc9801_state )
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AM_RANGE(0x0d8000, 0x0d9fff) AM_ROM AM_REGION("ide",0)
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// AM_RANGE(0x0d8000, 0x0d9fff) AM_ROM AM_REGION("ide",0)
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AM_RANGE(0x0da000, 0x0dbfff) AM_RAM // ide ram
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AM_RANGE(0x0da000, 0x0dbfff) AM_RAM // ide ram
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AM_RANGE(0xee0000, 0xefffff) AM_READ8(pc9801rs_ipl_r, 0xffff)
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AM_RANGE(0xee0000, 0xefffff) AM_READ8(pc9801rs_ipl_r, 0xffff)
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AM_RANGE(0xfe0000, 0xffffff) AM_READ8(pc9801rs_ipl_r, 0xffff)
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AM_RANGE(0xfe0000, 0xffffff) AM_READ8(pc9801rs_ipl_r, 0xffff)
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@ -2421,7 +2421,7 @@ static ADDRESS_MAP_START( pc9821_map, AS_PROGRAM, 32, pc9801_state )
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AM_RANGE(0x000a4000, 0x000a4fff) AM_READWRITE8(pc9801rs_knjram_r, pc9801rs_knjram_w, 0xffffffff)
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AM_RANGE(0x000a4000, 0x000a4fff) AM_READWRITE8(pc9801rs_knjram_r, pc9801rs_knjram_w, 0xffffffff)
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AM_RANGE(0x000a8000, 0x000bffff) AM_READWRITE16(grcg_gvram_r, grcg_gvram_w, 0xffffffff)
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AM_RANGE(0x000a8000, 0x000bffff) AM_READWRITE16(grcg_gvram_r, grcg_gvram_w, 0xffffffff)
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AM_RANGE(0x000cc000, 0x000cdfff) AM_ROM AM_REGION("sound_bios",0) //sound BIOS
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AM_RANGE(0x000cc000, 0x000cdfff) AM_ROM AM_REGION("sound_bios",0) //sound BIOS
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AM_RANGE(0x000d8000, 0x000d9fff) AM_ROM AM_REGION("ide",0)
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// AM_RANGE(0x000d8000, 0x000d9fff) AM_ROM AM_REGION("ide",0)
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AM_RANGE(0x000da000, 0x000dbfff) AM_RAM // ide ram
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AM_RANGE(0x000da000, 0x000dbfff) AM_RAM // ide ram
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AM_RANGE(0x000e0000, 0x000e7fff) AM_READWRITE16(grcg_gvram0_r,grcg_gvram0_w, 0xffffffff)
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AM_RANGE(0x000e0000, 0x000e7fff) AM_READWRITE16(grcg_gvram0_r,grcg_gvram0_w, 0xffffffff)
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AM_RANGE(0x000e0000, 0x000fffff) AM_READ8(pc9801rs_ipl_r, 0xffffffff)
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AM_RANGE(0x000e0000, 0x000fffff) AM_READ8(pc9801rs_ipl_r, 0xffffffff)
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@ -2689,6 +2689,9 @@ static INPUT_PORTS_START( pc9801rs )
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PORT_MODIFY("ROM_LOAD")
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PORT_MODIFY("ROM_LOAD")
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PORT_BIT( 0x03, IP_ACTIVE_LOW, IPT_UNUSED )
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PORT_BIT( 0x03, IP_ACTIVE_LOW, IPT_UNUSED )
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PORT_CONFNAME( 0x04, 0x04, "Load IDE BIOS" )
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PORT_CONFSETTING( 0x00, DEF_STR( Yes ) )
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PORT_CONFSETTING( 0x04, DEF_STR( No ) )
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// PORT_START("SOUND_CONFIG")
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// PORT_START("SOUND_CONFIG")
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// PORT_CONFNAME( 0x01, 0x00, "Sound Type" )
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// PORT_CONFNAME( 0x01, 0x00, "Sound Type" )
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@ -3121,6 +3124,11 @@ MACHINE_RESET_MEMBER(pc9801_state,pc9801rs)
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m_keyb_press = 0xff; // temp kludge, for PC-9821 booting
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m_keyb_press = 0xff; // temp kludge, for PC-9821 booting
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// m_has_opna = ioport("SOUND_CONFIG")->read() & 1;
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// m_has_opna = ioport("SOUND_CONFIG")->read() & 1;
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m_maincpu->set_input_line(INPUT_LINE_A20, m_gate_a20);
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m_maincpu->set_input_line(INPUT_LINE_A20, m_gate_a20);
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if(!(ioport("ROM_LOAD")->read() & 4))
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m_maincpu->space(AS_PROGRAM).install_rom(0xd8000, 0xd9fff, memregion("ide")->base());
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else
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m_maincpu->space(AS_PROGRAM).unmap_read(0xd8000, 0xd9fff);
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}
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}
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MACHINE_RESET_MEMBER(pc9801_state,pc9821)
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MACHINE_RESET_MEMBER(pc9801_state,pc9821)
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@ -3437,7 +3445,6 @@ MACHINE_CONFIG_END
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ROM_IGNORE( 0x2000 ) \
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ROM_IGNORE( 0x2000 ) \
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ROM_IGNORE( 0x2000 ) \
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ROM_IGNORE( 0x2000 ) \
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ROM_IGNORE( 0x2000 ) \
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ROM_IGNORE( 0x2000 ) \
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ROM_FILL( 0x0000, 0x2000, 0xcb )
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// all of these are half size :/
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// all of these are half size :/
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#define LOAD_KANJI_ROMS \
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#define LOAD_KANJI_ROMS \
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@ -95,7 +95,6 @@ private:
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int m_msg, m_bsy, m_io, m_cd, m_req, m_rst;
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int m_msg, m_bsy, m_io, m_cd, m_req, m_rst;
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emu_timer *m_req_hack;
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emu_timer *m_req_hack;
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UINT16 m_dskctl;
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UINT16 m_dskctl;
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//bool m_sound;
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struct {
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struct {
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UINT16 ctl;
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UINT16 ctl;
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UINT16 regs[1024];
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UINT16 regs[1024];
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@ -112,7 +112,7 @@ static ADDRESS_MAP_START( pcx_vid_io, AS_IO, 8, pcx_video_device )
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AM_RANGE(0xa000, 0xa001) AM_READWRITE(vram_latch_r, vram_latch_w)
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AM_RANGE(0xa000, 0xa001) AM_READWRITE(vram_latch_r, vram_latch_w)
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AM_RANGE(0xa002, 0xa003) AM_READWRITE(term_mcu_r, term_mcu_w)
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AM_RANGE(0xa002, 0xa003) AM_READWRITE(term_mcu_r, term_mcu_w)
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AM_RANGE(0xc000, 0xc7ff) AM_RAM
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AM_RANGE(0xc000, 0xc7ff) AM_RAM
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AM_RANGE(MCS51_PORT_P1, MCS51_PORT_P1) AM_NOP // revisit this
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AM_RANGE(MCS51_PORT_P1, MCS51_PORT_P1) AM_WRITE(p1_w)
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ADDRESS_MAP_END
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ADDRESS_MAP_END
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static ADDRESS_MAP_START( pcx_vram, AS_0, 8, pcx_video_device )
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static ADDRESS_MAP_START( pcx_vram, AS_0, 8, pcx_video_device )
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@ -174,6 +174,8 @@ SCN2674_DRAW_CHARACTER_MEMBER(pcx_video_device::display_pixels)
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data = m_charrom[m_vram[address] * 16 + linecount + (m_vram[address + 1] & 0x20 ? 4096 : 0)];
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data = m_charrom[m_vram[address] * 16 + linecount + (m_vram[address + 1] & 0x20 ? 4096 : 0)];
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if(cursor && blink)
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if(cursor && blink)
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data = 0xff;
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data = 0xff;
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if(m_p1 & 0x20)
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data = ~data;
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for(int i = 0; i < 8; i++)
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for(int i = 0; i < 8; i++)
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bitmap.pix32(y, x + i) = m_palette->pen((data & (1 << (7 - i))) ? 1 : 0);
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bitmap.pix32(y, x + i) = m_palette->pen((data & (1 << (7 - i))) ? 1 : 0);
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}
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}
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@ -299,6 +301,11 @@ READ8_MEMBER(pcx_video_device::unk_r)
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return 0x80;
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return 0x80;
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}
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}
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WRITE8_MEMBER(pcx_video_device::p1_w)
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{
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m_p1 = data;
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}
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void pcd_video_device::device_start()
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void pcd_video_device::device_start()
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{
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{
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m_maincpu->space(AS_IO).install_readwrite_handler(0xfb00, 0xfb01, 0, 0, read8_delegate(FUNC(pcdx_video_device::detect_r), this), write8_delegate(FUNC(pcdx_video_device::detect_w), this), 0xff00);
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m_maincpu->space(AS_IO).install_readwrite_handler(0xfb00, 0xfb01, 0, 0, read8_delegate(FUNC(pcdx_video_device::detect_r), this), write8_delegate(FUNC(pcdx_video_device::detect_w), this), 0xff00);
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@ -71,6 +71,7 @@ public:
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DECLARE_READ8_MEMBER(vram_latch_r);
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DECLARE_READ8_MEMBER(vram_latch_r);
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DECLARE_WRITE8_MEMBER(vram_latch_w);
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DECLARE_WRITE8_MEMBER(vram_latch_w);
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DECLARE_READ8_MEMBER(unk_r);
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DECLARE_READ8_MEMBER(unk_r);
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DECLARE_WRITE8_MEMBER(p1_w);
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virtual const rom_entry *device_rom_region() const;
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virtual const rom_entry *device_rom_region() const;
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virtual machine_config_constructor device_mconfig_additions() const;
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virtual machine_config_constructor device_mconfig_additions() const;
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@ -86,7 +87,7 @@ private:
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required_region_ptr<UINT8> m_charrom;
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required_region_ptr<UINT8> m_charrom;
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required_device<pic8259_device> m_pic2;
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required_device<pic8259_device> m_pic2;
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devcb_write_line m_txd_handler;
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devcb_write_line m_txd_handler;
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UINT8 m_term_key, m_term_char, m_term_stat, m_vram_latch_r[2], m_vram_latch_w[2];
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UINT8 m_term_key, m_term_char, m_term_stat, m_vram_latch_r[2], m_vram_latch_w[2], m_p1;
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};
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};
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extern const device_type PCD_VIDEO;
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extern const device_type PCD_VIDEO;
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