sun4c: Fixed RAM mirroring with 4 meg sets, and hooked up -ramsize option. [Ryan Holtz]

This commit is contained in:
mooglyguy 2018-09-29 03:58:28 +02:00
parent a5bec0491f
commit 26f240e8b6
3 changed files with 52 additions and 8 deletions

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@ -73,6 +73,9 @@ void sun4c_mmu_device::device_start()
save_item(NAME(m_page_valid)); save_item(NAME(m_page_valid));
save_item(NAME(m_ctx_mask)); save_item(NAME(m_ctx_mask));
save_item(NAME(m_pmeg_mask)); save_item(NAME(m_pmeg_mask));
save_item(NAME(m_ram_set_mask));
save_item(NAME(m_ram_set_base));
save_item(NAME(m_populated_ram_words));
} }
void sun4c_mmu_device::device_reset() void sun4c_mmu_device::device_reset()
@ -81,6 +84,29 @@ void sun4c_mmu_device::device_reset()
m_ram_ptr = (uint32_t *)m_ram->pointer(); m_ram_ptr = (uint32_t *)m_ram->pointer();
m_ram_size = m_ram->size(); m_ram_size = m_ram->size();
m_ram_size_words = m_ram_size >> 2; m_ram_size_words = m_ram_size >> 2;
const uint32_t num_16meg_sets = m_ram_size / 0x1000000;
const uint32_t leftover_4meg_size = m_ram_size % 0x1000000;
const uint32_t num_4meg_sets = leftover_4meg_size / 0x400000;
uint32_t base = 0;
uint32_t set = 0;
for (; set < num_16meg_sets; set++)
{
m_ram_set_base[set] = base;
m_ram_set_mask[set] = 0x003fffff;
base += 0x1000000 >> 2;
}
for (; set < num_16meg_sets+num_4meg_sets; set++)
{
m_ram_set_base[set] = base;
m_ram_set_mask[set] = 0x000fffff;
base += 0x400000 >> 2;
}
for (; set < 4; set++)
{
m_ram_set_mask[set] = 0;
m_ram_set_base[set] = 0;
}
m_populated_ram_words = (num_16meg_sets + num_4meg_sets) * (0x1000000 >> 2);
m_context = 0; m_context = 0;
m_context_masked = 0; m_context_masked = 0;
@ -403,9 +429,13 @@ uint32_t sun4c_mmu_device::insn_data_r(const uint32_t offset, const uint32_t mem
{ {
case 0: // type 0 space case 0: // type 0 space
//return m_type0space->read32(space, tmp, mem_mask); //return m_type0space->read32(space, tmp, mem_mask);
if (tmp < 0x1000000 >> 2) if (tmp < m_populated_ram_words)
{ {
return m_ram_ptr[tmp]; const uint32_t set = (tmp >> 22) & 3;
const uint32_t addr_mask = m_ram_set_mask[set];
const uint32_t masked_addr = m_ram_set_base[set] + (tmp & addr_mask);
//printf("mask %08x, masked %08x\n", addr_mask, masked_addr);
return m_ram_ptr[masked_addr];
} }
else if (tmp >= 0x4000000 >> 2 && tmp < 0x10000000 >> 2) else if (tmp >= 0x4000000 >> 2 && tmp < 0x10000000 >> 2)
{ {
@ -487,9 +517,13 @@ void sun4c_mmu_device::insn_data_w(const uint32_t offset, const uint32_t data, c
switch (entry.type) switch (entry.type)
{ {
case 0: // type 0 case 0: // type 0
if (tmp < 0x1000000 >> 2) if (tmp < m_populated_ram_words)
{ {
COMBINE_DATA((m_ram_ptr + tmp)); const uint32_t set = (tmp >> 22) & 3;
const uint32_t addr_mask = m_ram_set_mask[set];
const uint32_t masked_addr = m_ram_set_base[set] + (tmp & addr_mask);
COMBINE_DATA((m_ram_ptr + masked_addr));
//printf("mask %08x, masked %08x\n", addr_mask, masked_addr);
} }
else if (tmp >= 0x4000000 >> 2 && tmp < 0x10000000 >> 2) else if (tmp >= 0x4000000 >> 2 && tmp < 0x10000000 >> 2)
{ {

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@ -142,8 +142,11 @@ protected:
bool m_page_valid[16384]; bool m_page_valid[16384];
// Internal MAME device state // Internal MAME device state
uint8_t m_ctx_mask; // SS2 is sun4c but has 16 contexts; most have 8 uint8_t m_ctx_mask; // SS2 is sun4c but has 16 contexts; most have 8
uint8_t m_pmeg_mask; // SS2 is sun4c but has 16384 PTEs; most have 8192 uint8_t m_pmeg_mask; // SS2 is sun4c but has 16384 PTEs; most have 8192
uint32_t m_ram_set_mask[4]; // Used for mirroring within 4 megabyte sets
uint32_t m_ram_set_base[4];
uint32_t m_populated_ram_words;
emu_timer *m_reset_timer; emu_timer *m_reset_timer;
}; };

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@ -1876,7 +1876,9 @@ MACHINE_CONFIG_START(sun4_state::sun4)
m_mmu->set_scc(m_scc2); m_mmu->set_scc(m_scc2);
m_maincpu->set_mmu(m_mmu); m_maincpu->set_mmu(m_mmu);
RAM(config, RAM_TAG).set_default_size("16M").set_default_value(0x00); RAM(config, m_ram);
m_ram->set_default_size("16M");
m_ram->set_default_value(0x00);
M48T02(config, TIMEKEEPER_TAG, 0); M48T02(config, TIMEKEEPER_TAG, 0);
@ -1949,7 +1951,8 @@ MACHINE_CONFIG_START(sun4_state::sun4c)
m_mmu->set_scc(m_scc2); m_mmu->set_scc(m_scc2);
m_maincpu->set_mmu(m_mmu); m_maincpu->set_mmu(m_mmu);
RAM(config, RAM_TAG).set_default_size("16M").set_default_value(0x00); RAM(config, m_ram).set_default_size("16M").set_default_value(0x00);
m_ram->set_extra_options("4M,8M,12M,16M,20M,24M,28M,32M,36M,40M,48M,52M,64M");
M48T02(config, TIMEKEEPER_TAG, 0); M48T02(config, TIMEKEEPER_TAG, 0);
@ -2016,6 +2019,8 @@ void sun4_state::sun4_20(machine_config &config)
{ {
sun4c(config); sun4c(config);
m_ram->set_extra_options("4M,8M,12M,16M");
m_sbus_slot[0]->set_fixed(true); m_sbus_slot[0]->set_fixed(true);
m_sbus_slot[1]->set_fixed(true); m_sbus_slot[1]->set_fixed(true);
m_sbus_slot[2]->set_default_option("bwtwo"); m_sbus_slot[2]->set_default_option("bwtwo");
@ -2026,6 +2031,8 @@ void sun4_state::sun4_40(machine_config &config)
{ {
sun4c(config); sun4c(config);
m_ram->set_extra_options("4M,8M,12M,16M,20M,24M,32M,36M,48M");
m_mmu->set_clock(25'000'000); m_mmu->set_clock(25'000'000);
m_maincpu->set_clock(25'000'000); m_maincpu->set_clock(25'000'000);