mirror of
https://github.com/holub/mame
synced 2025-10-06 09:00:04 +03:00
v60.c: Modernized cpu core. [Wilbert Pol]
This commit is contained in:
parent
f3548f7f41
commit
27651e74ab
@ -1,7 +1,7 @@
|
||||
|
||||
// NOTE for bit string / field addressing
|
||||
// ************************************
|
||||
// cpustate->moddim must be passed as 10 for bit string instructions,
|
||||
// m_moddim must be passed as 10 for bit string instructions,
|
||||
// and as 11 for bit field instructions
|
||||
|
||||
|
||||
@ -14,69 +14,69 @@
|
||||
|
||||
/*
|
||||
Input:
|
||||
cpustate->modadd
|
||||
cpustate->moddim
|
||||
m_modadd
|
||||
m_moddim
|
||||
|
||||
Output:
|
||||
cpustate->amout
|
||||
m_amout
|
||||
amLength
|
||||
*/
|
||||
|
||||
static UINT32 ReadAM(v60_state *cpustate)
|
||||
UINT32 v60_device::ReadAM()
|
||||
{
|
||||
cpustate->modm = cpustate->modm?1:0;
|
||||
cpustate->modval = OpRead8(cpustate, cpustate->modadd);
|
||||
return AMTable1[cpustate->modm][cpustate->modval >> 5](cpustate);
|
||||
m_modm = m_modm?1:0;
|
||||
m_modval = OpRead8(m_modadd);
|
||||
return (this->*s_AMTable1[m_modm][m_modval >> 5])();
|
||||
}
|
||||
|
||||
static UINT32 BitReadAM(v60_state *cpustate)
|
||||
UINT32 v60_device::BitReadAM()
|
||||
{
|
||||
cpustate->modm = cpustate->modm?1:0;
|
||||
cpustate->modval = OpRead8(cpustate, cpustate->modadd);
|
||||
return BAMTable1[cpustate->modm][cpustate->modval >> 5](cpustate);
|
||||
m_modm = m_modm?1:0;
|
||||
m_modval = OpRead8(m_modadd);
|
||||
return (this->*s_BAMTable1[m_modm][m_modval >> 5])();
|
||||
}
|
||||
|
||||
|
||||
|
||||
/*
|
||||
Input:
|
||||
cpustate->modadd
|
||||
cpustate->moddim
|
||||
m_modadd
|
||||
m_moddim
|
||||
|
||||
Output:
|
||||
cpustate->amout
|
||||
cpustate->amflag
|
||||
m_amout
|
||||
m_amflag
|
||||
amLength
|
||||
*/
|
||||
|
||||
static UINT32 ReadAMAddress(v60_state *cpustate)
|
||||
UINT32 v60_device::ReadAMAddress()
|
||||
{
|
||||
cpustate->modm = cpustate->modm?1:0;
|
||||
cpustate->modval = OpRead8(cpustate, cpustate->modadd);
|
||||
return AMTable2[cpustate->modm][cpustate->modval >> 5](cpustate);
|
||||
m_modm = m_modm?1:0;
|
||||
m_modval = OpRead8(m_modadd);
|
||||
return (this->*s_AMTable2[m_modm][m_modval >> 5])();
|
||||
}
|
||||
|
||||
static UINT32 BitReadAMAddress(v60_state *cpustate)
|
||||
UINT32 v60_device::BitReadAMAddress()
|
||||
{
|
||||
cpustate->modm = cpustate->modm?1:0;
|
||||
cpustate->modval = OpRead8(cpustate, cpustate->modadd);
|
||||
return BAMTable2[cpustate->modm][cpustate->modval >> 5](cpustate);
|
||||
m_modm = m_modm?1:0;
|
||||
m_modval = OpRead8(m_modadd);
|
||||
return (this->*s_BAMTable2[m_modm][m_modval >> 5])();
|
||||
}
|
||||
|
||||
/*
|
||||
Input:
|
||||
cpustate->modadd
|
||||
cpustate->moddim
|
||||
cpustate->modwritevalb / H/W
|
||||
m_modadd
|
||||
m_moddim
|
||||
m_modwritevalb / H/W
|
||||
|
||||
Output:
|
||||
cpustate->amout
|
||||
m_amout
|
||||
amLength
|
||||
*/
|
||||
|
||||
static UINT32 WriteAM(v60_state *cpustate)
|
||||
UINT32 v60_device::WriteAM()
|
||||
{
|
||||
cpustate->modm = cpustate->modm?1:0;
|
||||
cpustate->modval = OpRead8(cpustate, cpustate->modadd);
|
||||
return AMTable3[cpustate->modm][cpustate->modval >> 5](cpustate);
|
||||
m_modm = m_modm?1:0;
|
||||
m_modval = OpRead8(m_modadd);
|
||||
return (this->*s_AMTable3[m_modm][m_modval >> 5])();
|
||||
}
|
||||
|
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
@ -1,353 +1,353 @@
|
||||
|
||||
|
||||
#define F2END(cs) \
|
||||
return 2 + (cs)->amlength1 + (cs)->amlength2;
|
||||
#define F2END() \
|
||||
return 2 + m_amlength1 + m_amlength2;
|
||||
|
||||
#define F2LOADOPFLOAT(cs, num) \
|
||||
if ((cs)->flag##num) \
|
||||
appf = u2f((cs)->reg[(cs)->op##num]); \
|
||||
#define F2LOADOPFLOAT(num) \
|
||||
if (m_flag##num) \
|
||||
appf = u2f(m_reg[m_op##num]); \
|
||||
else \
|
||||
appf = u2f((cs)->program->read_dword_unaligned((cs)->op##num));
|
||||
appf = u2f(m_program->read_dword_unaligned(m_op##num));
|
||||
|
||||
#define F2STOREOPFLOAT(cs,num) \
|
||||
if ((cs)->flag##num) \
|
||||
(cs)->reg[(cs)->op##num] = f2u(appf); \
|
||||
#define F2STOREOPFLOAT(num) \
|
||||
if (m_flag##num) \
|
||||
m_reg[m_op##num] = f2u(appf); \
|
||||
else \
|
||||
(cs)->program->write_dword_unaligned((cs)->op##num, f2u(appf));
|
||||
m_program->write_dword_unaligned(m_op##num, f2u(appf));
|
||||
|
||||
static void F2DecodeFirstOperand(v60_state *cpustate, UINT32 (*DecodeOp1)(v60_state *), UINT8 dim1)
|
||||
void v60_device::F2DecodeFirstOperand(am_func DecodeOp1, UINT8 dim1)
|
||||
{
|
||||
cpustate->moddim = dim1;
|
||||
cpustate->modm = cpustate->instflags & 0x40;
|
||||
cpustate->modadd = cpustate->PC + 2;
|
||||
cpustate->amlength1 = DecodeOp1(cpustate);
|
||||
cpustate->op1 = cpustate->amout;
|
||||
cpustate->flag1 = cpustate->amflag;
|
||||
m_moddim = dim1;
|
||||
m_modm = m_instflags & 0x40;
|
||||
m_modadd = PC + 2;
|
||||
m_amlength1 = (this->*DecodeOp1)();
|
||||
m_op1 = m_amout;
|
||||
m_flag1 = m_amflag;
|
||||
}
|
||||
|
||||
static void F2DecodeSecondOperand(v60_state *cpustate, UINT32 (*DecodeOp2)(v60_state *), UINT8 dim2)
|
||||
void v60_device::F2DecodeSecondOperand(am_func DecodeOp2, UINT8 dim2)
|
||||
{
|
||||
cpustate->moddim = dim2;
|
||||
cpustate->modm = cpustate->instflags & 0x20;
|
||||
cpustate->modadd = cpustate->PC + 2 + cpustate->amlength1;
|
||||
cpustate->amlength2 = DecodeOp2(cpustate);
|
||||
cpustate->op2 = cpustate->amout;
|
||||
cpustate->flag2 = cpustate->amflag;
|
||||
m_moddim = dim2;
|
||||
m_modm = m_instflags & 0x20;
|
||||
m_modadd = PC + 2 + m_amlength1;
|
||||
m_amlength2 = (this->*DecodeOp2)();
|
||||
m_op2 = m_amout;
|
||||
m_flag2 = m_amflag;
|
||||
}
|
||||
|
||||
static void F2WriteSecondOperand(v60_state *cpustate, UINT8 dim2)
|
||||
void v60_device::F2WriteSecondOperand(UINT8 dim2)
|
||||
{
|
||||
cpustate->moddim = dim2;
|
||||
cpustate->modm = cpustate->instflags & 0x20;
|
||||
cpustate->modadd = cpustate->PC + 2 + cpustate->amlength1;
|
||||
cpustate->amlength2 = WriteAM(cpustate);
|
||||
m_moddim = dim2;
|
||||
m_modm = m_instflags & 0x20;
|
||||
m_modadd = PC + 2 + m_amlength1;
|
||||
m_amlength2 = WriteAM();
|
||||
}
|
||||
|
||||
static UINT32 opCVTWS(v60_state *cpustate)
|
||||
UINT32 v60_device::opCVTWS()
|
||||
{
|
||||
float val;
|
||||
|
||||
F2DecodeFirstOperand(cpustate, ReadAM, 2);
|
||||
F2DecodeFirstOperand(&v60_device::ReadAM, 2);
|
||||
|
||||
// Convert to float
|
||||
val = (float)(INT32)cpustate->op1;
|
||||
cpustate->modwritevalw = f2u(val);
|
||||
val = (float)(INT32)m_op1;
|
||||
m_modwritevalw = f2u(val);
|
||||
|
||||
cpustate->_OV = 0;
|
||||
cpustate->_CY = (val < 0.0f);
|
||||
cpustate->_S = ((cpustate->modwritevalw & 0x80000000) != 0);
|
||||
cpustate->_Z = (val == 0.0f);
|
||||
_OV = 0;
|
||||
_CY = (val < 0.0f);
|
||||
_S = ((m_modwritevalw & 0x80000000) != 0);
|
||||
_Z = (val == 0.0f);
|
||||
|
||||
F2WriteSecondOperand(cpustate, 2);
|
||||
F2END(cpustate);
|
||||
F2WriteSecondOperand(2);
|
||||
F2END();
|
||||
}
|
||||
|
||||
static UINT32 opCVTSW(v60_state *cpustate)
|
||||
UINT32 v60_device::opCVTSW()
|
||||
{
|
||||
float val;
|
||||
|
||||
F2DecodeFirstOperand(cpustate, ReadAM, 2);
|
||||
F2DecodeFirstOperand(&v60_device::ReadAM, 2);
|
||||
|
||||
// Convert to UINT32
|
||||
val = u2f(cpustate->op1);
|
||||
cpustate->modwritevalw = (UINT32)val;
|
||||
val = u2f(m_op1);
|
||||
m_modwritevalw = (UINT32)val;
|
||||
|
||||
cpustate->_OV = 0;
|
||||
cpustate->_CY =(val < 0.0f);
|
||||
cpustate->_S = ((cpustate->modwritevalw & 0x80000000) != 0);
|
||||
cpustate->_Z = (val == 0.0f);
|
||||
_OV = 0;
|
||||
_CY =(val < 0.0f);
|
||||
_S = ((m_modwritevalw & 0x80000000) != 0);
|
||||
_Z = (val == 0.0f);
|
||||
|
||||
F2WriteSecondOperand(cpustate, 2);
|
||||
F2END(cpustate);
|
||||
F2WriteSecondOperand(2);
|
||||
F2END();
|
||||
}
|
||||
|
||||
static UINT32 opMOVFS(v60_state *cpustate)
|
||||
UINT32 v60_device::opMOVFS()
|
||||
{
|
||||
F2DecodeFirstOperand(cpustate, ReadAM, 2);
|
||||
cpustate->modwritevalw = cpustate->op1;
|
||||
F2WriteSecondOperand(cpustate, 2);
|
||||
F2END(cpustate);
|
||||
F2DecodeFirstOperand(&v60_device::ReadAM, 2);
|
||||
m_modwritevalw = m_op1;
|
||||
F2WriteSecondOperand(2);
|
||||
F2END();
|
||||
}
|
||||
|
||||
static UINT32 opNEGFS(v60_state *cpustate)
|
||||
UINT32 v60_device::opNEGFS()
|
||||
{
|
||||
float appf;
|
||||
|
||||
F2DecodeFirstOperand(cpustate, ReadAM, 2);
|
||||
F2DecodeSecondOperand(cpustate, ReadAMAddress, 2);
|
||||
F2DecodeFirstOperand(&v60_device::ReadAM, 2);
|
||||
F2DecodeSecondOperand(&v60_device::ReadAMAddress, 2);
|
||||
|
||||
appf = -u2f(cpustate->op1);
|
||||
appf = -u2f(m_op1);
|
||||
|
||||
cpustate->_OV = 0;
|
||||
cpustate->_CY = (appf < 0.0f);
|
||||
cpustate->_S = ((f2u(appf) & 0x80000000) != 0);
|
||||
cpustate->_Z = (appf == 0.0f);
|
||||
_OV = 0;
|
||||
_CY = (appf < 0.0f);
|
||||
_S = ((f2u(appf) & 0x80000000) != 0);
|
||||
_Z = (appf == 0.0f);
|
||||
|
||||
F2STOREOPFLOAT(cpustate, 2);
|
||||
F2END(cpustate)
|
||||
F2STOREOPFLOAT(2);
|
||||
F2END()
|
||||
}
|
||||
|
||||
static UINT32 opABSFS(v60_state *cpustate)
|
||||
UINT32 v60_device::opABSFS()
|
||||
{
|
||||
float appf;
|
||||
|
||||
F2DecodeFirstOperand(cpustate, ReadAM, 2);
|
||||
F2DecodeSecondOperand(cpustate, ReadAMAddress, 2);
|
||||
F2DecodeFirstOperand(&v60_device::ReadAM, 2);
|
||||
F2DecodeSecondOperand(&v60_device::ReadAMAddress, 2);
|
||||
|
||||
appf = u2f(cpustate->op1);
|
||||
appf = u2f(m_op1);
|
||||
|
||||
if(appf < 0)
|
||||
appf = -appf;
|
||||
|
||||
cpustate->_OV = 0;
|
||||
cpustate->_CY = 0;
|
||||
cpustate->_S = ((f2u(appf) & 0x80000000) != 0);
|
||||
cpustate->_Z = (appf == 0.0f);
|
||||
_OV = 0;
|
||||
_CY = 0;
|
||||
_S = ((f2u(appf) & 0x80000000) != 0);
|
||||
_Z = (appf == 0.0f);
|
||||
|
||||
F2STOREOPFLOAT(cpustate, 2);
|
||||
F2END(cpustate)
|
||||
F2STOREOPFLOAT(2);
|
||||
F2END()
|
||||
}
|
||||
|
||||
static UINT32 opADDFS(v60_state *cpustate)
|
||||
UINT32 v60_device::opADDFS()
|
||||
{
|
||||
UINT32 appw;
|
||||
float appf;
|
||||
|
||||
F2DecodeFirstOperand(cpustate, ReadAM, 2);
|
||||
F2DecodeSecondOperand(cpustate, ReadAMAddress, 2);
|
||||
F2DecodeFirstOperand(&v60_device::ReadAM, 2);
|
||||
F2DecodeSecondOperand(&v60_device::ReadAMAddress, 2);
|
||||
|
||||
F2LOADOPFLOAT(cpustate, 2);
|
||||
F2LOADOPFLOAT(2);
|
||||
|
||||
appf += u2f(cpustate->op1);
|
||||
appf += u2f(m_op1);
|
||||
|
||||
appw = f2u(appf);
|
||||
cpustate->_OV = cpustate->_CY = 0;
|
||||
cpustate->_S = ((appw & 0x80000000) != 0);
|
||||
cpustate->_Z = (appw == 0);
|
||||
_OV = _CY = 0;
|
||||
_S = ((appw & 0x80000000) != 0);
|
||||
_Z = (appw == 0);
|
||||
|
||||
F2STOREOPFLOAT(cpustate, 2);
|
||||
F2END(cpustate)
|
||||
F2STOREOPFLOAT(2);
|
||||
F2END()
|
||||
}
|
||||
|
||||
static UINT32 opSUBFS(v60_state *cpustate)
|
||||
UINT32 v60_device::opSUBFS()
|
||||
{
|
||||
UINT32 appw;
|
||||
float appf;
|
||||
|
||||
F2DecodeFirstOperand(cpustate, ReadAM, 2);
|
||||
F2DecodeSecondOperand(cpustate, ReadAMAddress, 2);
|
||||
F2DecodeFirstOperand(&v60_device::ReadAM, 2);
|
||||
F2DecodeSecondOperand(&v60_device::ReadAMAddress, 2);
|
||||
|
||||
F2LOADOPFLOAT(cpustate, 2);
|
||||
F2LOADOPFLOAT(2);
|
||||
|
||||
appf -= u2f(cpustate->op1);
|
||||
appf -= u2f(m_op1);
|
||||
|
||||
appw = f2u(appf);
|
||||
cpustate->_OV = cpustate->_CY = 0;
|
||||
cpustate->_S = ((appw & 0x80000000) != 0);
|
||||
cpustate->_Z = (appw == 0);
|
||||
_OV = _CY = 0;
|
||||
_S = ((appw & 0x80000000) != 0);
|
||||
_Z = (appw == 0);
|
||||
|
||||
F2STOREOPFLOAT(cpustate, 2);
|
||||
F2END(cpustate)
|
||||
F2STOREOPFLOAT(2);
|
||||
F2END()
|
||||
}
|
||||
|
||||
static UINT32 opMULFS(v60_state *cpustate)
|
||||
UINT32 v60_device::opMULFS()
|
||||
{
|
||||
UINT32 appw;
|
||||
float appf;
|
||||
|
||||
F2DecodeFirstOperand(cpustate, ReadAM, 2);
|
||||
F2DecodeSecondOperand(cpustate, ReadAMAddress, 2);
|
||||
F2DecodeFirstOperand(&v60_device::ReadAM, 2);
|
||||
F2DecodeSecondOperand(&v60_device::ReadAMAddress, 2);
|
||||
|
||||
F2LOADOPFLOAT(cpustate, 2);
|
||||
F2LOADOPFLOAT(2);
|
||||
|
||||
appf *= u2f(cpustate->op1);
|
||||
appf *= u2f(m_op1);
|
||||
|
||||
appw = f2u(appf);
|
||||
cpustate->_OV = cpustate->_CY = 0;
|
||||
cpustate->_S = ((appw & 0x80000000) != 0);
|
||||
cpustate->_Z = (appw == 0);
|
||||
_OV = _CY = 0;
|
||||
_S = ((appw & 0x80000000) != 0);
|
||||
_Z = (appw == 0);
|
||||
|
||||
F2STOREOPFLOAT(cpustate, 2);
|
||||
F2END(cpustate)
|
||||
F2STOREOPFLOAT(2);
|
||||
F2END()
|
||||
}
|
||||
|
||||
static UINT32 opDIVFS(v60_state *cpustate)
|
||||
UINT32 v60_device::opDIVFS()
|
||||
{
|
||||
UINT32 appw;
|
||||
float appf;
|
||||
|
||||
F2DecodeFirstOperand(cpustate, ReadAM, 2);
|
||||
F2DecodeSecondOperand(cpustate, ReadAMAddress, 2);
|
||||
F2DecodeFirstOperand(&v60_device::ReadAM, 2);
|
||||
F2DecodeSecondOperand(&v60_device::ReadAMAddress, 2);
|
||||
|
||||
F2LOADOPFLOAT(cpustate, 2);
|
||||
F2LOADOPFLOAT(2);
|
||||
|
||||
appf /= u2f(cpustate->op1);
|
||||
appf /= u2f(m_op1);
|
||||
|
||||
appw = f2u(appf);
|
||||
cpustate->_OV = cpustate->_CY = 0;
|
||||
cpustate->_S = ((appw & 0x80000000) != 0);
|
||||
cpustate->_Z = (appw == 0);
|
||||
_OV = _CY = 0;
|
||||
_S = ((appw & 0x80000000) != 0);
|
||||
_Z = (appw == 0);
|
||||
|
||||
F2STOREOPFLOAT(cpustate, 2);
|
||||
F2END(cpustate)
|
||||
F2STOREOPFLOAT(2);
|
||||
F2END()
|
||||
}
|
||||
|
||||
static UINT32 opSCLFS(v60_state *cpustate)
|
||||
UINT32 v60_device::opSCLFS()
|
||||
{
|
||||
UINT32 appw;
|
||||
float appf;
|
||||
|
||||
F2DecodeFirstOperand(cpustate, ReadAM, 1);
|
||||
F2DecodeSecondOperand(cpustate, ReadAMAddress, 2);
|
||||
F2DecodeFirstOperand(&v60_device::ReadAM, 1);
|
||||
F2DecodeSecondOperand(&v60_device::ReadAMAddress, 2);
|
||||
|
||||
F2LOADOPFLOAT(cpustate, 2);
|
||||
F2LOADOPFLOAT(2);
|
||||
|
||||
if ((INT16)cpustate->op1 < 0)
|
||||
appf /= 1 << -(INT16)cpustate->op1;
|
||||
if ((INT16)m_op1 < 0)
|
||||
appf /= 1 << -(INT16)m_op1;
|
||||
else
|
||||
appf *= 1 << cpustate->op1;
|
||||
appf *= 1 << m_op1;
|
||||
|
||||
appw = f2u(appf);
|
||||
cpustate->_OV = cpustate->_CY = 0;
|
||||
cpustate->_S = ((appw & 0x80000000) != 0);
|
||||
cpustate->_Z = (appw == 0);
|
||||
_OV = _CY = 0;
|
||||
_S = ((appw & 0x80000000) != 0);
|
||||
_Z = (appw == 0);
|
||||
|
||||
F2STOREOPFLOAT(cpustate, 2);
|
||||
F2END(cpustate)
|
||||
F2STOREOPFLOAT(2);
|
||||
F2END()
|
||||
}
|
||||
|
||||
static UINT32 opCMPF(v60_state *cpustate)
|
||||
UINT32 v60_device::opCMPF()
|
||||
{
|
||||
float appf;
|
||||
|
||||
F2DecodeFirstOperand(cpustate, ReadAM, 2);
|
||||
F2DecodeSecondOperand(cpustate, ReadAM, 2);
|
||||
F2DecodeFirstOperand(&v60_device::ReadAM, 2);
|
||||
F2DecodeSecondOperand(&v60_device::ReadAM, 2);
|
||||
|
||||
appf = u2f(cpustate->op2) - u2f(cpustate->op1);
|
||||
appf = u2f(m_op2) - u2f(m_op1);
|
||||
|
||||
cpustate->_Z = (appf == 0);
|
||||
cpustate->_S = (appf < 0);
|
||||
cpustate->_OV = 0;
|
||||
cpustate->_CY = 0;
|
||||
_Z = (appf == 0);
|
||||
_S = (appf < 0);
|
||||
_OV = 0;
|
||||
_CY = 0;
|
||||
|
||||
F2END(cpustate);
|
||||
F2END();
|
||||
}
|
||||
|
||||
static UINT32 op5FUNHANDLED(v60_state *cpustate)
|
||||
UINT32 v60_device::op5FUNHANDLED()
|
||||
{
|
||||
fatalerror("Unhandled 5F opcode at %08x\n", cpustate->PC);
|
||||
fatalerror("Unhandled 5F opcode at %08x\n", PC);
|
||||
return 0; /* never reached, fatalerror won't return */
|
||||
}
|
||||
|
||||
static UINT32 op5CUNHANDLED(v60_state *cpustate)
|
||||
UINT32 v60_device::op5CUNHANDLED()
|
||||
{
|
||||
fatalerror("Unhandled 5C opcode at %08x\n", cpustate->PC);
|
||||
fatalerror("Unhandled 5C opcode at %08x\n", PC);
|
||||
return 0; /* never reached, fatalerror won't return */
|
||||
}
|
||||
|
||||
static UINT32 (*const Op5FTable[32])(v60_state *) =
|
||||
const v60_device::am_func v60_device::s_Op5FTable[32] =
|
||||
{
|
||||
opCVTWS,
|
||||
opCVTSW,
|
||||
op5FUNHANDLED,
|
||||
op5FUNHANDLED,
|
||||
op5FUNHANDLED,
|
||||
op5FUNHANDLED,
|
||||
op5FUNHANDLED,
|
||||
op5FUNHANDLED,
|
||||
op5FUNHANDLED,
|
||||
op5FUNHANDLED,
|
||||
op5FUNHANDLED,
|
||||
op5FUNHANDLED,
|
||||
op5FUNHANDLED,
|
||||
op5FUNHANDLED,
|
||||
op5FUNHANDLED,
|
||||
op5FUNHANDLED,
|
||||
op5FUNHANDLED,
|
||||
op5FUNHANDLED,
|
||||
op5FUNHANDLED,
|
||||
op5FUNHANDLED,
|
||||
op5FUNHANDLED,
|
||||
op5FUNHANDLED,
|
||||
op5FUNHANDLED,
|
||||
op5FUNHANDLED,
|
||||
op5FUNHANDLED,
|
||||
op5FUNHANDLED,
|
||||
op5FUNHANDLED,
|
||||
op5FUNHANDLED,
|
||||
op5FUNHANDLED,
|
||||
op5FUNHANDLED,
|
||||
op5FUNHANDLED,
|
||||
op5FUNHANDLED
|
||||
&v60_device::opCVTWS,
|
||||
&v60_device::opCVTSW,
|
||||
&v60_device::op5FUNHANDLED,
|
||||
&v60_device::op5FUNHANDLED,
|
||||
&v60_device::op5FUNHANDLED,
|
||||
&v60_device::op5FUNHANDLED,
|
||||
&v60_device::op5FUNHANDLED,
|
||||
&v60_device::op5FUNHANDLED,
|
||||
&v60_device::op5FUNHANDLED,
|
||||
&v60_device::op5FUNHANDLED,
|
||||
&v60_device::op5FUNHANDLED,
|
||||
&v60_device::op5FUNHANDLED,
|
||||
&v60_device::op5FUNHANDLED,
|
||||
&v60_device::op5FUNHANDLED,
|
||||
&v60_device::op5FUNHANDLED,
|
||||
&v60_device::op5FUNHANDLED,
|
||||
&v60_device::op5FUNHANDLED,
|
||||
&v60_device::op5FUNHANDLED,
|
||||
&v60_device::op5FUNHANDLED,
|
||||
&v60_device::op5FUNHANDLED,
|
||||
&v60_device::op5FUNHANDLED,
|
||||
&v60_device::op5FUNHANDLED,
|
||||
&v60_device::op5FUNHANDLED,
|
||||
&v60_device::op5FUNHANDLED,
|
||||
&v60_device::op5FUNHANDLED,
|
||||
&v60_device::op5FUNHANDLED,
|
||||
&v60_device::op5FUNHANDLED,
|
||||
&v60_device::op5FUNHANDLED,
|
||||
&v60_device::op5FUNHANDLED,
|
||||
&v60_device::op5FUNHANDLED,
|
||||
&v60_device::op5FUNHANDLED,
|
||||
&v60_device::op5FUNHANDLED
|
||||
};
|
||||
|
||||
static UINT32 (*const Op5CTable[32])(v60_state *) =
|
||||
const v60_device::am_func v60_device::s_Op5CTable[32] =
|
||||
{
|
||||
opCMPF,
|
||||
op5CUNHANDLED,
|
||||
op5CUNHANDLED,
|
||||
op5CUNHANDLED,
|
||||
op5CUNHANDLED,
|
||||
op5CUNHANDLED,
|
||||
op5CUNHANDLED,
|
||||
op5CUNHANDLED,
|
||||
opMOVFS,
|
||||
opNEGFS,
|
||||
opABSFS,
|
||||
op5CUNHANDLED,
|
||||
op5CUNHANDLED,
|
||||
op5CUNHANDLED,
|
||||
op5CUNHANDLED,
|
||||
op5CUNHANDLED,
|
||||
&v60_device::opCMPF,
|
||||
&v60_device::op5CUNHANDLED,
|
||||
&v60_device::op5CUNHANDLED,
|
||||
&v60_device::op5CUNHANDLED,
|
||||
&v60_device::op5CUNHANDLED,
|
||||
&v60_device::op5CUNHANDLED,
|
||||
&v60_device::op5CUNHANDLED,
|
||||
&v60_device::op5CUNHANDLED,
|
||||
&v60_device::opMOVFS,
|
||||
&v60_device::opNEGFS,
|
||||
&v60_device::opABSFS,
|
||||
&v60_device::op5CUNHANDLED,
|
||||
&v60_device::op5CUNHANDLED,
|
||||
&v60_device::op5CUNHANDLED,
|
||||
&v60_device::op5CUNHANDLED,
|
||||
&v60_device::op5CUNHANDLED,
|
||||
|
||||
opSCLFS,
|
||||
op5CUNHANDLED,
|
||||
op5CUNHANDLED,
|
||||
op5CUNHANDLED,
|
||||
op5CUNHANDLED,
|
||||
op5CUNHANDLED,
|
||||
op5CUNHANDLED,
|
||||
op5CUNHANDLED,
|
||||
opADDFS,
|
||||
opSUBFS,
|
||||
opMULFS,
|
||||
opDIVFS,
|
||||
op5CUNHANDLED,
|
||||
op5CUNHANDLED,
|
||||
op5CUNHANDLED,
|
||||
op5CUNHANDLED
|
||||
&v60_device::opSCLFS,
|
||||
&v60_device::op5CUNHANDLED,
|
||||
&v60_device::op5CUNHANDLED,
|
||||
&v60_device::op5CUNHANDLED,
|
||||
&v60_device::op5CUNHANDLED,
|
||||
&v60_device::op5CUNHANDLED,
|
||||
&v60_device::op5CUNHANDLED,
|
||||
&v60_device::op5CUNHANDLED,
|
||||
&v60_device::opADDFS,
|
||||
&v60_device::opSUBFS,
|
||||
&v60_device::opMULFS,
|
||||
&v60_device::opDIVFS,
|
||||
&v60_device::op5CUNHANDLED,
|
||||
&v60_device::op5CUNHANDLED,
|
||||
&v60_device::op5CUNHANDLED,
|
||||
&v60_device::op5CUNHANDLED
|
||||
};
|
||||
|
||||
|
||||
static UINT32 op5F(v60_state *cpustate)
|
||||
UINT32 v60_device::op5F()
|
||||
{
|
||||
cpustate->instflags = OpRead8(cpustate, cpustate->PC + 1);
|
||||
return Op5FTable[cpustate->instflags & 0x1F](cpustate);
|
||||
m_instflags = OpRead8(PC + 1);
|
||||
return (this->*s_Op5FTable[m_instflags & 0x1F])();
|
||||
}
|
||||
|
||||
|
||||
static UINT32 op5C(v60_state *cpustate)
|
||||
UINT32 v60_device::op5C()
|
||||
{
|
||||
cpustate->instflags = OpRead8(cpustate, cpustate->PC + 1);
|
||||
return Op5CTable[cpustate->instflags & 0x1F](cpustate);
|
||||
m_instflags = OpRead8(PC + 1);
|
||||
return (this->*s_Op5CTable[m_instflags & 0x1F])();
|
||||
}
|
||||
|
@ -1,639 +1,639 @@
|
||||
static UINT32 opINCB(v60_state *cpustate) /* TRUSTED */
|
||||
UINT32 v60_device::opINCB() /* TRUSTED */
|
||||
{
|
||||
UINT8 appb;
|
||||
cpustate->modadd = cpustate->PC + 1;
|
||||
cpustate->moddim = 0;
|
||||
m_modadd = PC + 1;
|
||||
m_moddim = 0;
|
||||
|
||||
cpustate->amlength1 = ReadAMAddress(cpustate);
|
||||
m_amlength1 = ReadAMAddress();
|
||||
|
||||
if (cpustate->amflag)
|
||||
appb = (UINT8)cpustate->reg[cpustate->amout];
|
||||
if (m_amflag)
|
||||
appb = (UINT8)m_reg[m_amout];
|
||||
else
|
||||
appb = cpustate->program->read_byte(cpustate->amout);
|
||||
appb = m_program->read_byte(m_amout);
|
||||
|
||||
ADDB(appb, 1);
|
||||
|
||||
if (cpustate->amflag)
|
||||
SETREG8(cpustate->reg[cpustate->amout], appb);
|
||||
if (m_amflag)
|
||||
SETREG8(m_reg[m_amout], appb);
|
||||
else
|
||||
cpustate->program->write_byte(cpustate->amout, appb);
|
||||
m_program->write_byte(m_amout, appb);
|
||||
|
||||
return cpustate->amlength1 + 1;
|
||||
return m_amlength1 + 1;
|
||||
}
|
||||
|
||||
static UINT32 opINCH(v60_state *cpustate) /* TRUSTED */
|
||||
UINT32 v60_device::opINCH() /* TRUSTED */
|
||||
{
|
||||
UINT16 apph;
|
||||
cpustate->modadd = cpustate->PC + 1;
|
||||
cpustate->moddim = 1;
|
||||
m_modadd = PC + 1;
|
||||
m_moddim = 1;
|
||||
|
||||
cpustate->amlength1 = ReadAMAddress(cpustate);
|
||||
m_amlength1 = ReadAMAddress();
|
||||
|
||||
if (cpustate->amflag)
|
||||
apph = (UINT16)cpustate->reg[cpustate->amout];
|
||||
if (m_amflag)
|
||||
apph = (UINT16)m_reg[m_amout];
|
||||
else
|
||||
apph = cpustate->program->read_word_unaligned(cpustate->amout);
|
||||
apph = m_program->read_word_unaligned(m_amout);
|
||||
|
||||
ADDW(apph, 1);
|
||||
|
||||
if (cpustate->amflag)
|
||||
SETREG16(cpustate->reg[cpustate->amout], apph);
|
||||
if (m_amflag)
|
||||
SETREG16(m_reg[m_amout], apph);
|
||||
else
|
||||
cpustate->program->write_word_unaligned(cpustate->amout, apph);
|
||||
m_program->write_word_unaligned(m_amout, apph);
|
||||
|
||||
return cpustate->amlength1 + 1;
|
||||
return m_amlength1 + 1;
|
||||
}
|
||||
|
||||
static UINT32 opINCW(v60_state *cpustate) /* TRUSTED */
|
||||
UINT32 v60_device::opINCW() /* TRUSTED */
|
||||
{
|
||||
UINT32 appw;
|
||||
cpustate->modadd = cpustate->PC + 1;
|
||||
cpustate->moddim = 2;
|
||||
m_modadd = PC + 1;
|
||||
m_moddim = 2;
|
||||
|
||||
cpustate->amlength1 = ReadAMAddress(cpustate);
|
||||
m_amlength1 = ReadAMAddress();
|
||||
|
||||
if (cpustate->amflag)
|
||||
appw = cpustate->reg[cpustate->amout];
|
||||
if (m_amflag)
|
||||
appw = m_reg[m_amout];
|
||||
else
|
||||
appw = cpustate->program->read_dword_unaligned(cpustate->amout);
|
||||
appw = m_program->read_dword_unaligned(m_amout);
|
||||
|
||||
ADDL(appw, 1);
|
||||
|
||||
if (cpustate->amflag)
|
||||
cpustate->reg[cpustate->amout] = appw;
|
||||
if (m_amflag)
|
||||
m_reg[m_amout] = appw;
|
||||
else
|
||||
cpustate->program->write_dword_unaligned(cpustate->amout, appw);
|
||||
m_program->write_dword_unaligned(m_amout, appw);
|
||||
|
||||
return cpustate->amlength1 + 1;
|
||||
return m_amlength1 + 1;
|
||||
}
|
||||
|
||||
static UINT32 opDECB(v60_state *cpustate) /* TRUSTED */
|
||||
UINT32 v60_device::opDECB() /* TRUSTED */
|
||||
{
|
||||
UINT8 appb;
|
||||
cpustate->modadd = cpustate->PC + 1;
|
||||
cpustate->moddim = 0;
|
||||
m_modadd = PC + 1;
|
||||
m_moddim = 0;
|
||||
|
||||
cpustate->amlength1 = ReadAMAddress(cpustate);
|
||||
m_amlength1 = ReadAMAddress();
|
||||
|
||||
if (cpustate->amflag)
|
||||
appb = (UINT8)cpustate->reg[cpustate->amout];
|
||||
if (m_amflag)
|
||||
appb = (UINT8)m_reg[m_amout];
|
||||
else
|
||||
appb = cpustate->program->read_byte(cpustate->amout);
|
||||
appb = m_program->read_byte(m_amout);
|
||||
|
||||
SUBB(appb, 1);
|
||||
|
||||
if (cpustate->amflag)
|
||||
SETREG8(cpustate->reg[cpustate->amout], appb);
|
||||
if (m_amflag)
|
||||
SETREG8(m_reg[m_amout], appb);
|
||||
else
|
||||
cpustate->program->write_byte(cpustate->amout, appb);
|
||||
m_program->write_byte(m_amout, appb);
|
||||
|
||||
return cpustate->amlength1 + 1;
|
||||
return m_amlength1 + 1;
|
||||
}
|
||||
|
||||
static UINT32 opDECH(v60_state *cpustate) /* TRUSTED */
|
||||
UINT32 v60_device::opDECH() /* TRUSTED */
|
||||
{
|
||||
UINT16 apph;
|
||||
cpustate->modadd = cpustate->PC + 1;
|
||||
cpustate->moddim = 1;
|
||||
m_modadd = PC + 1;
|
||||
m_moddim = 1;
|
||||
|
||||
cpustate->amlength1 = ReadAMAddress(cpustate);
|
||||
m_amlength1 = ReadAMAddress();
|
||||
|
||||
if (cpustate->amflag)
|
||||
apph = (UINT16)cpustate->reg[cpustate->amout];
|
||||
if (m_amflag)
|
||||
apph = (UINT16)m_reg[m_amout];
|
||||
else
|
||||
apph = cpustate->program->read_word_unaligned(cpustate->amout);
|
||||
apph = m_program->read_word_unaligned(m_amout);
|
||||
|
||||
SUBW(apph, 1);
|
||||
|
||||
if (cpustate->amflag)
|
||||
SETREG16(cpustate->reg[cpustate->amout], apph);
|
||||
if (m_amflag)
|
||||
SETREG16(m_reg[m_amout], apph);
|
||||
else
|
||||
cpustate->program->write_word_unaligned(cpustate->amout, apph);
|
||||
m_program->write_word_unaligned(m_amout, apph);
|
||||
|
||||
return cpustate->amlength1 + 1;
|
||||
return m_amlength1 + 1;
|
||||
}
|
||||
|
||||
static UINT32 opDECW(v60_state *cpustate) /* TRUSTED */
|
||||
UINT32 v60_device::opDECW() /* TRUSTED */
|
||||
{
|
||||
UINT32 appw;
|
||||
cpustate->modadd = cpustate->PC + 1;
|
||||
cpustate->moddim = 2;
|
||||
m_modadd = PC + 1;
|
||||
m_moddim = 2;
|
||||
|
||||
cpustate->amlength1 = ReadAMAddress(cpustate);
|
||||
m_amlength1 = ReadAMAddress();
|
||||
|
||||
if (cpustate->amflag)
|
||||
appw = cpustate->reg[cpustate->amout];
|
||||
if (m_amflag)
|
||||
appw = m_reg[m_amout];
|
||||
else
|
||||
appw = cpustate->program->read_dword_unaligned(cpustate->amout);
|
||||
appw = m_program->read_dword_unaligned(m_amout);
|
||||
|
||||
SUBL(appw, 1);
|
||||
|
||||
if (cpustate->amflag)
|
||||
cpustate->reg[cpustate->amout] = appw;
|
||||
if (m_amflag)
|
||||
m_reg[m_amout] = appw;
|
||||
else
|
||||
cpustate->program->write_dword_unaligned(cpustate->amout, appw);
|
||||
m_program->write_dword_unaligned(m_amout, appw);
|
||||
|
||||
return cpustate->amlength1 + 1;
|
||||
return m_amlength1 + 1;
|
||||
}
|
||||
|
||||
static UINT32 opJMP(v60_state *cpustate) /* TRUSTED */
|
||||
UINT32 v60_device::opJMP() /* TRUSTED */
|
||||
{
|
||||
cpustate->modadd = cpustate->PC + 1;
|
||||
cpustate->moddim = 0;
|
||||
m_modadd = PC + 1;
|
||||
m_moddim = 0;
|
||||
|
||||
// Read the address of the operand
|
||||
ReadAMAddress(cpustate);
|
||||
ReadAMAddress();
|
||||
|
||||
// It cannot be a register!!
|
||||
assert(cpustate->amflag == 0);
|
||||
assert(m_amflag == 0);
|
||||
|
||||
// Jump there
|
||||
cpustate->PC = cpustate->amout;
|
||||
PC = m_amout;
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static UINT32 opJSR(v60_state *cpustate) /* TRUSTED */
|
||||
UINT32 v60_device::opJSR() /* TRUSTED */
|
||||
{
|
||||
cpustate->modadd = cpustate->PC + 1;
|
||||
cpustate->moddim = 0;
|
||||
m_modadd = PC + 1;
|
||||
m_moddim = 0;
|
||||
|
||||
// Read the address of the operand
|
||||
cpustate->amlength1 = ReadAMAddress(cpustate);
|
||||
m_amlength1 = ReadAMAddress();
|
||||
|
||||
// It cannot be a register!!
|
||||
assert(cpustate->amflag == 0);
|
||||
assert(m_amflag == 0);
|
||||
|
||||
// Save NextPC into the stack
|
||||
cpustate->SP -= 4;
|
||||
cpustate->program->write_dword_unaligned(cpustate->SP, cpustate->PC + cpustate->amlength1 + 1);
|
||||
SP -= 4;
|
||||
m_program->write_dword_unaligned(SP, PC + m_amlength1 + 1);
|
||||
|
||||
// Jump there
|
||||
cpustate->PC = cpustate->amout;
|
||||
PC = m_amout;
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static UINT32 opPREPARE(v60_state *cpustate) /* somewhat TRUSTED */
|
||||
UINT32 v60_device::opPREPARE() /* somewhat TRUSTED */
|
||||
{
|
||||
cpustate->modadd = cpustate->PC + 1;
|
||||
cpustate->moddim = 2;
|
||||
m_modadd = PC + 1;
|
||||
m_moddim = 2;
|
||||
|
||||
// Read the operand
|
||||
cpustate->amlength1 = ReadAM(cpustate);
|
||||
m_amlength1 = ReadAM();
|
||||
|
||||
// step 1: save frame pointer on the stack
|
||||
cpustate->SP -= 4;
|
||||
cpustate->program->write_dword_unaligned(cpustate->SP, cpustate->FP);
|
||||
SP -= 4;
|
||||
m_program->write_dword_unaligned(SP, FP);
|
||||
|
||||
// step 2: cpustate->FP = new cpustate->SP
|
||||
cpustate->FP = cpustate->SP;
|
||||
// step 2: FP = new SP
|
||||
FP = SP;
|
||||
|
||||
// step 3: cpustate->SP -= operand
|
||||
cpustate->SP -= cpustate->amout;
|
||||
// step 3: SP -= operand
|
||||
SP -= m_amout;
|
||||
|
||||
return cpustate->amlength1 + 1;
|
||||
return m_amlength1 + 1;
|
||||
}
|
||||
|
||||
static UINT32 opRET(v60_state *cpustate) /* TRUSTED */
|
||||
UINT32 v60_device::opRET() /* TRUSTED */
|
||||
{
|
||||
cpustate->modadd = cpustate->PC + 1;
|
||||
cpustate->moddim = 2;
|
||||
m_modadd = PC + 1;
|
||||
m_moddim = 2;
|
||||
|
||||
// Read the operand
|
||||
ReadAM(cpustate);
|
||||
ReadAM();
|
||||
|
||||
// Read return address from stack
|
||||
cpustate->PC = cpustate->program->read_dword_unaligned(cpustate->SP);
|
||||
cpustate->SP +=4;
|
||||
PC = m_program->read_dword_unaligned(SP);
|
||||
SP +=4;
|
||||
|
||||
// Restore cpustate->AP from stack
|
||||
cpustate->AP = cpustate->program->read_dword_unaligned(cpustate->SP);
|
||||
cpustate->SP +=4;
|
||||
// Restore AP from stack
|
||||
AP = m_program->read_dword_unaligned(SP);
|
||||
SP +=4;
|
||||
|
||||
// Skip stack frame
|
||||
cpustate->SP += cpustate->amout;
|
||||
SP += m_amout;
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static UINT32 opTRAP(v60_state *cpustate)
|
||||
UINT32 v60_device::opTRAP()
|
||||
{
|
||||
UINT32 oldPSW;
|
||||
|
||||
cpustate->modadd = cpustate->PC + 1;
|
||||
cpustate->moddim = 0;
|
||||
m_modadd = PC + 1;
|
||||
m_moddim = 0;
|
||||
|
||||
// Read the operand
|
||||
cpustate->amlength1 = ReadAM(cpustate);
|
||||
m_amlength1 = ReadAM();
|
||||
|
||||
// Normalize the flags
|
||||
NORMALIZEFLAGS(cpustate);
|
||||
NORMALIZEFLAGS();
|
||||
|
||||
switch ((cpustate->amout >> 4) & 0xF)
|
||||
switch ((m_amout >> 4) & 0xF)
|
||||
{
|
||||
case 0:
|
||||
if (!cpustate->_OV) return cpustate->amlength1 + 1;
|
||||
if (!_OV) return m_amlength1 + 1;
|
||||
else break;
|
||||
case 1:
|
||||
if (cpustate->_OV) return cpustate->amlength1 + 1;
|
||||
if (_OV) return m_amlength1 + 1;
|
||||
else break;
|
||||
case 2:
|
||||
if (!cpustate->_CY) return cpustate->amlength1 + 1;
|
||||
if (!_CY) return m_amlength1 + 1;
|
||||
else break;
|
||||
case 3:
|
||||
if (cpustate->_CY) return cpustate->amlength1 + 1;
|
||||
if (_CY) return m_amlength1 + 1;
|
||||
else break;
|
||||
case 4:
|
||||
if (!cpustate->_Z) return cpustate->amlength1 + 1;
|
||||
if (!_Z) return m_amlength1 + 1;
|
||||
else break;
|
||||
case 5:
|
||||
if (cpustate->_Z) return cpustate->amlength1 + 1;
|
||||
if (_Z) return m_amlength1 + 1;
|
||||
else break;
|
||||
case 6:
|
||||
if (!(cpustate->_CY | cpustate->_Z)) return cpustate->amlength1 + 1;
|
||||
if (!(_CY | _Z)) return m_amlength1 + 1;
|
||||
else break;
|
||||
case 7:
|
||||
if ((cpustate->_CY | cpustate->_Z)) return cpustate->amlength1 + 1;
|
||||
if ((_CY | _Z)) return m_amlength1 + 1;
|
||||
else break;
|
||||
case 8:
|
||||
if (!cpustate->_S) return cpustate->amlength1 + 1;
|
||||
if (!_S) return m_amlength1 + 1;
|
||||
else break;
|
||||
case 9:
|
||||
if (cpustate->_S) return cpustate->amlength1 + 1;
|
||||
if (_S) return m_amlength1 + 1;
|
||||
else break;
|
||||
case 10:
|
||||
break;
|
||||
case 11:
|
||||
return cpustate->amlength1 + 1;
|
||||
return m_amlength1 + 1;
|
||||
case 12:
|
||||
if (!(cpustate->_S^cpustate->_OV)) return cpustate->amlength1 + 1;
|
||||
if (!(_S^_OV)) return m_amlength1 + 1;
|
||||
else break;
|
||||
case 13:
|
||||
if ((cpustate->_S^cpustate->_OV)) return cpustate->amlength1 + 1;
|
||||
if ((_S^_OV)) return m_amlength1 + 1;
|
||||
else break;
|
||||
case 14:
|
||||
if (!((cpustate->_S^cpustate->_OV)|cpustate->_Z)) return cpustate->amlength1 + 1;
|
||||
if (!((_S^_OV)|_Z)) return m_amlength1 + 1;
|
||||
else break;
|
||||
case 15:
|
||||
if (((cpustate->_S^cpustate->_OV)|cpustate->_Z)) return cpustate->amlength1 + 1;
|
||||
if (((_S^_OV)|_Z)) return m_amlength1 + 1;
|
||||
else break;
|
||||
}
|
||||
|
||||
oldPSW = v60_update_psw_for_exception(cpustate, 0, 0);
|
||||
oldPSW = v60_update_psw_for_exception(0, 0);
|
||||
|
||||
// Issue the software trap with interrupts
|
||||
cpustate->SP -= 4;
|
||||
cpustate->program->write_dword_unaligned(cpustate->SP, EXCEPTION_CODE_AND_SIZE(0x3000 + 0x100 * (cpustate->amout & 0xF), 4));
|
||||
SP -= 4;
|
||||
m_program->write_dword_unaligned(SP, EXCEPTION_CODE_AND_SIZE(0x3000 + 0x100 * (m_amout & 0xF), 4));
|
||||
|
||||
cpustate->SP -= 4;
|
||||
cpustate->program->write_dword_unaligned(cpustate->SP, oldPSW);
|
||||
SP -= 4;
|
||||
m_program->write_dword_unaligned(SP, oldPSW);
|
||||
|
||||
cpustate->SP -= 4;
|
||||
cpustate->program->write_dword_unaligned(cpustate->SP, cpustate->PC + cpustate->amlength1 + 1);
|
||||
SP -= 4;
|
||||
m_program->write_dword_unaligned(SP, PC + m_amlength1 + 1);
|
||||
|
||||
cpustate->PC = GETINTVECT(cpustate, 48 + (cpustate->amout & 0xF));
|
||||
PC = GETINTVECT(48 + (m_amout & 0xF));
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static UINT32 opRETIU(v60_state *cpustate) /* TRUSTED */
|
||||
UINT32 v60_device::opRETIU() /* TRUSTED */
|
||||
{
|
||||
UINT32 newPSW;
|
||||
cpustate->modadd = cpustate->PC + 1;
|
||||
cpustate->moddim = 1;
|
||||
m_modadd = PC + 1;
|
||||
m_moddim = 1;
|
||||
|
||||
// Read the operand
|
||||
ReadAM(cpustate);
|
||||
ReadAM();
|
||||
|
||||
// Restore cpustate->PC and cpustate->PSW from stack
|
||||
cpustate->PC = cpustate->program->read_dword_unaligned(cpustate->SP);
|
||||
cpustate->SP += 4;
|
||||
// Restore PC and PSW from stack
|
||||
PC = m_program->read_dword_unaligned(SP);
|
||||
SP += 4;
|
||||
|
||||
newPSW = cpustate->program->read_dword_unaligned(cpustate->SP);
|
||||
cpustate->SP += 4;
|
||||
newPSW = m_program->read_dword_unaligned(SP);
|
||||
SP += 4;
|
||||
|
||||
// Destroy stack frame
|
||||
cpustate->SP += cpustate->amout;
|
||||
SP += m_amout;
|
||||
|
||||
v60WritePSW(cpustate, newPSW);
|
||||
v60WritePSW(newPSW);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static UINT32 opRETIS(v60_state *cpustate)
|
||||
UINT32 v60_device::opRETIS()
|
||||
{
|
||||
UINT32 newPSW;
|
||||
|
||||
cpustate->modadd = cpustate->PC + 1;
|
||||
cpustate->moddim = 1;
|
||||
m_modadd = PC + 1;
|
||||
m_moddim = 1;
|
||||
|
||||
// Read the operand
|
||||
ReadAM(cpustate);
|
||||
ReadAM();
|
||||
|
||||
// Restore cpustate->PC and cpustate->PSW from stack
|
||||
cpustate->PC = cpustate->program->read_dword_unaligned(cpustate->SP);
|
||||
cpustate->SP += 4;
|
||||
// Restore PC and PSW from stack
|
||||
PC = m_program->read_dword_unaligned(SP);
|
||||
SP += 4;
|
||||
|
||||
newPSW = cpustate->program->read_dword_unaligned(cpustate->SP);
|
||||
cpustate->SP += 4;
|
||||
newPSW = m_program->read_dword_unaligned(SP);
|
||||
SP += 4;
|
||||
|
||||
// Destroy stack frame
|
||||
cpustate->SP += cpustate->amout;
|
||||
SP += m_amout;
|
||||
|
||||
v60WritePSW(cpustate, newPSW);
|
||||
v60WritePSW(newPSW);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static UINT32 opSTTASK(v60_state *cpustate)
|
||||
UINT32 v60_device::opSTTASK()
|
||||
{
|
||||
int i;
|
||||
UINT32 adr;
|
||||
|
||||
cpustate->modadd = cpustate->PC + 1;
|
||||
cpustate->moddim = 2;
|
||||
m_modadd = PC + 1;
|
||||
m_moddim = 2;
|
||||
|
||||
cpustate->amlength1 = ReadAM(cpustate);
|
||||
m_amlength1 = ReadAM();
|
||||
|
||||
adr = cpustate->TR;
|
||||
adr = TR;
|
||||
|
||||
v60WritePSW(cpustate, v60ReadPSW(cpustate) | 0x10000000);
|
||||
v60SaveStack(cpustate);
|
||||
v60WritePSW(v60ReadPSW() | 0x10000000);
|
||||
v60SaveStack();
|
||||
|
||||
cpustate->program->write_dword_unaligned(adr, cpustate->TKCW);
|
||||
m_program->write_dword_unaligned(adr, TKCW);
|
||||
adr += 4;
|
||||
if(cpustate->SYCW & 0x100) {
|
||||
cpustate->program->write_dword_unaligned(adr, cpustate->L0SP);
|
||||
if(SYCW & 0x100) {
|
||||
m_program->write_dword_unaligned(adr, L0SP);
|
||||
adr += 4;
|
||||
}
|
||||
if(cpustate->SYCW & 0x200) {
|
||||
cpustate->program->write_dword_unaligned(adr, cpustate->L1SP);
|
||||
if(SYCW & 0x200) {
|
||||
m_program->write_dword_unaligned(adr, L1SP);
|
||||
adr += 4;
|
||||
}
|
||||
if(cpustate->SYCW & 0x400) {
|
||||
cpustate->program->write_dword_unaligned(adr, cpustate->L2SP);
|
||||
if(SYCW & 0x400) {
|
||||
m_program->write_dword_unaligned(adr, L2SP);
|
||||
adr += 4;
|
||||
}
|
||||
if(cpustate->SYCW & 0x800) {
|
||||
cpustate->program->write_dword_unaligned(adr, cpustate->L3SP);
|
||||
if(SYCW & 0x800) {
|
||||
m_program->write_dword_unaligned(adr, L3SP);
|
||||
adr += 4;
|
||||
}
|
||||
|
||||
// 31 registers supported, _not_ 32
|
||||
for(i = 0; i < 31; i++)
|
||||
if(cpustate->amout & (1 << i)) {
|
||||
cpustate->program->write_dword_unaligned(adr, cpustate->reg[i]);
|
||||
if(m_amout & (1 << i)) {
|
||||
m_program->write_dword_unaligned(adr, m_reg[i]);
|
||||
adr += 4;
|
||||
}
|
||||
|
||||
// #### Ignore the virtual addressing crap.
|
||||
|
||||
return cpustate->amlength1 + 1;
|
||||
return m_amlength1 + 1;
|
||||
}
|
||||
|
||||
static UINT32 opGETPSW(v60_state *cpustate)
|
||||
UINT32 v60_device::opGETPSW()
|
||||
{
|
||||
cpustate->modadd = cpustate->PC + 1;
|
||||
cpustate->moddim = 2;
|
||||
cpustate->modwritevalw = v60ReadPSW(cpustate);
|
||||
m_modadd = PC + 1;
|
||||
m_moddim = 2;
|
||||
m_modwritevalw = v60ReadPSW();
|
||||
|
||||
// Write cpustate->PSW to the operand
|
||||
cpustate->amlength1 = WriteAM(cpustate);
|
||||
// Write PSW to the operand
|
||||
m_amlength1 = WriteAM();
|
||||
|
||||
return cpustate->amlength1 + 1;
|
||||
return m_amlength1 + 1;
|
||||
}
|
||||
|
||||
static UINT32 opTASI(v60_state *cpustate)
|
||||
UINT32 v60_device::opTASI()
|
||||
{
|
||||
UINT8 appb;
|
||||
cpustate->modadd = cpustate->PC + 1;
|
||||
cpustate->moddim = 0;
|
||||
m_modadd = PC + 1;
|
||||
m_moddim = 0;
|
||||
|
||||
// Load the address of the operand
|
||||
cpustate->amlength1 = ReadAMAddress(cpustate);
|
||||
m_amlength1 = ReadAMAddress();
|
||||
|
||||
// Load UINT8 from the address
|
||||
if (cpustate->amflag)
|
||||
appb = (UINT8)cpustate->reg[cpustate->amout & 0x1F];
|
||||
if (m_amflag)
|
||||
appb = (UINT8)m_reg[m_amout & 0x1F];
|
||||
else
|
||||
appb = cpustate->program->read_byte(cpustate->amout);
|
||||
appb = m_program->read_byte(m_amout);
|
||||
|
||||
// Set the flags for SUB appb, FF
|
||||
SUBB(appb, 0xff);
|
||||
|
||||
// Write FF in the operand
|
||||
if (cpustate->amflag)
|
||||
SETREG8(cpustate->reg[cpustate->amout & 0x1F], 0xFF);
|
||||
if (m_amflag)
|
||||
SETREG8(m_reg[m_amout & 0x1F], 0xFF);
|
||||
else
|
||||
cpustate->program->write_byte(cpustate->amout, 0xFF);
|
||||
m_program->write_byte(m_amout, 0xFF);
|
||||
|
||||
return cpustate->amlength1 + 1;
|
||||
return m_amlength1 + 1;
|
||||
}
|
||||
|
||||
static UINT32 opCLRTLB(v60_state *cpustate)
|
||||
UINT32 v60_device::opCLRTLB()
|
||||
{
|
||||
cpustate->modadd = cpustate->PC + 1;
|
||||
cpustate->moddim = 2;
|
||||
m_modadd = PC + 1;
|
||||
m_moddim = 2;
|
||||
|
||||
// Read the operand
|
||||
cpustate->amlength1 = ReadAM(cpustate);
|
||||
m_amlength1 = ReadAM();
|
||||
|
||||
// @@@ TLB not yet emulated
|
||||
|
||||
return cpustate->amlength1 + 1;
|
||||
return m_amlength1 + 1;
|
||||
}
|
||||
|
||||
static UINT32 opPOPM(v60_state *cpustate)
|
||||
UINT32 v60_device::opPOPM()
|
||||
{
|
||||
int i;
|
||||
|
||||
cpustate->modadd = cpustate->PC + 1;
|
||||
cpustate->moddim = 2;
|
||||
m_modadd = PC + 1;
|
||||
m_moddim = 2;
|
||||
|
||||
// Read the bit register list
|
||||
cpustate->amlength1 = ReadAM(cpustate);
|
||||
m_amlength1 = ReadAM();
|
||||
|
||||
for (i = 0;i < 31;i++)
|
||||
if (cpustate->amout & (1 << i))
|
||||
if (m_amout & (1 << i))
|
||||
{
|
||||
cpustate->reg[i] = cpustate->program->read_dword_unaligned(cpustate->SP);
|
||||
cpustate->SP += 4;
|
||||
m_reg[i] = m_program->read_dword_unaligned(SP);
|
||||
SP += 4;
|
||||
}
|
||||
|
||||
if (cpustate->amout & (1 << 31))
|
||||
if (m_amout & (1 << 31))
|
||||
{
|
||||
v60WritePSW(cpustate, (v60ReadPSW(cpustate) & 0xffff0000) | cpustate->program->read_word_unaligned(cpustate->SP));
|
||||
cpustate->SP += 4;
|
||||
v60WritePSW((v60ReadPSW() & 0xffff0000) | m_program->read_word_unaligned(SP));
|
||||
SP += 4;
|
||||
}
|
||||
|
||||
return cpustate->amlength1 + 1;
|
||||
return m_amlength1 + 1;
|
||||
}
|
||||
|
||||
static UINT32 opPUSHM(v60_state *cpustate)
|
||||
UINT32 v60_device::opPUSHM()
|
||||
{
|
||||
int i;
|
||||
|
||||
cpustate->modadd = cpustate->PC + 1;
|
||||
cpustate->moddim = 2;
|
||||
m_modadd = PC + 1;
|
||||
m_moddim = 2;
|
||||
|
||||
// Read the bit register list
|
||||
cpustate->amlength1 = ReadAM(cpustate);
|
||||
m_amlength1 = ReadAM();
|
||||
|
||||
if (cpustate->amout & (1 << 31))
|
||||
if (m_amout & (1 << 31))
|
||||
{
|
||||
cpustate->SP -= 4;
|
||||
cpustate->program->write_dword_unaligned(cpustate->SP, v60ReadPSW(cpustate));
|
||||
SP -= 4;
|
||||
m_program->write_dword_unaligned(SP, v60ReadPSW());
|
||||
}
|
||||
|
||||
for (i = 0;i < 31;i++)
|
||||
if (cpustate->amout & (1 << (30 - i)))
|
||||
if (m_amout & (1 << (30 - i)))
|
||||
{
|
||||
cpustate->SP -= 4;
|
||||
cpustate->program->write_dword_unaligned(cpustate->SP, cpustate->reg[(30 - i)]);
|
||||
SP -= 4;
|
||||
m_program->write_dword_unaligned(SP, m_reg[(30 - i)]);
|
||||
}
|
||||
|
||||
|
||||
return cpustate->amlength1 + 1;
|
||||
return m_amlength1 + 1;
|
||||
}
|
||||
|
||||
static UINT32 opTESTB(v60_state *cpustate) /* TRUSTED */
|
||||
UINT32 v60_device::opTESTB() /* TRUSTED */
|
||||
{
|
||||
cpustate->modadd = cpustate->PC + 1;
|
||||
cpustate->moddim = 0;
|
||||
m_modadd = PC + 1;
|
||||
m_moddim = 0;
|
||||
|
||||
// Read the operand
|
||||
cpustate->amlength1 = ReadAM(cpustate);
|
||||
m_amlength1 = ReadAM();
|
||||
|
||||
cpustate->_Z = (cpustate->amout == 0);
|
||||
cpustate->_S = ((cpustate->amout & 0x80) != 0);
|
||||
cpustate->_CY = 0;
|
||||
cpustate->_OV = 0;
|
||||
_Z = (m_amout == 0);
|
||||
_S = ((m_amout & 0x80) != 0);
|
||||
_CY = 0;
|
||||
_OV = 0;
|
||||
|
||||
return cpustate->amlength1 + 1;
|
||||
return m_amlength1 + 1;
|
||||
}
|
||||
|
||||
static UINT32 opTESTH(v60_state *cpustate) /* TRUSTED */
|
||||
UINT32 v60_device::opTESTH() /* TRUSTED */
|
||||
{
|
||||
cpustate->modadd = cpustate->PC + 1;
|
||||
cpustate->moddim = 1;
|
||||
m_modadd = PC + 1;
|
||||
m_moddim = 1;
|
||||
|
||||
// Read the operand
|
||||
cpustate->amlength1 = ReadAM(cpustate);
|
||||
m_amlength1 = ReadAM();
|
||||
|
||||
cpustate->_Z = (cpustate->amout == 0);
|
||||
cpustate->_S = ((cpustate->amout & 0x8000) != 0);
|
||||
cpustate->_CY = 0;
|
||||
cpustate->_OV = 0;
|
||||
_Z = (m_amout == 0);
|
||||
_S = ((m_amout & 0x8000) != 0);
|
||||
_CY = 0;
|
||||
_OV = 0;
|
||||
|
||||
return cpustate->amlength1 + 1;
|
||||
return m_amlength1 + 1;
|
||||
}
|
||||
|
||||
static UINT32 opTESTW(v60_state *cpustate) /* TRUSTED */
|
||||
UINT32 v60_device::opTESTW() /* TRUSTED */
|
||||
{
|
||||
cpustate->modadd = cpustate->PC + 1;
|
||||
cpustate->moddim = 2;
|
||||
m_modadd = PC + 1;
|
||||
m_moddim = 2;
|
||||
|
||||
// Read the operand
|
||||
cpustate->amlength1 = ReadAM(cpustate);
|
||||
m_amlength1 = ReadAM();
|
||||
|
||||
cpustate->_Z = (cpustate->amout == 0);
|
||||
cpustate->_S = ((cpustate->amout & 0x80000000) != 0);
|
||||
cpustate->_CY = 0;
|
||||
cpustate->_OV = 0;
|
||||
_Z = (m_amout == 0);
|
||||
_S = ((m_amout & 0x80000000) != 0);
|
||||
_CY = 0;
|
||||
_OV = 0;
|
||||
|
||||
return cpustate->amlength1 + 1;
|
||||
return m_amlength1 + 1;
|
||||
}
|
||||
|
||||
static UINT32 opPUSH(v60_state *cpustate)
|
||||
UINT32 v60_device::opPUSH()
|
||||
{
|
||||
cpustate->modadd = cpustate->PC + 1;
|
||||
cpustate->moddim = 2;
|
||||
m_modadd = PC + 1;
|
||||
m_moddim = 2;
|
||||
|
||||
cpustate->amlength1 = ReadAM(cpustate);
|
||||
m_amlength1 = ReadAM();
|
||||
|
||||
cpustate->SP-=4;
|
||||
cpustate->program->write_dword_unaligned(cpustate->SP, cpustate->amout);
|
||||
SP-=4;
|
||||
m_program->write_dword_unaligned(SP, m_amout);
|
||||
|
||||
return cpustate->amlength1 + 1;
|
||||
return m_amlength1 + 1;
|
||||
}
|
||||
|
||||
static UINT32 opPOP(v60_state *cpustate)
|
||||
UINT32 v60_device::opPOP()
|
||||
{
|
||||
cpustate->modadd = cpustate->PC + 1;
|
||||
cpustate->moddim = 2;
|
||||
cpustate->modwritevalw = cpustate->program->read_dword_unaligned(cpustate->SP);
|
||||
cpustate->SP +=4;
|
||||
cpustate->amlength1 = WriteAM(cpustate);
|
||||
m_modadd = PC + 1;
|
||||
m_moddim = 2;
|
||||
m_modwritevalw = m_program->read_dword_unaligned(SP);
|
||||
SP +=4;
|
||||
m_amlength1 = WriteAM();
|
||||
|
||||
return cpustate->amlength1 + 1;
|
||||
return m_amlength1 + 1;
|
||||
}
|
||||
|
||||
|
||||
static UINT32 opINCB_0(v60_state *cpustate) { cpustate->modm = 0; return opINCB(cpustate); }
|
||||
static UINT32 opINCB_1(v60_state *cpustate) { cpustate->modm = 1; return opINCB(cpustate); }
|
||||
static UINT32 opINCH_0(v60_state *cpustate) { cpustate->modm = 0; return opINCH(cpustate); }
|
||||
static UINT32 opINCH_1(v60_state *cpustate) { cpustate->modm = 1; return opINCH(cpustate); }
|
||||
static UINT32 opINCW_0(v60_state *cpustate) { cpustate->modm = 0; return opINCW(cpustate); }
|
||||
static UINT32 opINCW_1(v60_state *cpustate) { cpustate->modm = 1; return opINCW(cpustate); }
|
||||
UINT32 v60_device::opINCB_0() { m_modm = 0; return opINCB(); }
|
||||
UINT32 v60_device::opINCB_1() { m_modm = 1; return opINCB(); }
|
||||
UINT32 v60_device::opINCH_0() { m_modm = 0; return opINCH(); }
|
||||
UINT32 v60_device::opINCH_1() { m_modm = 1; return opINCH(); }
|
||||
UINT32 v60_device::opINCW_0() { m_modm = 0; return opINCW(); }
|
||||
UINT32 v60_device::opINCW_1() { m_modm = 1; return opINCW(); }
|
||||
|
||||
static UINT32 opDECB_0(v60_state *cpustate) { cpustate->modm = 0; return opDECB(cpustate); }
|
||||
static UINT32 opDECB_1(v60_state *cpustate) { cpustate->modm = 1; return opDECB(cpustate); }
|
||||
static UINT32 opDECH_0(v60_state *cpustate) { cpustate->modm = 0; return opDECH(cpustate); }
|
||||
static UINT32 opDECH_1(v60_state *cpustate) { cpustate->modm = 1; return opDECH(cpustate); }
|
||||
static UINT32 opDECW_0(v60_state *cpustate) { cpustate->modm = 0; return opDECW(cpustate); }
|
||||
static UINT32 opDECW_1(v60_state *cpustate) { cpustate->modm = 1; return opDECW(cpustate); }
|
||||
UINT32 v60_device::opDECB_0() { m_modm = 0; return opDECB(); }
|
||||
UINT32 v60_device::opDECB_1() { m_modm = 1; return opDECB(); }
|
||||
UINT32 v60_device::opDECH_0() { m_modm = 0; return opDECH(); }
|
||||
UINT32 v60_device::opDECH_1() { m_modm = 1; return opDECH(); }
|
||||
UINT32 v60_device::opDECW_0() { m_modm = 0; return opDECW(); }
|
||||
UINT32 v60_device::opDECW_1() { m_modm = 1; return opDECW(); }
|
||||
|
||||
static UINT32 opJMP_0(v60_state *cpustate) { cpustate->modm = 0; return opJMP(cpustate); }
|
||||
static UINT32 opJMP_1(v60_state *cpustate) { cpustate->modm = 1; return opJMP(cpustate); }
|
||||
UINT32 v60_device::opJMP_0() { m_modm = 0; return opJMP(); }
|
||||
UINT32 v60_device::opJMP_1() { m_modm = 1; return opJMP(); }
|
||||
|
||||
static UINT32 opJSR_0(v60_state *cpustate) { cpustate->modm = 0; return opJSR(cpustate); }
|
||||
static UINT32 opJSR_1(v60_state *cpustate) { cpustate->modm = 1; return opJSR(cpustate); }
|
||||
UINT32 v60_device::opJSR_0() { m_modm = 0; return opJSR(); }
|
||||
UINT32 v60_device::opJSR_1() { m_modm = 1; return opJSR(); }
|
||||
|
||||
static UINT32 opPREPARE_0(v60_state *cpustate) { cpustate->modm = 0; return opPREPARE(cpustate); }
|
||||
static UINT32 opPREPARE_1(v60_state *cpustate) { cpustate->modm = 1; return opPREPARE(cpustate); }
|
||||
UINT32 v60_device::opPREPARE_0() { m_modm = 0; return opPREPARE(); }
|
||||
UINT32 v60_device::opPREPARE_1() { m_modm = 1; return opPREPARE(); }
|
||||
|
||||
static UINT32 opRET_0(v60_state *cpustate) { cpustate->modm = 0; return opRET(cpustate); }
|
||||
static UINT32 opRET_1(v60_state *cpustate) { cpustate->modm = 1; return opRET(cpustate); }
|
||||
UINT32 v60_device::opRET_0() { m_modm = 0; return opRET(); }
|
||||
UINT32 v60_device::opRET_1() { m_modm = 1; return opRET(); }
|
||||
|
||||
static UINT32 opTRAP_0(v60_state *cpustate) { cpustate->modm = 0; return opTRAP(cpustate); }
|
||||
static UINT32 opTRAP_1(v60_state *cpustate) { cpustate->modm = 1; return opTRAP(cpustate); }
|
||||
UINT32 v60_device::opTRAP_0() { m_modm = 0; return opTRAP(); }
|
||||
UINT32 v60_device::opTRAP_1() { m_modm = 1; return opTRAP(); }
|
||||
|
||||
static UINT32 opRETIU_0(v60_state *cpustate) { cpustate->modm = 0; return opRETIU(cpustate); }
|
||||
static UINT32 opRETIU_1(v60_state *cpustate) { cpustate->modm = 1; return opRETIU(cpustate); }
|
||||
UINT32 v60_device::opRETIU_0() { m_modm = 0; return opRETIU(); }
|
||||
UINT32 v60_device::opRETIU_1() { m_modm = 1; return opRETIU(); }
|
||||
|
||||
static UINT32 opRETIS_0(v60_state *cpustate) { cpustate->modm = 0; return opRETIS(cpustate); }
|
||||
static UINT32 opRETIS_1(v60_state *cpustate) { cpustate->modm = 1; return opRETIS(cpustate); }
|
||||
UINT32 v60_device::opRETIS_0() { m_modm = 0; return opRETIS(); }
|
||||
UINT32 v60_device::opRETIS_1() { m_modm = 1; return opRETIS(); }
|
||||
|
||||
static UINT32 opGETPSW_0(v60_state *cpustate) { cpustate->modm = 0; return opGETPSW(cpustate); }
|
||||
static UINT32 opGETPSW_1(v60_state *cpustate) { cpustate->modm = 1; return opGETPSW(cpustate); }
|
||||
UINT32 v60_device::opGETPSW_0() { m_modm = 0; return opGETPSW(); }
|
||||
UINT32 v60_device::opGETPSW_1() { m_modm = 1; return opGETPSW(); }
|
||||
|
||||
static UINT32 opTASI_0(v60_state *cpustate) { cpustate->modm = 0; return opTASI(cpustate); }
|
||||
static UINT32 opTASI_1(v60_state *cpustate) { cpustate->modm = 1; return opTASI(cpustate); }
|
||||
UINT32 v60_device::opTASI_0() { m_modm = 0; return opTASI(); }
|
||||
UINT32 v60_device::opTASI_1() { m_modm = 1; return opTASI(); }
|
||||
|
||||
static UINT32 opCLRTLB_0(v60_state *cpustate) { cpustate->modm = 0; return opCLRTLB(cpustate); }
|
||||
static UINT32 opCLRTLB_1(v60_state *cpustate) { cpustate->modm = 1; return opCLRTLB(cpustate); }
|
||||
UINT32 v60_device::opCLRTLB_0() { m_modm = 0; return opCLRTLB(); }
|
||||
UINT32 v60_device::opCLRTLB_1() { m_modm = 1; return opCLRTLB(); }
|
||||
|
||||
static UINT32 opPOPM_0(v60_state *cpustate) { cpustate->modm = 0; return opPOPM(cpustate); }
|
||||
static UINT32 opPOPM_1(v60_state *cpustate) { cpustate->modm = 1; return opPOPM(cpustate); }
|
||||
UINT32 v60_device::opPOPM_0() { m_modm = 0; return opPOPM(); }
|
||||
UINT32 v60_device::opPOPM_1() { m_modm = 1; return opPOPM(); }
|
||||
|
||||
static UINT32 opPUSHM_0(v60_state *cpustate) { cpustate->modm = 0; return opPUSHM(cpustate); }
|
||||
static UINT32 opPUSHM_1(v60_state *cpustate) { cpustate->modm = 1; return opPUSHM(cpustate); }
|
||||
UINT32 v60_device::opPUSHM_0() { m_modm = 0; return opPUSHM(); }
|
||||
UINT32 v60_device::opPUSHM_1() { m_modm = 1; return opPUSHM(); }
|
||||
|
||||
static UINT32 opTESTB_0(v60_state *cpustate) { cpustate->modm = 0; return opTESTB(cpustate); }
|
||||
static UINT32 opTESTB_1(v60_state *cpustate) { cpustate->modm = 1; return opTESTB(cpustate); }
|
||||
UINT32 v60_device::opTESTB_0() { m_modm = 0; return opTESTB(); }
|
||||
UINT32 v60_device::opTESTB_1() { m_modm = 1; return opTESTB(); }
|
||||
|
||||
static UINT32 opTESTH_0(v60_state *cpustate) { cpustate->modm = 0; return opTESTH(cpustate); }
|
||||
static UINT32 opTESTH_1(v60_state *cpustate) { cpustate->modm = 1; return opTESTH(cpustate); }
|
||||
UINT32 v60_device::opTESTH_0() { m_modm = 0; return opTESTH(); }
|
||||
UINT32 v60_device::opTESTH_1() { m_modm = 1; return opTESTH(); }
|
||||
|
||||
static UINT32 opTESTW_0(v60_state *cpustate) { cpustate->modm = 0; return opTESTW(cpustate); }
|
||||
static UINT32 opTESTW_1(v60_state *cpustate) { cpustate->modm = 1; return opTESTW(cpustate); }
|
||||
UINT32 v60_device::opTESTW_0() { m_modm = 0; return opTESTW(); }
|
||||
UINT32 v60_device::opTESTW_1() { m_modm = 1; return opTESTW(); }
|
||||
|
||||
static UINT32 opPUSH_0(v60_state *cpustate) { cpustate->modm = 0; return opPUSH(cpustate); }
|
||||
static UINT32 opPUSH_1(v60_state *cpustate) { cpustate->modm = 1; return opPUSH(cpustate); }
|
||||
UINT32 v60_device::opPUSH_0() { m_modm = 0; return opPUSH(); }
|
||||
UINT32 v60_device::opPUSH_1() { m_modm = 1; return opPUSH(); }
|
||||
|
||||
static UINT32 opPOP_0(v60_state *cpustate) { cpustate->modm = 0; return opPOP(cpustate); }
|
||||
static UINT32 opPOP_1(v60_state *cpustate) { cpustate->modm = 1; return opPOP(cpustate); }
|
||||
UINT32 v60_device::opPOP_0() { m_modm = 0; return opPOP(); }
|
||||
UINT32 v60_device::opPOP_1() { m_modm = 1; return opPOP(); }
|
||||
|
||||
static UINT32 opSTTASK_0(v60_state *cpustate) { cpustate->modm = 0; return opSTTASK(cpustate); }
|
||||
static UINT32 opSTTASK_1(v60_state *cpustate) { cpustate->modm = 1; return opSTTASK(cpustate); }
|
||||
UINT32 v60_device::opSTTASK_0() { m_modm = 0; return opSTTASK(); }
|
||||
UINT32 v60_device::opSTTASK_1() { m_modm = 1; return opSTTASK(); }
|
||||
|
@ -3,26 +3,26 @@
|
||||
FULLY TRUSTED
|
||||
*/
|
||||
|
||||
static UINT32 opBGT8(v60_state *cpustate) /* TRUSTED */
|
||||
UINT32 v60_device::opBGT8() /* TRUSTED */
|
||||
{
|
||||
NORMALIZEFLAGS(cpustate);
|
||||
NORMALIZEFLAGS();
|
||||
|
||||
if (!((cpustate->_S ^ cpustate->_OV) | cpustate->_Z))
|
||||
if (!((_S ^ _OV) | _Z))
|
||||
{
|
||||
cpustate->PC += (INT8)OpRead8(cpustate, cpustate->PC + 1);
|
||||
PC += (INT8)OpRead8(PC + 1);
|
||||
return 0;
|
||||
}
|
||||
|
||||
return 2;
|
||||
}
|
||||
|
||||
static UINT32 opBGT16(v60_state *cpustate) /* TRUSTED */
|
||||
UINT32 v60_device::opBGT16() /* TRUSTED */
|
||||
{
|
||||
NORMALIZEFLAGS(cpustate);
|
||||
NORMALIZEFLAGS();
|
||||
|
||||
if (!((cpustate->_S ^ cpustate->_OV) | cpustate->_Z))
|
||||
if (!((_S ^ _OV) | _Z))
|
||||
{
|
||||
cpustate->PC += (INT16)OpRead16(cpustate, cpustate->PC + 1);
|
||||
PC += (INT16)OpRead16(PC + 1);
|
||||
return 0;
|
||||
}
|
||||
|
||||
@ -30,52 +30,52 @@ static UINT32 opBGT16(v60_state *cpustate) /* TRUSTED */
|
||||
}
|
||||
|
||||
|
||||
static UINT32 opBGE8(v60_state *cpustate) /* TRUSTED */
|
||||
UINT32 v60_device::opBGE8() /* TRUSTED */
|
||||
{
|
||||
NORMALIZEFLAGS(cpustate);
|
||||
NORMALIZEFLAGS();
|
||||
|
||||
if (!(cpustate->_S ^ cpustate->_OV))
|
||||
if (!(_S ^ _OV))
|
||||
{
|
||||
cpustate->PC += (INT8)OpRead8(cpustate, cpustate->PC + 1);
|
||||
PC += (INT8)OpRead8(PC + 1);
|
||||
return 0;
|
||||
}
|
||||
|
||||
return 2;
|
||||
}
|
||||
|
||||
static UINT32 opBGE16(v60_state *cpustate) /* TRUSTED */
|
||||
UINT32 v60_device::opBGE16() /* TRUSTED */
|
||||
{
|
||||
NORMALIZEFLAGS(cpustate);
|
||||
NORMALIZEFLAGS();
|
||||
|
||||
if (!(cpustate->_S ^ cpustate->_OV))
|
||||
if (!(_S ^ _OV))
|
||||
{
|
||||
cpustate->PC += (INT16)OpRead16(cpustate, cpustate->PC + 1);
|
||||
PC += (INT16)OpRead16(PC + 1);
|
||||
return 0;
|
||||
}
|
||||
|
||||
return 3;
|
||||
}
|
||||
|
||||
static UINT32 opBLT8(v60_state *cpustate) /* TRUSTED */
|
||||
UINT32 v60_device::opBLT8() /* TRUSTED */
|
||||
{
|
||||
NORMALIZEFLAGS(cpustate);
|
||||
NORMALIZEFLAGS();
|
||||
|
||||
if ((cpustate->_S ^ cpustate->_OV))
|
||||
if ((_S ^ _OV))
|
||||
{
|
||||
cpustate->PC += (INT8)OpRead8(cpustate, cpustate->PC + 1);
|
||||
PC += (INT8)OpRead8(PC + 1);
|
||||
return 0;
|
||||
}
|
||||
|
||||
return 2;
|
||||
}
|
||||
|
||||
static UINT32 opBLT16(v60_state *cpustate) /* TRUSTED */
|
||||
UINT32 v60_device::opBLT16() /* TRUSTED */
|
||||
{
|
||||
NORMALIZEFLAGS(cpustate);
|
||||
NORMALIZEFLAGS();
|
||||
|
||||
if ((cpustate->_S ^ cpustate->_OV))
|
||||
if ((_S ^ _OV))
|
||||
{
|
||||
cpustate->PC += (INT16)OpRead16(cpustate, cpustate->PC + 1);
|
||||
PC += (INT16)OpRead16(PC + 1);
|
||||
return 0;
|
||||
}
|
||||
|
||||
@ -83,271 +83,271 @@ static UINT32 opBLT16(v60_state *cpustate) /* TRUSTED */
|
||||
}
|
||||
|
||||
|
||||
static UINT32 opBLE8(v60_state *cpustate) /* TRUSTED */
|
||||
UINT32 v60_device::opBLE8() /* TRUSTED */
|
||||
{
|
||||
NORMALIZEFLAGS(cpustate);
|
||||
NORMALIZEFLAGS();
|
||||
|
||||
if (((cpustate->_S ^ cpustate->_OV) | cpustate->_Z))
|
||||
if (((_S ^ _OV) | _Z))
|
||||
{
|
||||
cpustate->PC += (INT8)OpRead8(cpustate, cpustate->PC + 1);
|
||||
PC += (INT8)OpRead8(PC + 1);
|
||||
return 0;
|
||||
}
|
||||
|
||||
return 2;
|
||||
}
|
||||
|
||||
static UINT32 opBLE16(v60_state *cpustate) /* TRUSTED */
|
||||
UINT32 v60_device::opBLE16() /* TRUSTED */
|
||||
{
|
||||
NORMALIZEFLAGS(cpustate);
|
||||
NORMALIZEFLAGS();
|
||||
|
||||
if (((cpustate->_S ^ cpustate->_OV) | cpustate->_Z))
|
||||
if (((_S ^ _OV) | _Z))
|
||||
{
|
||||
cpustate->PC += (INT16)OpRead16(cpustate, cpustate->PC + 1);
|
||||
PC += (INT16)OpRead16(PC + 1);
|
||||
return 0;
|
||||
}
|
||||
|
||||
return 3;
|
||||
}
|
||||
|
||||
static UINT32 opBH8(v60_state *cpustate) /* TRUSTED */
|
||||
UINT32 v60_device::opBH8() /* TRUSTED */
|
||||
{
|
||||
if (!(cpustate->_CY | cpustate->_Z))
|
||||
if (!(_CY | _Z))
|
||||
{
|
||||
cpustate->PC += (INT8)OpRead8(cpustate, cpustate->PC + 1);
|
||||
PC += (INT8)OpRead8(PC + 1);
|
||||
return 0;
|
||||
}
|
||||
|
||||
return 2;
|
||||
}
|
||||
|
||||
static UINT32 opBH16(v60_state *cpustate) /* TRUSTED */
|
||||
UINT32 v60_device::opBH16() /* TRUSTED */
|
||||
{
|
||||
if (!(cpustate->_CY | cpustate->_Z))
|
||||
if (!(_CY | _Z))
|
||||
{
|
||||
cpustate->PC += (INT16)OpRead16(cpustate, cpustate->PC + 1);
|
||||
PC += (INT16)OpRead16(PC + 1);
|
||||
return 0;
|
||||
}
|
||||
|
||||
return 3;
|
||||
}
|
||||
|
||||
static UINT32 opBNH8(v60_state *cpustate) /* TRUSTED */
|
||||
UINT32 v60_device::opBNH8() /* TRUSTED */
|
||||
{
|
||||
if ((cpustate->_CY | cpustate->_Z))
|
||||
if ((_CY | _Z))
|
||||
{
|
||||
cpustate->PC += (INT8)OpRead8(cpustate, cpustate->PC + 1);
|
||||
PC += (INT8)OpRead8(PC + 1);
|
||||
return 0;
|
||||
}
|
||||
|
||||
return 2;
|
||||
}
|
||||
|
||||
static UINT32 opBNH16(v60_state *cpustate) /* TRUSTED */
|
||||
UINT32 v60_device::opBNH16() /* TRUSTED */
|
||||
{
|
||||
if ((cpustate->_CY | cpustate->_Z))
|
||||
if ((_CY | _Z))
|
||||
{
|
||||
cpustate->PC += (INT16)OpRead16(cpustate, cpustate->PC + 1);
|
||||
PC += (INT16)OpRead16(PC + 1);
|
||||
return 0;
|
||||
}
|
||||
|
||||
return 3;
|
||||
}
|
||||
|
||||
static UINT32 opBNL8(v60_state *cpustate) /* TRUSTED */
|
||||
UINT32 v60_device::opBNL8() /* TRUSTED */
|
||||
{
|
||||
if (!(cpustate->_CY))
|
||||
if (!(_CY))
|
||||
{
|
||||
cpustate->PC += (INT8)OpRead8(cpustate, cpustate->PC + 1);
|
||||
PC += (INT8)OpRead8(PC + 1);
|
||||
return 0;
|
||||
}
|
||||
|
||||
return 2;
|
||||
}
|
||||
|
||||
static UINT32 opBNL16(v60_state *cpustate) /* TRUSTED */
|
||||
UINT32 v60_device::opBNL16() /* TRUSTED */
|
||||
{
|
||||
if (!(cpustate->_CY))
|
||||
if (!(_CY))
|
||||
{
|
||||
cpustate->PC += (INT16)OpRead16(cpustate, cpustate->PC + 1);
|
||||
PC += (INT16)OpRead16(PC + 1);
|
||||
return 0;
|
||||
}
|
||||
|
||||
return 3;
|
||||
}
|
||||
|
||||
static UINT32 opBL8(v60_state *cpustate) /* TRUSTED */
|
||||
UINT32 v60_device::opBL8() /* TRUSTED */
|
||||
{
|
||||
if ((cpustate->_CY))
|
||||
if ((_CY))
|
||||
{
|
||||
cpustate->PC += (INT8)OpRead8(cpustate, cpustate->PC + 1);
|
||||
PC += (INT8)OpRead8(PC + 1);
|
||||
return 0;
|
||||
}
|
||||
|
||||
return 2;
|
||||
}
|
||||
|
||||
static UINT32 opBL16(v60_state *cpustate) /* TRUSTED */
|
||||
UINT32 v60_device::opBL16() /* TRUSTED */
|
||||
{
|
||||
if ((cpustate->_CY))
|
||||
if ((_CY))
|
||||
{
|
||||
cpustate->PC += (INT16)OpRead16(cpustate, cpustate->PC + 1);
|
||||
PC += (INT16)OpRead16(PC + 1);
|
||||
return 0;
|
||||
}
|
||||
|
||||
return 3;
|
||||
}
|
||||
|
||||
static UINT32 opBNE8(v60_state *cpustate) /* TRUSTED */
|
||||
UINT32 v60_device::opBNE8() /* TRUSTED */
|
||||
{
|
||||
if (!(cpustate->_Z))
|
||||
if (!(_Z))
|
||||
{
|
||||
cpustate->PC += (INT8)OpRead8(cpustate, cpustate->PC + 1);
|
||||
PC += (INT8)OpRead8(PC + 1);
|
||||
return 0;
|
||||
}
|
||||
|
||||
return 2;
|
||||
}
|
||||
|
||||
static UINT32 opBNE16(v60_state *cpustate) /* TRUSTED */
|
||||
UINT32 v60_device::opBNE16() /* TRUSTED */
|
||||
{
|
||||
if (!(cpustate->_Z))
|
||||
if (!(_Z))
|
||||
{
|
||||
cpustate->PC += (INT16)OpRead16(cpustate, cpustate->PC + 1);
|
||||
PC += (INT16)OpRead16(PC + 1);
|
||||
return 0;
|
||||
}
|
||||
|
||||
return 3;
|
||||
}
|
||||
|
||||
static UINT32 opBE8(v60_state *cpustate) /* TRUSTED */
|
||||
UINT32 v60_device::opBE8() /* TRUSTED */
|
||||
{
|
||||
if ((cpustate->_Z))
|
||||
if ((_Z))
|
||||
{
|
||||
cpustate->PC += (INT8)OpRead8(cpustate, cpustate->PC + 1);
|
||||
PC += (INT8)OpRead8(PC + 1);
|
||||
return 0;
|
||||
}
|
||||
|
||||
return 2;
|
||||
}
|
||||
|
||||
static UINT32 opBE16(v60_state *cpustate) /* TRUSTED */
|
||||
UINT32 v60_device::opBE16() /* TRUSTED */
|
||||
{
|
||||
if ((cpustate->_Z))
|
||||
if ((_Z))
|
||||
{
|
||||
cpustate->PC += (INT16)OpRead16(cpustate, cpustate->PC + 1);
|
||||
PC += (INT16)OpRead16(PC + 1);
|
||||
return 0;
|
||||
}
|
||||
|
||||
return 3;
|
||||
}
|
||||
|
||||
static UINT32 opBNV8(v60_state *cpustate) /* TRUSTED */
|
||||
UINT32 v60_device::opBNV8() /* TRUSTED */
|
||||
{
|
||||
if (!(cpustate->_OV))
|
||||
if (!(_OV))
|
||||
{
|
||||
cpustate->PC += (INT8)OpRead8(cpustate, cpustate->PC + 1);
|
||||
PC += (INT8)OpRead8(PC + 1);
|
||||
return 0;
|
||||
}
|
||||
|
||||
return 2;
|
||||
}
|
||||
|
||||
static UINT32 opBNV16(v60_state *cpustate) /* TRUSTED */
|
||||
UINT32 v60_device::opBNV16() /* TRUSTED */
|
||||
{
|
||||
if (!(cpustate->_OV))
|
||||
if (!(_OV))
|
||||
{
|
||||
cpustate->PC += (INT16)OpRead16(cpustate, cpustate->PC + 1);
|
||||
PC += (INT16)OpRead16(PC + 1);
|
||||
return 0;
|
||||
}
|
||||
|
||||
return 3;
|
||||
}
|
||||
|
||||
static UINT32 opBV8(v60_state *cpustate) /* TRUSTED */
|
||||
UINT32 v60_device::opBV8() /* TRUSTED */
|
||||
{
|
||||
if ((cpustate->_OV))
|
||||
if ((_OV))
|
||||
{
|
||||
cpustate->PC += (INT8)OpRead8(cpustate, cpustate->PC + 1);
|
||||
PC += (INT8)OpRead8(PC + 1);
|
||||
return 0;
|
||||
}
|
||||
|
||||
return 2;
|
||||
}
|
||||
|
||||
static UINT32 opBV16(v60_state *cpustate) /* TRUSTED */
|
||||
UINT32 v60_device::opBV16() /* TRUSTED */
|
||||
{
|
||||
if ((cpustate->_OV))
|
||||
if ((_OV))
|
||||
{
|
||||
cpustate->PC += (INT16)OpRead16(cpustate, cpustate->PC + 1);
|
||||
PC += (INT16)OpRead16(PC + 1);
|
||||
return 0;
|
||||
}
|
||||
|
||||
return 3;
|
||||
}
|
||||
|
||||
static UINT32 opBP8(v60_state *cpustate) /* TRUSTED */
|
||||
UINT32 v60_device::opBP8() /* TRUSTED */
|
||||
{
|
||||
if (!(cpustate->_S))
|
||||
if (!(_S))
|
||||
{
|
||||
cpustate->PC += (INT8)OpRead8(cpustate, cpustate->PC + 1);
|
||||
PC += (INT8)OpRead8(PC + 1);
|
||||
return 0;
|
||||
}
|
||||
|
||||
return 2;
|
||||
}
|
||||
|
||||
static UINT32 opBP16(v60_state *cpustate) /* TRUSTED */
|
||||
UINT32 v60_device::opBP16() /* TRUSTED */
|
||||
{
|
||||
if (!(cpustate->_S))
|
||||
if (!(_S))
|
||||
{
|
||||
cpustate->PC += (INT16)OpRead16(cpustate, cpustate->PC + 1);
|
||||
PC += (INT16)OpRead16(PC + 1);
|
||||
return 0;
|
||||
}
|
||||
|
||||
return 3;
|
||||
}
|
||||
|
||||
static UINT32 opBN8(v60_state *cpustate) /* TRUSTED */
|
||||
UINT32 v60_device::opBN8() /* TRUSTED */
|
||||
{
|
||||
if ((cpustate->_S))
|
||||
if ((_S))
|
||||
{
|
||||
cpustate->PC += (INT8)OpRead8(cpustate, cpustate->PC + 1);
|
||||
PC += (INT8)OpRead8(PC + 1);
|
||||
return 0;
|
||||
}
|
||||
|
||||
return 2;
|
||||
}
|
||||
|
||||
static UINT32 opBN16(v60_state *cpustate) /* TRUSTED */
|
||||
UINT32 v60_device::opBN16() /* TRUSTED */
|
||||
{
|
||||
if ((cpustate->_S))
|
||||
if ((_S))
|
||||
{
|
||||
cpustate->PC += (INT16)OpRead16(cpustate, cpustate->PC + 1);
|
||||
PC += (INT16)OpRead16(PC + 1);
|
||||
return 0;
|
||||
}
|
||||
|
||||
return 3;
|
||||
}
|
||||
|
||||
static UINT32 opBR8(v60_state *cpustate) /* TRUSTED */
|
||||
UINT32 v60_device::opBR8() /* TRUSTED */
|
||||
{
|
||||
cpustate->PC += (INT8)OpRead8(cpustate, cpustate->PC + 1);
|
||||
PC += (INT8)OpRead8(PC + 1);
|
||||
return 0;
|
||||
}
|
||||
|
||||
static UINT32 opBR16(v60_state *cpustate) /* TRUSTED */
|
||||
UINT32 v60_device::opBR16() /* TRUSTED */
|
||||
{
|
||||
cpustate->PC += (INT16)OpRead16(cpustate, cpustate->PC + 1);
|
||||
PC += (INT16)OpRead16(PC + 1);
|
||||
return 0;
|
||||
}
|
||||
|
||||
static UINT32 opBSR(v60_state *cpustate) /* TRUSTED */
|
||||
UINT32 v60_device::opBSR() /* TRUSTED */
|
||||
{
|
||||
// Save Next cpustate->PC onto the stack
|
||||
cpustate->SP -= 4;
|
||||
cpustate->program->write_dword_unaligned(cpustate->SP, cpustate->PC + 3);
|
||||
// Save Next PC onto the stack
|
||||
SP -= 4;
|
||||
m_program->write_dword_unaligned(SP, PC + 3);
|
||||
|
||||
// Jump to subroutine
|
||||
cpustate->PC += (INT16)OpRead16(cpustate, cpustate->PC + 1);
|
||||
PC += (INT16)OpRead16(PC + 1);
|
||||
return 0;
|
||||
}
|
||||
|
@ -3,83 +3,83 @@
|
||||
* HALT: must add log
|
||||
*/
|
||||
|
||||
static UINT32 opBRK(v60_state *cpustate)
|
||||
UINT32 v60_device::opBRK()
|
||||
{
|
||||
/*
|
||||
UINT32 oldPSW = v60_update_psw_for_exception(cpustate, 0, 0);
|
||||
UINT32 oldPSW = v60_update_psw_for_exception(0, 0);
|
||||
|
||||
cpustate->SP -=4;
|
||||
cpustate->program->write_dword_unaligned(cpustate->SP, EXCEPTION_CODE_AND_SIZE(0x0d00, 4));
|
||||
cpustate->SP -=4;
|
||||
cpustate->program->write_dword_unaligned(cpustate->SP, oldPSW);
|
||||
cpustate->SP -=4;
|
||||
cpustate->program->write_dword_unaligned(cpustate->SP, cpustate->PC + 1);
|
||||
cpustate->PC = GETINTVECT(cpustate, 13);
|
||||
SP -=4;
|
||||
m_program->write_dword_unaligned(SP, EXCEPTION_CODE_AND_SIZE(0x0d00, 4));
|
||||
SP -=4;
|
||||
m_program->write_dword_unaligned(SP, oldPSW);
|
||||
SP -=4;
|
||||
m_program->write_dword_unaligned(SP, PC + 1);
|
||||
PC = GETINTVECT(13);
|
||||
*/
|
||||
logerror("Skipping BRK opcode! cpustate->PC=%x", cpustate->PC);
|
||||
logerror("Skipping BRK opcode! PC=%x", PC);
|
||||
|
||||
return 1;
|
||||
}
|
||||
|
||||
static UINT32 opBRKV(v60_state *cpustate)
|
||||
UINT32 v60_device::opBRKV()
|
||||
{
|
||||
UINT32 oldPSW = v60_update_psw_for_exception(cpustate, 0, 0);
|
||||
UINT32 oldPSW = v60_update_psw_for_exception(0, 0);
|
||||
|
||||
cpustate->SP -=4;
|
||||
cpustate->program->write_dword_unaligned(cpustate->SP, cpustate->PC);
|
||||
cpustate->SP -=4;
|
||||
cpustate->program->write_dword_unaligned(cpustate->SP, EXCEPTION_CODE_AND_SIZE(0x1501, 4));
|
||||
cpustate->SP -=4;
|
||||
cpustate->program->write_dword_unaligned(cpustate->SP, oldPSW);
|
||||
cpustate->SP -=4;
|
||||
cpustate->program->write_dword_unaligned(cpustate->SP, cpustate->PC + 1);
|
||||
cpustate->PC = GETINTVECT(cpustate, 21);
|
||||
SP -=4;
|
||||
m_program->write_dword_unaligned(SP, PC);
|
||||
SP -=4;
|
||||
m_program->write_dword_unaligned(SP, EXCEPTION_CODE_AND_SIZE(0x1501, 4));
|
||||
SP -=4;
|
||||
m_program->write_dword_unaligned(SP, oldPSW);
|
||||
SP -=4;
|
||||
m_program->write_dword_unaligned(SP, PC + 1);
|
||||
PC = GETINTVECT(21);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static UINT32 opCLRTLBA(v60_state *cpustate)
|
||||
UINT32 v60_device::opCLRTLBA()
|
||||
{
|
||||
// @@@ TLB not yet supported
|
||||
logerror("Skipping CLRTLBA opcode! cpustate->PC=%x\n", cpustate->PC);
|
||||
logerror("Skipping CLRTLBA opcode! PC=%x\n", PC);
|
||||
return 1;
|
||||
}
|
||||
|
||||
static UINT32 opDISPOSE(v60_state *cpustate)
|
||||
UINT32 v60_device::opDISPOSE()
|
||||
{
|
||||
cpustate->SP = cpustate->FP;
|
||||
cpustate->FP = cpustate->program->read_dword_unaligned(cpustate->SP);
|
||||
cpustate->SP +=4;
|
||||
SP = FP;
|
||||
FP = m_program->read_dword_unaligned(SP);
|
||||
SP +=4;
|
||||
|
||||
return 1;
|
||||
}
|
||||
|
||||
static UINT32 opHALT(v60_state *cpustate)
|
||||
UINT32 v60_device::opHALT()
|
||||
{
|
||||
// @@@ It should wait for an interrupt to occur
|
||||
//logerror("HALT found: skipping");
|
||||
return 1;
|
||||
}
|
||||
|
||||
static UINT32 opNOP(v60_state *cpustate) /* TRUSTED */
|
||||
UINT32 v60_device::opNOP() /* TRUSTED */
|
||||
{
|
||||
return 1;
|
||||
}
|
||||
|
||||
static UINT32 opRSR(v60_state *cpustate)
|
||||
UINT32 v60_device::opRSR()
|
||||
{
|
||||
cpustate->PC = cpustate->program->read_dword_unaligned(cpustate->SP);
|
||||
cpustate->SP +=4;
|
||||
PC = m_program->read_dword_unaligned(SP);
|
||||
SP +=4;
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static UINT32 opTRAPFL(v60_state *cpustate)
|
||||
UINT32 v60_device::opTRAPFL()
|
||||
{
|
||||
if ((cpustate->TKCW & 0x1F0) & ((v60ReadPSW(cpustate) & 0x1F00) >> 4))
|
||||
if ((TKCW & 0x1F0) & ((v60ReadPSW() & 0x1F00) >> 4))
|
||||
{
|
||||
// @@@ FPU exception
|
||||
fatalerror("Hit TRAPFL! cpustate->PC=%x\n", cpustate->PC);
|
||||
fatalerror("Hit TRAPFL! PC=%x\n", PC);
|
||||
}
|
||||
|
||||
return 1;
|
||||
|
@ -3,39 +3,39 @@
|
||||
FULLY TRUSTED
|
||||
*/
|
||||
|
||||
static UINT32 opTB(v60_state *cpustate, int reg) /* TRUSTED */
|
||||
UINT32 v60_device::opTB(int reg) /* TRUSTED */
|
||||
{
|
||||
if (cpustate->reg[reg] == 0)
|
||||
if (m_reg[reg] == 0)
|
||||
{
|
||||
cpustate->PC += (INT16)OpRead16(cpustate, cpustate->PC + 2);
|
||||
PC += (INT16)OpRead16(PC + 2);
|
||||
return 0;
|
||||
}
|
||||
|
||||
return 4;
|
||||
}
|
||||
|
||||
static UINT32 opDBGT(v60_state *cpustate, int reg) /* TRUSTED */
|
||||
UINT32 v60_device::opDBGT(int reg) /* TRUSTED */
|
||||
{
|
||||
cpustate->reg[reg]--;
|
||||
m_reg[reg]--;
|
||||
|
||||
NORMALIZEFLAGS(cpustate);
|
||||
if ((cpustate->reg[reg] != 0) && !((cpustate->_S ^ cpustate->_OV) | cpustate->_Z))
|
||||
NORMALIZEFLAGS();
|
||||
if ((m_reg[reg] != 0) && !((_S ^ _OV) | _Z))
|
||||
{
|
||||
cpustate->PC += (INT16)OpRead16(cpustate, cpustate->PC + 2);
|
||||
PC += (INT16)OpRead16(PC + 2);
|
||||
return 0;
|
||||
}
|
||||
|
||||
return 4;
|
||||
}
|
||||
|
||||
static UINT32 opDBLE(v60_state *cpustate, int reg) /* TRUSTED */
|
||||
UINT32 v60_device::opDBLE(int reg) /* TRUSTED */
|
||||
{
|
||||
cpustate->reg[reg]--;
|
||||
m_reg[reg]--;
|
||||
|
||||
NORMALIZEFLAGS(cpustate);
|
||||
if ((cpustate->reg[reg] != 0) && ((cpustate->_S ^ cpustate->_OV) | cpustate->_Z))
|
||||
NORMALIZEFLAGS();
|
||||
if ((m_reg[reg] != 0) && ((_S ^ _OV) | _Z))
|
||||
{
|
||||
cpustate->PC += (INT16)OpRead16(cpustate, cpustate->PC + 2);
|
||||
PC += (INT16)OpRead16(PC + 2);
|
||||
return 0;
|
||||
}
|
||||
|
||||
@ -43,54 +43,54 @@ static UINT32 opDBLE(v60_state *cpustate, int reg) /* TRUSTED */
|
||||
}
|
||||
|
||||
|
||||
static UINT32 opDBGE(v60_state *cpustate, int reg) /* TRUSTED */
|
||||
UINT32 v60_device::opDBGE(int reg) /* TRUSTED */
|
||||
{
|
||||
cpustate->reg[reg]--;
|
||||
m_reg[reg]--;
|
||||
|
||||
NORMALIZEFLAGS(cpustate);
|
||||
if ((cpustate->reg[reg] != 0) && !(cpustate->_S ^ cpustate->_OV))
|
||||
NORMALIZEFLAGS();
|
||||
if ((m_reg[reg] != 0) && !(_S ^ _OV))
|
||||
{
|
||||
cpustate->PC += (INT16)OpRead16(cpustate, cpustate->PC + 2);
|
||||
PC += (INT16)OpRead16(PC + 2);
|
||||
return 0;
|
||||
}
|
||||
|
||||
return 4;
|
||||
}
|
||||
|
||||
static UINT32 opDBLT(v60_state *cpustate, int reg) /* TRUSTED */
|
||||
UINT32 v60_device::opDBLT(int reg) /* TRUSTED */
|
||||
{
|
||||
cpustate->reg[reg]--;
|
||||
m_reg[reg]--;
|
||||
|
||||
NORMALIZEFLAGS(cpustate);
|
||||
if ((cpustate->reg[reg] != 0) && (cpustate->_S ^ cpustate->_OV))
|
||||
NORMALIZEFLAGS();
|
||||
if ((m_reg[reg] != 0) && (_S ^ _OV))
|
||||
{
|
||||
cpustate->PC += (INT16)OpRead16(cpustate, cpustate->PC + 2);
|
||||
PC += (INT16)OpRead16(PC + 2);
|
||||
return 0;
|
||||
}
|
||||
|
||||
return 4;
|
||||
}
|
||||
|
||||
static UINT32 opDBH(v60_state *cpustate, int reg) /* TRUSTED */
|
||||
UINT32 v60_device::opDBH(int reg) /* TRUSTED */
|
||||
{
|
||||
cpustate->reg[reg]--;
|
||||
m_reg[reg]--;
|
||||
|
||||
if ((cpustate->reg[reg] != 0) && !(cpustate->_CY | cpustate->_Z))
|
||||
if ((m_reg[reg] != 0) && !(_CY | _Z))
|
||||
{
|
||||
cpustate->PC += (INT16)OpRead16(cpustate, cpustate->PC + 2);
|
||||
PC += (INT16)OpRead16(PC + 2);
|
||||
return 0;
|
||||
}
|
||||
|
||||
return 4;
|
||||
}
|
||||
|
||||
static UINT32 opDBNH(v60_state *cpustate, int reg) /* TRUSTED */
|
||||
UINT32 v60_device::opDBNH(int reg) /* TRUSTED */
|
||||
{
|
||||
cpustate->reg[reg]--;
|
||||
m_reg[reg]--;
|
||||
|
||||
if ((cpustate->reg[reg] != 0) && (cpustate->_CY | cpustate->_Z))
|
||||
if ((m_reg[reg] != 0) && (_CY | _Z))
|
||||
{
|
||||
cpustate->PC += (INT16)OpRead16(cpustate, cpustate->PC + 2);
|
||||
PC += (INT16)OpRead16(PC + 2);
|
||||
return 0;
|
||||
}
|
||||
|
||||
@ -98,156 +98,156 @@ static UINT32 opDBNH(v60_state *cpustate, int reg) /* TRUSTED */
|
||||
}
|
||||
|
||||
|
||||
static UINT32 opDBL(v60_state *cpustate, int reg) /* TRUSTED */
|
||||
UINT32 v60_device::opDBL(int reg) /* TRUSTED */
|
||||
{
|
||||
cpustate->reg[reg]--;
|
||||
m_reg[reg]--;
|
||||
|
||||
if ((cpustate->reg[reg] != 0) && (cpustate->_CY))
|
||||
if ((m_reg[reg] != 0) && (_CY))
|
||||
{
|
||||
cpustate->PC += (INT16)OpRead16(cpustate, cpustate->PC + 2);
|
||||
PC += (INT16)OpRead16(PC + 2);
|
||||
return 0;
|
||||
}
|
||||
|
||||
return 4;
|
||||
}
|
||||
|
||||
static UINT32 opDBNL(v60_state *cpustate, int reg) /* TRUSTED */
|
||||
UINT32 v60_device::opDBNL(int reg) /* TRUSTED */
|
||||
{
|
||||
cpustate->reg[reg]--;
|
||||
m_reg[reg]--;
|
||||
|
||||
if ((cpustate->reg[reg] != 0) && !(cpustate->_CY))
|
||||
if ((m_reg[reg] != 0) && !(_CY))
|
||||
{
|
||||
cpustate->PC += (INT16)OpRead16(cpustate, cpustate->PC + 2);
|
||||
PC += (INT16)OpRead16(PC + 2);
|
||||
return 0;
|
||||
}
|
||||
|
||||
return 4;
|
||||
}
|
||||
|
||||
static UINT32 opDBE(v60_state *cpustate, int reg) /* TRUSTED */
|
||||
UINT32 v60_device::opDBE(int reg) /* TRUSTED */
|
||||
{
|
||||
cpustate->reg[reg]--;
|
||||
m_reg[reg]--;
|
||||
|
||||
if ((cpustate->reg[reg] != 0) && (cpustate->_Z))
|
||||
if ((m_reg[reg] != 0) && (_Z))
|
||||
{
|
||||
cpustate->PC += (INT16)OpRead16(cpustate, cpustate->PC + 2);
|
||||
PC += (INT16)OpRead16(PC + 2);
|
||||
return 0;
|
||||
}
|
||||
|
||||
return 4;
|
||||
}
|
||||
|
||||
static UINT32 opDBNE(v60_state *cpustate, int reg) /* TRUSTED */
|
||||
UINT32 v60_device::opDBNE(int reg) /* TRUSTED */
|
||||
{
|
||||
cpustate->reg[reg]--;
|
||||
m_reg[reg]--;
|
||||
|
||||
if ((cpustate->reg[reg] != 0) && !(cpustate->_Z))
|
||||
if ((m_reg[reg] != 0) && !(_Z))
|
||||
{
|
||||
cpustate->PC += (INT16)OpRead16(cpustate, cpustate->PC + 2);
|
||||
PC += (INT16)OpRead16(PC + 2);
|
||||
return 0;
|
||||
}
|
||||
|
||||
return 4;
|
||||
}
|
||||
|
||||
static UINT32 opDBV(v60_state *cpustate, int reg) /* TRUSTED */
|
||||
UINT32 v60_device::opDBV(int reg) /* TRUSTED */
|
||||
{
|
||||
cpustate->reg[reg]--;
|
||||
m_reg[reg]--;
|
||||
|
||||
if ((cpustate->reg[reg] != 0) && (cpustate->_OV))
|
||||
if ((m_reg[reg] != 0) && (_OV))
|
||||
{
|
||||
cpustate->PC += (INT16)OpRead16(cpustate, cpustate->PC + 2);
|
||||
PC += (INT16)OpRead16(PC + 2);
|
||||
return 0;
|
||||
}
|
||||
|
||||
return 4;
|
||||
}
|
||||
|
||||
static UINT32 opDBNV(v60_state *cpustate, int reg) /* TRUSTED */
|
||||
UINT32 v60_device::opDBNV(int reg) /* TRUSTED */
|
||||
{
|
||||
cpustate->reg[reg]--;
|
||||
m_reg[reg]--;
|
||||
|
||||
if ((cpustate->reg[reg] != 0) && !(cpustate->_OV))
|
||||
if ((m_reg[reg] != 0) && !(_OV))
|
||||
{
|
||||
cpustate->PC += (INT16)OpRead16(cpustate, cpustate->PC + 2);
|
||||
PC += (INT16)OpRead16(PC + 2);
|
||||
return 0;
|
||||
}
|
||||
|
||||
return 4;
|
||||
}
|
||||
|
||||
static UINT32 opDBN(v60_state *cpustate, int reg) /* TRUSTED */
|
||||
UINT32 v60_device::opDBN(int reg) /* TRUSTED */
|
||||
{
|
||||
cpustate->reg[reg]--;
|
||||
m_reg[reg]--;
|
||||
|
||||
if ((cpustate->reg[reg] != 0) && (cpustate->_S))
|
||||
if ((m_reg[reg] != 0) && (_S))
|
||||
{
|
||||
cpustate->PC += (INT16)OpRead16(cpustate, cpustate->PC + 2);
|
||||
PC += (INT16)OpRead16(PC + 2);
|
||||
return 0;
|
||||
}
|
||||
|
||||
return 4;
|
||||
}
|
||||
|
||||
static UINT32 opDBP(v60_state *cpustate, int reg) /* TRUSTED */
|
||||
UINT32 v60_device::opDBP(int reg) /* TRUSTED */
|
||||
{
|
||||
cpustate->reg[reg]--;
|
||||
m_reg[reg]--;
|
||||
|
||||
if ((cpustate->reg[reg] != 0) && !(cpustate->_S))
|
||||
if ((m_reg[reg] != 0) && !(_S))
|
||||
{
|
||||
cpustate->PC += (INT16)OpRead16(cpustate, cpustate->PC + 2);
|
||||
PC += (INT16)OpRead16(PC + 2);
|
||||
return 0;
|
||||
}
|
||||
|
||||
return 4;
|
||||
}
|
||||
|
||||
static UINT32 opDBR(v60_state *cpustate, int reg) /* TRUSTED */
|
||||
UINT32 v60_device::opDBR(int reg) /* TRUSTED */
|
||||
{
|
||||
cpustate->reg[reg]--;
|
||||
m_reg[reg]--;
|
||||
|
||||
if (cpustate->reg[reg] != 0)
|
||||
if (m_reg[reg] != 0)
|
||||
{
|
||||
cpustate->PC += (INT16)OpRead16(cpustate, cpustate->PC + 2);
|
||||
PC += (INT16)OpRead16(PC + 2);
|
||||
return 0;
|
||||
}
|
||||
|
||||
return 4;
|
||||
}
|
||||
|
||||
static UINT32 (*const OpC6Table[8])(v60_state *, int reg) = /* TRUSTED */
|
||||
const v60_device::op6_func v60_device::s_OpC6Table[8] = /* TRUSTED */
|
||||
{
|
||||
opDBV,
|
||||
opDBL,
|
||||
opDBE,
|
||||
opDBNH,
|
||||
opDBN,
|
||||
opDBR,
|
||||
opDBLT,
|
||||
opDBLE
|
||||
&v60_device::opDBV,
|
||||
&v60_device::opDBL,
|
||||
&v60_device::opDBE,
|
||||
&v60_device::opDBNH,
|
||||
&v60_device::opDBN,
|
||||
&v60_device::opDBR,
|
||||
&v60_device::opDBLT,
|
||||
&v60_device::opDBLE
|
||||
};
|
||||
|
||||
static UINT32 (*const OpC7Table[8])(v60_state *, int reg) = /* TRUSTED */
|
||||
const v60_device::op6_func v60_device::s_OpC7Table[8] = /* TRUSTED */
|
||||
{
|
||||
opDBNV,
|
||||
opDBNL,
|
||||
opDBNE,
|
||||
opDBH,
|
||||
opDBP,
|
||||
opTB,
|
||||
opDBGE,
|
||||
opDBGT
|
||||
&v60_device::opDBNV,
|
||||
&v60_device::opDBNL,
|
||||
&v60_device::opDBNE,
|
||||
&v60_device::opDBH,
|
||||
&v60_device::opDBP,
|
||||
&v60_device::opTB,
|
||||
&v60_device::opDBGE,
|
||||
&v60_device::opDBGT
|
||||
};
|
||||
|
||||
|
||||
static UINT32 opC6(v60_state *cpustate) /* TRUSTED */
|
||||
UINT32 v60_device::opC6() /* TRUSTED */
|
||||
{
|
||||
UINT8 appb = OpRead8(cpustate, cpustate->PC + 1);
|
||||
return OpC6Table[appb >> 5](cpustate, appb & 0x1f);
|
||||
UINT8 appb = OpRead8(PC + 1);
|
||||
return (this->*s_OpC6Table[appb >> 5])(appb & 0x1f);
|
||||
}
|
||||
|
||||
static UINT32 opC7(v60_state *cpustate) /* TRUSTED */
|
||||
UINT32 v60_device::opC7() /* TRUSTED */
|
||||
{
|
||||
UINT8 appb = OpRead8(cpustate, cpustate->PC + 1);
|
||||
return OpC7Table[appb >> 5](cpustate, appb & 0x1f);
|
||||
UINT8 appb = OpRead8(PC + 1);
|
||||
return (this->*s_OpC7Table[appb >> 5])(appb & 0x1f);
|
||||
}
|
||||
|
File diff suppressed because it is too large
Load Diff
@ -1,259 +1,259 @@
|
||||
static UINT32 (*const OpCodeTable[256])(v60_state *cpustate) =
|
||||
const v60_device::am_func v60_device::s_OpCodeTable[256] =
|
||||
{
|
||||
/* 0x00 */ opHALT,
|
||||
/* 0x01 */ opLDTASK,
|
||||
/* 0x02 */ opSTPR,
|
||||
/* 0x03 */ opUNHANDLED,
|
||||
/* 0x04 */ opUNHANDLED,
|
||||
/* 0x05 */ opUNHANDLED,
|
||||
/* 0x06 */ opUNHANDLED,
|
||||
/* 0x07 */ opUNHANDLED,
|
||||
/* 0x08 */ opRVBIT,
|
||||
/* 0x09 */ opMOVB,
|
||||
/* 0x0a */ opMOVSBH,
|
||||
/* 0x0b */ opMOVZBH,
|
||||
/* 0x0c */ opMOVSBW,
|
||||
/* 0x0d */ opMOVZBW,
|
||||
/* 0x0e */ opUNHANDLED,
|
||||
/* 0x0f */ opUNHANDLED,
|
||||
/* 0x10 */ opCLRTLBA,
|
||||
/* 0x11 */ opUNHANDLED,
|
||||
/* 0x12 */ opLDPR,
|
||||
/* 0x13 */ opUPDPSWW,
|
||||
/* 0x14 */ opUNHANDLED,
|
||||
/* 0x15 */ opUNHANDLED,
|
||||
/* 0x16 */ opUNHANDLED,
|
||||
/* 0x17 */ opUNHANDLED,
|
||||
/* 0x18 */ opUNHANDLED,
|
||||
/* 0x19 */ opMOVTHB,
|
||||
/* 0x1a */ opUNHANDLED,
|
||||
/* 0x1b */ opMOVH,
|
||||
/* 0x1c */ opMOVSHW,
|
||||
/* 0x1d */ opMOVZHW,
|
||||
/* 0x1e */ opUNHANDLED,
|
||||
/* 0x1f */ opUNHANDLED,
|
||||
/* 0x20 */ opINB,
|
||||
/* 0x21 */ opOUTB,
|
||||
/* 0x22 */ opINH,
|
||||
/* 0x23 */ opOUTH,
|
||||
/* 0x24 */ opINW,
|
||||
/* 0x25 */ opOUTW,
|
||||
/* 0x26 */ opUNHANDLED,
|
||||
/* 0x27 */ opUNHANDLED,
|
||||
/* 0x28 */ opUNHANDLED,
|
||||
/* 0x29 */ opMOVTWB,
|
||||
/* 0x2a */ opUNHANDLED,
|
||||
/* 0x2b */ opMOVTWH,
|
||||
/* 0x2c */ opRVBYT,
|
||||
/* 0x2d */ opMOVW,
|
||||
/* 0x2e */ opUNHANDLED,
|
||||
/* 0x2f */ opUNHANDLED,
|
||||
/* 0x30 */ opUNHANDLED,
|
||||
/* 0x31 */ opUNHANDLED,
|
||||
/* 0x32 */ opUNHANDLED,
|
||||
/* 0x33 */ opUNHANDLED,
|
||||
/* 0x34 */ opUNHANDLED,
|
||||
/* 0x35 */ opUNHANDLED,
|
||||
/* 0x36 */ opUNHANDLED,
|
||||
/* 0x37 */ opUNHANDLED,
|
||||
/* 0x38 */ opNOTB,
|
||||
/* 0x39 */ opNEGB,
|
||||
/* 0x3a */ opNOTH,
|
||||
/* 0x3b */ opNEGH,
|
||||
/* 0x3c */ opNOTW,
|
||||
/* 0x3d */ opNEGW,
|
||||
/* 0x3e */ opUNHANDLED,
|
||||
/* 0x3f */ opMOVD,
|
||||
/* 0x40 */ opMOVEAB,
|
||||
/* 0x41 */ opXCHB,
|
||||
/* 0x42 */ opMOVEAH,
|
||||
/* 0x43 */ opXCHH,
|
||||
/* 0x44 */ opMOVEAW,
|
||||
/* 0x45 */ opXCHW,
|
||||
/* 0x46 */ opUNHANDLED,
|
||||
/* 0x47 */ opSETF,
|
||||
/* 0x48 */ opBSR,
|
||||
/* 0x49 */ opCALL,
|
||||
/* 0x4a */ opUPDPSWH,
|
||||
/* 0x4b */ opCHLVL,
|
||||
/* 0x4c */ opUNHANDLED,
|
||||
/* 0x4d */ opCHKAR,
|
||||
/* 0x4e */ opCHKAW,
|
||||
/* 0x4f */ opCHKAE,
|
||||
/* 0x50 */ opREMB,
|
||||
/* 0x51 */ opREMUB,
|
||||
/* 0x52 */ opREMH,
|
||||
/* 0x53 */ opREMUH,
|
||||
/* 0x54 */ opREMW,
|
||||
/* 0x55 */ opREMUW,
|
||||
/* 0x56 */ opUNHANDLED,
|
||||
/* 0x57 */ opUNHANDLED,
|
||||
/* 0x58 */ op58,
|
||||
/* 0x59 */ op59,
|
||||
/* 0x5a */ op5A,
|
||||
/* 0x5b */ op5B,
|
||||
/* 0x5c */ op5C,
|
||||
/* 0x5d */ op5D,
|
||||
/* 0x5e */ opUNHANDLED,
|
||||
/* 0x5f */ op5F,
|
||||
/* 0x60 */ opBV8,
|
||||
/* 0x61 */ opBNV8,
|
||||
/* 0x62 */ opBL8,
|
||||
/* 0x63 */ opBNL8,
|
||||
/* 0x64 */ opBE8,
|
||||
/* 0x65 */ opBNE8,
|
||||
/* 0x66 */ opBNH8,
|
||||
/* 0x67 */ opBH8,
|
||||
/* 0x68 */ opBN8,
|
||||
/* 0x69 */ opBP8,
|
||||
/* 0x6a */ opBR8,
|
||||
/* 0x6b */ opUNHANDLED,
|
||||
/* 0x6C */ opBLT8,
|
||||
/* 0x6c */ opBGE8,
|
||||
/* 0x6e */ opBLE8,
|
||||
/* 0x6f */ opBGT8,
|
||||
/* 0x70 */ opBV16,
|
||||
/* 0x71 */ opBNV16,
|
||||
/* 0x72 */ opBL16,
|
||||
/* 0x73 */ opBNL16,
|
||||
/* 0x74 */ opBE16,
|
||||
/* 0x75 */ opBNE16,
|
||||
/* 0x76 */ opBNH16,
|
||||
/* 0x77 */ opBH16,
|
||||
/* 0x78 */ opBN16,
|
||||
/* 0x79 */ opBP16,
|
||||
/* 0x7a */ opBR16,
|
||||
/* 0x7b */ opUNHANDLED,
|
||||
/* 0x7c */ opBLT16,
|
||||
/* 0x7d */ opBGE16,
|
||||
/* 0x7e */ opBLE16,
|
||||
/* 0x7f */ opBGT16,
|
||||
/* 0x80 */ opADDB,
|
||||
/* 0x81 */ opMULB,
|
||||
/* 0x82 */ opADDH,
|
||||
/* 0x83 */ opMULH,
|
||||
/* 0x84 */ opADDW,
|
||||
/* 0x85 */ opMULW,
|
||||
/* 0x86 */ opMULX,
|
||||
/* 0x87 */ opTEST1,
|
||||
/* 0x88 */ opORB,
|
||||
/* 0x89 */ opROTB,
|
||||
/* 0x8a */ opORH,
|
||||
/* 0x8b */ opROTH,
|
||||
/* 0x8c */ opORW,
|
||||
/* 0x8d */ opROTW,
|
||||
/* 0x8e */ opUNHANDLED,
|
||||
/* 0x8f */ opUNHANDLED,
|
||||
/* 0x90 */ opADDCB,
|
||||
/* 0x91 */ opMULUB,
|
||||
/* 0x92 */ opADDCH,
|
||||
/* 0x93 */ opMULUH,
|
||||
/* 0x94 */ opADDCW,
|
||||
/* 0x95 */ opMULUW,
|
||||
/* 0x96 */ opMULUX,
|
||||
/* 0x97 */ opSET1,
|
||||
/* 0x98 */ opSUBCB,
|
||||
/* 0x99 */ opROTCB,
|
||||
/* 0x9a */ opSUBCH,
|
||||
/* 0x9b */ opROTCH,
|
||||
/* 0x9c */ opSUBCW,
|
||||
/* 0x9d */ opROTCW,
|
||||
/* 0x9e */ opUNHANDLED,
|
||||
/* 0x9f */ opUNHANDLED,
|
||||
/* 0xa0 */ opANDB,
|
||||
/* 0xa1 */ opDIVB,
|
||||
/* 0xa2 */ opANDH,
|
||||
/* 0xa3 */ opDIVH,
|
||||
/* 0xa4 */ opANDW,
|
||||
/* 0xa5 */ opDIVW,
|
||||
/* 0xa6 */ opDIVX,
|
||||
/* 0xa7 */ opCLR1,
|
||||
/* 0xa8 */ opSUBB,
|
||||
/* 0xa9 */ opSHLB,
|
||||
/* 0xaa */ opSUBH,
|
||||
/* 0xab */ opSHLH,
|
||||
/* 0xac */ opSUBW,
|
||||
/* 0xad */ opSHLW,
|
||||
/* 0xae */ opUNHANDLED,
|
||||
/* 0xaf */ opUNHANDLED,
|
||||
/* 0xb0 */ opXORB,
|
||||
/* 0xb1 */ opDIVUB,
|
||||
/* 0xb2 */ opXORH,
|
||||
/* 0xb3 */ opDIVUH,
|
||||
/* 0xb4 */ opXORW,
|
||||
/* 0xb5 */ opDIVUW,
|
||||
/* 0xb6 */ opDIVUX,
|
||||
/* 0xb7 */ opNOT1,
|
||||
/* 0xb8 */ opCMPB,
|
||||
/* 0xb9 */ opSHAB,
|
||||
/* 0xba */ opCMPH,
|
||||
/* 0xbb */ opSHAH,
|
||||
/* 0xbc */ opCMPW,
|
||||
/* 0xbd */ opSHAW,
|
||||
/* 0xbe */ opUNHANDLED,
|
||||
/* 0xbf */ opUNHANDLED,
|
||||
/* 0xc0 */ opUNHANDLED,
|
||||
/* 0xc1 */ opUNHANDLED,
|
||||
/* 0xc2 */ opUNHANDLED,
|
||||
/* 0xc3 */ opUNHANDLED,
|
||||
/* 0xc4 */ opUNHANDLED,
|
||||
/* 0xc5 */ opUNHANDLED,
|
||||
/* 0xc6 */ opC6,
|
||||
/* 0xc7 */ opC7,
|
||||
/* 0xc8 */ opBRK,
|
||||
/* 0xc9 */ opBRKV,
|
||||
/* 0xca */ opRSR,
|
||||
/* 0xcb */ opTRAPFL,
|
||||
/* 0xcc */ opDISPOSE,
|
||||
/* 0xcd */ opNOP,
|
||||
/* 0xce */ opUNHANDLED,
|
||||
/* 0xcf */ opUNHANDLED,
|
||||
/* 0xd0 */ opDECB_0,
|
||||
/* 0xd1 */ opDECB_1,
|
||||
/* 0xd2 */ opDECH_0,
|
||||
/* 0xd3 */ opDECH_1,
|
||||
/* 0xd4 */ opDECW_0,
|
||||
/* 0xd5 */ opDECW_1,
|
||||
/* 0xd6 */ opJMP_0,
|
||||
/* 0xd7 */ opJMP_1,
|
||||
/* 0xd8 */ opINCB_0,
|
||||
/* 0xd9 */ opINCB_1,
|
||||
/* 0xda */ opINCH_0,
|
||||
/* 0xdb */ opINCH_1,
|
||||
/* 0xdc */ opINCW_0,
|
||||
/* 0xdd */ opINCW_1,
|
||||
/* 0xde */ opPREPARE_0,
|
||||
/* 0xdf */ opPREPARE_1,
|
||||
/* 0xe0 */ opTASI_0,
|
||||
/* 0xe1 */ opTASI_1,
|
||||
/* 0xe2 */ opRET_0,
|
||||
/* 0xe3 */ opRET_1,
|
||||
/* 0xe4 */ opPOPM_0,
|
||||
/* 0xe5 */ opPOPM_1,
|
||||
/* 0xe6 */ opPOP_0,
|
||||
/* 0xe7 */ opPOP_1,
|
||||
/* 0xe8 */ opJSR_0,
|
||||
/* 0xe9 */ opJSR_1,
|
||||
/* 0xea */ opRETIU_0,
|
||||
/* 0xeb */ opRETIU_1,
|
||||
/* 0xec */ opPUSHM_0,
|
||||
/* 0xed */ opPUSHM_1,
|
||||
/* 0xee */ opPUSH_0,
|
||||
/* 0xef */ opPUSH_1,
|
||||
/* 0xf0 */ opTESTB_0,
|
||||
/* 0xf1 */ opTESTB_1,
|
||||
/* 0xf2 */ opTESTH_0,
|
||||
/* 0xf3 */ opTESTH_1,
|
||||
/* 0xf4 */ opTESTW_0,
|
||||
/* 0xf5 */ opTESTW_1,
|
||||
/* 0xf6 */ opGETPSW_0,
|
||||
/* 0xf7 */ opGETPSW_1,
|
||||
/* 0xf8 */ opTRAP_0,
|
||||
/* 0xf9 */ opTRAP_1,
|
||||
/* 0xfa */ opRETIS_0,
|
||||
/* 0xfb */ opRETIS_1,
|
||||
/* 0xfc */ opSTTASK_0,
|
||||
/* 0xfd */ opSTTASK_1,
|
||||
/* 0xfe */ opCLRTLB_0,
|
||||
/* 0xff */ opCLRTLB_1,
|
||||
/* 0x00 */ &v60_device::opHALT,
|
||||
/* 0x01 */ &v60_device::opLDTASK,
|
||||
/* 0x02 */ &v60_device::opSTPR,
|
||||
/* 0x03 */ &v60_device::opUNHANDLED,
|
||||
/* 0x04 */ &v60_device::opUNHANDLED,
|
||||
/* 0x05 */ &v60_device::opUNHANDLED,
|
||||
/* 0x06 */ &v60_device::opUNHANDLED,
|
||||
/* 0x07 */ &v60_device::opUNHANDLED,
|
||||
/* 0x08 */ &v60_device::opRVBIT,
|
||||
/* 0x09 */ &v60_device::opMOVB,
|
||||
/* 0x0a */ &v60_device::opMOVSBH,
|
||||
/* 0x0b */ &v60_device::opMOVZBH,
|
||||
/* 0x0c */ &v60_device::opMOVSBW,
|
||||
/* 0x0d */ &v60_device::opMOVZBW,
|
||||
/* 0x0e */ &v60_device::opUNHANDLED,
|
||||
/* 0x0f */ &v60_device::opUNHANDLED,
|
||||
/* 0x10 */ &v60_device::opCLRTLBA,
|
||||
/* 0x11 */ &v60_device::opUNHANDLED,
|
||||
/* 0x12 */ &v60_device::opLDPR,
|
||||
/* 0x13 */ &v60_device::opUPDPSWW,
|
||||
/* 0x14 */ &v60_device::opUNHANDLED,
|
||||
/* 0x15 */ &v60_device::opUNHANDLED,
|
||||
/* 0x16 */ &v60_device::opUNHANDLED,
|
||||
/* 0x17 */ &v60_device::opUNHANDLED,
|
||||
/* 0x18 */ &v60_device::opUNHANDLED,
|
||||
/* 0x19 */ &v60_device::opMOVTHB,
|
||||
/* 0x1a */ &v60_device::opUNHANDLED,
|
||||
/* 0x1b */ &v60_device::opMOVH,
|
||||
/* 0x1c */ &v60_device::opMOVSHW,
|
||||
/* 0x1d */ &v60_device::opMOVZHW,
|
||||
/* 0x1e */ &v60_device::opUNHANDLED,
|
||||
/* 0x1f */ &v60_device::opUNHANDLED,
|
||||
/* 0x20 */ &v60_device::opINB,
|
||||
/* 0x21 */ &v60_device::opOUTB,
|
||||
/* 0x22 */ &v60_device::opINH,
|
||||
/* 0x23 */ &v60_device::opOUTH,
|
||||
/* 0x24 */ &v60_device::opINW,
|
||||
/* 0x25 */ &v60_device::opOUTW,
|
||||
/* 0x26 */ &v60_device::opUNHANDLED,
|
||||
/* 0x27 */ &v60_device::opUNHANDLED,
|
||||
/* 0x28 */ &v60_device::opUNHANDLED,
|
||||
/* 0x29 */ &v60_device::opMOVTWB,
|
||||
/* 0x2a */ &v60_device::opUNHANDLED,
|
||||
/* 0x2b */ &v60_device::opMOVTWH,
|
||||
/* 0x2c */ &v60_device::opRVBYT,
|
||||
/* 0x2d */ &v60_device::opMOVW,
|
||||
/* 0x2e */ &v60_device::opUNHANDLED,
|
||||
/* 0x2f */ &v60_device::opUNHANDLED,
|
||||
/* 0x30 */ &v60_device::opUNHANDLED,
|
||||
/* 0x31 */ &v60_device::opUNHANDLED,
|
||||
/* 0x32 */ &v60_device::opUNHANDLED,
|
||||
/* 0x33 */ &v60_device::opUNHANDLED,
|
||||
/* 0x34 */ &v60_device::opUNHANDLED,
|
||||
/* 0x35 */ &v60_device::opUNHANDLED,
|
||||
/* 0x36 */ &v60_device::opUNHANDLED,
|
||||
/* 0x37 */ &v60_device::opUNHANDLED,
|
||||
/* 0x38 */ &v60_device::opNOTB,
|
||||
/* 0x39 */ &v60_device::opNEGB,
|
||||
/* 0x3a */ &v60_device::opNOTH,
|
||||
/* 0x3b */ &v60_device::opNEGH,
|
||||
/* 0x3c */ &v60_device::opNOTW,
|
||||
/* 0x3d */ &v60_device::opNEGW,
|
||||
/* 0x3e */ &v60_device::opUNHANDLED,
|
||||
/* 0x3f */ &v60_device::opMOVD,
|
||||
/* 0x40 */ &v60_device::opMOVEAB,
|
||||
/* 0x41 */ &v60_device::opXCHB,
|
||||
/* 0x42 */ &v60_device::opMOVEAH,
|
||||
/* 0x43 */ &v60_device::opXCHH,
|
||||
/* 0x44 */ &v60_device::opMOVEAW,
|
||||
/* 0x45 */ &v60_device::opXCHW,
|
||||
/* 0x46 */ &v60_device::opUNHANDLED,
|
||||
/* 0x47 */ &v60_device::opSETF,
|
||||
/* 0x48 */ &v60_device::opBSR,
|
||||
/* 0x49 */ &v60_device::opCALL,
|
||||
/* 0x4a */ &v60_device::opUPDPSWH,
|
||||
/* 0x4b */ &v60_device::opCHLVL,
|
||||
/* 0x4c */ &v60_device::opUNHANDLED,
|
||||
/* 0x4d */ &v60_device::opCHKAR,
|
||||
/* 0x4e */ &v60_device::opCHKAW,
|
||||
/* 0x4f */ &v60_device::opCHKAE,
|
||||
/* 0x50 */ &v60_device::opREMB,
|
||||
/* 0x51 */ &v60_device::opREMUB,
|
||||
/* 0x52 */ &v60_device::opREMH,
|
||||
/* 0x53 */ &v60_device::opREMUH,
|
||||
/* 0x54 */ &v60_device::opREMW,
|
||||
/* 0x55 */ &v60_device::opREMUW,
|
||||
/* 0x56 */ &v60_device::opUNHANDLED,
|
||||
/* 0x57 */ &v60_device::opUNHANDLED,
|
||||
/* 0x58 */ &v60_device::op58,
|
||||
/* 0x59 */ &v60_device::op59,
|
||||
/* 0x5a */ &v60_device::op5A,
|
||||
/* 0x5b */ &v60_device::op5B,
|
||||
/* 0x5c */ &v60_device::op5C,
|
||||
/* 0x5d */ &v60_device::op5D,
|
||||
/* 0x5e */ &v60_device::opUNHANDLED,
|
||||
/* 0x5f */ &v60_device::op5F,
|
||||
/* 0x60 */ &v60_device::opBV8,
|
||||
/* 0x61 */ &v60_device::opBNV8,
|
||||
/* 0x62 */ &v60_device::opBL8,
|
||||
/* 0x63 */ &v60_device::opBNL8,
|
||||
/* 0x64 */ &v60_device::opBE8,
|
||||
/* 0x65 */ &v60_device::opBNE8,
|
||||
/* 0x66 */ &v60_device::opBNH8,
|
||||
/* 0x67 */ &v60_device::opBH8,
|
||||
/* 0x68 */ &v60_device::opBN8,
|
||||
/* 0x69 */ &v60_device::opBP8,
|
||||
/* 0x6a */ &v60_device::opBR8,
|
||||
/* 0x6b */ &v60_device::opUNHANDLED,
|
||||
/* 0x6C */ &v60_device::opBLT8,
|
||||
/* 0x6c */ &v60_device::opBGE8,
|
||||
/* 0x6e */ &v60_device::opBLE8,
|
||||
/* 0x6f */ &v60_device::opBGT8,
|
||||
/* 0x70 */ &v60_device::opBV16,
|
||||
/* 0x71 */ &v60_device::opBNV16,
|
||||
/* 0x72 */ &v60_device::opBL16,
|
||||
/* 0x73 */ &v60_device::opBNL16,
|
||||
/* 0x74 */ &v60_device::opBE16,
|
||||
/* 0x75 */ &v60_device::opBNE16,
|
||||
/* 0x76 */ &v60_device::opBNH16,
|
||||
/* 0x77 */ &v60_device::opBH16,
|
||||
/* 0x78 */ &v60_device::opBN16,
|
||||
/* 0x79 */ &v60_device::opBP16,
|
||||
/* 0x7a */ &v60_device::opBR16,
|
||||
/* 0x7b */ &v60_device::opUNHANDLED,
|
||||
/* 0x7c */ &v60_device::opBLT16,
|
||||
/* 0x7d */ &v60_device::opBGE16,
|
||||
/* 0x7e */ &v60_device::opBLE16,
|
||||
/* 0x7f */ &v60_device::opBGT16,
|
||||
/* 0x80 */ &v60_device::opADDB,
|
||||
/* 0x81 */ &v60_device::opMULB,
|
||||
/* 0x82 */ &v60_device::opADDH,
|
||||
/* 0x83 */ &v60_device::opMULH,
|
||||
/* 0x84 */ &v60_device::opADDW,
|
||||
/* 0x85 */ &v60_device::opMULW,
|
||||
/* 0x86 */ &v60_device::opMULX,
|
||||
/* 0x87 */ &v60_device::opTEST1,
|
||||
/* 0x88 */ &v60_device::opORB,
|
||||
/* 0x89 */ &v60_device::opROTB,
|
||||
/* 0x8a */ &v60_device::opORH,
|
||||
/* 0x8b */ &v60_device::opROTH,
|
||||
/* 0x8c */ &v60_device::opORW,
|
||||
/* 0x8d */ &v60_device::opROTW,
|
||||
/* 0x8e */ &v60_device::opUNHANDLED,
|
||||
/* 0x8f */ &v60_device::opUNHANDLED,
|
||||
/* 0x90 */ &v60_device::opADDCB,
|
||||
/* 0x91 */ &v60_device::opMULUB,
|
||||
/* 0x92 */ &v60_device::opADDCH,
|
||||
/* 0x93 */ &v60_device::opMULUH,
|
||||
/* 0x94 */ &v60_device::opADDCW,
|
||||
/* 0x95 */ &v60_device::opMULUW,
|
||||
/* 0x96 */ &v60_device::opMULUX,
|
||||
/* 0x97 */ &v60_device::opSET1,
|
||||
/* 0x98 */ &v60_device::opSUBCB,
|
||||
/* 0x99 */ &v60_device::opROTCB,
|
||||
/* 0x9a */ &v60_device::opSUBCH,
|
||||
/* 0x9b */ &v60_device::opROTCH,
|
||||
/* 0x9c */ &v60_device::opSUBCW,
|
||||
/* 0x9d */ &v60_device::opROTCW,
|
||||
/* 0x9e */ &v60_device::opUNHANDLED,
|
||||
/* 0x9f */ &v60_device::opUNHANDLED,
|
||||
/* 0xa0 */ &v60_device::opANDB,
|
||||
/* 0xa1 */ &v60_device::opDIVB,
|
||||
/* 0xa2 */ &v60_device::opANDH,
|
||||
/* 0xa3 */ &v60_device::opDIVH,
|
||||
/* 0xa4 */ &v60_device::opANDW,
|
||||
/* 0xa5 */ &v60_device::opDIVW,
|
||||
/* 0xa6 */ &v60_device::opDIVX,
|
||||
/* 0xa7 */ &v60_device::opCLR1,
|
||||
/* 0xa8 */ &v60_device::opSUBB,
|
||||
/* 0xa9 */ &v60_device::opSHLB,
|
||||
/* 0xaa */ &v60_device::opSUBH,
|
||||
/* 0xab */ &v60_device::opSHLH,
|
||||
/* 0xac */ &v60_device::opSUBW,
|
||||
/* 0xad */ &v60_device::opSHLW,
|
||||
/* 0xae */ &v60_device::opUNHANDLED,
|
||||
/* 0xaf */ &v60_device::opUNHANDLED,
|
||||
/* 0xb0 */ &v60_device::opXORB,
|
||||
/* 0xb1 */ &v60_device::opDIVUB,
|
||||
/* 0xb2 */ &v60_device::opXORH,
|
||||
/* 0xb3 */ &v60_device::opDIVUH,
|
||||
/* 0xb4 */ &v60_device::opXORW,
|
||||
/* 0xb5 */ &v60_device::opDIVUW,
|
||||
/* 0xb6 */ &v60_device::opDIVUX,
|
||||
/* 0xb7 */ &v60_device::opNOT1,
|
||||
/* 0xb8 */ &v60_device::opCMPB,
|
||||
/* 0xb9 */ &v60_device::opSHAB,
|
||||
/* 0xba */ &v60_device::opCMPH,
|
||||
/* 0xbb */ &v60_device::opSHAH,
|
||||
/* 0xbc */ &v60_device::opCMPW,
|
||||
/* 0xbd */ &v60_device::opSHAW,
|
||||
/* 0xbe */ &v60_device::opUNHANDLED,
|
||||
/* 0xbf */ &v60_device::opUNHANDLED,
|
||||
/* 0xc0 */ &v60_device::opUNHANDLED,
|
||||
/* 0xc1 */ &v60_device::opUNHANDLED,
|
||||
/* 0xc2 */ &v60_device::opUNHANDLED,
|
||||
/* 0xc3 */ &v60_device::opUNHANDLED,
|
||||
/* 0xc4 */ &v60_device::opUNHANDLED,
|
||||
/* 0xc5 */ &v60_device::opUNHANDLED,
|
||||
/* 0xc6 */ &v60_device::opC6,
|
||||
/* 0xc7 */ &v60_device::opC7,
|
||||
/* 0xc8 */ &v60_device::opBRK,
|
||||
/* 0xc9 */ &v60_device::opBRKV,
|
||||
/* 0xca */ &v60_device::opRSR,
|
||||
/* 0xcb */ &v60_device::opTRAPFL,
|
||||
/* 0xcc */ &v60_device::opDISPOSE,
|
||||
/* 0xcd */ &v60_device::opNOP,
|
||||
/* 0xce */ &v60_device::opUNHANDLED,
|
||||
/* 0xcf */ &v60_device::opUNHANDLED,
|
||||
/* 0xd0 */ &v60_device::opDECB_0,
|
||||
/* 0xd1 */ &v60_device::opDECB_1,
|
||||
/* 0xd2 */ &v60_device::opDECH_0,
|
||||
/* 0xd3 */ &v60_device::opDECH_1,
|
||||
/* 0xd4 */ &v60_device::opDECW_0,
|
||||
/* 0xd5 */ &v60_device::opDECW_1,
|
||||
/* 0xd6 */ &v60_device::opJMP_0,
|
||||
/* 0xd7 */ &v60_device::opJMP_1,
|
||||
/* 0xd8 */ &v60_device::opINCB_0,
|
||||
/* 0xd9 */ &v60_device::opINCB_1,
|
||||
/* 0xda */ &v60_device::opINCH_0,
|
||||
/* 0xdb */ &v60_device::opINCH_1,
|
||||
/* 0xdc */ &v60_device::opINCW_0,
|
||||
/* 0xdd */ &v60_device::opINCW_1,
|
||||
/* 0xde */ &v60_device::opPREPARE_0,
|
||||
/* 0xdf */ &v60_device::opPREPARE_1,
|
||||
/* 0xe0 */ &v60_device::opTASI_0,
|
||||
/* 0xe1 */ &v60_device::opTASI_1,
|
||||
/* 0xe2 */ &v60_device::opRET_0,
|
||||
/* 0xe3 */ &v60_device::opRET_1,
|
||||
/* 0xe4 */ &v60_device::opPOPM_0,
|
||||
/* 0xe5 */ &v60_device::opPOPM_1,
|
||||
/* 0xe6 */ &v60_device::opPOP_0,
|
||||
/* 0xe7 */ &v60_device::opPOP_1,
|
||||
/* 0xe8 */ &v60_device::opJSR_0,
|
||||
/* 0xe9 */ &v60_device::opJSR_1,
|
||||
/* 0xea */ &v60_device::opRETIU_0,
|
||||
/* 0xeb */ &v60_device::opRETIU_1,
|
||||
/* 0xec */ &v60_device::opPUSHM_0,
|
||||
/* 0xed */ &v60_device::opPUSHM_1,
|
||||
/* 0xee */ &v60_device::opPUSH_0,
|
||||
/* 0xef */ &v60_device::opPUSH_1,
|
||||
/* 0xf0 */ &v60_device::opTESTB_0,
|
||||
/* 0xf1 */ &v60_device::opTESTB_1,
|
||||
/* 0xf2 */ &v60_device::opTESTH_0,
|
||||
/* 0xf3 */ &v60_device::opTESTH_1,
|
||||
/* 0xf4 */ &v60_device::opTESTW_0,
|
||||
/* 0xf5 */ &v60_device::opTESTW_1,
|
||||
/* 0xf6 */ &v60_device::opGETPSW_0,
|
||||
/* 0xf7 */ &v60_device::opGETPSW_1,
|
||||
/* 0xf8 */ &v60_device::opTRAP_0,
|
||||
/* 0xf9 */ &v60_device::opTRAP_1,
|
||||
/* 0xfa */ &v60_device::opRETIS_0,
|
||||
/* 0xfb */ &v60_device::opRETIS_1,
|
||||
/* 0xfc */ &v60_device::opSTTASK_0,
|
||||
/* 0xfd */ &v60_device::opSTTASK_1,
|
||||
/* 0xfe */ &v60_device::opCLRTLB_0,
|
||||
/* 0xff */ &v60_device::opCLRTLB_1,
|
||||
};
|
||||
|
File diff suppressed because it is too large
Load Diff
@ -77,9 +77,716 @@ enum
|
||||
V60_REGMAX
|
||||
};
|
||||
|
||||
void v60_stall(device_t *device);
|
||||
|
||||
DECLARE_LEGACY_CPU_DEVICE(V60, v60);
|
||||
DECLARE_LEGACY_CPU_DEVICE(V70, v70);
|
||||
class v60_device : public cpu_device
|
||||
{
|
||||
public:
|
||||
// construction/destruction
|
||||
v60_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
|
||||
v60_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, const char *source);
|
||||
|
||||
void stall();
|
||||
|
||||
protected:
|
||||
// device-level overrides
|
||||
virtual void device_start();
|
||||
virtual void device_reset();
|
||||
|
||||
// device_execute_interface overrides
|
||||
virtual UINT32 execute_min_cycles() const { return 1; }
|
||||
virtual UINT32 execute_max_cycles() const { return 1; }
|
||||
virtual UINT32 execute_input_lines() const { return 1; }
|
||||
virtual void execute_run();
|
||||
virtual void execute_set_input(int inputnum, int state);
|
||||
|
||||
// device_memory_interface overrides
|
||||
virtual const address_space_config *memory_space_config(address_spacenum spacenum = AS_0) const { return (spacenum == AS_PROGRAM) ? &m_program_config : ( (spacenum == AS_IO) ? &m_io_config : NULL ); }
|
||||
|
||||
// device_state_interface overrides
|
||||
virtual void state_import(const device_state_entry &entry);
|
||||
virtual void state_export(const device_state_entry &entry);
|
||||
|
||||
// device_disasm_interface overrides
|
||||
virtual UINT32 disasm_min_opcode_bytes() const { return 1; }
|
||||
virtual UINT32 disasm_max_opcode_bytes() const { return 22; }
|
||||
virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options);
|
||||
|
||||
private:
|
||||
typedef UINT32 (v60_device::*am_func)();
|
||||
typedef UINT32 (v60_device::*op6_func)(int reg);
|
||||
|
||||
static const am_func s_AMTable1_G7a[16];
|
||||
static const am_func s_BAMTable1_G7a[16];
|
||||
static const am_func s_AMTable1_G7[32];
|
||||
static const am_func s_BAMTable1_G7[32];
|
||||
static const am_func s_AMTable1_G6[8];
|
||||
static const am_func s_BAMTable1_G6[8];
|
||||
static const am_func s_AMTable1[2][8];
|
||||
static const am_func s_BAMTable1[2][8];
|
||||
static const am_func s_AMTable2_G7a[16];
|
||||
static const am_func s_BAMTable2_G7a[16];
|
||||
static const am_func s_AMTable2_G7[32];
|
||||
static const am_func s_BAMTable2_G7[32];
|
||||
static const am_func s_AMTable2_G6[8];
|
||||
static const am_func s_BAMTable2_G6[8];
|
||||
static const am_func s_AMTable2[2][8];
|
||||
static const am_func s_BAMTable2[2][8];
|
||||
static const am_func s_AMTable3_G7a[16];
|
||||
static const am_func s_AMTable3_G7[32];
|
||||
static const am_func s_AMTable3_G6[8];
|
||||
static const am_func s_AMTable3[2][8];
|
||||
static const am_func s_Op5FTable[32];
|
||||
static const am_func s_Op5CTable[32];
|
||||
static const op6_func s_OpC6Table[8];
|
||||
static const op6_func s_OpC7Table[8];
|
||||
static const am_func s_Op59Table[32];
|
||||
static const am_func s_Op5BTable[32];
|
||||
static const am_func s_Op5DTable[32];
|
||||
static const am_func s_Op58Table[32];
|
||||
static const am_func s_Op5ATable[32];
|
||||
static const am_func s_OpCodeTable[256];
|
||||
|
||||
address_space_config m_program_config;
|
||||
address_space_config m_io_config;
|
||||
|
||||
offs_t m_fetch_xor;
|
||||
offs_t m_start_pc;
|
||||
UINT32 m_reg[68];
|
||||
struct {
|
||||
UINT8 CY;
|
||||
UINT8 OV;
|
||||
UINT8 S;
|
||||
UINT8 Z;
|
||||
} m_flags;
|
||||
UINT8 m_irq_line;
|
||||
UINT8 m_nmi_line;
|
||||
address_space *m_program;
|
||||
direct_read_data * m_direct;
|
||||
address_space *m_io;
|
||||
UINT32 m_PPC;
|
||||
int m_icount;
|
||||
int m_stall_io;
|
||||
|
||||
UINT32 m_op1, m_op2;
|
||||
UINT8 m_flag1, m_flag2;
|
||||
UINT8 m_instflags;
|
||||
UINT32 m_lenop1, m_lenop2;
|
||||
UINT8 m_subop;
|
||||
UINT32 m_bamoffset1, m_bamoffset2;
|
||||
|
||||
// Output variables for ReadAMAddress(cpustate)
|
||||
UINT8 m_amflag;
|
||||
UINT32 m_amout;
|
||||
UINT32 m_bamoffset;
|
||||
|
||||
// Appo temp var
|
||||
UINT32 m_amlength1, m_amlength2;
|
||||
|
||||
// Global vars used by AM functions
|
||||
UINT32 m_modadd;
|
||||
UINT8 m_modm;
|
||||
UINT8 m_modval;
|
||||
UINT8 m_modval2;
|
||||
UINT8 m_modwritevalb;
|
||||
UINT16 m_modwritevalh;
|
||||
UINT32 m_modwritevalw;
|
||||
UINT8 m_moddim;
|
||||
|
||||
UINT32 m_debugger_temp;
|
||||
|
||||
|
||||
inline void v60SaveStack();
|
||||
inline void v60ReloadStack();
|
||||
inline UINT32 v60ReadPSW();
|
||||
inline void v60WritePSW(UINT32 newval);
|
||||
inline UINT32 v60_update_psw_for_exception(int is_interrupt, int target_level);
|
||||
|
||||
UINT32 am1Register();
|
||||
UINT32 am1RegisterIndirect();
|
||||
UINT32 bam1RegisterIndirect();
|
||||
UINT32 am1RegisterIndirectIndexed();
|
||||
UINT32 bam1RegisterIndirectIndexed();
|
||||
UINT32 am1Autoincrement();
|
||||
UINT32 bam1Autoincrement();
|
||||
UINT32 am1Autodecrement();
|
||||
UINT32 bam1Autodecrement();
|
||||
UINT32 am1Displacement8();
|
||||
UINT32 bam1Displacement8();
|
||||
UINT32 am1Displacement16();
|
||||
UINT32 bam1Displacement16();
|
||||
UINT32 am1Displacement32();
|
||||
UINT32 bam1Displacement32();
|
||||
UINT32 am1DisplacementIndexed8();
|
||||
UINT32 bam1DisplacementIndexed8();
|
||||
UINT32 am1DisplacementIndexed16();
|
||||
UINT32 bam1DisplacementIndexed16();
|
||||
UINT32 am1DisplacementIndexed32();
|
||||
UINT32 bam1DisplacementIndexed32();
|
||||
UINT32 am1PCDisplacement8();
|
||||
UINT32 bam1PCDisplacement8();
|
||||
UINT32 am1PCDisplacement16();
|
||||
UINT32 bam1PCDisplacement16();
|
||||
UINT32 am1PCDisplacement32();
|
||||
UINT32 bam1PCDisplacement32();
|
||||
UINT32 am1PCDisplacementIndexed8();
|
||||
UINT32 bam1PCDisplacementIndexed8();
|
||||
UINT32 am1PCDisplacementIndexed16();
|
||||
UINT32 bam1PCDisplacementIndexed16();
|
||||
UINT32 am1PCDisplacementIndexed32();
|
||||
UINT32 bam1PCDisplacementIndexed32();
|
||||
UINT32 am1DisplacementIndirect8();
|
||||
UINT32 bam1DisplacementIndirect8();
|
||||
UINT32 am1DisplacementIndirect16();
|
||||
UINT32 bam1DisplacementIndirect16();
|
||||
UINT32 am1DisplacementIndirect32();
|
||||
UINT32 bam1DisplacementIndirect32();
|
||||
UINT32 am1DisplacementIndirectIndexed8();
|
||||
UINT32 bam1DisplacementIndirectIndexed8();
|
||||
UINT32 am1DisplacementIndirectIndexed16();
|
||||
UINT32 bam1DisplacementIndirectIndexed16();
|
||||
UINT32 am1DisplacementIndirectIndexed32();
|
||||
UINT32 bam1DisplacementIndirectIndexed32();
|
||||
UINT32 am1PCDisplacementIndirect8();
|
||||
UINT32 bam1PCDisplacementIndirect8();
|
||||
UINT32 am1PCDisplacementIndirect16();
|
||||
UINT32 bam1PCDisplacementIndirect16();
|
||||
UINT32 am1PCDisplacementIndirect32();
|
||||
UINT32 bam1PCDisplacementIndirect32();
|
||||
UINT32 am1PCDisplacementIndirectIndexed8();
|
||||
UINT32 bam1PCDisplacementIndirectIndexed8();
|
||||
UINT32 am1PCDisplacementIndirectIndexed16();
|
||||
UINT32 bam1PCDisplacementIndirectIndexed16();
|
||||
UINT32 am1PCDisplacementIndirectIndexed32();
|
||||
UINT32 bam1PCDisplacementIndirectIndexed32();
|
||||
UINT32 am1DoubleDisplacement8();
|
||||
UINT32 bam1DoubleDisplacement8();
|
||||
UINT32 am1DoubleDisplacement16();
|
||||
UINT32 bam1DoubleDisplacement16();
|
||||
UINT32 am1DoubleDisplacement32();
|
||||
UINT32 bam1DoubleDisplacement32();
|
||||
UINT32 am1PCDoubleDisplacement8();
|
||||
UINT32 bam1PCDoubleDisplacement8();
|
||||
UINT32 am1PCDoubleDisplacement16();
|
||||
UINT32 bam1PCDoubleDisplacement16();
|
||||
UINT32 am1PCDoubleDisplacement32();
|
||||
UINT32 bam1PCDoubleDisplacement32();
|
||||
UINT32 am1DirectAddress();
|
||||
UINT32 bam1DirectAddress();
|
||||
UINT32 am1DirectAddressIndexed();
|
||||
UINT32 bam1DirectAddressIndexed();
|
||||
UINT32 am1DirectAddressDeferred();
|
||||
UINT32 bam1DirectAddressDeferred();
|
||||
UINT32 am1DirectAddressDeferredIndexed();
|
||||
UINT32 bam1DirectAddressDeferredIndexed();
|
||||
UINT32 am1Immediate();
|
||||
UINT32 am1ImmediateQuick();
|
||||
UINT32 am1Error1();
|
||||
UINT32 bam1Error1();
|
||||
UINT32 am1Error2();
|
||||
UINT32 bam1Error2();
|
||||
UINT32 am1Error3();
|
||||
UINT32 bam1Error3();
|
||||
UINT32 am1Error4();
|
||||
UINT32 bam1Error4();
|
||||
UINT32 am1Error5();
|
||||
UINT32 bam1Error5();
|
||||
UINT32 bam1Error6();
|
||||
UINT32 am1Group7a();
|
||||
UINT32 bam1Group7a();
|
||||
UINT32 am1Group6();
|
||||
UINT32 bam1Group6();
|
||||
UINT32 am1Group7();
|
||||
UINT32 bam1Group7();
|
||||
UINT32 am2Register();
|
||||
UINT32 am2RegisterIndirect();
|
||||
UINT32 bam2RegisterIndirect();
|
||||
UINT32 am2RegisterIndirectIndexed();
|
||||
UINT32 bam2RegisterIndirectIndexed();
|
||||
UINT32 am2Autoincrement();
|
||||
UINT32 bam2Autoincrement();
|
||||
UINT32 am2Autodecrement();
|
||||
UINT32 bam2Autodecrement();
|
||||
UINT32 am2Displacement8();
|
||||
UINT32 bam2Displacement8();
|
||||
UINT32 am2Displacement16();
|
||||
UINT32 bam2Displacement16();
|
||||
UINT32 am2Displacement32();
|
||||
UINT32 bam2Displacement32();
|
||||
UINT32 am2DisplacementIndexed8();
|
||||
UINT32 bam2DisplacementIndexed8();
|
||||
UINT32 am2DisplacementIndexed16();
|
||||
UINT32 bam2DisplacementIndexed16();
|
||||
UINT32 am2DisplacementIndexed32();
|
||||
UINT32 bam2DisplacementIndexed32();
|
||||
UINT32 am2PCDisplacement8();
|
||||
UINT32 bam2PCDisplacement8();
|
||||
UINT32 am2PCDisplacement16();
|
||||
UINT32 bam2PCDisplacement16();
|
||||
UINT32 am2PCDisplacement32();
|
||||
UINT32 bam2PCDisplacement32();
|
||||
UINT32 am2PCDisplacementIndexed8();
|
||||
UINT32 bam2PCDisplacementIndexed8();
|
||||
UINT32 am2PCDisplacementIndexed16();
|
||||
UINT32 bam2PCDisplacementIndexed16();
|
||||
UINT32 am2PCDisplacementIndexed32();
|
||||
UINT32 bam2PCDisplacementIndexed32();
|
||||
UINT32 am2DisplacementIndirect8();
|
||||
UINT32 bam2DisplacementIndirect8();
|
||||
UINT32 am2DisplacementIndirect16();
|
||||
UINT32 bam2DisplacementIndirect16();
|
||||
UINT32 am2DisplacementIndirect32();
|
||||
UINT32 bam2DisplacementIndirect32();
|
||||
UINT32 am2DisplacementIndirectIndexed8();
|
||||
UINT32 bam2DisplacementIndirectIndexed8();
|
||||
UINT32 am2DisplacementIndirectIndexed16();
|
||||
UINT32 bam2DisplacementIndirectIndexed16();
|
||||
UINT32 am2DisplacementIndirectIndexed32();
|
||||
UINT32 bam2DisplacementIndirectIndexed32();
|
||||
UINT32 am2PCDisplacementIndirect8();
|
||||
UINT32 bam2PCDisplacementIndirect8();
|
||||
UINT32 am2PCDisplacementIndirect16();
|
||||
UINT32 bam2PCDisplacementIndirect16();
|
||||
UINT32 am2PCDisplacementIndirect32();
|
||||
UINT32 bam2PCDisplacementIndirect32();
|
||||
UINT32 am2PCDisplacementIndirectIndexed8();
|
||||
UINT32 bam2PCDisplacementIndirectIndexed8();
|
||||
UINT32 am2PCDisplacementIndirectIndexed16();
|
||||
UINT32 bam2PCDisplacementIndirectIndexed16();
|
||||
UINT32 am2PCDisplacementIndirectIndexed32();
|
||||
UINT32 bam2PCDisplacementIndirectIndexed32();
|
||||
UINT32 am2DoubleDisplacement8();
|
||||
UINT32 bam2DoubleDisplacement8();
|
||||
UINT32 am2DoubleDisplacement16();
|
||||
UINT32 bam2DoubleDisplacement16();
|
||||
UINT32 am2DoubleDisplacement32();
|
||||
UINT32 bam2DoubleDisplacement32();
|
||||
UINT32 am2PCDoubleDisplacement8();
|
||||
UINT32 bam2PCDoubleDisplacement8();
|
||||
UINT32 am2PCDoubleDisplacement16();
|
||||
UINT32 bam2PCDoubleDisplacement16();
|
||||
UINT32 am2PCDoubleDisplacement32();
|
||||
UINT32 bam2PCDoubleDisplacement32();
|
||||
UINT32 am2DirectAddress();
|
||||
UINT32 bam2DirectAddress();
|
||||
UINT32 am2DirectAddressIndexed();
|
||||
UINT32 bam2DirectAddressIndexed();
|
||||
UINT32 am2DirectAddressDeferred();
|
||||
UINT32 bam2DirectAddressDeferred();
|
||||
UINT32 am2DirectAddressDeferredIndexed();
|
||||
UINT32 bam2DirectAddressDeferredIndexed();
|
||||
UINT32 am2Immediate();
|
||||
UINT32 am2ImmediateQuick();
|
||||
UINT32 am2Error1();
|
||||
UINT32 am2Error2();
|
||||
UINT32 am2Error3();
|
||||
UINT32 am2Error4();
|
||||
UINT32 am2Error5();
|
||||
UINT32 bam2Error1();
|
||||
UINT32 bam2Error2();
|
||||
UINT32 bam2Error3();
|
||||
UINT32 bam2Error4();
|
||||
UINT32 bam2Error5();
|
||||
UINT32 bam2Error6();
|
||||
UINT32 am2Group7a();
|
||||
UINT32 bam2Group7a();
|
||||
UINT32 am2Group6();
|
||||
UINT32 bam2Group6();
|
||||
UINT32 am2Group7();
|
||||
UINT32 bam2Group7();
|
||||
UINT32 am3Register();
|
||||
UINT32 am3RegisterIndirect();
|
||||
UINT32 am3RegisterIndirectIndexed();
|
||||
UINT32 am3Autoincrement();
|
||||
UINT32 am3Autodecrement();
|
||||
UINT32 am3Displacement8();
|
||||
UINT32 am3Displacement16();
|
||||
UINT32 am3Displacement32();
|
||||
UINT32 am3DisplacementIndexed8();
|
||||
UINT32 am3DisplacementIndexed16();
|
||||
UINT32 am3DisplacementIndexed32();
|
||||
UINT32 am3PCDisplacement8();
|
||||
UINT32 am3PCDisplacement16();
|
||||
UINT32 am3PCDisplacement32();
|
||||
UINT32 am3PCDisplacementIndexed8();
|
||||
UINT32 am3PCDisplacementIndexed16();
|
||||
UINT32 am3PCDisplacementIndexed32();
|
||||
UINT32 am3DisplacementIndirect8();
|
||||
UINT32 am3DisplacementIndirect16();
|
||||
UINT32 am3DisplacementIndirect32();
|
||||
UINT32 am3DisplacementIndirectIndexed8();
|
||||
UINT32 am3DisplacementIndirectIndexed16();
|
||||
UINT32 am3DisplacementIndirectIndexed32();
|
||||
UINT32 am3PCDisplacementIndirect8();
|
||||
UINT32 am3PCDisplacementIndirect16();
|
||||
UINT32 am3PCDisplacementIndirect32();
|
||||
UINT32 am3PCDisplacementIndirectIndexed8();
|
||||
UINT32 am3PCDisplacementIndirectIndexed16();
|
||||
UINT32 am3PCDisplacementIndirectIndexed32();
|
||||
UINT32 am3DoubleDisplacement8();
|
||||
UINT32 am3DoubleDisplacement16();
|
||||
UINT32 am3DoubleDisplacement32();
|
||||
UINT32 am3PCDoubleDisplacement8();
|
||||
UINT32 am3PCDoubleDisplacement16();
|
||||
UINT32 am3PCDoubleDisplacement32();
|
||||
UINT32 am3DirectAddress();
|
||||
UINT32 am3DirectAddressIndexed();
|
||||
UINT32 am3DirectAddressDeferred();
|
||||
UINT32 am3DirectAddressDeferredIndexed();
|
||||
UINT32 am3Immediate();
|
||||
UINT32 am3ImmediateQuick();
|
||||
UINT32 am3Error1();
|
||||
UINT32 am3Error2();
|
||||
UINT32 am3Error3();
|
||||
UINT32 am3Error4();
|
||||
UINT32 am3Error5();
|
||||
UINT32 am3Group7a();
|
||||
UINT32 am3Group6();
|
||||
UINT32 am3Group7();
|
||||
UINT32 ReadAM();
|
||||
UINT32 BitReadAM();
|
||||
UINT32 ReadAMAddress();
|
||||
UINT32 BitReadAMAddress();
|
||||
UINT32 WriteAM();
|
||||
void F12DecodeFirstOperand(am_func DecodeOp1, UINT8 dim1);
|
||||
void F12WriteSecondOperand(UINT8 dim2);
|
||||
void F12DecodeOperands(am_func DecodeOp1, UINT8 dim1, am_func DecodeOp2, UINT8 dim2);
|
||||
UINT32 opADDB();
|
||||
UINT32 opADDH();
|
||||
UINT32 opADDW();
|
||||
UINT32 opADDCB();
|
||||
UINT32 opADDCH();
|
||||
UINT32 opADDCW();
|
||||
UINT32 opANDB();
|
||||
UINT32 opANDH();
|
||||
UINT32 opANDW();
|
||||
UINT32 opCALL();
|
||||
UINT32 opCHKAR();
|
||||
UINT32 opCHKAW();
|
||||
UINT32 opCHKAE();
|
||||
UINT32 opCHLVL();
|
||||
UINT32 opCLR1();
|
||||
UINT32 opCMPB();
|
||||
UINT32 opCMPH();
|
||||
UINT32 opCMPW();
|
||||
UINT32 opDIVB();
|
||||
UINT32 opDIVH();
|
||||
UINT32 opDIVW();
|
||||
UINT32 opDIVX();
|
||||
UINT32 opDIVUX();
|
||||
UINT32 opDIVUB();
|
||||
UINT32 opDIVUH();
|
||||
UINT32 opDIVUW();
|
||||
UINT32 opINB();
|
||||
UINT32 opINH();
|
||||
UINT32 opINW();
|
||||
UINT32 opLDPR();
|
||||
UINT32 opLDTASK();
|
||||
UINT32 opMOVD();
|
||||
UINT32 opMOVB();
|
||||
UINT32 opMOVH();
|
||||
UINT32 opMOVW();
|
||||
UINT32 opMOVEAB();
|
||||
UINT32 opMOVEAH();
|
||||
UINT32 opMOVEAW();
|
||||
UINT32 opMOVSBH();
|
||||
UINT32 opMOVSBW();
|
||||
UINT32 opMOVSHW();
|
||||
UINT32 opMOVTHB();
|
||||
UINT32 opMOVTWB();
|
||||
UINT32 opMOVTWH();
|
||||
UINT32 opMOVZBH();
|
||||
UINT32 opMOVZBW();
|
||||
UINT32 opMOVZHW();
|
||||
UINT32 opMULB();
|
||||
UINT32 opMULH();
|
||||
UINT32 opMULW();
|
||||
UINT32 opMULUB();
|
||||
UINT32 opMULUH();
|
||||
UINT32 opMULUW();
|
||||
UINT32 opNEGB();
|
||||
UINT32 opNEGH();
|
||||
UINT32 opNEGW();
|
||||
UINT32 opNOTB();
|
||||
UINT32 opNOTH();
|
||||
UINT32 opNOTW();
|
||||
UINT32 opNOT1();
|
||||
UINT32 opORB();
|
||||
UINT32 opORH();
|
||||
UINT32 opORW();
|
||||
UINT32 opOUTB();
|
||||
UINT32 opOUTH();
|
||||
UINT32 opOUTW();
|
||||
UINT32 opREMB();
|
||||
UINT32 opREMH();
|
||||
UINT32 opREMW();
|
||||
UINT32 opREMUB();
|
||||
UINT32 opREMUH();
|
||||
UINT32 opREMUW();
|
||||
UINT32 opROTB();
|
||||
UINT32 opROTH();
|
||||
UINT32 opROTW();
|
||||
UINT32 opROTCB();
|
||||
UINT32 opROTCH();
|
||||
UINT32 opROTCW();
|
||||
UINT32 opRVBIT();
|
||||
UINT32 opRVBYT();
|
||||
UINT32 opSET1();
|
||||
UINT32 opSETF();
|
||||
UINT32 opSHAB();
|
||||
UINT32 opSHAH();
|
||||
UINT32 opSHAW();
|
||||
UINT32 opSHLB();
|
||||
UINT32 opSHLH();
|
||||
UINT32 opSHLW();
|
||||
UINT32 opSTPR();
|
||||
UINT32 opSUBB();
|
||||
UINT32 opSUBH();
|
||||
UINT32 opSUBW();
|
||||
UINT32 opSUBCB();
|
||||
UINT32 opSUBCH();
|
||||
UINT32 opSUBCW();
|
||||
UINT32 opTEST1();
|
||||
UINT32 opUPDPSWW();
|
||||
UINT32 opUPDPSWH();
|
||||
UINT32 opXCHB();
|
||||
UINT32 opXCHH();
|
||||
UINT32 opXCHW();
|
||||
UINT32 opXORB();
|
||||
UINT32 opXORH();
|
||||
UINT32 opXORW();
|
||||
UINT32 opMULX();
|
||||
UINT32 opMULUX();
|
||||
void F2DecodeFirstOperand(am_func DecodeOp1, UINT8 dim1);
|
||||
void F2DecodeSecondOperand(am_func DecodeOp2, UINT8 dim2);
|
||||
void F2WriteSecondOperand(UINT8 dim2);
|
||||
UINT32 opCVTWS();
|
||||
UINT32 opCVTSW();
|
||||
UINT32 opMOVFS();
|
||||
UINT32 opNEGFS();
|
||||
UINT32 opABSFS();
|
||||
UINT32 opADDFS();
|
||||
UINT32 opSUBFS();
|
||||
UINT32 opMULFS();
|
||||
UINT32 opDIVFS();
|
||||
UINT32 opSCLFS();
|
||||
UINT32 opCMPF();
|
||||
UINT32 op5FUNHANDLED();
|
||||
UINT32 op5CUNHANDLED();
|
||||
UINT32 op5F();
|
||||
UINT32 op5C();
|
||||
UINT32 opINCB();
|
||||
UINT32 opINCH();
|
||||
UINT32 opINCW();
|
||||
UINT32 opDECB();
|
||||
UINT32 opDECH();
|
||||
UINT32 opDECW();
|
||||
UINT32 opJMP();
|
||||
UINT32 opJSR();
|
||||
UINT32 opPREPARE();
|
||||
UINT32 opRET();
|
||||
UINT32 opTRAP();
|
||||
UINT32 opRETIU();
|
||||
UINT32 opRETIS();
|
||||
UINT32 opSTTASK();
|
||||
UINT32 opGETPSW();
|
||||
UINT32 opTASI();
|
||||
UINT32 opCLRTLB();
|
||||
UINT32 opPOPM();
|
||||
UINT32 opPUSHM();
|
||||
UINT32 opTESTB();
|
||||
UINT32 opTESTH();
|
||||
UINT32 opTESTW();
|
||||
UINT32 opPUSH();
|
||||
UINT32 opPOP();
|
||||
UINT32 opINCB_0();
|
||||
UINT32 opINCB_1();
|
||||
UINT32 opINCH_0();
|
||||
UINT32 opINCH_1();
|
||||
UINT32 opINCW_0();
|
||||
UINT32 opINCW_1();
|
||||
UINT32 opDECB_0();
|
||||
UINT32 opDECB_1();
|
||||
UINT32 opDECH_0();
|
||||
UINT32 opDECH_1();
|
||||
UINT32 opDECW_0();
|
||||
UINT32 opDECW_1();
|
||||
UINT32 opJMP_0();
|
||||
UINT32 opJMP_1();
|
||||
UINT32 opJSR_0();
|
||||
UINT32 opJSR_1();
|
||||
UINT32 opPREPARE_0();
|
||||
UINT32 opPREPARE_1();
|
||||
UINT32 opRET_0();
|
||||
UINT32 opRET_1();
|
||||
UINT32 opTRAP_0();
|
||||
UINT32 opTRAP_1();
|
||||
UINT32 opRETIU_0();
|
||||
UINT32 opRETIU_1();
|
||||
UINT32 opRETIS_0();
|
||||
UINT32 opRETIS_1();
|
||||
UINT32 opGETPSW_0();
|
||||
UINT32 opGETPSW_1();
|
||||
UINT32 opTASI_0();
|
||||
UINT32 opTASI_1();
|
||||
UINT32 opCLRTLB_0();
|
||||
UINT32 opCLRTLB_1();
|
||||
UINT32 opPOPM_0();
|
||||
UINT32 opPOPM_1();
|
||||
UINT32 opPUSHM_0();
|
||||
UINT32 opPUSHM_1();
|
||||
UINT32 opTESTB_0();
|
||||
UINT32 opTESTB_1();
|
||||
UINT32 opTESTH_0();
|
||||
UINT32 opTESTH_1();
|
||||
UINT32 opTESTW_0();
|
||||
UINT32 opTESTW_1();
|
||||
UINT32 opPUSH_0();
|
||||
UINT32 opPUSH_1();
|
||||
UINT32 opPOP_0();
|
||||
UINT32 opPOP_1();
|
||||
UINT32 opSTTASK_0();
|
||||
UINT32 opSTTASK_1();
|
||||
UINT32 opBGT8();
|
||||
UINT32 opBGT16();
|
||||
UINT32 opBGE8();
|
||||
UINT32 opBGE16();
|
||||
UINT32 opBLT8();
|
||||
UINT32 opBLT16();
|
||||
UINT32 opBLE8();
|
||||
UINT32 opBLE16();
|
||||
UINT32 opBH8();
|
||||
UINT32 opBH16();
|
||||
UINT32 opBNH8();
|
||||
UINT32 opBNH16();
|
||||
UINT32 opBNL8();
|
||||
UINT32 opBNL16();
|
||||
UINT32 opBL8();
|
||||
UINT32 opBL16();
|
||||
UINT32 opBNE8();
|
||||
UINT32 opBNE16();
|
||||
UINT32 opBE8();
|
||||
UINT32 opBE16();
|
||||
UINT32 opBNV8();
|
||||
UINT32 opBNV16();
|
||||
UINT32 opBV8();
|
||||
UINT32 opBV16();
|
||||
UINT32 opBP8();
|
||||
UINT32 opBP16();
|
||||
UINT32 opBN8();
|
||||
UINT32 opBN16();
|
||||
UINT32 opBR8();
|
||||
UINT32 opBR16();
|
||||
UINT32 opBSR();
|
||||
UINT32 opBRK();
|
||||
UINT32 opBRKV();
|
||||
UINT32 opCLRTLBA();
|
||||
UINT32 opDISPOSE();
|
||||
UINT32 opHALT();
|
||||
UINT32 opNOP();
|
||||
UINT32 opRSR();
|
||||
UINT32 opTRAPFL();
|
||||
UINT32 opTB(int reg);
|
||||
UINT32 opDBGT(int reg);
|
||||
UINT32 opDBLE(int reg);
|
||||
UINT32 opDBGE(int reg);
|
||||
UINT32 opDBLT(int reg);
|
||||
UINT32 opDBH(int reg);
|
||||
UINT32 opDBNH(int reg);
|
||||
UINT32 opDBL(int reg);
|
||||
UINT32 opDBNL(int reg);
|
||||
UINT32 opDBE(int reg);
|
||||
UINT32 opDBNE(int reg);
|
||||
UINT32 opDBV(int reg);
|
||||
UINT32 opDBNV(int reg);
|
||||
UINT32 opDBN(int reg);
|
||||
UINT32 opDBP(int reg);
|
||||
UINT32 opDBR(int reg);
|
||||
UINT32 opC6();
|
||||
UINT32 opC7();
|
||||
void F7aDecodeOperands(am_func DecodeOp1, UINT8 dim1, am_func DecodeOp2, UINT8 dim2);
|
||||
void F7bDecodeFirstOperand(am_func DecodeOp1, UINT8 dim1);
|
||||
void F7bWriteSecondOperand(UINT8 dim2);
|
||||
void F7bDecodeOperands(am_func DecodeOp1, UINT8 dim1, am_func DecodeOp2, UINT8 dim2);
|
||||
void F7cDecodeOperands(am_func DecodeOp1, UINT8 dim1, am_func DecodeOp2, UINT8 dim2);
|
||||
UINT32 opCMPSTRB(UINT8 bFill, UINT8 bStop);
|
||||
UINT32 opCMPSTRH(UINT8 bFill, UINT8 bStop);
|
||||
UINT32 opMOVSTRUB(UINT8 bFill, UINT8 bStop);
|
||||
UINT32 opMOVSTRDB(UINT8 bFill, UINT8 bStop);
|
||||
UINT32 opMOVSTRUH(UINT8 bFill, UINT8 bStop);
|
||||
UINT32 opMOVSTRDH(UINT8 bFill, UINT8 bStop);
|
||||
UINT32 opSEARCHUB(UINT8 bSearch);
|
||||
UINT32 opSEARCHUH(UINT8 bSearch);
|
||||
UINT32 opSEARCHDB(UINT8 bSearch);
|
||||
UINT32 opSEARCHDH(UINT8 bSearch);
|
||||
UINT32 opSCHCUB();
|
||||
UINT32 opSCHCUH();
|
||||
UINT32 opSCHCDB();
|
||||
UINT32 opSCHCDH();
|
||||
UINT32 opSKPCUB();
|
||||
UINT32 opSKPCUH();
|
||||
UINT32 opSKPCDB();
|
||||
UINT32 opSKPCDH();
|
||||
UINT32 opCMPCB();
|
||||
UINT32 opCMPCH();
|
||||
UINT32 opCMPCFB();
|
||||
UINT32 opCMPCFH();
|
||||
UINT32 opCMPCSB();
|
||||
UINT32 opCMPCSH();
|
||||
UINT32 opMOVCUB();
|
||||
UINT32 opMOVCUH();
|
||||
UINT32 opMOVCFUB();
|
||||
UINT32 opMOVCFUH();
|
||||
UINT32 opMOVCSUB();
|
||||
UINT32 opMOVCSUH();
|
||||
UINT32 opMOVCDB();
|
||||
UINT32 opMOVCDH();
|
||||
UINT32 opMOVCFDB();
|
||||
UINT32 opMOVCFDH();
|
||||
UINT32 opEXTBFZ();
|
||||
UINT32 opEXTBFS();
|
||||
UINT32 opEXTBFL();
|
||||
UINT32 opSCHBS(UINT32 bSearch1);
|
||||
UINT32 opSCH0BSU();
|
||||
UINT32 opSCH1BSU();
|
||||
UINT32 opINSBFR();
|
||||
UINT32 opINSBFL();
|
||||
UINT32 opMOVBSD();
|
||||
UINT32 opMOVBSU();
|
||||
UINT32 opADDDC();
|
||||
UINT32 opSUBDC();
|
||||
UINT32 opSUBRDC();
|
||||
UINT32 opCVTDPZ();
|
||||
UINT32 opCVTDZP();
|
||||
UINT32 op58UNHANDLED();
|
||||
UINT32 op5AUNHANDLED();
|
||||
UINT32 op5BUNHANDLED();
|
||||
UINT32 op5DUNHANDLED();
|
||||
UINT32 op59UNHANDLED();
|
||||
UINT32 op58();
|
||||
UINT32 op5A();
|
||||
UINT32 op5B();
|
||||
UINT32 op5D();
|
||||
UINT32 op59();
|
||||
UINT32 opUNHANDLED();
|
||||
void v60_do_irq(int vector);
|
||||
void v60_try_irq();
|
||||
|
||||
};
|
||||
|
||||
|
||||
class v70_device : public v60_device
|
||||
{
|
||||
public:
|
||||
// construction/destruction
|
||||
v70_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
|
||||
|
||||
protected:
|
||||
virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options);
|
||||
};
|
||||
|
||||
|
||||
extern const device_type V60;
|
||||
extern const device_type V70;
|
||||
|
||||
|
||||
#endif /* __V60_H__ */
|
||||
|
@ -1,5 +1,6 @@
|
||||
#include "audio/dsbz80.h"
|
||||
#include "audio/segam1audio.h"
|
||||
#include "cpu/v60/v60.h"
|
||||
|
||||
typedef void (*tgp_func)(running_machine &machine);
|
||||
|
||||
@ -21,7 +22,7 @@ public:
|
||||
m_display_list1(*this, "display_list1"),
|
||||
m_color_xlat(*this, "color_xlat"){ }
|
||||
|
||||
required_device<cpu_device> m_maincpu; // V60
|
||||
required_device<v60_device> m_maincpu; // V60
|
||||
required_device<segam1audio_device> m_m1audio; // Model 1 standard sound board
|
||||
optional_device<dsbz80_device> m_dsbz80; // Digital Sound Board
|
||||
optional_device<mb86233_cpu_device> m_tgp;
|
||||
|
@ -2099,7 +2099,7 @@ static UINT32 copro_fifoout_pop(address_space &space)
|
||||
if (state->m_copro_fifoout_num == 0)
|
||||
{
|
||||
// Reading from empty FIFO causes the v60 to enter wait state
|
||||
v60_stall(state->m_maincpu);
|
||||
state->m_maincpu->stall();
|
||||
|
||||
space.machine().scheduler().synchronize();
|
||||
|
||||
|
Loading…
Reference in New Issue
Block a user