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https://github.com/holub/mame
synced 2025-04-23 00:39:36 +03:00
m68k: backport FPU fixes from upstream Musashi [R. Belmont, Jean-Francois Fabre]
This commit is contained in:
arbee
parent
b4cf1eb096
commit
27ad7de49c
@ -650,12 +650,9 @@ u64 m68000_base_device::READ_EA_64(int ea)
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return 0;
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}
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floatx80 m68000_base_device::READ_EA_FPE(int ea)
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floatx80 m68000_base_device::READ_EA_FPE(int mode, int reg, uint32 di_mode_ea)
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{
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floatx80 fpr;
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int mode = (ea >> 3) & 0x7;
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int reg = (ea & 0x7);
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switch (mode)
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{
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@ -682,16 +679,12 @@ floatx80 m68000_base_device::READ_EA_FPE(int ea)
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}
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case 5: // (d16, An)
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{
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// FIXME: will fail for fmovem
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u32 ea = EA_AY_DI_32();
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fpr = load_extended_float80(ea);
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fpr = load_extended_float80(di_mode_ea);
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break;
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}
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case 6: // (An) + (Xn) + d8
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{
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// FIXME: will fail for fmovem
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u32 ea = EA_AY_IX_32();
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fpr = load_extended_float80(ea);
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fpr = load_extended_float80(di_mode_ea);
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break;
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}
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@ -1075,11 +1068,8 @@ void m68000_base_device::WRITE_EA_64(int ea, u64 data)
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}
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}
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void m68000_base_device::WRITE_EA_FPE(int ea, floatx80 fpr)
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void m68000_base_device::WRITE_EA_FPE(int mode, int reg, floatx80 fpr, uint32 di_mode_ea)
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{
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int mode = (ea >> 3) & 0x7;
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int reg = (ea & 0x7);
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switch (mode)
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{
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case 2: // (An)
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@ -1110,8 +1100,9 @@ void m68000_base_device::WRITE_EA_FPE(int ea, floatx80 fpr)
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case 5: // (d16,An)
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{
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u32 ea = EA_AY_DI_32();
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store_extended_float80(ea, fpr);
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// EA_AY_DI_32() should not be done here because fmovem would increase
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// PC each time, reading incorrect displacement & advancing PC too much.
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store_extended_float80(di_mode_ea, fpr);
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break;
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}
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@ -1199,7 +1190,10 @@ void m68000_base_device::fpgen_rm_reg(u16 w2)
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}
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case 2: // Extended-precision Real
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{
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source = READ_EA_FPE(ea);
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int imode = (ea >> 3) & 0x7;
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int reg = (ea & 0x7);
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uint32 di_mode_ea = imode == 5 ? (REG_A()[reg] + MAKE_INT_16(m68ki_read_imm_16())) : 0;
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source = READ_EA_FPE(imode, reg, di_mode_ea);
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break;
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}
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case 3: // Packed-decimal Real
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@ -1341,6 +1335,7 @@ void m68000_base_device::fpgen_rm_reg(u16 w2)
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// handle it right here, the usual opmode bits aren't valid in the FMOVECR case
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m_fpr[dst] = source;
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SET_CONDITION_CODES(m_fpr[dst]);
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m_icount -= 4;
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return;
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}
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@ -1368,6 +1363,7 @@ void m68000_base_device::fpgen_rm_reg(u16 w2)
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s32 temp;
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temp = floatx80_to_int32(source);
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m_fpr[dst] = int32_to_floatx80(temp);
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SET_CONDITION_CODES(m_fpr[dst]);
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break;
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}
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case 0x03: // FINTRZ
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@ -1375,6 +1371,7 @@ void m68000_base_device::fpgen_rm_reg(u16 w2)
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s32 temp;
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temp = floatx80_to_int32_round_to_zero(source);
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m_fpr[dst] = int32_to_floatx80(temp);
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SET_CONDITION_CODES(m_fpr[dst]);
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break;
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}
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case 0x04: // FSQRT
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@ -1463,9 +1460,11 @@ void m68000_base_device::fpgen_rm_reg(u16 w2)
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m_icount -= 6;
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break;
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}
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case 0x60: // FSDIVS
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case 0x20: // FDIV
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{
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m_fpr[dst] = floatx80_div(m_fpr[dst], source);
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SET_CONDITION_CODES(m_fpr[dst]);
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m_icount -= 43;
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break;
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}
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@ -1486,6 +1485,7 @@ void m68000_base_device::fpgen_rm_reg(u16 w2)
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m_icount -= 9;
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break;
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}
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case 0x63: // FSMULS (JFF)
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case 0x23: // FMUL
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{
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m_fpr[dst] = floatx80_mul(m_fpr[dst], source);
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@ -1578,7 +1578,11 @@ void m68000_base_device::fmove_reg_mem(u16 w2)
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}
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case 2: // Extended-precision Real
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{
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WRITE_EA_FPE(ea, m_fpr[src]);
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int mode = (ea >> 3) & 0x7;
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int reg = (ea & 0x7);
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uint32 di_mode_ea = mode == 5 ? (REG_A()[reg] + MAKE_INT_16(m68ki_read_imm_16())) : 0;
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WRITE_EA_FPE(mode, reg, m_fpr[src], di_mode_ea);
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break;
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}
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case 3: // Packed-decimal Real with Static K-factor
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@ -1670,7 +1674,11 @@ void m68000_base_device::fmove_fpcr(u16 w2)
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}
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else // From <ea> to system control reg
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{
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if (regsel & 4) m_fpcr = READ_EA_32(ea);
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if (regsel & 4)
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{
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m_fpcr = READ_EA_32(ea);
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// should update softfloat rounding mode here
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}
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if (regsel & 2) m_fpsr = READ_EA_32(ea);
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if (regsel & 1) m_fpiar = READ_EA_32(ea);
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}
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@ -1756,20 +1764,23 @@ void m68000_base_device::fmovem(u16 w2)
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[[fallthrough]];
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case 0: // Static register list, predecrement or control addressing mode
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{
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// the "di_mode_ea" parameter kludge is required here else WRITE_EA_FPE would have
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// to call EA_AY_DI_32() (that advances PC & reads displacement) each time
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// when the proper behaviour is 1) read once, 2) increment ea for each matching register
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// this forces to pre-read the mode (named "imode") so we can decide to read displacement, only once
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int imode = (ea >> 3) & 0x7;
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int reg = (ea & 0x7);
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int di_mode = imode == 5;
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uint32 di_mode_ea = di_mode ? (REG_A()[reg] + MAKE_INT_16(m68ki_read_imm_16())) : 0;
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for (i=0; i < 8; i++)
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{
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if (reglist & (1 << i))
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{
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switch (ea >> 3)
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WRITE_EA_FPE(imode, reg, m_fpr[i], di_mode_ea);
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if (di_mode)
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{
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case 5: // (d16, An)
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case 6: // (An) + (Xn) + d8
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store_extended_float80(mem_addr, m_fpr[i]);
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mem_addr += 12;
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break;
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default:
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WRITE_EA_FPE(ea, m_fpr[i]);
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break;
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di_mode_ea += 12;
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}
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m_icount -= 2;
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@ -1784,20 +1795,20 @@ void m68000_base_device::fmovem(u16 w2)
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[[fallthrough]];
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case 2: // Static register list, postdecrement or control addressing mode
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{
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int imode = (ea >> 3) & 0x7;
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int reg = (ea & 0x7);
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int di_mode = imode == 5;
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uint32 di_mode_ea = di_mode ? (REG_A()[reg] + MAKE_INT_16(m68ki_read_imm_16())) : 0;
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for (i=0; i < 8; i++)
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{
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if (reglist & (1 << i))
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{
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switch (ea >> 3)
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WRITE_EA_FPE(imode, reg, m_fpr[7 - i], di_mode_ea);
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if (di_mode)
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{
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case 5: // (d16, An)
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case 6: // (An) + (Xn) + d8
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store_extended_float80(mem_addr, m_fpr[7-i]);
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mem_addr += 12;
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break;
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default:
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WRITE_EA_FPE(ea, m_fpr[7-i]);
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break;
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di_mode_ea += 12;
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}
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m_icount -= 2;
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@ -1819,6 +1830,11 @@ void m68000_base_device::fmovem(u16 w2)
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[[fallthrough]];
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case 2: // Static register list, postincrement or control addressing mode
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{
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int imode = (ea >> 3) & 0x7;
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int reg = (ea & 0x7);
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int di_mode = imode == 5;
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uint32 di_mode_ea = di_mode ? (REG_A()[reg] + MAKE_INT_16(m68ki_read_imm_16())) : 0;
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for (i=0; i < 8; i++)
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{
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if (reglist & (1 << i))
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@ -1831,7 +1847,7 @@ void m68000_base_device::fmovem(u16 w2)
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mem_addr += 12;
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break;
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default:
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m_fpr[7-i] = READ_EA_FPE(ea);
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m_fpr[7 - i] = READ_EA_FPE(imode, reg, di_mode_ea);
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break;
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}
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m_icount -= 2;
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@ -1847,10 +1863,24 @@ void m68000_base_device::fmovem(u16 w2)
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void m68000_base_device::fscc()
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{
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int ea = m_ir & 0x3f;
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int condition = (s16)(OPER_I_16());
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const int mode = (m_ir & 0x38) >> 3;
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const int condition = OPER_I_16() & 0x3f;
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const int v = (TEST_CONDITION(condition) ? 0xff : 0x00);
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switch (mode)
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{
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case 0: // Dx (handled specially because it only changes the low byte of Dx)
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{
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const int reg = m_ir & 7;
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REG_D()[reg] = (REG_D()[reg] & 0xffffff00) | v;
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}
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break;
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default:
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WRITE_EA_8(m_ir & 0x3f, v);
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break;
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}
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WRITE_EA_8(ea, TEST_CONDITION(condition) ? 0xff : 0);
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m_icount -= 7; // ???
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}
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