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https://github.com/holub/mame
synced 2025-10-05 08:41:31 +03:00
improve naming etc.
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d1159c6f07
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@ -196,6 +196,7 @@ MACHINE_CONFIG_END
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static MACHINE_CONFIG_DERIVED( maniacsq_d5002fp, maniacsq )
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MCFG_DEVICE_ADD("gaelco_ds5002fp", GAELCO_DS5002FP, XTAL_24MHz / 2) /* ? */
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GAELCO_DS5002FP_SET_SHARE_TAG("shareram")
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MACHINE_CONFIG_END
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ROM_START( maniacsq )
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@ -577,6 +578,7 @@ MACHINE_CONFIG_END
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static MACHINE_CONFIG_DERIVED( alighunt_d5002fp, alighunt )
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MCFG_DEVICE_ADD("gaelco_ds5002fp", GAELCO_DS5002FP, XTAL_24MHz / 2) /* ? */
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GAELCO_DS5002FP_SET_SHARE_TAG("shareram")
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MACHINE_CONFIG_END
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/*
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@ -833,6 +835,7 @@ MACHINE_CONFIG_END
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static MACHINE_CONFIG_DERIVED( touchgo_d5002fp, touchgo )
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MCFG_DEVICE_ADD("gaelco_ds5002fp", GAELCO_DS5002FP, XTAL_24MHz / 2) /* ? */
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GAELCO_DS5002FP_SET_SHARE_TAG("shareram")
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MACHINE_CONFIG_END
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/*
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@ -1275,6 +1278,7 @@ static MACHINE_CONFIG_START( wrally2 )
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MCFG_CPU_VBLANK_INT_DRIVER("lscreen", gaelco2_state, irq6_line_hold)
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MCFG_DEVICE_ADD("gaelco_ds5002fp", GAELCO_DS5002FP, XTAL_24MHz / 2)
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GAELCO_DS5002FP_SET_SHARE_TAG("shareram")
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MCFG_EEPROM_SERIAL_93C66_ADD("eeprom")
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@ -230,6 +230,7 @@ MACHINE_CONFIG_END
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static MACHINE_CONFIG_DERIVED( glass_ds5002fp, glass )
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MCFG_DEVICE_ADD("gaelco_ds5002fp", GAELCO_DS5002FP_WRALLY, XTAL_24MHz / 2) /* verified on pcb */
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GAELCO_DS5002FP_SET_SHARE_TAG("shareram")
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MACHINE_CONFIG_END
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ROM_START( glass ) /* Version 1.1 */
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@ -234,6 +234,7 @@ static MACHINE_CONFIG_START( targeth )
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MCFG_TIMER_DRIVER_ADD_SCANLINE("scantimer", targeth_state, interrupt, "screen", 0, 1)
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MCFG_DEVICE_ADD("gaelco_ds5002fp", GAELCO_DS5002FP, XTAL_24MHz / 2)
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GAELCO_DS5002FP_SET_SHARE_TAG("shareram")
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/* video hardware */
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MCFG_SCREEN_ADD("screen", RASTER)
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@ -202,6 +202,7 @@ static MACHINE_CONFIG_START( thoop2 )
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MCFG_CPU_VBLANK_INT_DRIVER("screen", thoop2_state, irq6_line_hold)
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MCFG_DEVICE_ADD("gaelco_ds5002fp", GAELCO_DS5002FP, XTAL_24MHz / 2)
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GAELCO_DS5002FP_SET_SHARE_TAG("shareram")
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MCFG_WATCHDOG_ADD("watchdog")
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@ -261,6 +261,7 @@ static MACHINE_CONFIG_START( wrally )
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MCFG_CPU_VBLANK_INT_DRIVER("screen", wrally_state, irq6_line_hold)
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MCFG_DEVICE_ADD("gaelco_ds5002fp", GAELCO_DS5002FP_WRALLY, XTAL_24MHz / 2) /* verified on pcb */
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GAELCO_DS5002FP_SET_SHARE_TAG("shareram")
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/* video hardware */
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MCFG_SCREEN_ADD("screen", RASTER)
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@ -6,33 +6,39 @@
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DEFINE_DEVICE_TYPE(GAELCO_DS5002FP, gaelco_ds5002fp_device, "gaelco_ds5002fp", "Gaelco DS5002FP")
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DEFINE_DEVICE_TYPE(GAELCO_DS5002FP_WRALLY, gaelco_ds5002fp_wrally_device, "gaelco_ds5002fp_wr", "Gaelco DS5002FP (World Rally)")
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gaelco_ds5002fp_device_base::gaelco_ds5002fp_device_base(machine_config const &mconfig, device_type type, char const *tag, device_t *owner, u32 clock)
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: device_t(mconfig, type, tag, owner, clock),
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m_shareram(*this, ":shareram"),
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m_mcu_ram(*this, "sram")
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m_shareram(*this, finder_base::DUMMY_TAG),
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m_sram(*this, "sram")
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{
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}
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READ8_MEMBER(gaelco_ds5002fp_device_base::dallas_share_r)
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void gaelco_ds5002fp_device_base::static_set_share_tag(device_t &device, const char *tag)
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{
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downcast<gaelco_ds5002fp_device_base &>(device).m_shareram.set_tag(tag);
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}
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READ8_MEMBER(gaelco_ds5002fp_device_base::shareram_r)
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{
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uint8_t *shareram = (uint8_t *)m_shareram.target();
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return shareram[BYTE_XOR_BE(offset)];
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}
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WRITE8_MEMBER(gaelco_ds5002fp_device_base::dallas_share_w)
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WRITE8_MEMBER(gaelco_ds5002fp_device_base::shareram_w)
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{
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uint8_t *shareram = (uint8_t *)m_shareram.target();
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shareram[BYTE_XOR_BE(offset)] = data;
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}
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READ8_MEMBER(gaelco_ds5002fp_device_base::dallas_ram_r)
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READ8_MEMBER(gaelco_ds5002fp_device_base::sram_r)
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{
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return m_mcu_ram[offset];
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return m_sram[offset];
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}
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WRITE8_MEMBER(gaelco_ds5002fp_device_base::dallas_ram_w)
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WRITE8_MEMBER(gaelco_ds5002fp_device_base::sram_w)
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{
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m_mcu_ram[offset] = data;
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m_sram[offset] = data;
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}
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void gaelco_ds5002fp_device_base::device_start()
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@ -49,11 +55,11 @@ gaelco_ds5002fp_device::gaelco_ds5002fp_device(const machine_config &mconfig, co
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}
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static ADDRESS_MAP_START( dallas_rom, AS_PROGRAM, 8, gaelco_ds5002fp_device )
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AM_RANGE(0x00000, 0x07fff) AM_READ(dallas_ram_r) /* Code in NVRAM */
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AM_RANGE(0x00000, 0x07fff) AM_READ(sram_r) /* Code in SRAM */
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ADDRESS_MAP_END
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static ADDRESS_MAP_START( dallas_ram, AS_IO, 8, gaelco_ds5002fp_device )
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AM_RANGE(0x08000, 0x0ffff) AM_READWRITE(dallas_share_r, dallas_share_w) /* confirmed that 0x8000 - 0xffff is a window into 68k shared RAM */
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AM_RANGE(0x08000, 0x0ffff) AM_READWRITE(shareram_r, shareram_w) /* confirmed that 0x8000 - 0xffff is a window into 68k shared RAM */
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AM_RANGE(0x10000, 0x17fff) AM_RAM AM_SHARE("sram") /* yes, the games access it as data and use it for temporary storage!! */
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ADDRESS_MAP_END
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@ -74,11 +80,11 @@ gaelco_ds5002fp_wrally_device::gaelco_ds5002fp_wrally_device(const machine_confi
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}
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static ADDRESS_MAP_START( dallas_rom_wr, AS_PROGRAM, 8, gaelco_ds5002fp_wrally_device )
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AM_RANGE(0x00000, 0x07fff) AM_READ(dallas_ram_r) /* Code in NVRAM */
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AM_RANGE(0x00000, 0x07fff) AM_READ(sram_r) /* Code in SRAM */
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ADDRESS_MAP_END
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static ADDRESS_MAP_START( dallas_ram_wr, AS_IO, 8, gaelco_ds5002fp_wrally_device )
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AM_RANGE(0x00000, 0x0ffff) AM_READWRITE(dallas_share_r, dallas_share_w) AM_MASK(0x3fff) /* Shared RAM with the main CPU */
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AM_RANGE(0x00000, 0x0ffff) AM_READWRITE(shareram_r, shareram_w) AM_MASK(0x3fff) /* Shared RAM with the main CPU */
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AM_RANGE(0x10000, 0x17fff) AM_RAM AM_SHARE("sram") /*don't think World Rally actually uses it for storage tho */
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ADDRESS_MAP_END
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@ -11,13 +11,18 @@
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DECLARE_DEVICE_TYPE(GAELCO_DS5002FP, gaelco_ds5002fp_device)
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DECLARE_DEVICE_TYPE(GAELCO_DS5002FP_WRALLY, gaelco_ds5002fp_wrally_device)
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#define GAELCO_DS5002FP_SET_SHARE_TAG(_tag) \
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gaelco_ds5002fp_device_base::static_set_share_tag(*device, "^" _tag);
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class gaelco_ds5002fp_device_base : public device_t
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{
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public:
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DECLARE_READ8_MEMBER(dallas_ram_r);
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DECLARE_WRITE8_MEMBER(dallas_ram_w);
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DECLARE_READ8_MEMBER(dallas_share_r);
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DECLARE_WRITE8_MEMBER(dallas_share_w);
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static void static_set_share_tag(device_t &device, const char *tag);
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DECLARE_READ8_MEMBER(sram_r);
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DECLARE_WRITE8_MEMBER(sram_w);
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DECLARE_READ8_MEMBER(shareram_r);
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DECLARE_WRITE8_MEMBER(shareram_w);
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protected:
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gaelco_ds5002fp_device_base(machine_config const &mconfig, device_type type, char const *tag, device_t *owner, u32 clock);
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@ -27,7 +32,7 @@ protected:
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private:
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required_shared_ptr<uint16_t> m_shareram;
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required_region_ptr<uint8_t> m_mcu_ram;
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required_region_ptr<uint8_t> m_sram;
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};
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