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fidel6502: add cpu confsetting for su9 (nw)
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@ -158,13 +158,14 @@ All three of the above are called "segment H".
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******************************************************************************
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******************************************************************************
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Super 9 Sensory Chess Challenger (SU9)
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Super 9 Sensory Chess Challenger (SU9/DS9)
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This is basically the Fidelity Elite A/S program on CSC hardware.
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This is basically the Fidelity Elite A/S program on CSC hardware.
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Model DS9(Deluxe) has a 5MHz XTAL, but is otherwise same.
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---------------------------------
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---------------------------------
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R6502AP CPU, assume 2MHz
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R6502AP CPU, 1.95MHz(3.9MHz resonator)
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1 RAM chip, assume 4KB
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2 RAM chips, assume 4KB
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2*8KB ROM + 1*2KB ROM (+another 8KB ROM?)
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2*8KB ROM + 1*2KB ROM
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built-in CB9 module
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built-in CB9 module
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See CSC description above for more information.
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See CSC description above for more information.
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@ -493,6 +494,9 @@ public:
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DECLARE_WRITE_LINE_MEMBER(csc_pia1_cb2_w);
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DECLARE_WRITE_LINE_MEMBER(csc_pia1_cb2_w);
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DECLARE_READ_LINE_MEMBER(csc_pia1_ca1_r);
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DECLARE_READ_LINE_MEMBER(csc_pia1_ca1_r);
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DECLARE_READ_LINE_MEMBER(csc_pia1_cb1_r);
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DECLARE_READ_LINE_MEMBER(csc_pia1_cb1_r);
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DECLARE_MACHINE_RESET(su9);
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DECLARE_INPUT_CHANGED_MEMBER(su9_cpu_freq);
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void su9_set_cpu_freq();
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void csc(machine_config &config);
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void csc(machine_config &config);
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void su9(machine_config &config);
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void su9(machine_config &config);
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void rsc(machine_config &config);
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void rsc(machine_config &config);
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@ -596,6 +600,18 @@ READ8_MEMBER(fidel6502_state::csc_speech_r)
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return m_speech_rom[m_speech_bank << 12 | offset];
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return m_speech_rom[m_speech_bank << 12 | offset];
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}
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}
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void fidel6502_state::su9_set_cpu_freq()
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{
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// SU9 CPU is clocked 1.95MHz, DS9 is 2.5MHz
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m_maincpu->set_unscaled_clock((ioport("FAKE")->read() & 1) ? (5.0_MHz_XTAL/2) : (3.9_MHz_XTAL/2));
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}
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MACHINE_RESET_MEMBER(fidel6502_state, su9)
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{
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fidelbase_state::machine_reset();
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su9_set_cpu_freq();
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}
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// 6821 PIA 0
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// 6821 PIA 0
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@ -1350,8 +1366,18 @@ static INPUT_PORTS_START( su9 )
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PORT_BIT(0x08, IP_ACTIVE_HIGH, IPT_KEYPAD) PORT_CODE(KEYCODE_4) PORT_CODE(KEYCODE_4_PAD) PORT_NAME("LV / Rook")
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PORT_BIT(0x08, IP_ACTIVE_HIGH, IPT_KEYPAD) PORT_CODE(KEYCODE_4) PORT_CODE(KEYCODE_4_PAD) PORT_NAME("LV / Rook")
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PORT_BIT(0x10, IP_ACTIVE_HIGH, IPT_KEYPAD) PORT_CODE(KEYCODE_5) PORT_CODE(KEYCODE_5_PAD) PORT_NAME("PV / Queen")
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PORT_BIT(0x10, IP_ACTIVE_HIGH, IPT_KEYPAD) PORT_CODE(KEYCODE_5) PORT_CODE(KEYCODE_5_PAD) PORT_NAME("PV / Queen")
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PORT_BIT(0x20, IP_ACTIVE_HIGH, IPT_KEYPAD) PORT_CODE(KEYCODE_6) PORT_CODE(KEYCODE_6_PAD) PORT_NAME("PB / King")
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PORT_BIT(0x20, IP_ACTIVE_HIGH, IPT_KEYPAD) PORT_CODE(KEYCODE_6) PORT_CODE(KEYCODE_6_PAD) PORT_NAME("PB / King")
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PORT_START("FAKE")
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PORT_CONFNAME( 0x01, 0x00, "CPU Frequency" ) PORT_CHANGED_MEMBER(DEVICE_SELF, fidel6502_state, su9_cpu_freq, nullptr) // factory set
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PORT_CONFSETTING( 0x00, "1.95MHz (SU9)" )
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PORT_CONFSETTING( 0x01, "2.5MHz (DS9)" )
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INPUT_PORTS_END
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INPUT_PORTS_END
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INPUT_CHANGED_MEMBER(fidel6502_state::su9_cpu_freq)
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{
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su9_set_cpu_freq();
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}
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static INPUT_PORTS_START( su9sp )
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static INPUT_PORTS_START( su9sp )
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PORT_INCLUDE( su9 )
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PORT_INCLUDE( su9 )
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@ -1678,6 +1704,8 @@ MACHINE_CONFIG_DERIVED(fidel6502_state::su9, csc)
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MCFG_CPU_MODIFY("maincpu")
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MCFG_CPU_MODIFY("maincpu")
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MCFG_CPU_PROGRAM_MAP(su9_map)
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MCFG_CPU_PROGRAM_MAP(su9_map)
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MCFG_MACHINE_RESET_OVERRIDE(fidel6502_state, su9)
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MCFG_DEFAULT_LAYOUT(layout_fidel_su9)
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MCFG_DEFAULT_LAYOUT(layout_fidel_su9)
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MACHINE_CONFIG_END
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MACHINE_CONFIG_END
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@ -14679,8 +14679,8 @@ lightfgt // Milton Bradley
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mdallas // Mattel
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mdallas // Mattel
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plus1 // Milton Bradley
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plus1 // Milton Bradley
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qkracer // National Semiconductor
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qkracer // National Semiconductor
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vidchal // Select Merchandise
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unkeinv // Gordon Barlow Design
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unkeinv // Gordon Barlow Design
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vidchal // Select Merchandise
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@source:hh_hmcs40.cpp
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@source:hh_hmcs40.cpp
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alnattck // Coleco
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alnattck // Coleco
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