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emu/mconfig.cpp: Made checks on device add/replace stricter.

Browse Source 
Trying to replace a non-existent device or trying to add a device with
root or parent references in the path is now fatal.  If you find
yourself wanting to do this, your design is probably broken.
This commit is contained in:
Vas Crabb 2021-12-09 17:46:53 +11:00
parent a7d29a8294
commit 28818fe345
15 changed files with 157 additions and 160 deletions
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1
src/devices/machine/idectrl.h
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@ -106,6 +106,7 @@ class bus_master_ide_controller_device : public ide_controller_32_device
public:
bus_master_ide_controller_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock = 0);
template <typename T> void set_bus_master_space(T &&bmtag, int bmspace) { m_dma_space.set_tag(std::forward<T>(bmtag), bmspace); }
template <bool R> void set_bus_master_space(const address_space_finder<R> &finder) { m_dma_space.set_tag(finder); }
template <typename T> bus_master_ide_controller_device &master(T &&opts, const char *dflt = nullptr, bool fixed = false)
{

7
src/devices/machine/pci-ide.cpp
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@ -12,8 +12,7 @@ ide_pci_device::ide_pci_device(const machine_config &mconfig, const char *tag, d
m_irq_handler(*this),
m_legacy_top(0x000),
m_pif(0x8a),
m_bus_master_tag(":pci:00.0"),
m_bus_master_space(AS_DATA)
m_bus_master_space(*this, ":pci:00.0", AS_DATA)
{
}
@ -58,11 +57,11 @@ void ide_pci_device::device_add_mconfig(machine_config &config)
{
BUS_MASTER_IDE_CONTROLLER(config, m_ide).options(ata_devices, "hdd", "cdrom", true);
m_ide->irq_handler().set(FUNC(ide_pci_device::ide_interrupt));
m_ide->set_bus_master_space(m_bus_master_tag, m_bus_master_space);
m_ide->set_bus_master_space(m_bus_master_space);
BUS_MASTER_IDE_CONTROLLER(config, m_ide2).options(ata_devices, "hdd", "cdrom", true);
m_ide2->irq_handler().set(FUNC(ide_pci_device::ide_interrupt));
m_ide2->set_bus_master_space(m_bus_master_tag, m_bus_master_space);
m_ide2->set_bus_master_space(m_bus_master_space);
}
void ide_pci_device::device_start()

6
src/devices/machine/pci-ide.h
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@ -26,8 +26,7 @@ public:
: ide_pci_device(mconfig, tag, owner, clock)
{
set_ids(main_id, revision, 0x01018a, subdevice_id);
m_bus_master_tag = bmtag;
m_bus_master_space = bmspace;
m_bus_master_space.set_tag(bmtag, bmspace);
}
ide_pci_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
@ -69,8 +68,7 @@ private:
// Bits 31-20 for legacy mode hack
uint32_t m_legacy_top;
uint32_t m_pif;
const char* m_bus_master_tag;
uint32_t m_bus_master_space;
required_address_space m_bus_master_space;
uint32_t m_config_data[0x10];
void chan1_data_command_map(address_map &map);

21
src/emu/mconfig.cpp
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@ -257,24 +257,23 @@ std::pair<const char *, device_t *> machine_config::resolve_owner(const char *ta
device_t *owner(m_current_device);
// if the device path is absolute, start from the root
if (tag[0] == ':')
{
tag++;
owner = m_root_device.get();
}
if (!*tag || (':' == *tag) || ('^' == *tag))
throw emu_fatalerror("Attempting to add device with tag containing parent references '%s'\n", orig_tag);
// go down the path until we're done with it
while (strchr(tag, ':'))
char const *next;
while ((next = strchr(tag, ':')) != nullptr)
{
const char *next = strchr(tag, ':');
assert(next != tag);
std::string_view part(tag, next - tag);
owner = owner->subdevices().find(part);
if (!owner)
throw emu_fatalerror("Could not find %s when looking up path for device %s\n", part, orig_tag);
tag = next+1;
throw emu_fatalerror("Could not find '%s' when looking up path for device '%s'\n", part, orig_tag);
tag = next + 1;
if ('^' == *tag)
throw emu_fatalerror("Attempting to add device with tag containing parent references '%s'\n", orig_tag);
}
assert(tag[0] != '\0');
assert(*tag != '\0');
return std::make_pair(tag, owner);
}
@ -296,7 +295,7 @@ std::tuple<const char *, device_t *, device_t *> machine_config::prepare_replace
if (old_device)
remove_references(*old_device);
else
osd_printf_warning("Warning: attempting to replace non-existent device '%s'\n", tag);
throw emu_fatalerror("Attempting to replace non-existent device '%s'\n", tag);
return std::make_tuple(owner.first, owner.second, old_device);
}

12
src/mame/drivers/atlantis.cpp
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@ -89,9 +89,9 @@ namespace {
// IDSEL = AD22, PCI expansion
// IDSEL = AD23, PCI expansion
// IDSEL = AD24, PCI expansion
#define PCI_ID_IDE ":pci:08.0"
#define PCI_ID_NILE ":pci:0a.0"
#define PCI_ID_9050 ":pci:0b.0"
#define PCI_ID_IDE "pci:08.0"
#define PCI_ID_NILE "pci:0a.0"
#define PCI_ID_9050 "pci:0b.0"
#define DEBUG_CONSOLE (0)
#define LOG_RTC (0)
@ -101,8 +101,8 @@ namespace {
class atlantis_state : public driver_device
{
public:
atlantis_state(const machine_config &mconfig, device_type type, const char *tag)
: driver_device(mconfig, type, tag),
atlantis_state(const machine_config &mconfig, device_type type, const char *tag) :
driver_device(mconfig, type, tag),
m_maincpu(*this, "maincpu"),
m_screen(*this, "screen"),
m_palette(*this, "palette"),
@ -814,7 +814,7 @@ void atlantis_state::mwskins(machine_config &config)
m_maincpu->set_dcache_size(16384);
m_maincpu->set_system_clock(66666666);
PCI_ROOT(config, ":pci", 0);
PCI_ROOT(config, "pci", 0);
vrc4373_device &vrc4373(VRC4373(config, PCI_ID_NILE, 0, m_maincpu));
vrc4373.set_ram_size(0x00800000);

10
src/mame/drivers/chihiro.cpp
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@ -1912,12 +1912,12 @@ void chihiro_state::chihiro_base(machine_config &config)
m_maincpu->set_addrmap(AS_PROGRAM, &chihiro_state::chihiro_map);
m_maincpu->set_addrmap(AS_IO, &chihiro_state::chihiro_map_io);
subdevice<ide_controller_32_device>(":pci:09.0:ide1")->options(ide_baseboard, nullptr, "bb", true);
subdevice<ide_controller_32_device>("pci:09.0:ide1")->options(ide_baseboard, nullptr, "bb", true);
OHCI_USB_CONNECTOR(config, ":pci:02.0:port1", usb_baseboard, "an2131qc", true).set_option_machine_config("an2131qc", an2131qc_configuration);
OHCI_USB_CONNECTOR(config, ":pci:02.0:port2", usb_baseboard, "an2131sc", true).set_option_machine_config("an2131sc", an2131sc_configuration);
OHCI_USB_CONNECTOR(config, ":pci:02.0:port3", usb_baseboard, nullptr, false);
OHCI_USB_CONNECTOR(config, ":pci:02.0:port4", usb_baseboard, nullptr, false);
OHCI_USB_CONNECTOR(config, "pci:02.0:port1", usb_baseboard, "an2131qc", true).set_option_machine_config("an2131qc", an2131qc_configuration);
OHCI_USB_CONNECTOR(config, "pci:02.0:port2", usb_baseboard, "an2131sc", true).set_option_machine_config("an2131sc", an2131sc_configuration);
OHCI_USB_CONNECTOR(config, "pci:02.0:port3", usb_baseboard, nullptr, false);
OHCI_USB_CONNECTOR(config, "pci:02.0:port4", usb_baseboard, nullptr, false);
JVS_MASTER(config, "jvs_master", 0);
sega_837_13551_device &sega837(SEGA_837_13551(config, "837_13551", 0, "jvs_master"));

18
src/mame/drivers/iteagle.cpp
View File

@ -115,14 +115,14 @@ www.multitech.com
//*************************************
// Main iteagle driver
//*************************************
#define PCI_ID_NILE ":pci:00.0"
#define PCI_ID_PERIPH ":pci:06.0"
#define PCI_ID_IDE ":pci:06.1"
// Secondary IDE Control ":pci:06.2"
#define PCI_ID_SOUND ":pci:07.0"
#define PCI_ID_FPGA ":pci:08.0"
#define PCI_ID_VIDEO ":pci:09.0"
#define PCI_ID_EEPROM ":pci:0a.0"
#define PCI_ID_NILE "pci:00.0"
#define PCI_ID_PERIPH "pci:06.0"
#define PCI_ID_IDE "pci:06.1"
// Secondary IDE Control "pci:06.2"
#define PCI_ID_SOUND "pci:07.0"
#define PCI_ID_FPGA "pci:08.0"
#define PCI_ID_VIDEO "pci:09.0"
#define PCI_ID_EEPROM "pci:0a.0"
class iteagle_state : public driver_device
{
@ -173,7 +173,7 @@ void iteagle_state::iteagle(machine_config &config)
m_maincpu->set_dcache_size(8192);
m_maincpu->set_system_clock(66666667);
PCI_ROOT(config, ":pci", 0);
PCI_ROOT(config, "pci", 0);
vrc4373_device &vrc4373(VRC4373(config, PCI_ID_NILE, 0, m_maincpu));
vrc4373.set_ram_size(0x00800000);

50
src/mame/drivers/lindbergh.cpp
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@ -397,32 +397,32 @@ void lindbergh_state::lindbergh(machine_config &config)
{
PENTIUM4(config, "maincpu", 28000000U*5); /* Actually Celeron D at 2,8 GHz */
PCI_ROOT (config, ":pci", 0);
I82875P_HOST (config, ":pci:00.0", 0, 0x103382c0, "maincpu", 512*1024*1024);
I82875P_AGP (config, ":pci:01.0", 0);
GEFORCE_7600GS (config, ":pci:01.0:00.0", 0, 0x10de02e1);
I82875P_OVERFLOW (config, ":pci:06.0", 0, 0x103382c0);
PCI_BRIDGE (config, ":pci:1c.0", 0, 0x808625ae, 0x02);
I82541 (config, ":pci:1c.0:00.0", 0, 0x103382c0);
USB_UHCI (config, ":pci:1d.0", 0, 0x808625a9, 0x02, 0x103382c0);
USB_UHCI (config, ":pci:1d.1", 0, 0x808625aa, 0x02, 0x103382c0);
I6300ESB_WATCHDOG (config, ":pci:1d.4", 0, 0x103382c0);
APIC (config, ":pci:1d.5", 0, 0x808625ac, 0x02, 0x103382c0);
USB_EHCI (config, ":pci:1d.7", 0, 0x808625ad, 0x02, 0x103382c0);
PCI_BRIDGE (config, ":pci:1e.0", 0, 0x8086244e, 0x0a);
SB0400 (config, ":pci:1e.0:02.0", 0, 0x11021101);
SEGA_LINDBERGH_BASEBOARD(config, ":pci:1e.0:03.0", 0);
I6300ESB_LPC (config, ":pci:1f.0", 0);
LPC_ACPI (config, ":pci:1f.0:acpi", 0);
LPC_RTC (config, ":pci:1f.0:rtc", 0);
LPC_PIT (config, ":pci:1f.0:pit", 0);
SATA (config, ":pci:1f.2", 0, 0x808625a3, 0x02, 0x103382c0);
SMBUS (config, ":pci:1f.3", 0, 0x808625a4, 0x02, 0x103382c0);
AC97 (config, ":pci:1f.5", 0, 0x808625a6, 0x02, 0x103382c0);
PCI_ROOT (config, "pci", 0);
I82875P_HOST (config, "pci:00.0", 0, 0x103382c0, "maincpu", 512*1024*1024);
I82875P_AGP (config, "pci:01.0", 0);
GEFORCE_7600GS (config, "pci:01.0:00.0", 0, 0x10de02e1);
I82875P_OVERFLOW (config, "pci:06.0", 0, 0x103382c0);
PCI_BRIDGE (config, "pci:1c.0", 0, 0x808625ae, 0x02);
I82541 (config, "pci:1c.0:00.0", 0, 0x103382c0);
USB_UHCI (config, "pci:1d.0", 0, 0x808625a9, 0x02, 0x103382c0);
USB_UHCI (config, "pci:1d.1", 0, 0x808625aa, 0x02, 0x103382c0);
I6300ESB_WATCHDOG (config, "pci:1d.4", 0, 0x103382c0);
APIC (config, "pci:1d.5", 0, 0x808625ac, 0x02, 0x103382c0);
USB_EHCI (config, "pci:1d.7", 0, 0x808625ad, 0x02, 0x103382c0);
PCI_BRIDGE (config, "pci:1e.0", 0, 0x8086244e, 0x0a);
SB0400 (config, "pci:1e.0:02.0", 0, 0x11021101);
SEGA_LINDBERGH_BASEBOARD(config, "pci:1e.0:03.0", 0);
I6300ESB_LPC (config, "pci:1f.0", 0);
LPC_ACPI (config, "pci:1f.0:acpi", 0);
LPC_RTC (config, "pci:1f.0:rtc", 0);
LPC_PIT (config, "pci:1f.0:pit", 0);
SATA (config, "pci:1f.2", 0, 0x808625a3, 0x02, 0x103382c0);
SMBUS (config, "pci:1f.3", 0, 0x808625a4, 0x02, 0x103382c0);
AC97 (config, "pci:1f.5", 0, 0x808625a6, 0x02, 0x103382c0);
}
#define LINDBERGH_BIOS \
ROM_REGION32_LE(0x100000, ":pci:1f.0", 0) /* PC bios, location 3j7 */ \
ROM_REGION32_LE(0x100000, "pci:1f.0", 0) /* PC bios, location 3j7 */ \
ROM_SYSTEM_BIOS(0, "bios0", "6.0.0010 alternate version") \
ROMX_LOAD("6.0.0010a.bin", 0x00000, 0x100000, CRC(10dd9b76) SHA1(1fdf1f921bc395846a7c3180fbdbc4ca287a9670), ROM_BIOS(0) ) \
ROM_SYSTEM_BIOS(1, "bios1", "6.0.0009") \
@ -430,10 +430,10 @@ void lindbergh_state::lindbergh(machine_config &config)
ROM_SYSTEM_BIOS(2, "bios2", "6.0.0010") \
ROMX_LOAD("6.0.0010.bin", 0x00000, 0x100000, CRC(ea2bf888) SHA1(c9c5b6f0d4f4f36620939b15dd2f128a74347e37), ROM_BIOS(2) ) \
\
ROM_REGION(0x400000, ":pci:1e.0:03.0", 0) /* Baseboard MPC firmware */ \
ROM_REGION(0x400000, "pci:1e.0:03.0", 0) /* Baseboard MPC firmware */ \
ROM_LOAD("fpr-24370b.ic6", 0x000000, 0x400000, CRC(c3b021a4) SHA1(1b6938a50fe0e4ae813864649eb103838c399ac0)) \
\
ROM_REGION32_LE(0x10000, ":pci:01.0:00.0", 0) /* Geforce bios extension (custom for the card) */ \
ROM_REGION32_LE(0x10000, "pci:01.0:00.0", 0) /* Geforce bios extension (custom for the card) */ \
ROM_LOAD("vid_bios.u504", 0x00000, 0x10000, CRC(f78d14d7) SHA1(f129787e487984edd23bf344f2e9500c85052275)) \
DISK_REGION("cf") \
DISK_IMAGE_READONLY("mda-c0004a_revb_lindyellow_v2.4.20_mvl31a_boot_2.01", 0, SHA1(e13da5f827df852e742b594729ee3f933b387410))

82
src/mame/drivers/nforcepc.cpp
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@ -1073,8 +1073,8 @@ private:
nforcepc_state::nforcepc_state(const machine_config &mconfig, device_type type, const char *tag) :
driver_device(mconfig, type, tag),
m_maincpu(*this, "maincpu"),
isalpc(*this, ":pci:01.0"),
m_as99127f(*this, ":pci:01.1:12d")
isalpc(*this, "pci:01.0"),
m_as99127f(*this, "pci:01.1:12d")
{
}
@ -1162,65 +1162,65 @@ void nforcepc_state::nforcepc(machine_config &config)
maincpu.set_irq_acknowledge_callback(FUNC(nforcepc_state::irq_callback));
//maincpu.smiact().set("pci:01.0", FUNC(???_host_device::smi_act_w));
PCI_ROOT(config, ":pci", 0);
CRUSH11(config, ":pci:00.0", 0, "maincpu", "bios"); // 10de:01a4 NVIDIA Corporation nForce CPU bridge
CRUSH11_MEMORY(config, ":pci:00.1", 0, 0x10430c11, 2); // 10de:01ac NVIDIA Corporation nForce 220/420 Memory Controller
PCI_ROOT(config, "pci", 0);
CRUSH11(config, "pci:00.0", 0, "maincpu", "bios"); // 10de:01a4 NVIDIA Corporation nForce CPU bridge
CRUSH11_MEMORY(config, "pci:00.1", 0, 0x10430c11, 2); // 10de:01ac NVIDIA Corporation nForce 220/420 Memory Controller
// 10de:01ad NVIDIA Corporation nForce 220/420 Memory Controller
// 10de:01ab NVIDIA Corporation nForce 420 Memory Controller (DDR)
mcpx_isalpc_device &isa(MCPX_ISALPC(config, ":pci:01.0", 0, 0x10430c11)); // 10de:01b2 NVIDIA Corporation nForce ISA Bridge (LPC bus)
mcpx_isalpc_device &isa(MCPX_ISALPC(config, "pci:01.0", 0, 0x10430c11)); // 10de:01b2 NVIDIA Corporation nForce ISA Bridge (LPC bus)
isa.smi().set_inputline(":maincpu", INPUT_LINE_SMI);
isa.boot_state_hook().set(FUNC(nforcepc_state::boot_state_award_w));
isa.interrupt_output().set(FUNC(nforcepc_state::maincpu_interrupt));
it8703f_device &ite(IT8703F(config, ":pci:01.0:0", 0));
ite.pin_reset().set_inputline(":maincpu", INPUT_LINE_RESET);
ite.pin_gatea20().set_inputline(":maincpu", INPUT_LINE_A20);
it8703f_device &ite(IT8703F(config, "pci:01.0:0", 0));
ite.pin_reset().set_inputline("maincpu", INPUT_LINE_RESET);
ite.pin_gatea20().set_inputline("maincpu", INPUT_LINE_A20);
ite.txd1().set("serport0", FUNC(rs232_port_device::write_txd));
ite.ndtr1().set("serport0", FUNC(rs232_port_device::write_dtr));
ite.nrts1().set("serport0", FUNC(rs232_port_device::write_rts));
ite.txd2().set("serport1", FUNC(rs232_port_device::write_txd));
ite.ndtr2().set("serport1", FUNC(rs232_port_device::write_dtr));
ite.nrts2().set("serport1", FUNC(rs232_port_device::write_rts));
MCPX_SMBUS(config, ":pci:01.1", 0, 0x10430c11); // 10de:01b4 NVIDIA Corporation nForce PCI System Management (SMBus)
SMBUS_ROM(config, ":pci:01.1:050", 0, test_spd_data, sizeof(test_spd_data)); // these 3 are on smbus number 0
SMBUS_LOGGER(config, ":pci:01.1:051", 0);
SMBUS_LOGGER(config, ":pci:01.1:052", 0);
SMBUS_LOGGER(config, ":pci:01.1:108", 0); // these 4 are on smbus number 1
AS99127F(config, ":pci:01.1:12d", 0);
AS99127F_SENSOR2(config, ":pci:01.1:148", 0);
AS99127F_SENSOR3(config, ":pci:01.1:149", 0);
mcpx_ohci_device &ohci(MCPX_OHCI(config, ":pci:02.0", 0, 0x10430c11)); // 10de:01c2 NVIDIA Corporation nForce USB Controller
ohci.interrupt_handler().set(":pci:01.0", FUNC(mcpx_isalpc_device::irq1));
MCPX_OHCI(config, ":pci:03.0", 0, 0x10430c11); // 10de:01c2 NVIDIA Corporation nForce USB Controller
MCPX_ETH(config, ":pci:04.0", 0); // 10de:01c3 NVIDIA Corporation nForce Ethernet Controller
MCPX_APU(config, ":pci:05.0", 0, 0x10430c11, m_maincpu); // 10de:01b0 NVIDIA Corporation nForce Audio Processing Unit
MCPX_AC97_AUDIO(config, ":pci:06.0", 0, 0x10438384); // 10de:01b1 NVIDIA Corporation nForce AC'97 Audio Controller
PCI_BRIDGE(config, ":pci:08.0", 0, 0x10de01b8, 0xc2); // 10de:01b8 NVIDIA Corporation nForce PCI-to-PCI bridge
MCPX_SMBUS(config, "pci:01.1", 0, 0x10430c11); // 10de:01b4 NVIDIA Corporation nForce PCI System Management (SMBus)
SMBUS_ROM(config, "pci:01.1:050", 0, test_spd_data, sizeof(test_spd_data)); // these 3 are on smbus number 0
SMBUS_LOGGER(config, "pci:01.1:051", 0);
SMBUS_LOGGER(config, "pci:01.1:052", 0);
SMBUS_LOGGER(config, "pci:01.1:108", 0); // these 4 are on smbus number 1
AS99127F(config, "pci:01.1:12d", 0);
AS99127F_SENSOR2(config, "pci:01.1:148", 0);
AS99127F_SENSOR3(config, "pci:01.1:149", 0);
mcpx_ohci_device &ohci(MCPX_OHCI(config, "pci:02.0", 0, 0x10430c11)); // 10de:01c2 NVIDIA Corporation nForce USB Controller
ohci.interrupt_handler().set("pci:01.0", FUNC(mcpx_isalpc_device::irq1));
MCPX_OHCI(config, "pci:03.0", 0, 0x10430c11); // 10de:01c2 NVIDIA Corporation nForce USB Controller
MCPX_ETH(config, "pci:04.0", 0); // 10de:01c3 NVIDIA Corporation nForce Ethernet Controller
MCPX_APU(config, "pci:05.0", 0, 0x10430c11, m_maincpu); // 10de:01b0 NVIDIA Corporation nForce Audio Processing Unit
MCPX_AC97_AUDIO(config, "pci:06.0", 0, 0x10438384); // 10de:01b1 NVIDIA Corporation nForce AC'97 Audio Controller
PCI_BRIDGE(config, "pci:08.0", 0, 0x10de01b8, 0xc2); // 10de:01b8 NVIDIA Corporation nForce PCI-to-PCI bridge
// 10ec:8139 Realtek Semiconductor Co., Ltd. RTL-8139/8139C/8139C+ (behind bridge)
mcpx_ide_device &ide(MCPX_IDE(config, ":pci:09.0", 0, 0x10430c11)); // 10de:01bc NVIDIA Corporation nForce IDE
ide.pri_interrupt_handler().set(":pci:01.0", FUNC(mcpx_isalpc_device::irq14));
ide.sec_interrupt_handler().set(":pci:01.0", FUNC(mcpx_isalpc_device::irq15));
mcpx_ide_device &ide(MCPX_IDE(config, "pci:09.0", 0, 0x10430c11)); // 10de:01bc NVIDIA Corporation nForce IDE
ide.pri_interrupt_handler().set("pci:01.0", FUNC(mcpx_isalpc_device::irq14));
ide.sec_interrupt_handler().set("pci:01.0", FUNC(mcpx_isalpc_device::irq15));
ide.subdevice<ide_controller_32_device>("ide1")->options(ata_devices, "hdd", nullptr, true);
ide.subdevice<ide_controller_32_device>("ide2")->options(ata_devices, "cdrom", nullptr, true);
NV2A_AGP(config, ":pci:1e.0", 0, 0x10de01b7, 0xb2); // 10de:01b7 NVIDIA Corporation nForce AGP to PCI Bridge
VIRGEDX_PCI(config, ":pci:0a.0", 0);
NV2A_AGP(config, "pci:1e.0", 0, 0x10de01b7, 0xb2); // 10de:01b7 NVIDIA Corporation nForce AGP to PCI Bridge
VIRGEDX_PCI(config, "pci:0a.0", 0);
SST_49LF020(config, "bios", 0);
FLOPPY_CONNECTOR(config, ":pci:01.0:0:fdc:0", pc_hd_floppies, "35hd", floppy_formats);
FLOPPY_CONNECTOR(config, ":pci:01.0:0:fdc:1", pc_hd_floppies, "35hd", floppy_formats);
FLOPPY_CONNECTOR(config, "pci:01.0:0:fdc:0", pc_hd_floppies, "35hd", floppy_formats);
FLOPPY_CONNECTOR(config, "pci:01.0:0:fdc:1", pc_hd_floppies, "35hd", floppy_formats);
rs232_port_device& serport0(RS232_PORT(config, "serport0", isa_com, nullptr));
serport0.rxd_handler().set(":pci:01.0:0", FUNC(it8703f_device::rxd1_w));
serport0.dcd_handler().set(":pci:01.0:0", FUNC(it8703f_device::ndcd1_w));
serport0.dsr_handler().set(":pci:01.0:0", FUNC(it8703f_device::ndsr1_w));
serport0.ri_handler().set(":pci:01.0:0", FUNC(it8703f_device::nri1_w));
serport0.cts_handler().set(":pci:01.0:0", FUNC(it8703f_device::ncts1_w));
serport0.rxd_handler().set("pci:01.0:0", FUNC(it8703f_device::rxd1_w));
serport0.dcd_handler().set("pci:01.0:0", FUNC(it8703f_device::ndcd1_w));
serport0.dsr_handler().set("pci:01.0:0", FUNC(it8703f_device::ndsr1_w));
serport0.ri_handler().set("pci:01.0:0", FUNC(it8703f_device::nri1_w));
serport0.cts_handler().set("pci:01.0:0", FUNC(it8703f_device::ncts1_w));
rs232_port_device& serport1(RS232_PORT(config, "serport1", isa_com, nullptr));
serport1.rxd_handler().set(":pci:01.0:0", FUNC(it8703f_device::rxd2_w));
serport1.dcd_handler().set(":pci:01.0:0", FUNC(it8703f_device::ndcd2_w));
serport1.dsr_handler().set(":pci:01.0:0", FUNC(it8703f_device::ndsr2_w));
serport1.ri_handler().set(":pci:01.0:0", FUNC(it8703f_device::nri2_w));
serport1.cts_handler().set(":pci:01.0:0", FUNC(it8703f_device::ncts2_w));
serport1.rxd_handler().set("pci:01.0:0", FUNC(it8703f_device::rxd2_w));
serport1.dcd_handler().set("pci:01.0:0", FUNC(it8703f_device::ndcd2_w));
serport1.dsr_handler().set("pci:01.0:0", FUNC(it8703f_device::ndsr2_w));
serport1.ri_handler().set("pci:01.0:0", FUNC(it8703f_device::nri2_w));
serport1.cts_handler().set("pci:01.0:0", FUNC(it8703f_device::ncts2_w));
}
ROM_START(nforcepc)

32
src/mame/drivers/pcipc.cpp
View File

@ -527,18 +527,18 @@ void pcipc_state::pcipc(machine_config &config)
maincpu.set_irq_acknowledge_callback("pci:07.0:pic8259_master", FUNC(pic8259_device::inta_cb));
maincpu.smiact().set("pci:00.0", FUNC(i82439hx_host_device::smi_act_w));
PCI_ROOT(config, ":pci", 0);
I82439HX(config, ":pci:00.0", 0, "maincpu", 256*1024*1024);
PCI_ROOT(config, "pci", 0);
I82439HX(config, "pci:00.0", 0, "maincpu", 256*1024*1024);
i82371sb_isa_device &isa(I82371SB_ISA(config, ":pci:07.0", 0));
i82371sb_isa_device &isa(I82371SB_ISA(config, "pci:07.0", 0));
isa.boot_state_hook().set(FUNC(pcipc_state::boot_state_phoenix_ver40_rev6_w));
isa.smi().set_inputline(":maincpu", INPUT_LINE_SMI);
isa.smi().set_inputline("maincpu", INPUT_LINE_SMI);
i82371sb_ide_device &ide(I82371SB_IDE(config, ":pci:07.1", 0));
ide.irq_pri().set(":pci:07.0", FUNC(i82371sb_isa_device::pc_irq14_w));
ide.irq_sec().set(":pci:07.0", FUNC(i82371sb_isa_device::pc_mirq0_w));
// MGA2064W(config, ":pci:12.0", 0);
VIRGE_PCI(config, ":pci:12.0", 0); // use VIRGEDX_PCI for its VESA 2.0 BIOS
i82371sb_ide_device &ide(I82371SB_IDE(config, "pci:07.1", 0));
ide.irq_pri().set("pci:07.0", FUNC(i82371sb_isa_device::pc_irq14_w));
ide.irq_sec().set("pci:07.0", FUNC(i82371sb_isa_device::pc_mirq0_w));
// MGA2064W(config, "pci:12.0", 0);
VIRGE_PCI(config, "pci:12.0", 0); // use VIRGEDX_PCI for its VESA 2.0 BIOS
ISA16_SLOT(config, "board4", 0, "pci:07.0:isabus", isa_internal_devices, "fdc37c93x", true).set_option_machine_config("fdc37c93x", superio_config);
ISA16_SLOT(config, "isa1", 0, "pci:07.0:isabus", pc_isa16_cards, nullptr, false);
@ -567,17 +567,17 @@ void pcipc_state::pcipctx(machine_config &config)
pentium_device &maincpu(PENTIUM(config, "maincpu", 60000000));
maincpu.set_irq_acknowledge_callback("pci:07.0:pic8259_master", FUNC(pic8259_device::inta_cb));
PCI_ROOT(config, ":pci", 0);
I82439TX(config, ":pci:00.0", 0, ":maincpu", 256*1024*1024);
PCI_ROOT(config, "pci", 0);
I82439TX(config, "pci:00.0", 0, "maincpu", 256*1024*1024);
i82371sb_isa_device &isa(I82371SB_ISA(config, ":pci:07.0", 0));
i82371sb_isa_device &isa(I82371SB_ISA(config, "pci:07.0", 0));
isa.boot_state_hook().set(FUNC(pcipc_state::boot_state_award_w));
// IDE_PCI(config, ":pci:07.1", 0, 0x80867010, 0x03, 0x00000000);
MGA2064W(config, ":pci:12.0", 0);
// IDE_PCI(config, "pci:07.1", 0, 0x80867010, 0x03, 0x00000000);
MGA2064W(config, "pci:12.0", 0);
}
ROM_START(pcipc)
ROM_REGION32_LE(0x40000, ":pci:07.0", 0) /* PC bios */
ROM_REGION32_LE(0x40000, "pci:07.0", 0) /* PC bios */
ROM_SYSTEM_BIOS(0, "m55ns04", "m55ns04") // Micronics M55HI-Plus with no sound
ROMX_LOAD("m55-04ns.rom", 0x20000, 0x20000, CRC(0116b2b0) SHA1(19b0203decfd4396695334517488d488aec3ccde), ROM_BIOS(0))
ROM_SYSTEM_BIOS(1, "m55s04", "m55s04") // with sound
@ -591,7 +591,7 @@ ROM_START(pcipc)
ROM_END
ROM_START(pcipctx)
ROM_REGION32_LE(0x40000, ":pci:07.0", 0) /* PC bios */
ROM_REGION32_LE(0x40000, "pci:07.0", 0) /* PC bios */
ROM_SYSTEM_BIOS(0, "ga586t2", "Gigabyte GA-586T2") // ITE 8679 I/O
ROMX_LOAD("gb_ga586t2.bin", 0x20000, 0x20000, CRC(3a50a6e1) SHA1(dea859b4f1492d0d08aacd260ed1e83e00ebac08), ROM_BIOS(0))

12
src/mame/drivers/seattle.cpp
View File

@ -226,9 +226,9 @@ namespace {
#define SYSTEM_CLOCK 50000000
#define PCI_ID_GALILEO ":pci:00.0"
#define PCI_ID_VIDEO ":pci:08.0"
#define PCI_ID_IDE ":pci:09.0"
#define PCI_ID_GALILEO "pci:00.0"
#define PCI_ID_VIDEO "pci:08.0"
#define PCI_ID_IDE "pci:09.0"
// various board configurations
#define PHOENIX_CONFIG (0)
@ -269,8 +269,8 @@ namespace {
class seattle_state : public driver_device
{
public:
seattle_state(const machine_config &mconfig, device_type type, const char *tag)
: driver_device(mconfig, type, tag),
seattle_state(const machine_config &mconfig, device_type type, const char *tag) :
driver_device(mconfig, type, tag),
m_nvram(*this, "nvram"),
m_maincpu(*this, "maincpu"),
m_galileo(*this, PCI_ID_GALILEO),
@ -1999,7 +1999,7 @@ void seattle_state::seattle_common(machine_config &config)
m_maincpu->set_system_clock(SYSTEM_CLOCK);
// PCI Bus Devices
PCI_ROOT(config, ":pci", 0);
PCI_ROOT(config, "pci", 0);
GT64010(config, m_galileo, SYSTEM_CLOCK, m_maincpu, GALILEO_IRQ_NUM);
m_galileo->set_map(0, address_map_constructor(&seattle_state::seattle_cs0_map, "seattle_cs0_map", this), this);

12
src/mame/drivers/vegas.cpp
View File

@ -309,15 +309,15 @@ namespace {
*
*************************************/
#define PCI_ID_NILE ":pci:00.0"
#define PCI_ID_VIDEO ":pci:03.0"
#define PCI_ID_IDE ":pci:05.0"
#define PCI_ID_NILE "pci:00.0"
#define PCI_ID_VIDEO "pci:03.0"
#define PCI_ID_IDE "pci:05.0"
class vegas_state : public driver_device
{
public:
vegas_state(const machine_config &mconfig, device_type type, const char *tag)
: driver_device(mconfig, type, tag),
vegas_state(const machine_config &mconfig, device_type type, const char *tag) :
driver_device(mconfig, type, tag),
m_maincpu(*this, "maincpu"),
m_nile(*this, PCI_ID_NILE),
m_timekeeper(*this, "timekeeper") ,
@ -1905,7 +1905,7 @@ void vegas_state::vegascore(machine_config &config)
m_maincpu->set_system_clock(vegas_state::SYSTEM_CLOCK);
// PCI Bus Devices
PCI_ROOT(config, ":pci", 0);
PCI_ROOT(config, "pci", 0);
VRC5074(config, m_nile, 100000000, m_maincpu);
m_nile->set_sdram_size(0, 0x00800000);

10
src/mame/drivers/xbox.cpp
View File

@ -167,12 +167,12 @@ void xbox_state::xbox(machine_config &config)
xbox_base(config);
m_maincpu->set_addrmap(AS_PROGRAM, &xbox_state::xbox_map);
subdevice<ide_controller_32_device>(":pci:09.0:ide1")->options(xbox_ata_devices, "hdd", "cdrom", true);
subdevice<ide_controller_32_device>("pci:09.0:ide1")->options(xbox_ata_devices, "hdd", "cdrom", true);
OHCI_USB_CONNECTOR(config, ":pci:02.0:port1", usb_xbox, nullptr, false);
OHCI_USB_CONNECTOR(config, ":pci:02.0:port2", usb_xbox, nullptr, false);
OHCI_USB_CONNECTOR(config, ":pci:02.0:port3", usb_xbox, "xbox_controller", false);
OHCI_USB_CONNECTOR(config, ":pci:02.0:port4", usb_xbox, nullptr, false);
OHCI_USB_CONNECTOR(config, "pci:02.0:port1", usb_xbox, nullptr, false);
OHCI_USB_CONNECTOR(config, "pci:02.0:port2", usb_xbox, nullptr, false);
OHCI_USB_CONNECTOR(config, "pci:02.0:port3", usb_xbox, "xbox_controller", false);
OHCI_USB_CONNECTOR(config, "pci:02.0:port4", usb_xbox, nullptr, false);
/* sound hardware */
SPEAKER(config, "mono").front_center();

4
src/mame/machine/naomigd.cpp
View File

@ -448,7 +448,7 @@ void idegdrom_device::map_extra(uint64_t memory_window_start, uint64_t memory_wi
static void gdrom_devices(device_slot_interface &device)
{
device.option_add(":gdrom", GDROM);
device.option_add("gdrom", GDROM);
}
@ -459,7 +459,7 @@ WRITE_LINE_MEMBER(idegdrom_device::ide_irq)
void idegdrom_device::device_add_mconfig(machine_config &config)
{
BUS_MASTER_IDE_CONTROLLER(config, m_ide).options(gdrom_devices, ":gdrom", nullptr, true);
BUS_MASTER_IDE_CONTROLLER(config, m_ide).options(gdrom_devices, "gdrom", nullptr, true);
m_ide->irq_handler().set(*this, FUNC(idegdrom_device::ide_irq));
m_ide->set_bus_master_space(space_owner_tag, space_owner_id);
}

40
src/mame/machine/xbox.cpp
View File

@ -938,7 +938,7 @@ void xbox_base_state::xbox_base_map(address_map &map)
void xbox_base_state::xbox_base_map_io(address_map &map)
{
map(0x01f0, 0x01f7).rw(":pci:09.0:ide1", FUNC(bus_master_ide_controller_device::cs0_r), FUNC(bus_master_ide_controller_device::cs0_w));
map(0x01f0, 0x01f7).rw("pci:09.0:ide1", FUNC(bus_master_ide_controller_device::cs0_r), FUNC(bus_master_ide_controller_device::cs0_w));
map(0x002e, 0x002f).rw(FUNC(xbox_base_state::superio_read), FUNC(xbox_base_state::superio_write));
map(0x03f8, 0x03ff).rw(FUNC(xbox_base_state::superiors232_read), FUNC(xbox_base_state::superiors232_write));
map(0x0cf8, 0x0cff).rw("pcibus", FUNC(pci_bus_legacy_device::read), FUNC(pci_bus_legacy_device::write));
@ -960,25 +960,25 @@ void xbox_base_state::xbox_base(machine_config &config)
config.set_maximum_quantum(attotime::from_hz(6000));
PCI_ROOT(config, ":pci", 0);
NV2A_HOST(config, ":pci:00.0", 0, m_maincpu);
NV2A_RAM(config, ":pci:00.3", 0, 128); // 128 megabytes
MCPX_ISALPC(config, ":pci:01.0", 0, 0).interrupt_output().set(FUNC(xbox_base_state::maincpu_interrupt));
XBOX_SUPERIO(config, ":pci:01.0:0", 0);
MCPX_SMBUS(config, ":pci:01.1", 0, 0).interrupt_handler().set(":pci:01.0", FUNC(mcpx_isalpc_device::irq11)); //.set(FUNC(xbox_base_state::smbus_interrupt_changed));
XBOX_PIC16LC(config, ":pci:01.1:110", 0); // these 3 are on smbus number 1
XBOX_CX25871(config, ":pci:01.1:145", 0);
XBOX_EEPROM(config, ":pci:01.1:154", 0);
MCPX_OHCI(config, ":pci:02.0", 0, 0).interrupt_handler().set(":pci:01.0", FUNC(mcpx_isalpc_device::irq1)); //.set(FUNC(xbox_base_state::ohci_usb_interrupt_changed));
MCPX_OHCI(config, ":pci:03.0", 0, 0);
MCPX_ETH(config, ":pci:04.0", 0);
MCPX_APU(config, ":pci:05.0", 0, 0, m_maincpu);
MCPX_AC97_AUDIO(config, ":pci:06.0", 0, 0);
MCPX_AC97_MODEM(config, ":pci:06.1", 0);
PCI_BRIDGE(config, ":pci:08.0", 0, 0x10de01b8, 0);
MCPX_IDE(config, ":pci:09.0", 0, 0).pri_interrupt_handler().set(":pci:01.0", FUNC(mcpx_isalpc_device::irq14)); //.set(FUNC(xbox_base_state::ide_interrupt_changed));
NV2A_AGP(config, ":pci:1e.0", 0, 0x10de01b7, 0);
NV2A_GPU(config, ":pci:1e.0:00.0", 0, m_maincpu).interrupt_handler().set(":pci:01.0", FUNC(mcpx_isalpc_device::irq3)); //.set(FUNC(xbox_base_state::nv2a_interrupt_changed));
PCI_ROOT(config, "pci", 0);
NV2A_HOST(config, "pci:00.0", 0, m_maincpu);
NV2A_RAM(config, "pci:00.3", 0, 128); // 128 megabytes
MCPX_ISALPC(config, "pci:01.0", 0, 0).interrupt_output().set(FUNC(xbox_base_state::maincpu_interrupt));
XBOX_SUPERIO(config, "pci:01.0:0", 0);
MCPX_SMBUS(config, "pci:01.1", 0, 0).interrupt_handler().set("pci:01.0", FUNC(mcpx_isalpc_device::irq11)); //.set(FUNC(xbox_base_state::smbus_interrupt_changed));
XBOX_PIC16LC(config, "pci:01.1:110", 0); // these 3 are on smbus number 1
XBOX_CX25871(config, "pci:01.1:145", 0);
XBOX_EEPROM(config, "pci:01.1:154", 0);
MCPX_OHCI(config, "pci:02.0", 0, 0).interrupt_handler().set("pci:01.0", FUNC(mcpx_isalpc_device::irq1)); //.set(FUNC(xbox_base_state::ohci_usb_interrupt_changed));
MCPX_OHCI(config, "pci:03.0", 0, 0);
MCPX_ETH(config, "pci:04.0", 0);
MCPX_APU(config, "pci:05.0", 0, 0, m_maincpu);
MCPX_AC97_AUDIO(config, "pci:06.0", 0, 0);
MCPX_AC97_MODEM(config, "pci:06.1", 0);
PCI_BRIDGE(config, "pci:08.0", 0, 0x10de01b8, 0);
MCPX_IDE(config, "pci:09.0", 0, 0).pri_interrupt_handler().set("pci:01.0", FUNC(mcpx_isalpc_device::irq14)); //.set(FUNC(xbox_base_state::ide_interrupt_changed));
NV2A_AGP(config, "pci:1e.0", 0, 0x10de01b7, 0);
NV2A_GPU(config, "pci:1e.0:00.0", 0, m_maincpu).interrupt_handler().set("pci:01.0", FUNC(mcpx_isalpc_device::irq3)); //.set(FUNC(xbox_base_state::nv2a_interrupt_changed));
/* video hardware */
screen_device &screen(SCREEN(config, "screen", SCREEN_TYPE_RASTER));