diff --git a/src/mame/drivers/z80ne.cpp b/src/mame/drivers/z80ne.cpp index e7dcd7e25a1..b188d48ac45 100644 --- a/src/mame/drivers/z80ne.cpp +++ b/src/mame/drivers/z80ne.cpp @@ -138,7 +138,7 @@ ADDRESS_MAP_END ADDRESS_MAP_START(z80ne_state::z80ne_io) ADDRESS_MAP_GLOBAL_MASK(0xff) - AM_RANGE(0xee, 0xee) AM_READWRITE(lx385_data_r, lx385_data_w ) + AM_RANGE(0xee, 0xee) AM_DEVREADWRITE("uart", ay31015_device, receive, transmit) AM_RANGE(0xef, 0xef) AM_READWRITE(lx385_ctrl_r, lx385_ctrl_w ) AM_RANGE(0xf0, 0xff) AM_READWRITE(lx383_r, lx383_w ) ADDRESS_MAP_END @@ -147,7 +147,7 @@ ADDRESS_MAP_START(z80ne_state::z80net_io) ADDRESS_MAP_GLOBAL_MASK(0xff) AM_RANGE(0xea, 0xea) AM_READ(lx388_data_r ) AM_RANGE(0xeb, 0xeb) AM_READ(lx388_read_field_sync ) - AM_RANGE(0xee, 0xee) AM_READWRITE(lx385_data_r, lx385_data_w ) + AM_RANGE(0xee, 0xee) AM_DEVREADWRITE("uart", ay31015_device, receive, transmit) AM_RANGE(0xef, 0xef) AM_READWRITE(lx385_ctrl_r, lx385_ctrl_w ) AM_RANGE(0xf0, 0xff) AM_READWRITE(lx383_r, lx383_w ) ADDRESS_MAP_END @@ -170,7 +170,7 @@ ADDRESS_MAP_START(z80ne_state::z80netf_io) AM_RANGE(0xd0, 0xd7) AM_READWRITE(lx390_fdc_r, lx390_fdc_w) AM_RANGE(0xea, 0xea) AM_READ(lx388_data_r ) AM_RANGE(0xeb, 0xeb) AM_READ(lx388_read_field_sync ) - AM_RANGE(0xee, 0xee) AM_READWRITE(lx385_data_r, lx385_data_w ) + AM_RANGE(0xee, 0xee) AM_DEVREADWRITE("uart", ay31015_device, receive, transmit) AM_RANGE(0xef, 0xef) AM_READWRITE(lx385_ctrl_r, lx385_ctrl_w ) AM_RANGE(0xf0, 0xff) AM_READWRITE(lx383_r, lx383_w ) ADDRESS_MAP_END @@ -419,7 +419,7 @@ MACHINE_CONFIG_START(z80ne_state::z80ne) MCFG_MACHINE_START_OVERRIDE(z80ne_state,z80ne) MCFG_MACHINE_RESET_OVERRIDE(z80ne_state,z80ne) - MCFG_DEVICE_ADD( "ay_3_1015", AY31015, 0 ) + MCFG_DEVICE_ADD( "uart", AY31015, 0 ) MCFG_AY31015_TX_CLOCK(4800.0) MCFG_AY31015_RX_CLOCK(4800.0) @@ -480,7 +480,7 @@ MACHINE_CONFIG_START(z80ne_state::z80netb) MCFG_MACHINE_START_OVERRIDE(z80ne_state,z80netb) MCFG_MACHINE_RESET_OVERRIDE(z80ne_state,z80netb) - MCFG_DEVICE_ADD( "ay_3_1015", AY31015, 0 ) + MCFG_DEVICE_ADD( "uart", AY31015, 0 ) MCFG_AY31015_TX_CLOCK(4800.0) MCFG_AY31015_RX_CLOCK(4800.0) @@ -521,7 +521,7 @@ MACHINE_CONFIG_START(z80ne_state::z80netf) MCFG_MACHINE_START_OVERRIDE(z80ne_state,z80netf) MCFG_MACHINE_RESET_OVERRIDE(z80ne_state,z80netf) - MCFG_DEVICE_ADD( "ay_3_1015", AY31015, 0 ) + MCFG_DEVICE_ADD( "uart", AY31015, 0 ) MCFG_AY31015_TX_CLOCK(4800.0) MCFG_AY31015_RX_CLOCK(4800.0) diff --git a/src/mame/includes/z80ne.h b/src/mame/includes/z80ne.h index ae96c209881..2a150606ea4 100644 --- a/src/mame/includes/z80ne.h +++ b/src/mame/includes/z80ne.h @@ -73,7 +73,7 @@ public: : driver_device(mconfig, type, tag), m_vdg(*this, "mc6847"), m_videoram(*this, "videoram"), - m_ay31015(*this, "ay_3_1015"), + m_uart(*this, "uart"), m_lx388_kr2376(*this, "lx388_kr2376"), m_maincpu(*this, "z80ne"), m_floppy0(*this, "wd1771:0"), @@ -109,7 +109,7 @@ public: optional_device m_vdg; optional_shared_ptr m_videoram; - required_device m_ay31015; + required_device m_uart; optional_device m_lx388_kr2376; uint8_t m_lx383_scan_counter; uint8_t m_lx383_key[LX383_KEYS]; @@ -121,9 +121,7 @@ public: wd17xx_state_t m_wd17xx_state; DECLARE_READ8_MEMBER(lx383_r); DECLARE_WRITE8_MEMBER(lx383_w); - DECLARE_READ8_MEMBER(lx385_data_r); DECLARE_READ8_MEMBER(lx385_ctrl_r); - DECLARE_WRITE8_MEMBER(lx385_data_w); DECLARE_WRITE8_MEMBER(lx385_ctrl_w); DECLARE_READ8_MEMBER(lx388_data_r); DECLARE_READ8_MEMBER(lx388_read_field_sync); diff --git a/src/mame/machine/z80ne.cpp b/src/mame/machine/z80ne.cpp index ed2124e6236..7b676b16628 100644 --- a/src/mame/machine/z80ne.cpp +++ b/src/mame/machine/z80ne.cpp @@ -13,9 +13,6 @@ #include "emu.h" #include "includes/z80ne.h" -/* Components */ -#include "machine/ay31015.h" - /* Devices */ #include "imagedev/flopdrv.h" @@ -48,7 +45,7 @@ TIMER_CALLBACK_MEMBER(z80ne_state::z80ne_cassette_tc) m_cass_data.input.level = cass_ws; m_cass_data.input.bit = ((m_cass_data.input.length < m_cass_data.wave_filter) || (m_cass_data.input.length > 0x20)) ? 1 : 0; m_cass_data.input.length = 0; - m_ay31015->write_si(m_cass_data.input.bit); + m_uart->write_si(m_cass_data.input.bit); } m_cass_data.input.level = cass_ws; @@ -63,7 +60,7 @@ TIMER_CALLBACK_MEMBER(z80ne_state::z80ne_cassette_tc) else { m_cass_data.output.level=1; - cass_ws = m_ay31015->so_r(); + cass_ws = m_uart->so_r(); m_cass_data.wave_length = cass_ws ? m_cass_data.wave_short : m_cass_data.wave_long; } cassette_device_image()->output(m_cass_data.output.level ? -1.0 : +1.0); @@ -275,15 +272,15 @@ MACHINE_RESET_MEMBER(z80ne_state,z80ne_base) m_cass_data.input.length = 0; m_cass_data.input.bit = 1; - m_ay31015->write_cs(0); - m_ay31015->write_nb1(1); - m_ay31015->write_nb2(1); - m_ay31015->write_tsb(1); - m_ay31015->write_eps(1); - m_ay31015->write_np(m_io_lx_385->read() & 0x80 ? 1 : 0); - m_ay31015->write_cs(1); - m_ay31015->set_receiver_clock(m_cass_data.speed * 16.0); - m_ay31015->set_transmitter_clock(m_cass_data.speed * 16.0); + m_uart->write_cs(0); + m_uart->write_nb1(1); + m_uart->write_nb2(1); + m_uart->write_tsb(1); + m_uart->write_eps(1); + m_uart->write_np(m_io_lx_385->read() & 0x80 ? 1 : 0); + m_uart->write_cs(1); + m_uart->set_receiver_clock(m_cass_data.speed * 16.0); + m_uart->set_transmitter_clock(m_cass_data.speed * 16.0); lx385_ctrl_w(m_maincpu->space(AS_PROGRAM), 0, 0); @@ -479,35 +476,29 @@ WRITE8_MEMBER(z80ne_state::lx383_w) A manchester encoder is used. A flip-flop synchronises input data on the positive-edge of the clock pulse. + + The UART is a RCA CDP1854 CMOS device with pin 2 jumpered to GND to select the + AY-3-1015 compatibility mode. The jumper at P4 can be switched to place 12 V on + pin 2 for an old PMOS UART. * */ -READ8_MEMBER(z80ne_state::lx385_data_r) -{ - return m_ay31015->get_received_data(); -} - READ8_MEMBER(z80ne_state::lx385_ctrl_r) { /* set unused bits high */ uint8_t data = 0xc0; - m_ay31015->write_swe(0); - data |= (m_ay31015->or_r( ) ? 0x01 : 0); - data |= (m_ay31015->fe_r( ) ? 0x02 : 0); - data |= (m_ay31015->pe_r( ) ? 0x04 : 0); - data |= (m_ay31015->tbmt_r() ? 0x08 : 0); - data |= (m_ay31015->dav_r( ) ? 0x10 : 0); - data |= (m_ay31015->eoc_r( ) ? 0x20 : 0); - m_ay31015->write_swe(1); + m_uart->write_swe(0); + data |= (m_uart->or_r( ) ? 0x01 : 0); + data |= (m_uart->fe_r( ) ? 0x02 : 0); + data |= (m_uart->pe_r( ) ? 0x04 : 0); + data |= (m_uart->tbmt_r() ? 0x08 : 0); + data |= (m_uart->dav_r( ) ? 0x10 : 0); + data |= (m_uart->eoc_r( ) ? 0x20 : 0); + m_uart->write_swe(1); return data; } -WRITE8_MEMBER(z80ne_state::lx385_data_w) -{ - m_ay31015->set_transmit_data(data); -} - #define LX385_CASSETTE_MOTOR_MASK ((1<<3)|(1<<4)) WRITE8_MEMBER(z80ne_state::lx385_ctrl_w) @@ -533,21 +524,21 @@ WRITE8_MEMBER(z80ne_state::lx385_ctrl_w) /* UART Reset and RDAV */ if (uart_reset) { - m_ay31015->write_xr(1); - m_ay31015->write_xr(0); + m_uart->write_xr(1); + m_uart->write_xr(0); } if (uart_rdav) { - m_ay31015->write_rdav(1); - m_ay31015->write_rdav(0); + m_uart->write_rdav(1); + m_uart->write_rdav(0); } if (!changed_bits) return; /* UART Tx Clock enable/disable */ if (changed_bits & 0x04) - m_ay31015->set_transmitter_clock(uart_tx_clock ? m_cass_data.speed * 16.0 : 0.0); + m_uart->set_transmitter_clock(uart_tx_clock ? m_cass_data.speed * 16.0 : 0.0); /* motors */ if(changed_bits & 0x18)