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various cpu lookup cleanup (nw)

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This commit is contained in:
Miodrag Milanovic 2013-04-15 13:41:27 +00:00
parent 5a9bf9269c
commit 28cc0d1c7d
68 changed files with 282 additions and 256 deletions
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4
src/mess/drivers/ace.c
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@ -474,7 +474,7 @@ GFXDECODE_END
TIMER_DEVICE_CALLBACK_MEMBER(ace_state::set_irq) TIMER_DEVICE_CALLBACK_MEMBER(ace_state::set_irq)
{ {
machine().device(Z80_TAG)->execute().set_input_line(INPUT_LINE_IRQ0, ASSERT_LINE); m_maincpu->set_input_line(INPUT_LINE_IRQ0, ASSERT_LINE);
} }
@ -484,7 +484,7 @@ TIMER_DEVICE_CALLBACK_MEMBER(ace_state::set_irq)
TIMER_DEVICE_CALLBACK_MEMBER(ace_state::clear_irq) TIMER_DEVICE_CALLBACK_MEMBER(ace_state::clear_irq)
{ {
machine().device(Z80_TAG)->execute().set_input_line(INPUT_LINE_IRQ0, CLEAR_LINE); m_maincpu->set_input_line(INPUT_LINE_IRQ0, CLEAR_LINE);
} }

3
src/mess/drivers/bebox.c
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@ -104,7 +104,8 @@ ADDRESS_MAP_END
static UINT32 scsi53c810_fetch(running_machine &machine, UINT32 dsp) static UINT32 scsi53c810_fetch(running_machine &machine, UINT32 dsp)
{ {
UINT32 result; UINT32 result;
result = machine.device("ppc1")->memory().space(AS_PROGRAM).read_dword(dsp & 0x7FFFFFFF); bebox_state *state = machine.driver_data<bebox_state>();
result = state->m_ppc1->space(AS_PROGRAM).read_dword(dsp & 0x7FFFFFFF);
return BYTE_REVERSE32(result); return BYTE_REVERSE32(result);
} }

2
src/mess/drivers/bigbord2.c
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@ -391,7 +391,7 @@ INPUT_PORTS_END
WRITE_LINE_MEMBER(bigbord2_state::bigbord2_interrupt) WRITE_LINE_MEMBER(bigbord2_state::bigbord2_interrupt)
{ {
machine().device(Z80_TAG)->execute().set_input_line(0, state); m_maincpu->set_input_line(0, state);
} }
const z80sio_interface sio_intf = const z80sio_interface sio_intf =

21
src/mess/drivers/dectalk.c
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@ -237,6 +237,7 @@ public:
: driver_device(mconfig, type, tag), : driver_device(mconfig, type, tag),
m_terminal(*this, TERMINAL_TAG) , m_terminal(*this, TERMINAL_TAG) ,
m_maincpu(*this, "maincpu"), m_maincpu(*this, "maincpu"),
m_dsp(*this, "dsp"),
m_dac(*this, "dac") { } m_dac(*this, "dac") { }
UINT8 m_data[8]; // hack to prevent gcc bitching about struct pointers. not used. UINT8 m_data[8]; // hack to prevent gcc bitching about struct pointers. not used.
@ -286,6 +287,7 @@ public:
void dectalk_semaphore_w ( UINT16 data ); void dectalk_semaphore_w ( UINT16 data );
UINT16 dectalk_outfifo_r ( ); UINT16 dectalk_outfifo_r ( );
required_device<cpu_device> m_maincpu; required_device<cpu_device> m_maincpu;
required_device<cpu_device> m_dsp;
required_device<dac_device> m_dac; required_device<dac_device> m_dac;
}; };
@ -293,9 +295,10 @@ public:
/* Devices */ /* Devices */
static void duart_irq_handler(device_t *device, int state, UINT8 vector) static void duart_irq_handler(device_t *device, int state, UINT8 vector)
{ {
device->machine().device("maincpu")->execute().set_input_line_and_vector(M68K_IRQ_6, state, M68K_INT_ACK_AUTOVECTOR); dectalk_state *drvstate = device->machine().driver_data<dectalk_state>();
//device->machine().device("maincpu")->execute().set_input_line_and_vector(M68K_IRQ_6, CLEAR_LINE, M68K_INT_ACK_AUTOVECTOR); drvstate->m_maincpu->set_input_line_and_vector(M68K_IRQ_6, state, M68K_INT_ACK_AUTOVECTOR);
//device->machine().device("maincpu")->execute().set_input_line_and_vector(M68K_IRQ_6, HOLD_LINE, vector); //drvstate->m_maincpu->set_input_line_and_vector(M68K_IRQ_6, CLEAR_LINE, M68K_INT_ACK_AUTOVECTOR);
//drvstate->m_maincpu->set_input_line_and_vector(M68K_IRQ_6, HOLD_LINE, vector);
}; };
static UINT8 duart_input(device_t *device) static UINT8 duart_input(device_t *device)
@ -342,9 +345,9 @@ void dectalk_state::dectalk_outfifo_check ()
{ {
// check if output fifo is full; if it isn't, set the int on the dsp // check if output fifo is full; if it isn't, set the int on the dsp
if (((m_outfifo_head_ptr-1)&0xF) != m_outfifo_tail_ptr) if (((m_outfifo_head_ptr-1)&0xF) != m_outfifo_tail_ptr)
machine().device("dsp")->execute().set_input_line(0, ASSERT_LINE); // TMS32010 INT m_dsp->set_input_line(0, ASSERT_LINE); // TMS32010 INT
else else
machine().device("dsp")->execute().set_input_line(0, CLEAR_LINE); // TMS32010 INT m_dsp->set_input_line(0, CLEAR_LINE); // TMS32010 INT
} }
void dectalk_state::dectalk_clear_all_fifos( ) void dectalk_state::dectalk_clear_all_fifos( )
@ -423,7 +426,7 @@ static void dectalk_reset(device_t *device)
state->dectalk_clear_all_fifos(); // speech reset clears the fifos, though we have to do it explicitly here since we're not actually in the m68k_spcflags_w function. state->dectalk_clear_all_fifos(); // speech reset clears the fifos, though we have to do it explicitly here since we're not actually in the m68k_spcflags_w function.
state->dectalk_semaphore_w(0); // on the original dectalk pcb revision, this is a semaphore for the INPUT fifo, later dec hacked on a check for the 3 output fifo chips to see if they're in sync, and set both of these latches if true. state->dectalk_semaphore_w(0); // on the original dectalk pcb revision, this is a semaphore for the INPUT fifo, later dec hacked on a check for the 3 output fifo chips to see if they're in sync, and set both of these latches if true.
state->m_spc_error_latch = 0; // spc error latch is cleared on /reset state->m_spc_error_latch = 0; // spc error latch is cleared on /reset
device->machine().device("dsp")->execute().set_input_line(INPUT_LINE_RESET, ASSERT_LINE); // speech reset forces the CLR line active on the tms32010 state->m_dsp->set_input_line(INPUT_LINE_RESET, ASSERT_LINE); // speech reset forces the CLR line active on the tms32010
state->m_tlc_tonedetect = 0; // TODO, needed for selftest pass state->m_tlc_tonedetect = 0; // TODO, needed for selftest pass
state->m_tlc_ringdetect = 0; // TODO state->m_tlc_ringdetect = 0; // TODO
state->m_tlc_dtmf = 0; // TODO state->m_tlc_dtmf = 0; // TODO
@ -518,7 +521,7 @@ WRITE16_MEMBER(dectalk_state::m68k_spcflags_w)// 68k write to the speech flags (
logerror(" | 0x01: initialize speech: fifos reset, clear error+semaphore latches and dsp reset\n"); logerror(" | 0x01: initialize speech: fifos reset, clear error+semaphore latches and dsp reset\n");
#endif #endif
dectalk_clear_all_fifos(); dectalk_clear_all_fifos();
machine().device("dsp")->execute().set_input_line(INPUT_LINE_RESET, ASSERT_LINE); // speech reset forces the CLR line active on the tms32010 m_dsp->set_input_line(INPUT_LINE_RESET, ASSERT_LINE); // speech reset forces the CLR line active on the tms32010
// clear the two speech side latches // clear the two speech side latches
m_spc_error_latch = 0; m_spc_error_latch = 0;
dectalk_semaphore_w(0); dectalk_semaphore_w(0);
@ -528,7 +531,7 @@ WRITE16_MEMBER(dectalk_state::m68k_spcflags_w)// 68k write to the speech flags (
#ifdef SPC_LOG_68K #ifdef SPC_LOG_68K
logerror(" | 0x01 = 0: initialize speech off, dsp running\n"); logerror(" | 0x01 = 0: initialize speech off, dsp running\n");
#endif #endif
machine().device("dsp")->execute().set_input_line(INPUT_LINE_RESET, CLEAR_LINE); // speech reset deassert clears the CLR line on the tms32010 m_dsp->set_input_line(INPUT_LINE_RESET, CLEAR_LINE); // speech reset deassert clears the CLR line on the tms32010
} }
if ((data&0x2) == 0x2) // bit 1 - clear error and semaphore latches if ((data&0x2) == 0x2) // bit 1 - clear error and semaphore latches
{ {
@ -679,7 +682,7 @@ WRITE16_MEMBER(dectalk_state::spc_outfifo_data_w)
#ifdef SPC_LOG_DSP #ifdef SPC_LOG_DSP
logerror("dsp: SPC outfifo write, data = %04X, fifo head was: %02X; fifo tail: %02X\n", data, m_outfifo_head_ptr, m_outfifo_tail_ptr); logerror("dsp: SPC outfifo write, data = %04X, fifo head was: %02X; fifo tail: %02X\n", data, m_outfifo_head_ptr, m_outfifo_tail_ptr);
#endif #endif
machine().device("dsp")->execute().set_input_line(0, CLEAR_LINE); //TMS32010 INT (cleared because LDCK inverts the IR line, clearing int on any outfifo write... for a moment at least.) m_dsp->set_input_line(0, CLEAR_LINE); //TMS32010 INT (cleared because LDCK inverts the IR line, clearing int on any outfifo write... for a moment at least.)
// if fifo is full (head ptr = tail ptr-1), do not increment the head ptr and do not store the data // if fifo is full (head ptr = tail ptr-1), do not increment the head ptr and do not store the data
if (((m_outfifo_tail_ptr-1)&0xF) == m_outfifo_head_ptr) if (((m_outfifo_tail_ptr-1)&0xF) == m_outfifo_head_ptr)
{ {

16
src/mess/drivers/fm7.c
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@ -171,7 +171,7 @@ static void main_irq_set_flag(running_machine &machine, UINT8 flag)
state->m_irq_flags |= flag; state->m_irq_flags |= flag;
if(state->m_irq_flags != 0) if(state->m_irq_flags != 0)
machine.device("maincpu")->execute().set_input_line(M6809_IRQ_LINE,ASSERT_LINE); state->m_maincpu->set_input_line(M6809_IRQ_LINE,ASSERT_LINE);
} }
static void main_irq_clear_flag(running_machine &machine, UINT8 flag) static void main_irq_clear_flag(running_machine &machine, UINT8 flag)
@ -180,7 +180,7 @@ static void main_irq_clear_flag(running_machine &machine, UINT8 flag)
state->m_irq_flags &= ~flag; state->m_irq_flags &= ~flag;
if(state->m_irq_flags == 0) if(state->m_irq_flags == 0)
machine.device("maincpu")->execute().set_input_line(M6809_IRQ_LINE,CLEAR_LINE); state->m_maincpu->set_input_line(M6809_IRQ_LINE,CLEAR_LINE);
} }
@ -821,7 +821,7 @@ READ8_MEMBER(fm7_state::fm77av_boot_mode_r)
static void fm7_update_psg(running_machine &machine) static void fm7_update_psg(running_machine &machine)
{ {
fm7_state *state = machine.driver_data<fm7_state>(); fm7_state *state = machine.driver_data<fm7_state>();
address_space &space = machine.device("maincpu")->memory().space(AS_PROGRAM); address_space &space = state->m_maincpu->space(AS_PROGRAM);
if(state->m_type == SYS_FM7) if(state->m_type == SYS_FM7)
{ {
@ -1212,7 +1212,7 @@ TIMER_CALLBACK_MEMBER(fm7_state::fm7_timer_irq)
TIMER_CALLBACK_MEMBER(fm7_state::fm7_subtimer_irq) TIMER_CALLBACK_MEMBER(fm7_state::fm7_subtimer_irq)
{ {
if(m_video.nmi_mask == 0 && m_video.sub_halt == 0) if(m_video.nmi_mask == 0 && m_video.sub_halt == 0)
machine().device("sub")->execute().set_input_line(INPUT_LINE_NMI,PULSE_LINE); m_sub->set_input_line(INPUT_LINE_NMI,PULSE_LINE);
} }
// When a key is pressed or released (in scan mode only), an IRQ is generated on the main CPU, // When a key is pressed or released (in scan mode only), an IRQ is generated on the main CPU,
@ -1232,7 +1232,7 @@ static void key_press(running_machine &machine, UINT16 scancode)
} }
else else
{ {
machine.device("sub")->execute().set_input_line(M6809_FIRQ_LINE,ASSERT_LINE); state->m_sub->set_input_line(M6809_FIRQ_LINE,ASSERT_LINE);
} }
logerror("KEY: sent scancode 0x%03x\n",scancode); logerror("KEY: sent scancode 0x%03x\n",scancode);
} }
@ -1345,7 +1345,7 @@ IRQ_CALLBACK_MEMBER(fm7_state::fm7_irq_ack)
IRQ_CALLBACK_MEMBER(fm7_state::fm7_sub_irq_ack) IRQ_CALLBACK_MEMBER(fm7_state::fm7_sub_irq_ack)
{ {
machine().device("sub")->execute().set_input_line(irqline,CLEAR_LINE); m_sub->set_input_line(irqline,CLEAR_LINE);
return -1; return -1;
} }
@ -1832,7 +1832,7 @@ DRIVER_INIT_MEMBER(fm7_state,fm7)
m_keyboard_timer = machine().scheduler().timer_alloc(timer_expired_delegate(FUNC(fm7_state::fm7_keyboard_poll),this)); m_keyboard_timer = machine().scheduler().timer_alloc(timer_expired_delegate(FUNC(fm7_state::fm7_keyboard_poll),this));
m_fm77av_vsync_timer = machine().scheduler().timer_alloc(timer_expired_delegate(FUNC(fm7_state::fm77av_vsync),this)); m_fm77av_vsync_timer = machine().scheduler().timer_alloc(timer_expired_delegate(FUNC(fm7_state::fm77av_vsync),this));
m_maincpu->set_irq_acknowledge_callback(device_irq_acknowledge_delegate(FUNC(fm7_state::fm7_irq_ack),this)); m_maincpu->set_irq_acknowledge_callback(device_irq_acknowledge_delegate(FUNC(fm7_state::fm7_irq_ack),this));
machine().device("sub")->execute().set_irq_acknowledge_callback(device_irq_acknowledge_delegate(FUNC(fm7_state::fm7_sub_irq_ack),this)); m_sub->set_irq_acknowledge_callback(device_irq_acknowledge_delegate(FUNC(fm7_state::fm7_sub_irq_ack),this));
} }
MACHINE_START_MEMBER(fm7_state,fm7) MACHINE_START_MEMBER(fm7_state,fm7)
@ -1960,7 +1960,7 @@ void fm7_state::machine_reset()
if(m_type == SYS_FM11) if(m_type == SYS_FM11)
{ {
// Probably best to halt the 8088, I'm pretty sure it and the main 6809 should not be running at the same time // Probably best to halt the 8088, I'm pretty sure it and the main 6809 should not be running at the same time
machine().device("x86")->execute().set_input_line(INPUT_LINE_HALT,ASSERT_LINE); m_x86->set_input_line(INPUT_LINE_HALT,ASSERT_LINE);
} }
memset(m_video_ram, 0, sizeof(UINT8) * 0x18000); memset(m_video_ram, 0, sizeof(UINT8) * 0x18000);

6
src/mess/drivers/fp1100.c
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@ -170,7 +170,7 @@ WRITE8_MEMBER( fp1100_state::main_bank_w )
WRITE8_MEMBER( fp1100_state::irq_mask_w ) WRITE8_MEMBER( fp1100_state::irq_mask_w )
{ {
//if((irq_mask & 0x80) != (data & 0x80)) //if((irq_mask & 0x80) != (data & 0x80))
// machine().device("sub")->execute().set_input_line(UPD7810_INTF2, HOLD_LINE); // m_subcpu->set_input_line(UPD7810_INTF2, HOLD_LINE);
irq_mask = data; irq_mask = data;
///printf("%02x\n",data); ///printf("%02x\n",data);
@ -182,7 +182,7 @@ WRITE8_MEMBER( fp1100_state::irq_mask_w )
WRITE8_MEMBER( fp1100_state::main_to_sub_w ) WRITE8_MEMBER( fp1100_state::main_to_sub_w )
{ {
machine().scheduler().synchronize(); // force resync machine().scheduler().synchronize(); // force resync
machine().device("sub")->execute().set_input_line(UPD7810_INTF2, ASSERT_LINE); m_subcpu->set_input_line(UPD7810_INTF2, ASSERT_LINE);
m_sub_latch = data; m_sub_latch = data;
} }
@ -234,7 +234,7 @@ WRITE8_MEMBER( fp1100_state::fp1100_vram_w )
READ8_MEMBER( fp1100_state::main_to_sub_r ) READ8_MEMBER( fp1100_state::main_to_sub_r )
{ {
machine().scheduler().synchronize(); // force resync machine().scheduler().synchronize(); // force resync
machine().device("sub")->execute().set_input_line(UPD7810_INTF2, CLEAR_LINE); m_subcpu->set_input_line(UPD7810_INTF2, CLEAR_LINE);
return m_sub_latch; return m_sub_latch;
} }

3
src/mess/drivers/ht68k.c
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@ -80,7 +80,8 @@ void ht68k_state::machine_reset()
static void duart_irq_handler(device_t *device, int state, UINT8 vector) static void duart_irq_handler(device_t *device, int state, UINT8 vector)
{ {
device->machine().device("maincpu")->execute().set_input_line_and_vector(M68K_IRQ_3, state, M68K_INT_ACK_AUTOVECTOR); ht68k_state *drvstate = device->machine().driver_data<ht68k_state>();
drvstate->m_maincpu->set_input_line_and_vector(M68K_IRQ_3, state, M68K_INT_ACK_AUTOVECTOR);
} }
static void duart_tx(device_t *device, int channel, UINT8 data) static void duart_tx(device_t *device, int channel, UINT8 data)

3
src/mess/drivers/mc80.c
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@ -136,8 +136,7 @@ INPUT_PORTS_END
TIMER_DEVICE_CALLBACK_MEMBER(mc80_state::mc8020_kbd) TIMER_DEVICE_CALLBACK_MEMBER(mc80_state::mc8020_kbd)
{ {
device_t *cpu = machine().device( "maincpu" ); address_space &mem = m_maincpu->space(AS_PROGRAM);
address_space &mem = cpu->memory().space(AS_PROGRAM);
char kbdrow[6]; char kbdrow[6];
UINT8 i; UINT8 i;
for (i = 1; i < 8; i++) for (i = 1; i < 8; i++)

5
src/mess/drivers/mk1.c
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@ -169,9 +169,10 @@ void mk1_state::machine_start()
static void mk1_interrupt( device_t *device, UINT16 addr, int level ) static void mk1_interrupt( device_t *device, UINT16 addr, int level )
{ {
device->machine().device("maincpu")->execute().set_input_line_vector(F8_INPUT_LINE_INT_REQ, addr ); mk1_state *drvstate = device->machine().driver_data<mk1_state>();
drvstate->m_maincpu->set_input_line_vector(F8_INPUT_LINE_INT_REQ, addr );
device->machine().device("maincpu")->execute().set_input_line(F8_INPUT_LINE_INT_REQ, level ? ASSERT_LINE : CLEAR_LINE ); drvstate->m_maincpu->set_input_line(F8_INPUT_LINE_INT_REQ, level ? ASSERT_LINE : CLEAR_LINE );
} }

6
src/mess/drivers/nc.c
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@ -280,12 +280,12 @@ static void nc_update_interrupts(running_machine &machine)
{ {
logerror("int set %02x\n", state->m_irq_status & state->m_irq_mask); logerror("int set %02x\n", state->m_irq_status & state->m_irq_mask);
/* set int */ /* set int */
machine.device("maincpu")->execute().set_input_line(0, HOLD_LINE); state->m_maincpu->set_input_line(0, HOLD_LINE);
} }
else else
{ {
/* clear int */ /* clear int */
machine.device("maincpu")->execute().set_input_line(0, CLEAR_LINE); state->m_maincpu->set_input_line(0, CLEAR_LINE);
} }
} }
@ -313,7 +313,7 @@ static const char *const nc_bankhandler_w[]={
static void nc_refresh_memory_bank_config(running_machine &machine, int bank) static void nc_refresh_memory_bank_config(running_machine &machine, int bank)
{ {
nc_state *state = machine.driver_data<nc_state>(); nc_state *state = machine.driver_data<nc_state>();
address_space &space = machine.device("maincpu")->memory().space(AS_PROGRAM); address_space &space = state->m_maincpu->space(AS_PROGRAM);
int mem_type; int mem_type;
int mem_bank; int mem_bank;
char bank1[10]; char bank1[10];

2
src/mess/drivers/pasogo.c
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@ -455,7 +455,7 @@ UINT32 pasogo_state::screen_update_pasogo(screen_device &screen, bitmap_ind16 &b
INTERRUPT_GEN_MEMBER(pasogo_state::pasogo_interrupt) INTERRUPT_GEN_MEMBER(pasogo_state::pasogo_interrupt)
{ {
// machine.device("maincpu")->execute().set_input_line(UPD7810_INTFE1, PULSE_LINE); // m_maincpu->set_input_line(UPD7810_INTFE1, PULSE_LINE);
} }
IRQ_CALLBACK_MEMBER(pasogo_state::pasogo_irq_callback) IRQ_CALLBACK_MEMBER(pasogo_state::pasogo_irq_callback)

2
src/mess/drivers/pc8801.c
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@ -2454,7 +2454,7 @@ void pc8801_state::machine_reset()
m_fdc_irq_opcode = 0; //TODO: copied from PC-88VA, could be wrong here ... should be 0x7f ld a,a in the latter case m_fdc_irq_opcode = 0; //TODO: copied from PC-88VA, could be wrong here ... should be 0x7f ld a,a in the latter case
m_mouse.phase = 0; m_mouse.phase = 0;
machine().device("fdccpu")->execute().set_input_line_vector(0, 0); m_fdccpu->set_input_line_vector(0, 0);
{ {
m_txt_color = 2; m_txt_color = 2;

6
src/mess/drivers/pc88va.c
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@ -1051,7 +1051,7 @@ WRITE8_MEMBER(pc88va_state::pc88va_fdc_w)
case 0x00: // FDC mode register case 0x00: // FDC mode register
m_fdc_mode = data & 1; m_fdc_mode = data & 1;
#if TEST_SUBFDC #if TEST_SUBFDC
machine().device("fdccpu")->execute().set_input_line(INPUT_LINE_HALT, (m_fdc_mode) ? ASSERT_LINE : CLEAR_LINE); m_fdccpu->set_input_line(INPUT_LINE_HALT, (m_fdc_mode) ? ASSERT_LINE : CLEAR_LINE);
#endif #endif
break; break;
/* /*
@ -1695,7 +1695,7 @@ void pc88va_state::machine_reset()
m_fdc_irq_opcode = 0x00; //0x7f ld a,a ! m_fdc_irq_opcode = 0x00; //0x7f ld a,a !
#if TEST_SUBFDC #if TEST_SUBFDC
machine().device("fdccpu")->execute().set_input_line_vector(0, 0); m_fdccpu->set_input_line_vector(0, 0);
#endif #endif
m_fdc_motor_status[0] = 0; m_fdc_motor_status[0] = 0;
@ -1758,7 +1758,7 @@ void pc88va_state::fdc_irq(bool state)
} }
#if TEST_SUBFDC #if TEST_SUBFDC
else else
machine().device("fdccpu")->execute().set_input_line(0, HOLD_LINE); m_fdccpu->set_input_line(0, HOLD_LINE);
#endif #endif
} }

12
src/mess/drivers/pcw.c
View File

@ -130,24 +130,24 @@ static void pcw_update_irqs(running_machine &machine)
pcw_state *state = machine.driver_data<pcw_state>(); pcw_state *state = machine.driver_data<pcw_state>();
// set NMI line, remains set until FDC interrupt type is changed // set NMI line, remains set until FDC interrupt type is changed
if(state->m_nmi_flag != 0) if(state->m_nmi_flag != 0)
machine.device("maincpu")->execute().set_input_line(INPUT_LINE_NMI, ASSERT_LINE); state->m_maincpu->set_input_line(INPUT_LINE_NMI, ASSERT_LINE);
else else
machine.device("maincpu")->execute().set_input_line(INPUT_LINE_NMI, CLEAR_LINE); state->m_maincpu->set_input_line(INPUT_LINE_NMI, CLEAR_LINE);
// set IRQ line, timer pulses IRQ line, all other devices hold it as necessary // set IRQ line, timer pulses IRQ line, all other devices hold it as necessary
if(state->m_fdc_interrupt_code == 1 && (state->m_system_status & 0x20)) if(state->m_fdc_interrupt_code == 1 && (state->m_system_status & 0x20))
{ {
machine.device("maincpu")->execute().set_input_line(0, ASSERT_LINE); state->m_maincpu->set_input_line(0, ASSERT_LINE);
return; return;
} }
if(state->m_timer_irq_flag != 0) if(state->m_timer_irq_flag != 0)
{ {
machine.device("maincpu")->execute().set_input_line(0, ASSERT_LINE); state->m_maincpu->set_input_line(0, ASSERT_LINE);
return; return;
} }
machine.device("maincpu")->execute().set_input_line(0, CLEAR_LINE); state->m_maincpu->set_input_line(0, CLEAR_LINE);
} }
TIMER_CALLBACK_MEMBER(pcw_state::pcw_timer_pulse) TIMER_CALLBACK_MEMBER(pcw_state::pcw_timer_pulse)
@ -221,7 +221,7 @@ READ8_MEMBER(pcw_state::pcw_keyboard_data_r)
static void pcw_update_read_memory_block(running_machine &machine, int block, int bank) static void pcw_update_read_memory_block(running_machine &machine, int block, int bank)
{ {
pcw_state *state = machine.driver_data<pcw_state>(); pcw_state *state = machine.driver_data<pcw_state>();
address_space &space = machine.device("maincpu")->memory().space(AS_PROGRAM); address_space &space = state->m_maincpu->space(AS_PROGRAM);
char block_name[10]; char block_name[10];
sprintf(block_name,"bank%d",block+1); sprintf(block_name,"bank%d",block+1);

4
src/mess/drivers/pdp1.c
View File

@ -1726,9 +1726,9 @@ static void pdp1_keyboard(running_machine &machine)
state->m_typewriter.tb = (i << 4) + j; state->m_typewriter.tb = (i << 4) + j;
state->m_io_status |= io_st_tyi; state->m_io_status |= io_st_tyi;
#if USE_SBS #if USE_SBS
machine.device("maincpu")->execute().set_input_line_and_vector(0, ASSERT_LINE, 0); /* interrupt it, baby */ state->m_maincpu->set_input_line_and_vector(0, ASSERT_LINE, 0); /* interrupt it, baby */
#endif #endif
machine.device("maincpu")->state().set_state_int(PDP1_PF1, 1); state->m_maincpu->set_state_int(PDP1_PF1, 1);
pdp1_typewriter_drawchar(machine, state->m_typewriter.tb); /* we want to echo input */ pdp1_typewriter_drawchar(machine, state->m_typewriter.tb); /* we want to echo input */
break; break;
} }

3
src/mess/drivers/pegasus.c
View File

@ -92,8 +92,7 @@ public:
TIMER_DEVICE_CALLBACK_MEMBER(pegasus_state::pegasus_firq) TIMER_DEVICE_CALLBACK_MEMBER(pegasus_state::pegasus_firq)
{ {
device_t *cpu = machine().device( "maincpu" ); m_maincpu->set_input_line(M6809_FIRQ_LINE, HOLD_LINE);
cpu->execute().set_input_line(M6809_FIRQ_LINE, HOLD_LINE);
} }
WRITE_LINE_MEMBER( pegasus_state::pegasus_firq_clr ) WRITE_LINE_MEMBER( pegasus_state::pegasus_firq_clr )

2
src/mess/drivers/pes.c
View File

@ -214,7 +214,7 @@ void pes_state::machine_reset()
m_rsstate = 1; m_rsstate = 1;
m_port3_state = 0; // reset the openbus state of port 3 m_port3_state = 0; // reset the openbus state of port 3
//machine.device("maincpu")->execute().set_input_line(INPUT_LINE_RESET, ASSERT_LINE); // this causes debugger to fail badly if included //m_maincpu->set_input_line(INPUT_LINE_RESET, ASSERT_LINE); // this causes debugger to fail badly if included
machine().device("tms5220")->reset(); // reset the 5220 machine().device("tms5220")->reset(); // reset the 5220
} }

2
src/mess/drivers/ql.c
View File

@ -209,7 +209,7 @@ READ8_MEMBER( ql_state::ipc_port2_r )
// int irq = (m_ser2_rxd | m_ser1_txd); // int irq = (m_ser2_rxd | m_ser1_txd);
// m_ipc->execute().set_input_line(INPUT_LINE_IRQ0, irq); // m_ipc->set_input_line(INPUT_LINE_IRQ0, irq);
return (m_comdata << 7); return (m_comdata << 7);
} }

94
src/mess/drivers/snes.c
View File

@ -1519,94 +1519,94 @@ static MACHINE_START( snes_console )
case SNES_Z80GB: // still unemulated case SNES_Z80GB: // still unemulated
break; break;
case SNES_DSP: case SNES_DSP:
machine.device("maincpu")->memory().space(AS_PROGRAM).install_read_handler(0x208000, 0x20ffff, 0, 0x9f0000, read8_delegate(FUNC(base_sns_cart_slot_device::chip_read),(base_sns_cart_slot_device*)state->m_cartslot)); state->m_maincpu->space(AS_PROGRAM).install_read_handler(0x208000, 0x20ffff, 0, 0x9f0000, read8_delegate(FUNC(base_sns_cart_slot_device::chip_read),(base_sns_cart_slot_device*)state->m_cartslot));
machine.device("maincpu")->memory().space(AS_PROGRAM).install_write_handler(0x208000, 0x20ffff, 0, 0x9f0000, write8_delegate(FUNC(base_sns_cart_slot_device::chip_write),(base_sns_cart_slot_device*)state->m_cartslot)); state->m_maincpu->space(AS_PROGRAM).install_write_handler(0x208000, 0x20ffff, 0, 0x9f0000, write8_delegate(FUNC(base_sns_cart_slot_device::chip_write),(base_sns_cart_slot_device*)state->m_cartslot));
break; break;
case SNES_DSP_2MB: case SNES_DSP_2MB:
machine.device("maincpu")->memory().space(AS_PROGRAM).install_read_handler(0x600000, 0x607fff, 0, 0x8f0000, read8_delegate(FUNC(base_sns_cart_slot_device::chip_read),(base_sns_cart_slot_device*)state->m_cartslot)); state->m_maincpu->space(AS_PROGRAM).install_read_handler(0x600000, 0x607fff, 0, 0x8f0000, read8_delegate(FUNC(base_sns_cart_slot_device::chip_read),(base_sns_cart_slot_device*)state->m_cartslot));
machine.device("maincpu")->memory().space(AS_PROGRAM).install_write_handler(0x600000, 0x607fff, 0, 0x8f0000, write8_delegate(FUNC(base_sns_cart_slot_device::chip_write),(base_sns_cart_slot_device*)state->m_cartslot)); state->m_maincpu->space(AS_PROGRAM).install_write_handler(0x600000, 0x607fff, 0, 0x8f0000, write8_delegate(FUNC(base_sns_cart_slot_device::chip_write),(base_sns_cart_slot_device*)state->m_cartslot));
break; break;
case SNES_DSP4: case SNES_DSP4:
machine.device("maincpu")->memory().space(AS_PROGRAM).install_read_handler(0x308000, 0x30ffff, 0, 0x8f0000, read8_delegate(FUNC(base_sns_cart_slot_device::chip_read),(base_sns_cart_slot_device*)state->m_cartslot)); state->m_maincpu->space(AS_PROGRAM).install_read_handler(0x308000, 0x30ffff, 0, 0x8f0000, read8_delegate(FUNC(base_sns_cart_slot_device::chip_read),(base_sns_cart_slot_device*)state->m_cartslot));
machine.device("maincpu")->memory().space(AS_PROGRAM).install_write_handler(0x308000, 0x30ffff, 0, 0x8f0000, write8_delegate(FUNC(base_sns_cart_slot_device::chip_write),(base_sns_cart_slot_device*)state->m_cartslot)); state->m_maincpu->space(AS_PROGRAM).install_write_handler(0x308000, 0x30ffff, 0, 0x8f0000, write8_delegate(FUNC(base_sns_cart_slot_device::chip_write),(base_sns_cart_slot_device*)state->m_cartslot));
break; break;
case SNES_OBC1: case SNES_OBC1:
machine.device("maincpu")->memory().space(AS_PROGRAM).install_read_handler(0x006000, 0x007fff, 0, 0xbf0000, read8_delegate(FUNC(base_sns_cart_slot_device::chip_read),(base_sns_cart_slot_device*)state->m_cartslot)); state->m_maincpu->space(AS_PROGRAM).install_read_handler(0x006000, 0x007fff, 0, 0xbf0000, read8_delegate(FUNC(base_sns_cart_slot_device::chip_read),(base_sns_cart_slot_device*)state->m_cartslot));
machine.device("maincpu")->memory().space(AS_PROGRAM).install_write_handler(0x006000, 0x007fff, 0, 0xbf0000, write8_delegate(FUNC(base_sns_cart_slot_device::chip_write),(base_sns_cart_slot_device*)state->m_cartslot)); state->m_maincpu->space(AS_PROGRAM).install_write_handler(0x006000, 0x007fff, 0, 0xbf0000, write8_delegate(FUNC(base_sns_cart_slot_device::chip_write),(base_sns_cart_slot_device*)state->m_cartslot));
break; break;
case SNES_SFX: case SNES_SFX:
machine.device("maincpu")->memory().space(AS_PROGRAM).install_readwrite_handler(0x000000, 0x7dffff, read8_delegate(FUNC(snes_console_state::snessfx_lo_r),state), write8_delegate(FUNC(snes_console_state::snessfx_lo_w),state)); state->m_maincpu->space(AS_PROGRAM).install_readwrite_handler(0x000000, 0x7dffff, read8_delegate(FUNC(snes_console_state::snessfx_lo_r),state), write8_delegate(FUNC(snes_console_state::snessfx_lo_w),state));
machine.device("maincpu")->memory().space(AS_PROGRAM).install_readwrite_handler(0x800000, 0xffffff, read8_delegate(FUNC(snes_console_state::snessfx_hi_r),state), write8_delegate(FUNC(snes_console_state::snessfx_hi_w),state)); state->m_maincpu->space(AS_PROGRAM).install_readwrite_handler(0x800000, 0xffffff, read8_delegate(FUNC(snes_console_state::snessfx_hi_r),state), write8_delegate(FUNC(snes_console_state::snessfx_hi_w),state));
set_5a22_map(*state->m_maincpu); set_5a22_map(state->m_maincpu);
break; break;
case SNES_SDD1: case SNES_SDD1:
machine.device("maincpu")->memory().space(AS_PROGRAM).install_readwrite_handler(0x000000, 0x7dffff, read8_delegate(FUNC(snes_console_state::snessdd1_lo_r),state), write8_delegate(FUNC(snes_console_state::snessdd1_lo_w),state)); state->m_maincpu->space(AS_PROGRAM).install_readwrite_handler(0x000000, 0x7dffff, read8_delegate(FUNC(snes_console_state::snessdd1_lo_r),state), write8_delegate(FUNC(snes_console_state::snessdd1_lo_w),state));
machine.device("maincpu")->memory().space(AS_PROGRAM).install_readwrite_handler(0x800000, 0xffffff, read8_delegate(FUNC(snes_console_state::snessdd1_hi_r),state), write8_delegate(FUNC(snes_console_state::snessdd1_hi_w),state)); state->m_maincpu->space(AS_PROGRAM).install_readwrite_handler(0x800000, 0xffffff, read8_delegate(FUNC(snes_console_state::snessdd1_hi_r),state), write8_delegate(FUNC(snes_console_state::snessdd1_hi_w),state));
set_5a22_map(*state->m_maincpu); set_5a22_map(state->m_maincpu);
break; break;
case SNES_BSX: case SNES_BSX:
machine.device("maincpu")->memory().space(AS_PROGRAM).install_readwrite_handler(0x000000, 0x7dffff, read8_delegate(FUNC(snes_console_state::snesbsx_lo_r),state), write8_delegate(FUNC(snes_console_state::snesbsx_lo_w),state)); state->m_maincpu->space(AS_PROGRAM).install_readwrite_handler(0x000000, 0x7dffff, read8_delegate(FUNC(snes_console_state::snesbsx_lo_r),state), write8_delegate(FUNC(snes_console_state::snesbsx_lo_w),state));
machine.device("maincpu")->memory().space(AS_PROGRAM).install_readwrite_handler(0x800000, 0xffffff, read8_delegate(FUNC(snes_console_state::snesbsx_hi_r),state), write8_delegate(FUNC(snes_console_state::snesbsx_hi_w),state)); state->m_maincpu->space(AS_PROGRAM).install_readwrite_handler(0x800000, 0xffffff, read8_delegate(FUNC(snes_console_state::snesbsx_hi_r),state), write8_delegate(FUNC(snes_console_state::snesbsx_hi_w),state));
set_5a22_map(*state->m_maincpu); set_5a22_map(state->m_maincpu);
break; break;
// HiROM & HiROM + addons // HiROM & HiROM + addons
case SNES_MODE21: case SNES_MODE21:
case SNES_BSXHI: case SNES_BSXHI:
machine.device("maincpu")->memory().space(AS_PROGRAM).install_readwrite_handler(0x000000, 0x7dffff, read8_delegate(FUNC(snes_console_state::snes21_lo_r),state), write8_delegate(FUNC(snes_console_state::snes21_lo_w),state)); state->m_maincpu->space(AS_PROGRAM).install_readwrite_handler(0x000000, 0x7dffff, read8_delegate(FUNC(snes_console_state::snes21_lo_r),state), write8_delegate(FUNC(snes_console_state::snes21_lo_w),state));
machine.device("maincpu")->memory().space(AS_PROGRAM).install_readwrite_handler(0x800000, 0xffffff, read8_delegate(FUNC(snes_console_state::snes21_hi_r),state), write8_delegate(FUNC(snes_console_state::snes21_hi_w),state)); state->m_maincpu->space(AS_PROGRAM).install_readwrite_handler(0x800000, 0xffffff, read8_delegate(FUNC(snes_console_state::snes21_hi_r),state), write8_delegate(FUNC(snes_console_state::snes21_hi_w),state));
set_5a22_map(*state->m_maincpu); set_5a22_map(state->m_maincpu);
break; break;
case SNES_DSP_MODE21: case SNES_DSP_MODE21:
machine.device("maincpu")->memory().space(AS_PROGRAM).install_readwrite_handler(0x000000, 0x7dffff, read8_delegate(FUNC(snes_console_state::snes21_lo_r),state), write8_delegate(FUNC(snes_console_state::snes21_lo_w),state)); state->m_maincpu->space(AS_PROGRAM).install_readwrite_handler(0x000000, 0x7dffff, read8_delegate(FUNC(snes_console_state::snes21_lo_r),state), write8_delegate(FUNC(snes_console_state::snes21_lo_w),state));
machine.device("maincpu")->memory().space(AS_PROGRAM).install_readwrite_handler(0x800000, 0xffffff, read8_delegate(FUNC(snes_console_state::snes21_hi_r),state), write8_delegate(FUNC(snes_console_state::snes21_hi_w),state)); state->m_maincpu->space(AS_PROGRAM).install_readwrite_handler(0x800000, 0xffffff, read8_delegate(FUNC(snes_console_state::snes21_hi_r),state), write8_delegate(FUNC(snes_console_state::snes21_hi_w),state));
machine.device("maincpu")->memory().space(AS_PROGRAM).install_read_handler(0x006000, 0x007fff, 0, 0x9f0000, read8_delegate(FUNC(base_sns_cart_slot_device::chip_read),(base_sns_cart_slot_device*)state->m_cartslot)); state->m_maincpu->space(AS_PROGRAM).install_read_handler(0x006000, 0x007fff, 0, 0x9f0000, read8_delegate(FUNC(base_sns_cart_slot_device::chip_read),(base_sns_cart_slot_device*)state->m_cartslot));
machine.device("maincpu")->memory().space(AS_PROGRAM).install_write_handler(0x006000, 0x007fff, 0, 0x9f0000, write8_delegate(FUNC(base_sns_cart_slot_device::chip_write),(base_sns_cart_slot_device*)state->m_cartslot)); state->m_maincpu->space(AS_PROGRAM).install_write_handler(0x006000, 0x007fff, 0, 0x9f0000, write8_delegate(FUNC(base_sns_cart_slot_device::chip_write),(base_sns_cart_slot_device*)state->m_cartslot));
set_5a22_map(*state->m_maincpu); set_5a22_map(state->m_maincpu);
break; break;
case SNES_SRTC: case SNES_SRTC:
machine.device("maincpu")->memory().space(AS_PROGRAM).install_readwrite_handler(0x000000, 0x7dffff, read8_delegate(FUNC(snes_console_state::snes21_lo_r),state), write8_delegate(FUNC(snes_console_state::snes21_lo_w),state)); state->m_maincpu->space(AS_PROGRAM).install_readwrite_handler(0x000000, 0x7dffff, read8_delegate(FUNC(snes_console_state::snes21_lo_r),state), write8_delegate(FUNC(snes_console_state::snes21_lo_w),state));
machine.device("maincpu")->memory().space(AS_PROGRAM).install_readwrite_handler(0x800000, 0xffffff, read8_delegate(FUNC(snes_console_state::snes21_hi_r),state), write8_delegate(FUNC(snes_console_state::snes21_hi_w),state)); state->m_maincpu->space(AS_PROGRAM).install_readwrite_handler(0x800000, 0xffffff, read8_delegate(FUNC(snes_console_state::snes21_hi_r),state), write8_delegate(FUNC(snes_console_state::snes21_hi_w),state));
machine.device("maincpu")->memory().space(AS_PROGRAM).install_read_handler(0x002800, 0x002800, 0, 0xbf0000, read8_delegate(FUNC(base_sns_cart_slot_device::chip_read),(base_sns_cart_slot_device*)state->m_cartslot)); state->m_maincpu->space(AS_PROGRAM).install_read_handler(0x002800, 0x002800, 0, 0xbf0000, read8_delegate(FUNC(base_sns_cart_slot_device::chip_read),(base_sns_cart_slot_device*)state->m_cartslot));
machine.device("maincpu")->memory().space(AS_PROGRAM).install_write_handler(0x002801, 0x002801, 0, 0xbf0000, write8_delegate(FUNC(base_sns_cart_slot_device::chip_write),(base_sns_cart_slot_device*)state->m_cartslot)); state->m_maincpu->space(AS_PROGRAM).install_write_handler(0x002801, 0x002801, 0, 0xbf0000, write8_delegate(FUNC(base_sns_cart_slot_device::chip_write),(base_sns_cart_slot_device*)state->m_cartslot));
set_5a22_map(*state->m_maincpu); set_5a22_map(state->m_maincpu);
break; break;
case SNES_SPC7110: case SNES_SPC7110:
case SNES_SPC7110_RTC: case SNES_SPC7110_RTC:
machine.device("maincpu")->memory().space(AS_PROGRAM).install_readwrite_handler(0x000000, 0x7dffff, read8_delegate(FUNC(snes_console_state::snes7110_lo_r),state), write8_delegate(FUNC(snes_console_state::snes7110_lo_w),state)); state->m_maincpu->space(AS_PROGRAM).install_readwrite_handler(0x000000, 0x7dffff, read8_delegate(FUNC(snes_console_state::snes7110_lo_r),state), write8_delegate(FUNC(snes_console_state::snes7110_lo_w),state));
machine.device("maincpu")->memory().space(AS_PROGRAM).install_readwrite_handler(0x800000, 0xffffff, read8_delegate(FUNC(snes_console_state::snes7110_hi_r),state), write8_delegate(FUNC(snes_console_state::snes7110_hi_w),state)); state->m_maincpu->space(AS_PROGRAM).install_readwrite_handler(0x800000, 0xffffff, read8_delegate(FUNC(snes_console_state::snes7110_hi_r),state), write8_delegate(FUNC(snes_console_state::snes7110_hi_w),state));
set_5a22_map(*state->m_maincpu); set_5a22_map(state->m_maincpu);
break; break;
case SNES_PFEST94: case SNES_PFEST94:
machine.device("maincpu")->memory().space(AS_PROGRAM).install_readwrite_handler(0x000000, 0x7dffff, read8_delegate(FUNC(snes_console_state::pfest94_lo_r),state), write8_delegate(FUNC(snes_console_state::pfest94_lo_w),state)); state->m_maincpu->space(AS_PROGRAM).install_readwrite_handler(0x000000, 0x7dffff, read8_delegate(FUNC(snes_console_state::pfest94_lo_r),state), write8_delegate(FUNC(snes_console_state::pfest94_lo_w),state));
machine.device("maincpu")->memory().space(AS_PROGRAM).install_readwrite_handler(0x800000, 0xffffff, read8_delegate(FUNC(snes_console_state::pfest94_hi_r),state), write8_delegate(FUNC(snes_console_state::pfest94_hi_w),state)); state->m_maincpu->space(AS_PROGRAM).install_readwrite_handler(0x800000, 0xffffff, read8_delegate(FUNC(snes_console_state::pfest94_hi_r),state), write8_delegate(FUNC(snes_console_state::pfest94_hi_w),state));
set_5a22_map(*state->m_maincpu); set_5a22_map(state->m_maincpu);
break; break;
// pirate 'mappers' // pirate 'mappers'
case SNES_POKEMON: case SNES_POKEMON:
machine.device("maincpu")->memory().space(AS_PROGRAM).install_read_handler(0x800000, 0x80ffff, 0, 0x780000, read8_delegate(FUNC(base_sns_cart_slot_device::chip_read),(base_sns_cart_slot_device*)state->m_cartslot)); state->m_maincpu->space(AS_PROGRAM).install_read_handler(0x800000, 0x80ffff, 0, 0x780000, read8_delegate(FUNC(base_sns_cart_slot_device::chip_read),(base_sns_cart_slot_device*)state->m_cartslot));
machine.device("maincpu")->memory().space(AS_PROGRAM).install_write_handler(0x800000, 0x80ffff, 0, 0x780000, write8_delegate(FUNC(base_sns_cart_slot_device::chip_write),(base_sns_cart_slot_device*)state->m_cartslot)); state->m_maincpu->space(AS_PROGRAM).install_write_handler(0x800000, 0x80ffff, 0, 0x780000, write8_delegate(FUNC(base_sns_cart_slot_device::chip_write),(base_sns_cart_slot_device*)state->m_cartslot));
break; break;
case SNES_TEKKEN2: case SNES_TEKKEN2:
machine.device("maincpu")->memory().space(AS_PROGRAM).install_read_handler(0x808000, 0x8087ff, 0, 0x3f0000, read8_delegate(FUNC(base_sns_cart_slot_device::chip_read),(base_sns_cart_slot_device*)state->m_cartslot)); state->m_maincpu->space(AS_PROGRAM).install_read_handler(0x808000, 0x8087ff, 0, 0x3f0000, read8_delegate(FUNC(base_sns_cart_slot_device::chip_read),(base_sns_cart_slot_device*)state->m_cartslot));
machine.device("maincpu")->memory().space(AS_PROGRAM).install_write_handler(0x808000, 0x8087ff, 0, 0x3f0000, write8_delegate(FUNC(base_sns_cart_slot_device::chip_write),(base_sns_cart_slot_device*)state->m_cartslot)); state->m_maincpu->space(AS_PROGRAM).install_write_handler(0x808000, 0x8087ff, 0, 0x3f0000, write8_delegate(FUNC(base_sns_cart_slot_device::chip_write),(base_sns_cart_slot_device*)state->m_cartslot));
break; break;
case SNES_MCPIR1: case SNES_MCPIR1:
case SNES_MCPIR2: case SNES_MCPIR2:
machine.device("maincpu")->memory().space(AS_PROGRAM).install_write_handler(0xffff00, 0xffffff, write8_delegate(FUNC(base_sns_cart_slot_device::chip_write),(base_sns_cart_slot_device*)state->m_cartslot)); state->m_maincpu->space(AS_PROGRAM).install_write_handler(0xffff00, 0xffffff, write8_delegate(FUNC(base_sns_cart_slot_device::chip_write),(base_sns_cart_slot_device*)state->m_cartslot));
break; break;
case SNES_20COL: case SNES_20COL:
machine.device("maincpu")->memory().space(AS_PROGRAM).install_write_handler(0x008000, 0x008fff, write8_delegate(FUNC(base_sns_cart_slot_device::chip_write),(base_sns_cart_slot_device*)state->m_cartslot)); state->m_maincpu->space(AS_PROGRAM).install_write_handler(0x008000, 0x008fff, write8_delegate(FUNC(base_sns_cart_slot_device::chip_write),(base_sns_cart_slot_device*)state->m_cartslot));
break; break;
case SNES_SOULBLAD: case SNES_SOULBLAD:
// reads from xxx0-xxx3in range [80-bf] return a fixed sequence of 4bits; reads in range [c0-ff] return open bus // reads from xxx0-xxx3in range [80-bf] return a fixed sequence of 4bits; reads in range [c0-ff] return open bus
machine.device("maincpu")->memory().space(AS_PROGRAM).install_read_handler(0x808000, 0x808003, 0, 0x3f7ff0, read8_delegate(FUNC(base_sns_cart_slot_device::chip_read),(base_sns_cart_slot_device*)state->m_cartslot)); state->m_maincpu->space(AS_PROGRAM).install_read_handler(0x808000, 0x808003, 0, 0x3f7ff0, read8_delegate(FUNC(base_sns_cart_slot_device::chip_read),(base_sns_cart_slot_device*)state->m_cartslot));
machine.device("maincpu")->memory().space(AS_PROGRAM).install_legacy_read_handler(0xc00000, 0xffffff, FUNC(snes_open_bus_r)); state->m_maincpu->space(AS_PROGRAM).install_legacy_read_handler(0xc00000, 0xffffff, FUNC(snes_open_bus_r));
break; break;
case SNES_BUGS: case SNES_BUGS:
case SNES_BANANA: case SNES_BANANA:
// machine.device("maincpu")->memory().space(AS_PROGRAM).install_read_handler(0x808000, 0x80ffff, 0, 0x780000, read8_delegate(FUNC(base_sns_cart_slot_device::chip_read),(base_sns_cart_slot_device*)state->m_cartslot)); // state->m_maincpu->space(AS_PROGRAM).install_read_handler(0x808000, 0x80ffff, 0, 0x780000, read8_delegate(FUNC(base_sns_cart_slot_device::chip_read),(base_sns_cart_slot_device*)state->m_cartslot));
// machine.device("maincpu")->memory().space(AS_PROGRAM).install_write_handler(0x808000, 0x80ffff, 0, 0x780000, write8_delegate(FUNC(base_sns_cart_slot_device::chip_write),(base_sns_cart_slot_device*)state->m_cartslot)); // state->m_maincpu->space(AS_PROGRAM).install_write_handler(0x808000, 0x80ffff, 0, 0x780000, write8_delegate(FUNC(base_sns_cart_slot_device::chip_write),(base_sns_cart_slot_device*)state->m_cartslot));
// set_5a22_map(*state->m_maincpu); // set_5a22_map(state->m_maincpu);
break; break;
} }
} }

22
src/mess/drivers/supracan.c
View File

@ -116,12 +116,14 @@ public:
supracan_state(const machine_config &mconfig, device_type type, const char *tag) supracan_state(const machine_config &mconfig, device_type type, const char *tag)
: driver_device(mconfig, type, tag), : driver_device(mconfig, type, tag),
m_maincpu(*this, "maincpu"), m_maincpu(*this, "maincpu"),
m_soundcpu(*this, "soundcpu"),
m_soundram(*this, "soundram") m_soundram(*this, "soundram")
{ {
m_m6502_reset = 0; m_m6502_reset = 0;
} }
required_device<cpu_device> m_maincpu; required_device<cpu_device> m_maincpu;
required_device<cpu_device> m_soundcpu;
DECLARE_READ16_MEMBER(supracan_68k_soundram_r); DECLARE_READ16_MEMBER(supracan_68k_soundram_r);
DECLARE_WRITE16_MEMBER(supracan_68k_soundram_w); DECLARE_WRITE16_MEMBER(supracan_68k_soundram_w);
DECLARE_READ8_MEMBER(supracan_6502_soundmem_r); DECLARE_READ8_MEMBER(supracan_6502_soundmem_r);
@ -1138,11 +1140,11 @@ READ8_MEMBER( supracan_state::supracan_6502_soundmem_r )
{ {
if(m_sound_irq_enable_reg & m_sound_irq_source_reg) if(m_sound_irq_enable_reg & m_sound_irq_source_reg)
{ {
machine().device("soundcpu")->execute().set_input_line(0, ASSERT_LINE); m_soundcpu->set_input_line(0, ASSERT_LINE);
} }
else else
{ {
machine().device("soundcpu")->execute().set_input_line(0, CLEAR_LINE); m_soundcpu->set_input_line(0, CLEAR_LINE);
} }
} }
break; break;
@ -1152,7 +1154,7 @@ READ8_MEMBER( supracan_state::supracan_6502_soundmem_r )
if(!mem.debugger_access()) verboselog(m_hack_68k_to_6502_access ? "maincpu" : "soundcpu", 3, "supracan_soundreg_r: IRQ source: %04x\n", data); if(!mem.debugger_access()) verboselog(m_hack_68k_to_6502_access ? "maincpu" : "soundcpu", 3, "supracan_soundreg_r: IRQ source: %04x\n", data);
if(!mem.debugger_access()) if(!mem.debugger_access())
{ {
machine().device("soundcpu")->execute().set_input_line(0, CLEAR_LINE); m_soundcpu->set_input_line(0, CLEAR_LINE);
} }
break; break;
case 0x420: case 0x420:
@ -1416,7 +1418,7 @@ WRITE16_MEMBER( supracan_state::supracan_sound_w )
switch ( offset ) switch ( offset )
{ {
case 0x000a/2: /* Sound cpu IRQ request. */ case 0x000a/2: /* Sound cpu IRQ request. */
machine().device("soundcpu")->execute().set_input_line(0, ASSERT_LINE); m_soundcpu->set_input_line(0, ASSERT_LINE);
break; break;
case 0x001c/2: /* Sound cpu control. Bit 0 tied to sound cpu RESET line */ case 0x001c/2: /* Sound cpu control. Bit 0 tied to sound cpu RESET line */
if(data & 0x01) if(data & 0x01)
@ -1425,8 +1427,8 @@ WRITE16_MEMBER( supracan_state::supracan_sound_w )
{ {
/* Reset and enable the sound cpu */ /* Reset and enable the sound cpu */
#if !(SOUNDCPU_BOOT_HACK) #if !(SOUNDCPU_BOOT_HACK)
machine().device("soundcpu")->execute().set_input_line(INPUT_LINE_HALT, CLEAR_LINE); m_soundcpu->set_input_line(INPUT_LINE_HALT, CLEAR_LINE);
machine().device("soundcpu")->reset(); m_soundcpu->reset();
#endif #endif
} }
m_m6502_reset = data & 0x01; m_m6502_reset = data & 0x01;
@ -1434,7 +1436,7 @@ WRITE16_MEMBER( supracan_state::supracan_sound_w )
else else
{ {
/* Halt the sound cpu */ /* Halt the sound cpu */
machine().device("soundcpu")->execute().set_input_line(INPUT_LINE_HALT, ASSERT_LINE); m_soundcpu->set_input_line(INPUT_LINE_HALT, ASSERT_LINE);
} }
verboselog("maincpu", 0, "sound cpu ctrl: %04x\n", data); verboselog("maincpu", 0, "sound cpu ctrl: %04x\n", data);
break; break;
@ -1768,7 +1770,7 @@ void supracan_state::machine_start()
void supracan_state::machine_reset() void supracan_state::machine_reset()
{ {
machine().device("soundcpu")->execute().set_input_line(INPUT_LINE_HALT, ASSERT_LINE); m_soundcpu->set_input_line(INPUT_LINE_HALT, ASSERT_LINE);
m_video_timer->adjust( machine().primary_screen->time_until_pos( 0, 0 ) ); m_video_timer->adjust( machine().primary_screen->time_until_pos( 0, 0 ) );
m_irq_mask = 0; m_irq_mask = 0;
@ -1873,11 +1875,11 @@ INTERRUPT_GEN_MEMBER(supracan_state::supracan_sound_irq)
if(m_sound_irq_enable_reg & m_sound_irq_source_reg) if(m_sound_irq_enable_reg & m_sound_irq_source_reg)
{ {
machine().device("soundcpu")->execute().set_input_line(0, ASSERT_LINE); m_soundcpu->set_input_line(0, ASSERT_LINE);
} }
else else
{ {
machine().device("soundcpu")->execute().set_input_line(0, CLEAR_LINE); m_soundcpu->set_input_line(0, CLEAR_LINE);
} }
} }

2
src/mess/drivers/ti99_4p.c
View File

@ -338,7 +338,7 @@ READ16_MEMBER( ti99_4p_state::memread )
WRITE16_MEMBER( ti99_4p_state::memwrite ) WRITE16_MEMBER( ti99_4p_state::memwrite )
{ {
// m_cpu->execute().adjust_icount(-4); // m_cpu->adjust_icount(-4);
int addroff = offset << 1; int addroff = offset << 1;
UINT16 zone = addroff & 0xe000; UINT16 zone = addroff & 0xe000;

9
src/mess/drivers/tsispch.c
View File

@ -207,10 +207,9 @@ WRITE8_MEMBER( tsispch_state::peripheral_w )
and (probably) the p0-to-ir0 masking of the upd77p20; there are two and (probably) the p0-to-ir0 masking of the upd77p20; there are two
unknown and seemingly unused bits as well. unknown and seemingly unused bits as well.
see the top of the file for more info. see the top of the file for more info.
*/ */
tsispch_state *state = machine().driver_data<tsispch_state>(); m_paramReg = data;
state->m_paramReg = data; m_dsp->set_input_line(INPUT_LINE_RESET, BIT(data,6)?CLEAR_LINE:ASSERT_LINE);
machine().device("dsp")->execute().set_input_line(INPUT_LINE_RESET, BIT(data,6)?CLEAR_LINE:ASSERT_LINE);
#ifdef DEBUG_PARAM #ifdef DEBUG_PARAM
//fprintf(stderr,"8086: Parameter Reg written: UNK7: %d, DSPRST6: %d; UNK5: %d; LED4: %d; LED3: %d; LED2: %d; LED1: %d; DSPIRQMASK: %d\n", BIT(data,7), BIT(data,6), BIT(data,5), BIT(data,4), BIT(data,3), BIT(data,2), BIT(data,1), BIT(data,0)); //fprintf(stderr,"8086: Parameter Reg written: UNK7: %d, DSPRST6: %d; UNK5: %d; LED4: %d; LED3: %d; LED2: %d; LED1: %d; DSPIRQMASK: %d\n", BIT(data,7), BIT(data,6), BIT(data,5), BIT(data,4), BIT(data,3), BIT(data,2), BIT(data,1), BIT(data,0));
logerror("8086: Parameter Reg written: UNK7: %d, DSPRST6: %d; UNK5: %d; LED4: %d; LED3: %d; LED2: %d; LED1: %d; DSPIRQMASK: %d\n", BIT(data,7), BIT(data,6), BIT(data,5), BIT(data,4), BIT(data,3), BIT(data,2), BIT(data,1), BIT(data,0)); logerror("8086: Parameter Reg written: UNK7: %d, DSPRST6: %d; UNK5: %d; LED4: %d; LED3: %d; LED2: %d; LED1: %d; DSPIRQMASK: %d\n", BIT(data,7), BIT(data,6), BIT(data,5), BIT(data,4), BIT(data,3), BIT(data,2), BIT(data,1), BIT(data,0));
@ -320,7 +319,7 @@ DRIVER_INIT_MEMBER(tsispch_state,prose2k)
dspprg++; dspprg++;
} }
m_paramReg = 0x00; // on power up, all leds on, reset to upd7720 is high m_paramReg = 0x00; // on power up, all leds on, reset to upd7720 is high
machine().device("dsp")->execute().set_input_line(INPUT_LINE_RESET, ASSERT_LINE); // starts in reset m_dsp->set_input_line(INPUT_LINE_RESET, ASSERT_LINE); // starts in reset
} }
/****************************************************************************** /******************************************************************************

4
src/mess/drivers/vcs80.c
View File

@ -253,8 +253,8 @@ DIRECT_UPDATE_MEMBER(vcs80_state::vcs80_direct_update_handler)
DRIVER_INIT_MEMBER(vcs80_state,vcs80) DRIVER_INIT_MEMBER(vcs80_state,vcs80)
{ {
machine().device(Z80_TAG)->memory().space(AS_PROGRAM).set_direct_update_handler(direct_update_delegate(FUNC(vcs80_state::vcs80_direct_update_handler), this)); m_maincpu->space(AS_PROGRAM).set_direct_update_handler(direct_update_delegate(FUNC(vcs80_state::vcs80_direct_update_handler), this));
machine().device(Z80_TAG)->memory().space(AS_IO).set_direct_update_handler(direct_update_delegate(FUNC(vcs80_state::vcs80_direct_update_handler), this)); m_maincpu->space(AS_IO).set_direct_update_handler(direct_update_delegate(FUNC(vcs80_state::vcs80_direct_update_handler), this));
} }
/* System Drivers */ /* System Drivers */

2
src/mess/drivers/vtech1.c
View File

@ -213,7 +213,7 @@ public:
static SNAPSHOT_LOAD( vtech1 ) static SNAPSHOT_LOAD( vtech1 )
{ {
vtech1_state *vtech1 = image.device().machine().driver_data<vtech1_state>(); vtech1_state *vtech1 = image.device().machine().driver_data<vtech1_state>();
address_space &space = image.device().machine().device("maincpu")->memory().space(AS_PROGRAM); address_space &space = vtech1->m_maincpu->space(AS_PROGRAM);
UINT8 i, header[24]; UINT8 i, header[24];
UINT16 start, end, size; UINT16 start, end, size;
char pgmname[18]; char pgmname[18];

6
src/mess/drivers/x1.c
View File

@ -2369,7 +2369,7 @@ IRQ_CALLBACK_MEMBER(x1_state::x1_irq_callback)
TIMER_DEVICE_CALLBACK_MEMBER(x1_state::x1_keyboard_callback) TIMER_DEVICE_CALLBACK_MEMBER(x1_state::x1_keyboard_callback)
{ {
address_space &space = machine().device("x1_cpu")->memory().space(AS_PROGRAM); address_space &space = m_x1_cpu->space(AS_PROGRAM);
UINT32 key1 = ioport("key1")->read(); UINT32 key1 = ioport("key1")->read();
UINT32 key2 = ioport("key2")->read(); UINT32 key2 = ioport("key2")->read();
UINT32 key3 = ioport("key3")->read(); UINT32 key3 = ioport("key3")->read();
@ -2387,7 +2387,7 @@ TIMER_DEVICE_CALLBACK_MEMBER(x1_state::x1_keyboard_callback)
x1_sub_io_w(space,0,0xe6); x1_sub_io_w(space,0,0xe6);
m_irq_vector = m_key_irq_vector; m_irq_vector = m_key_irq_vector;
m_key_irq_flag = 1; m_key_irq_flag = 1;
machine().device("x1_cpu")->execute().set_input_line(0,ASSERT_LINE); m_x1_cpu->set_input_line(0,ASSERT_LINE);
m_old_key1 = key1; m_old_key1 = key1;
m_old_key2 = key2; m_old_key2 = key2;
m_old_key3 = key3; m_old_key3 = key3;
@ -2441,7 +2441,7 @@ MACHINE_RESET_MEMBER(x1_state,x1)
m_io_bank_mode = 0; m_io_bank_mode = 0;
//machine().device("x1_cpu")->execute().set_irq_acknowledge_callback(device_irq_acknowledge_delegate(FUNC(x1_state::x1_irq_callback),this)); //m_x1_cpu->set_irq_acknowledge_callback(device_irq_acknowledge_delegate(FUNC(x1_state::x1_irq_callback),this));
m_cmt_current_cmd = 0; m_cmt_current_cmd = 0;
m_cmt_test = 0; m_cmt_test = 0;

2
src/mess/drivers/x1twin.c
View File

@ -111,7 +111,7 @@ static MC6845_INTERFACE( mc6845_intf )
INPUT_CHANGED_MEMBER(x1twin_state::ipl_reset) INPUT_CHANGED_MEMBER(x1twin_state::ipl_reset)
{ {
//address_space &space = machine().device("x1_cpu")->memory().space(AS_PROGRAM); //address_space &space = m_x1_cpu->space(AS_PROGRAM);
m_x1_cpu->set_input_line(INPUT_LINE_RESET, newval ? CLEAR_LINE : ASSERT_LINE); m_x1_cpu->set_input_line(INPUT_LINE_RESET, newval ? CLEAR_LINE : ASSERT_LINE);

10
src/mess/drivers/x68k.c
View File

@ -453,7 +453,7 @@ void x68k_state::x68k_keyboard_push_scancode(unsigned char code)
m_keyboard.headpos = 0; m_keyboard.headpos = 0;
// mfp_trigger_irq(MFP_IRQ_RX_ERROR); // mfp_trigger_irq(MFP_IRQ_RX_ERROR);
m_current_vector[6] = 0x4b; m_current_vector[6] = 0x4b;
// machine.device("maincpu")->execute().set_input_line_and_vector(6,ASSERT_LINE,0x4b); // m_maincpu->set_input_line_and_vector(6,ASSERT_LINE,0x4b);
} }
} }
@ -1693,7 +1693,7 @@ READ16_MEMBER(x68k_state::x68k_exp_r)
if(ACCESSING_BITS_0_7) if(ACCESSING_BITS_0_7)
offset++; offset++;
machine().scheduler().timer_set(m_maincpu->cycles_to_attotime(16), timer_expired_delegate(FUNC(x68k_state::x68k_bus_error),this), 0xeafa00+offset); machine().scheduler().timer_set(m_maincpu->cycles_to_attotime(16), timer_expired_delegate(FUNC(x68k_state::x68k_bus_error),this), 0xeafa00+offset);
// machine.device("maincpu")->execute().set_input_line_and_vector(2,ASSERT_LINE,state->m_current_vector[2]); // m_maincpu->set_input_line_and_vector(2,ASSERT_LINE,state->m_current_vector[2]);
} }
return 0xffff; return 0xffff;
} }
@ -1709,7 +1709,7 @@ WRITE16_MEMBER(x68k_state::x68k_exp_w)
if(ACCESSING_BITS_0_7) if(ACCESSING_BITS_0_7)
offset++; offset++;
machine().scheduler().timer_set(m_maincpu->cycles_to_attotime(16), timer_expired_delegate(FUNC(x68k_state::x68k_bus_error),this), 0xeafa00+offset); machine().scheduler().timer_set(m_maincpu->cycles_to_attotime(16), timer_expired_delegate(FUNC(x68k_state::x68k_bus_error),this), 0xeafa00+offset);
// machine.device("maincpu")->execute().set_input_line_and_vector(2,ASSERT_LINE,state->m_current_vector[2]); // m_maincpu->set_input_line_and_vector(2,ASSERT_LINE,state->m_current_vector[2]);
} }
} }
@ -1720,7 +1720,7 @@ static void x68k_dma_irq(running_machine &machine, int channel)
state->m_current_vector[3] = hd63450_get_vector(device, channel); state->m_current_vector[3] = hd63450_get_vector(device, channel);
state->m_current_irq_line = 3; state->m_current_irq_line = 3;
logerror("DMA#%i: DMA End (vector 0x%02x)\n",channel,state->m_current_vector[3]); logerror("DMA#%i: DMA End (vector 0x%02x)\n",channel,state->m_current_vector[3]);
machine.device("maincpu")->execute().set_input_line_and_vector(3,ASSERT_LINE,state->m_current_vector[3]); state->m_maincpu->set_input_line_and_vector(3,ASSERT_LINE,state->m_current_vector[3]);
} }
static void x68k_dma_end(running_machine &machine, int channel,int irq) static void x68k_dma_end(running_machine &machine, int channel,int irq)
@ -1739,7 +1739,7 @@ static void x68k_dma_error(running_machine &machine, int channel, int irq)
{ {
state->m_current_vector[3] = hd63450_get_error_vector(device,channel); state->m_current_vector[3] = hd63450_get_error_vector(device,channel);
state->m_current_irq_line = 3; state->m_current_irq_line = 3;
machine.device("maincpu")->execute().set_input_line_and_vector(3,ASSERT_LINE,state->m_current_vector[3]); state->m_maincpu->set_input_line_and_vector(3,ASSERT_LINE,state->m_current_vector[3]);
} }
} }

4
src/mess/includes/bebox.h
View File

@ -29,8 +29,12 @@ class bebox_state : public driver_device
public: public:
bebox_state(const machine_config &mconfig, device_type type, const char *tag) bebox_state(const machine_config &mconfig, device_type type, const char *tag)
: driver_device(mconfig, type, tag), : driver_device(mconfig, type, tag),
m_ppc1(*this, "ppc1"),
m_ppc2(*this, "ppc2"),
m_lsi53c810(*this, "scsi:lsi53c810"){ } m_lsi53c810(*this, "scsi:lsi53c810"){ }
required_device<cpu_device> m_ppc1;
required_device<cpu_device> m_ppc2;
required_device<lsi53c810_device> m_lsi53c810; required_device<lsi53c810_device> m_lsi53c810;
UINT32 m_cpu_imask[2]; UINT32 m_cpu_imask[2];
UINT32 m_interrupts; UINT32 m_interrupts;

6
src/mess/includes/fm7.h
View File

@ -105,7 +105,9 @@ public:
: driver_device(mconfig, type, tag), : driver_device(mconfig, type, tag),
m_shared_ram(*this, "shared_ram"), m_shared_ram(*this, "shared_ram"),
m_boot_ram(*this, "boot_ram"), m_boot_ram(*this, "boot_ram"),
m_maincpu(*this, "maincpu") { } m_maincpu(*this, "maincpu"),
m_sub(*this, "sub"),
m_x86(*this, "x86") { }
optional_shared_ptr<UINT8> m_shared_ram; optional_shared_ptr<UINT8> m_shared_ram;
optional_shared_ptr<UINT8> m_boot_ram; optional_shared_ptr<UINT8> m_boot_ram;
@ -254,6 +256,8 @@ public:
IRQ_CALLBACK_MEMBER(fm7_sub_irq_ack); IRQ_CALLBACK_MEMBER(fm7_sub_irq_ack);
DECLARE_WRITE_LINE_MEMBER(fm77av_fmirq); DECLARE_WRITE_LINE_MEMBER(fm77av_fmirq);
required_device<cpu_device> m_maincpu; required_device<cpu_device> m_maincpu;
required_device<cpu_device> m_sub;
optional_device<cpu_device> m_x86;
}; };
#endif /*FM7_H_*/ #endif /*FM7_H_*/

2
src/mess/includes/galaxy.h
View File

@ -42,8 +42,8 @@ public:
TIMER_CALLBACK_MEMBER(gal_video); TIMER_CALLBACK_MEMBER(gal_video);
IRQ_CALLBACK_MEMBER(galaxy_irq_callback); IRQ_CALLBACK_MEMBER(galaxy_irq_callback);
void galaxy_set_timer(); void galaxy_set_timer();
protected:
required_device<cpu_device> m_maincpu; required_device<cpu_device> m_maincpu;
protected:
required_device<cassette_image_device> m_cassette; required_device<cassette_image_device> m_cassette;
required_device<ram_device> m_ram; required_device<ram_device> m_ram;
required_memory_region m_region_gfx1; required_memory_region m_region_gfx1;

4
src/mess/includes/hec2hrp.h
View File

@ -74,7 +74,8 @@ public:
: driver_device(mconfig, type, tag), : driver_device(mconfig, type, tag),
m_videoram(*this,"videoram"), m_videoram(*this,"videoram"),
m_hector_videoram(*this,"hector_videoram") , m_hector_videoram(*this,"hector_videoram") ,
m_maincpu(*this, "maincpu") { } m_maincpu(*this, "maincpu"),
m_disc2cpu(*this, "disc2cpu") { }
optional_shared_ptr<UINT8> m_videoram; optional_shared_ptr<UINT8> m_videoram;
optional_shared_ptr<UINT8> m_hector_videoram; optional_shared_ptr<UINT8> m_hector_videoram;
@ -143,6 +144,7 @@ public:
void disc2_fdc_interrupt(bool state); void disc2_fdc_interrupt(bool state);
void disc2_fdc_dma_irq(bool state); void disc2_fdc_dma_irq(bool state);
required_device<cpu_device> m_maincpu; required_device<cpu_device> m_maincpu;
optional_device<cpu_device> m_disc2cpu;
}; };
/*----------- defined in machine/hec2hrp.c -----------*/ /*----------- defined in machine/hec2hrp.c -----------*/

2
src/mess/includes/mtx.h
View File

@ -28,9 +28,11 @@ class mtx_state : public driver_device
public: public:
mtx_state(const machine_config &mconfig, device_type type, const char *tag) mtx_state(const machine_config &mconfig, device_type type, const char *tag)
: driver_device(mconfig, type, tag), : driver_device(mconfig, type, tag),
m_maincpu(*this, Z80_TAG),
m_sn(*this, SN76489A_TAG) m_sn(*this, SN76489A_TAG)
{ } { }
required_device<cpu_device> m_maincpu;
required_device<sn76489a_device> m_sn; required_device<sn76489a_device> m_sn;
/* keyboard state */ /* keyboard state */

2
src/mess/includes/radio86.h
View File

@ -73,8 +73,8 @@ public:
DECLARE_WRITE8_MEMBER(radio86_romdisk_portc_w); DECLARE_WRITE8_MEMBER(radio86_romdisk_portc_w);
DECLARE_WRITE8_MEMBER(mikrosha_8255_font_page_w); DECLARE_WRITE8_MEMBER(mikrosha_8255_font_page_w);
protected:
required_device<cpu_device> m_maincpu; required_device<cpu_device> m_maincpu;
protected:
required_device<cassette_image_device> m_cassette; required_device<cassette_image_device> m_cassette;
optional_device<i8257_device> m_dma8257; optional_device<i8257_device> m_dma8257;
required_device<i8255_device> m_ppi8255_1; required_device<i8255_device> m_ppi8255_1;

2
src/mess/includes/svi318.h
View File

@ -113,8 +113,8 @@ public:
DECLARE_DEVICE_IMAGE_LOAD_MEMBER(svi318_cart); DECLARE_DEVICE_IMAGE_LOAD_MEMBER(svi318_cart);
DECLARE_DEVICE_IMAGE_UNLOAD_MEMBER(svi318_cart); DECLARE_DEVICE_IMAGE_UNLOAD_MEMBER(svi318_cart);
protected:
required_device<cpu_device> m_maincpu; required_device<cpu_device> m_maincpu;
protected:
required_device<cassette_image_device> m_cassette; required_device<cassette_image_device> m_cassette;
required_device<dac_device> m_dac; required_device<dac_device> m_dac;
required_device<i8255_device> m_ppi; required_device<i8255_device> m_ppi;

2
src/mess/includes/vcs80.h
View File

@ -19,12 +19,14 @@ class vcs80_state : public driver_device
public: public:
vcs80_state(const machine_config &mconfig, device_type type, const char *tag) vcs80_state(const machine_config &mconfig, device_type type, const char *tag)
: driver_device(mconfig, type, tag), : driver_device(mconfig, type, tag),
m_maincpu(*this, Z80_TAG),
m_pio(*this, Z80PIO_TAG), m_pio(*this, Z80PIO_TAG),
m_y0(*this, "Y0"), m_y0(*this, "Y0"),
m_y1(*this, "Y1"), m_y1(*this, "Y1"),
m_y2(*this, "Y2") m_y2(*this, "Y2")
{ } { }
required_device<cpu_device> m_maincpu;
required_device<z80pio_device> m_pio; required_device<z80pio_device> m_pio;
required_ioport m_y0; required_ioport m_y0;
required_ioport m_y1; required_ioport m_y1;

1
src/mess/includes/x68k.h
View File

@ -381,6 +381,7 @@ private:
void x68k_draw_gfx_scanline(bitmap_ind16 &bitmap, rectangle cliprect, UINT8 priority); void x68k_draw_gfx_scanline(bitmap_ind16 &bitmap, rectangle cliprect, UINT8 priority);
void x68k_draw_gfx(bitmap_ind16 &bitmap,rectangle cliprect); void x68k_draw_gfx(bitmap_ind16 &bitmap,rectangle cliprect);
void x68k_draw_sprites(bitmap_ind16 &bitmap, int priority, rectangle cliprect); void x68k_draw_sprites(bitmap_ind16 &bitmap, int priority, rectangle cliprect);
public:
required_device<cpu_device> m_maincpu; required_device<cpu_device> m_maincpu;
required_device<okim6258_device> m_okim6258; required_device<okim6258_device> m_okim6258;
}; };

2
src/mess/machine/apple3.c
View File

@ -328,7 +328,7 @@ static void apple3_update_memory(running_machine &machine)
apple3_state *state = machine.driver_data<apple3_state>(); apple3_state *state = machine.driver_data<apple3_state>();
UINT16 bank; UINT16 bank;
UINT8 page; UINT8 page;
address_space& space = machine.device("maincpu")->memory().space(AS_PROGRAM); address_space& space = state->m_maincpu->space(AS_PROGRAM);
if (LOG_MEMORY) if (LOG_MEMORY)
{ {

2
src/mess/machine/at.c
View File

@ -320,7 +320,7 @@ WRITE8_MEMBER( at_state::at_portb_w )
static void init_at_common(running_machine &machine) static void init_at_common(running_machine &machine)
{ {
at_state *state = machine.driver_data<at_state>(); at_state *state = machine.driver_data<at_state>();
address_space& space = machine.device("maincpu")->memory().space(AS_PROGRAM); address_space& space = state->m_maincpu->space(AS_PROGRAM);
// The CS4031 chipset does this itself // The CS4031 chipset does this itself
if (machine.device("cs4031") == NULL) if (machine.device("cs4031") == NULL)

2
src/mess/machine/b2m.c
View File

@ -44,7 +44,7 @@ static void b2m_set_bank(running_machine &machine,int bank)
{ {
UINT8 *rom; UINT8 *rom;
b2m_state *state = machine.driver_data<b2m_state>(); b2m_state *state = machine.driver_data<b2m_state>();
address_space &space = machine.device("maincpu")->memory().space(AS_PROGRAM); address_space &space = state->m_maincpu->space(AS_PROGRAM);
UINT8 *ram = machine.device<ram_device>(RAM_TAG)->pointer(); UINT8 *ram = machine.device<ram_device>(RAM_TAG)->pointer();
space.install_write_bank(0x0000, 0x27ff, "bank1"); space.install_write_bank(0x0000, 0x27ff, "bank1");

2
src/mess/machine/bbc.c
View File

@ -1548,7 +1548,7 @@ static void bbc_update_fdq_int(running_machine &machine, int state)
{ {
/* I'll pulse it because if I used hold-line I'm not sure /* I'll pulse it because if I used hold-line I'm not sure
it would clear - to be checked */ it would clear - to be checked */
machine.device("maincpu")->execute().set_input_line(INPUT_LINE_NMI,PULSE_LINE); drvstate->m_maincpu->set_input_line(INPUT_LINE_NMI,PULSE_LINE);
} }
} }

16
src/mess/machine/bebox.c
View File

@ -249,7 +249,7 @@ READ64_MEMBER(bebox_state::bebox_crossproc_interrupts_r )
result = m_crossproc_interrupts; result = m_crossproc_interrupts;
/* return a different result depending on which CPU is accessing this handler */ /* return a different result depending on which CPU is accessing this handler */
if (&space != &space.machine().device("ppc1")->memory().space(AS_PROGRAM)) if (&space != &m_ppc1->space(AS_PROGRAM))
result |= 0x02000000; result |= 0x02000000;
else else
result &= ~0x02000000; result &= ~0x02000000;
@ -307,7 +307,7 @@ WRITE64_MEMBER(bebox_state::bebox_processor_resets_w )
if (b & 0x20) if (b & 0x20)
{ {
space.machine().device("ppc2")->execute().set_input_line(INPUT_LINE_RESET, (b & 0x80) ? CLEAR_LINE : ASSERT_LINE); m_ppc2->set_input_line(INPUT_LINE_RESET, (b & 0x80) ? CLEAR_LINE : ASSERT_LINE);
} }
} }
@ -704,7 +704,7 @@ READ8_MEMBER(bebox_state::bebox_80000480_r)
WRITE_LINE_MEMBER(bebox_state::bebox_dma_hrq_changed) WRITE_LINE_MEMBER(bebox_state::bebox_dma_hrq_changed)
{ {
machine().device("ppc1")->execute().set_input_line(INPUT_LINE_HALT, state ? ASSERT_LINE : CLEAR_LINE); m_ppc1->set_input_line(INPUT_LINE_HALT, state ? ASSERT_LINE : CLEAR_LINE);
/* Assert HLDA */ /* Assert HLDA */
machine().device<i8237_device>("dma8237_1")->i8237_hlda_w( state ); machine().device<i8237_device>("dma8237_1")->i8237_hlda_w( state );
@ -986,7 +986,7 @@ void scsi53c810_pci_write(device_t *busdevice, device_t *device, int function, i
/* brutal ugly hack; at some point the PCI code should be handling this stuff */ /* brutal ugly hack; at some point the PCI code should be handling this stuff */
if (state->m_scsi53c810_data[5] != 0xFFFFFFF0) if (state->m_scsi53c810_data[5] != 0xFFFFFFF0)
{ {
address_space &space = device->machine().device("ppc1")->memory().space(AS_PROGRAM); address_space &space = state->m_ppc1->space(AS_PROGRAM);
addr = (state->m_scsi53c810_data[5] | 0xC0000000) & ~0xFF; addr = (state->m_scsi53c810_data[5] | 0xC0000000) & ~0xFF;
space.install_readwrite_handler(addr, addr + 0xFF, read64_delegate(FUNC(bebox_state::scsi53c810_r),state), write64_delegate(FUNC(bebox_state::scsi53c810_w),state)); space.install_readwrite_handler(addr, addr + 0xFF, read64_delegate(FUNC(bebox_state::scsi53c810_r),state), write64_delegate(FUNC(bebox_state::scsi53c810_w),state));
@ -1021,8 +1021,8 @@ void bebox_state::machine_reset()
machine().scheduler().timer_set(attotime::zero, timer_expired_delegate(FUNC(bebox_state::bebox_get_devices),this)); machine().scheduler().timer_set(attotime::zero, timer_expired_delegate(FUNC(bebox_state::bebox_get_devices),this));
machine().device("ppc1")->execute().set_input_line(INPUT_LINE_RESET, CLEAR_LINE); m_ppc1->set_input_line(INPUT_LINE_RESET, CLEAR_LINE);
machine().device("ppc2")->execute().set_input_line(INPUT_LINE_RESET, ASSERT_LINE); m_ppc2->set_input_line(INPUT_LINE_RESET, ASSERT_LINE);
memcpy(machine().device<fujitsu_29f016a_device>("flash")->space().get_read_ptr(0),memregion("user1")->base(),0x200000); memcpy(machine().device<fujitsu_29f016a_device>("flash")->space().get_read_ptr(0),memregion("user1")->base(),0x200000);
} }
@ -1036,8 +1036,8 @@ void bebox_state::machine_start()
DRIVER_INIT_MEMBER(bebox_state,bebox) DRIVER_INIT_MEMBER(bebox_state,bebox)
{ {
address_space &space_0 = machine().device("ppc1")->memory().space(AS_PROGRAM); address_space &space_0 = m_ppc1->space(AS_PROGRAM);
address_space &space_1 = machine().device("ppc2")->memory().space(AS_PROGRAM); address_space &space_1 = m_ppc2->space(AS_PROGRAM);
/* set up boot and flash ROM */ /* set up boot and flash ROM */
membank("bank2")->set_base(memregion("user2")->base()); membank("bank2")->set_base(memregion("user2")->base());

30
src/mess/machine/c65.c
View File

@ -46,7 +46,7 @@ static void c65_nmi( running_machine &machine )
if (state->m_nmilevel != (machine.root_device().ioport("SPECIAL")->read() & 0x80) || cia1irq) /* KEY_RESTORE */ if (state->m_nmilevel != (machine.root_device().ioport("SPECIAL")->read() & 0x80) || cia1irq) /* KEY_RESTORE */
{ {
machine.device("maincpu")->execute().set_input_line(INPUT_LINE_NMI, (machine.root_device().ioport("SPECIAL")->read() & 0x80) || cia1irq); state->m_maincpu->set_input_line(INPUT_LINE_NMI, (machine.root_device().ioport("SPECIAL")->read() & 0x80) || cia1irq);
state->m_nmilevel = (machine.root_device().ioport("SPECIAL")->read() & 0x80) || cia1irq; state->m_nmilevel = (machine.root_device().ioport("SPECIAL")->read() & 0x80) || cia1irq;
} }
@ -102,7 +102,7 @@ static void c65_irq( running_machine &machine, int level )
if (level != state->m_old_level) if (level != state->m_old_level)
{ {
DBG_LOG(machine, 3, "mos4510", ("irq %s\n", level ? "start" : "end")); DBG_LOG(machine, 3, "mos4510", ("irq %s\n", level ? "start" : "end"));
machine.device("maincpu")->execute().set_input_line(M4510_IRQ_LINE, level); state->m_maincpu->set_input_line(M4510_IRQ_LINE, level);
state->m_old_level = level; state->m_old_level = level;
} }
} }
@ -265,7 +265,7 @@ static void c65_dma_port_w( running_machine &machine, int offset, int value )
PAIR pair, src, dst, len; PAIR pair, src, dst, len;
UINT8 cmd, fill; UINT8 cmd, fill;
int i; int i;
address_space &space = machine.device("maincpu")->memory().space(AS_PROGRAM); address_space &space = state->m_maincpu->space(AS_PROGRAM);
switch (offset & 3) switch (offset & 3)
{ {
@ -788,13 +788,13 @@ void c65_bankswitch_interface( running_machine &machine, int value )
{ {
state->membank("bank8")->set_base(state->m_colorram + 0x400); state->membank("bank8")->set_base(state->m_colorram + 0x400);
state->membank("bank9")->set_base(state->m_colorram + 0x400); state->membank("bank9")->set_base(state->m_colorram + 0x400);
machine.device("maincpu")->memory().space(AS_PROGRAM).install_read_bank(0x0dc00, 0x0dfff, "bank8"); state->m_maincpu->space(AS_PROGRAM).install_read_bank(0x0dc00, 0x0dfff, "bank8");
machine.device("maincpu")->memory().space(AS_PROGRAM).install_write_bank(0x0dc00, 0x0dfff, "bank9"); state->m_maincpu->space(AS_PROGRAM).install_write_bank(0x0dc00, 0x0dfff, "bank9");
} }
else else
{ {
machine.device("maincpu")->memory().space(AS_PROGRAM).install_legacy_read_handler(0x0dc00, 0x0dfff, FUNC(c65_read_io_dc00)); state->m_maincpu->space(AS_PROGRAM).install_legacy_read_handler(0x0dc00, 0x0dfff, FUNC(c65_read_io_dc00));
machine.device("maincpu")->memory().space(AS_PROGRAM).install_legacy_write_handler(0x0dc00, 0x0dfff, FUNC(c65_write_io_dc00)); state->m_maincpu->space(AS_PROGRAM).install_legacy_write_handler(0x0dc00, 0x0dfff, FUNC(c65_write_io_dc00));
} }
} }
@ -864,18 +864,18 @@ void c65_bankswitch( running_machine &machine )
if (state->m_io_dc00_on) if (state->m_io_dc00_on)
{ {
machine.device("maincpu")->memory().space(AS_PROGRAM).install_legacy_read_handler(0x0dc00, 0x0dfff, FUNC(c65_read_io_dc00)); state->m_maincpu->space(AS_PROGRAM).install_legacy_read_handler(0x0dc00, 0x0dfff, FUNC(c65_read_io_dc00));
machine.device("maincpu")->memory().space(AS_PROGRAM).install_legacy_write_handler(0x0dc00, 0x0dfff, FUNC(c65_write_io_dc00)); state->m_maincpu->space(AS_PROGRAM).install_legacy_write_handler(0x0dc00, 0x0dfff, FUNC(c65_write_io_dc00));
} }
else else
{ {
machine.device("maincpu")->memory().space(AS_PROGRAM).install_read_bank(0x0dc00, 0x0dfff, "bank8"); state->m_maincpu->space(AS_PROGRAM).install_read_bank(0x0dc00, 0x0dfff, "bank8");
machine.device("maincpu")->memory().space(AS_PROGRAM).install_write_bank(0x0dc00, 0x0dfff, "bank9"); state->m_maincpu->space(AS_PROGRAM).install_write_bank(0x0dc00, 0x0dfff, "bank9");
state->membank("bank8")->set_base(state->m_colorram + 0x400); state->membank("bank8")->set_base(state->m_colorram + 0x400);
state->membank("bank9")->set_base(state->m_colorram + 0x400); state->membank("bank9")->set_base(state->m_colorram + 0x400);
} }
machine.device("maincpu")->memory().space(AS_PROGRAM).install_legacy_read_handler(0x0d000, 0x0d7ff, FUNC(c65_read_io)); state->m_maincpu->space(AS_PROGRAM).install_legacy_read_handler(0x0d000, 0x0d7ff, FUNC(c65_read_io));
machine.device("maincpu")->memory().space(AS_PROGRAM).install_legacy_write_handler(0x0d000, 0x0d7ff, FUNC(c65_write_io)); state->m_maincpu->space(AS_PROGRAM).install_legacy_write_handler(0x0d000, 0x0d7ff, FUNC(c65_write_io));
} }
else else
{ {
@ -895,8 +895,8 @@ void c65_bankswitch( running_machine &machine )
state->membank("bank6")->set_base(state->m_memory + 0xd800); state->membank("bank6")->set_base(state->m_memory + 0xd800);
state->membank("bank8")->set_base(state->m_memory + 0xdc00); state->membank("bank8")->set_base(state->m_memory + 0xdc00);
} }
machine.device("maincpu")->memory().space(AS_PROGRAM).install_read_bank(0x0d000, 0x0d7ff, "bank4"); state->m_maincpu->space(AS_PROGRAM).install_read_bank(0x0d000, 0x0d7ff, "bank4");
machine.device("maincpu")->memory().space(AS_PROGRAM).install_write_bank(0x0d000, 0x0d7ff, "bank5"); state->m_maincpu->space(AS_PROGRAM).install_write_bank(0x0d000, 0x0d7ff, "bank5");
} }
if (!state->m_game && state->m_exrom) if (!state->m_game && state->m_exrom)

4
src/mess/machine/compis.c
View File

@ -82,7 +82,7 @@ enum COMPIS_INTERRUPT_REQUESTS
#ifdef UNUSED_FUNCTION #ifdef UNUSED_FUNCTION
void compis_irq_set(UINT8 irq) void compis_irq_set(UINT8 irq)
{ {
machine.device("maincpu")->execute().set_input_line_and_vector(0, HOLD_LINE, irq); m_maincpu->set_input_line_and_vector(0, HOLD_LINE, irq);
} }
#endif #endif
@ -460,7 +460,7 @@ generate_int:
/* generate the appropriate interrupt */ /* generate the appropriate interrupt */
state->m_i186.intr.poll_status = 0x8000 | new_vector; state->m_i186.intr.poll_status = 0x8000 | new_vector;
if (!state->m_i186.intr.pending) if (!state->m_i186.intr.pending)
machine.device("maincpu")->execute().set_input_line(0, ASSERT_LINE); state->m_maincpu->set_input_line(0, ASSERT_LINE);
state->m_i186.intr.pending = 1; state->m_i186.intr.pending = 1;
machine.scheduler().trigger(CPU_RESUME_TRIGGER); machine.scheduler().trigger(CPU_RESUME_TRIGGER);
if (LOG_OPTIMIZATION) logerror(" - trigger due to interrupt pending\n"); if (LOG_OPTIMIZATION) logerror(" - trigger due to interrupt pending\n");

4
src/mess/machine/concept.c
View File

@ -120,10 +120,10 @@ static void concept_set_interrupt(running_machine &machine, int level, int state
if (final_level) if (final_level)
/* assert interrupt */ /* assert interrupt */
machine.device("maincpu")->execute().set_input_line_and_vector(M68K_IRQ_1 + final_level - 1, ASSERT_LINE, M68K_INT_ACK_AUTOVECTOR); drvstate->m_maincpu->set_input_line_and_vector(M68K_IRQ_1 + final_level - 1, ASSERT_LINE, M68K_INT_ACK_AUTOVECTOR);
else else
/* clear all interrupts */ /* clear all interrupts */
machine.device("maincpu")->execute().set_input_line_and_vector(M68K_IRQ_1, CLEAR_LINE, M68K_INT_ACK_AUTOVECTOR); drvstate->m_maincpu->set_input_line_and_vector(M68K_IRQ_1, CLEAR_LINE, M68K_INT_ACK_AUTOVECTOR);
} }
INLINE void post_in_KeyQueue(concept_state *state, int keycode) INLINE void post_in_KeyQueue(concept_state *state, int keycode)

5
src/mess/machine/dai.c
View File

@ -61,10 +61,11 @@ WRITE8_MEMBER(dai_state::dai_keyboard_w)
static TMS5501_IRQ_CALLBACK(dai_interrupt_callback) static TMS5501_IRQ_CALLBACK(dai_interrupt_callback)
{ {
dai_state *drvstate = device.machine().driver_data<dai_state>();
if (intreq) if (intreq)
device.machine().device("maincpu")->execute().set_input_line_and_vector(0, HOLD_LINE, vector); drvstate->m_maincpu->set_input_line_and_vector(0, HOLD_LINE, vector);
else else
device.machine().device("maincpu")->execute().set_input_line(0, CLEAR_LINE); drvstate->m_maincpu->set_input_line(0, CLEAR_LINE);
} }
TMS5501_INTERFACE( dai_tms5501_interface ) TMS5501_INTERFACE( dai_tms5501_interface )

4
src/mess/machine/electron.c
View File

@ -301,12 +301,12 @@ void electron_interrupt_handler(running_machine &machine, int mode, int interrup
if ( state->m_ula.interrupt_status & state->m_ula.interrupt_control & ~0x83 ) if ( state->m_ula.interrupt_status & state->m_ula.interrupt_control & ~0x83 )
{ {
state->m_ula.interrupt_status |= 0x01; state->m_ula.interrupt_status |= 0x01;
machine.device("maincpu")->execute().set_input_line(0, ASSERT_LINE ); state->m_maincpu->set_input_line(0, ASSERT_LINE );
} }
else else
{ {
state->m_ula.interrupt_status &= ~0x01; state->m_ula.interrupt_status &= ~0x01;
machine.device("maincpu")->execute().set_input_line(0, CLEAR_LINE ); state->m_maincpu->set_input_line(0, CLEAR_LINE );
} }
} }

78
src/mess/machine/galaxy.c
View File

@ -62,64 +62,64 @@ IRQ_CALLBACK_MEMBER(galaxy_state::galaxy_irq_callback)
static void galaxy_setup_snapshot (running_machine &machine, const UINT8 * data, UINT32 size) static void galaxy_setup_snapshot (running_machine &machine, const UINT8 * data, UINT32 size)
{ {
device_t *cpu = machine.device("maincpu"); galaxy_state *state = machine.driver_data<galaxy_state>();
switch (size) switch (size)
{ {
case GALAXY_SNAPSHOT_V1_SIZE: case GALAXY_SNAPSHOT_V1_SIZE:
cpu->state().set_state_int(Z80_AF, data[0x00] | data[0x01] << 8); state->m_maincpu->set_state_int(Z80_AF, data[0x00] | data[0x01] << 8);
cpu->state().set_state_int(Z80_BC, data[0x04] | data[0x05] << 8); state->m_maincpu->set_state_int(Z80_BC, data[0x04] | data[0x05] << 8);
cpu->state().set_state_int(Z80_DE, data[0x08] | data[0x09] << 8); state->m_maincpu->set_state_int(Z80_DE, data[0x08] | data[0x09] << 8);
cpu->state().set_state_int(Z80_HL, data[0x0c] | data[0x0d] << 8); state->m_maincpu->set_state_int(Z80_HL, data[0x0c] | data[0x0d] << 8);
cpu->state().set_state_int(Z80_IX, data[0x10] | data[0x11] << 8); state->m_maincpu->set_state_int(Z80_IX, data[0x10] | data[0x11] << 8);
cpu->state().set_state_int(Z80_IY, data[0x14] | data[0x15] << 8); state->m_maincpu->set_state_int(Z80_IY, data[0x14] | data[0x15] << 8);
cpu->state().set_state_int(Z80_PC, data[0x18] | data[0x19] << 8); state->m_maincpu->set_state_int(Z80_PC, data[0x18] | data[0x19] << 8);
cpu->state().set_state_int(Z80_SP, data[0x1c] | data[0x1d] << 8); state->m_maincpu->set_state_int(Z80_SP, data[0x1c] | data[0x1d] << 8);
cpu->state().set_state_int(Z80_AF2, data[0x20] | data[0x21] << 8); state->m_maincpu->set_state_int(Z80_AF2, data[0x20] | data[0x21] << 8);
cpu->state().set_state_int(Z80_BC2, data[0x24] | data[0x25] << 8); state->m_maincpu->set_state_int(Z80_BC2, data[0x24] | data[0x25] << 8);
cpu->state().set_state_int(Z80_DE2, data[0x28] | data[0x29] << 8); state->m_maincpu->set_state_int(Z80_DE2, data[0x28] | data[0x29] << 8);
cpu->state().set_state_int(Z80_HL2, data[0x2c] | data[0x2d] << 8); state->m_maincpu->set_state_int(Z80_HL2, data[0x2c] | data[0x2d] << 8);
cpu->state().set_state_int(Z80_IFF1, data[0x30]); state->m_maincpu->set_state_int(Z80_IFF1, data[0x30]);
cpu->state().set_state_int(Z80_IFF2, data[0x34]); state->m_maincpu->set_state_int(Z80_IFF2, data[0x34]);
cpu->state().set_state_int(Z80_HALT, data[0x38]); state->m_maincpu->set_state_int(Z80_HALT, data[0x38]);
cpu->state().set_state_int(Z80_IM, data[0x3c]); state->m_maincpu->set_state_int(Z80_IM, data[0x3c]);
cpu->state().set_state_int(Z80_I, data[0x40]); state->m_maincpu->set_state_int(Z80_I, data[0x40]);
cpu->state().set_state_int(Z80_R, (data[0x44] & 0x7f) | (data[0x48] & 0x80)); state->m_maincpu->set_state_int(Z80_R, (data[0x44] & 0x7f) | (data[0x48] & 0x80));
memcpy (machine.device<ram_device>(RAM_TAG)->pointer(), data + 0x084c, (machine.device<ram_device>(RAM_TAG)->size() < 0x1800) ? machine.device<ram_device>(RAM_TAG)->size() : 0x1800); memcpy (machine.device<ram_device>(RAM_TAG)->pointer(), data + 0x084c, (machine.device<ram_device>(RAM_TAG)->size() < 0x1800) ? machine.device<ram_device>(RAM_TAG)->size() : 0x1800);
break; break;
case GALAXY_SNAPSHOT_V2_SIZE: case GALAXY_SNAPSHOT_V2_SIZE:
cpu->state().set_state_int(Z80_AF, data[0x00] | data[0x01] << 8); state->m_maincpu->set_state_int(Z80_AF, data[0x00] | data[0x01] << 8);
cpu->state().set_state_int(Z80_BC, data[0x02] | data[0x03] << 8); state->m_maincpu->set_state_int(Z80_BC, data[0x02] | data[0x03] << 8);
cpu->state().set_state_int(Z80_DE, data[0x04] | data[0x05] << 8); state->m_maincpu->set_state_int(Z80_DE, data[0x04] | data[0x05] << 8);
cpu->state().set_state_int(Z80_HL, data[0x06] | data[0x07] << 8); state->m_maincpu->set_state_int(Z80_HL, data[0x06] | data[0x07] << 8);
cpu->state().set_state_int(Z80_IX, data[0x08] | data[0x09] << 8); state->m_maincpu->set_state_int(Z80_IX, data[0x08] | data[0x09] << 8);
cpu->state().set_state_int(Z80_IY, data[0x0a] | data[0x0b] << 8); state->m_maincpu->set_state_int(Z80_IY, data[0x0a] | data[0x0b] << 8);
cpu->state().set_state_int(Z80_PC, data[0x0c] | data[0x0d] << 8); state->m_maincpu->set_state_int(Z80_PC, data[0x0c] | data[0x0d] << 8);
cpu->state().set_state_int(Z80_SP, data[0x0e] | data[0x0f] << 8); state->m_maincpu->set_state_int(Z80_SP, data[0x0e] | data[0x0f] << 8);
cpu->state().set_state_int(Z80_AF2, data[0x10] | data[0x11] << 8); state->m_maincpu->set_state_int(Z80_AF2, data[0x10] | data[0x11] << 8);
cpu->state().set_state_int(Z80_BC2, data[0x12] | data[0x13] << 8); state->m_maincpu->set_state_int(Z80_BC2, data[0x12] | data[0x13] << 8);
cpu->state().set_state_int(Z80_DE2, data[0x14] | data[0x15] << 8); state->m_maincpu->set_state_int(Z80_DE2, data[0x14] | data[0x15] << 8);
cpu->state().set_state_int(Z80_HL2, data[0x16] | data[0x17] << 8); state->m_maincpu->set_state_int(Z80_HL2, data[0x16] | data[0x17] << 8);
cpu->state().set_state_int(Z80_IFF1, data[0x18] & 0x01); state->m_maincpu->set_state_int(Z80_IFF1, data[0x18] & 0x01);
cpu->state().set_state_int(Z80_IFF2, (UINT64)0); state->m_maincpu->set_state_int(Z80_IFF2, (UINT64)0);
cpu->state().set_state_int(Z80_HALT, (UINT64)0); state->m_maincpu->set_state_int(Z80_HALT, (UINT64)0);
cpu->state().set_state_int(Z80_IM, (data[0x18] >> 1) & 0x03); state->m_maincpu->set_state_int(Z80_IM, (data[0x18] >> 1) & 0x03);
cpu->state().set_state_int(Z80_I, data[0x19]); state->m_maincpu->set_state_int(Z80_I, data[0x19]);
cpu->state().set_state_int(Z80_R, data[0x1a]); state->m_maincpu->set_state_int(Z80_R, data[0x1a]);
memcpy (machine.device<ram_device>(RAM_TAG)->pointer(), data + 0x0834, (machine.device<ram_device>(RAM_TAG)->size() < 0x1800) ? machine.device<ram_device>(RAM_TAG)->size() : 0x1800); memcpy (machine.device<ram_device>(RAM_TAG)->pointer(), data + 0x0834, (machine.device<ram_device>(RAM_TAG)->size() < 0x1800) ? machine.device<ram_device>(RAM_TAG)->size() : 0x1800);
break; break;
} }
cpu->execute().set_input_line(INPUT_LINE_NMI, CLEAR_LINE); state->m_maincpu->set_input_line(INPUT_LINE_NMI, CLEAR_LINE);
cpu->execute().set_input_line(INPUT_LINE_IRQ0, CLEAR_LINE); state->m_maincpu->set_input_line(INPUT_LINE_IRQ0, CLEAR_LINE);
} }
SNAPSHOT_LOAD( galaxy ) SNAPSHOT_LOAD( galaxy )

4
src/mess/machine/hec2hrp.c
View File

@ -867,14 +867,14 @@ void hector_reset(running_machine &machine, int hr, int with_D2 )
state->m_hector_flag_hr = hr; state->m_hector_flag_hr = hr;
state->m_flag_clk = 0; state->m_flag_clk = 0;
state->m_write_cassette = 0; state->m_write_cassette = 0;
machine.device("maincpu" )->execute().set_input_line(INPUT_LINE_RESET, PULSE_LINE); state->m_maincpu->set_input_line(INPUT_LINE_RESET, PULSE_LINE);
// Initialization Disc II // Initialization Disc II
if (with_D2==1) if (with_D2==1)
{ {
upd765a_device *fdc = machine.device<upd765a_device>("upd765"); upd765a_device *fdc = machine.device<upd765a_device>("upd765");
machine.device("disc2cpu")->execute().set_input_line(INPUT_LINE_RESET, PULSE_LINE); state->m_disc2cpu->set_input_line(INPUT_LINE_RESET, PULSE_LINE);
fdc->reset(); fdc->reset();
} }
} }

10
src/mess/machine/hecdisk2.c
View File

@ -56,14 +56,14 @@ void hector_disc2_init( running_machine &machine)
void hec2hrp_state::disc2_fdc_interrupt(bool state) void hec2hrp_state::disc2_fdc_interrupt(bool state)
{ {
m_IRQ_current_state = state; m_IRQ_current_state = state;
machine().device("disc2cpu")->execute().set_input_line(INPUT_LINE_IRQ0, state && m_hector_disc2_RNMI ? ASSERT_LINE : CLEAR_LINE); m_disc2cpu->set_input_line(INPUT_LINE_IRQ0, state && m_hector_disc2_RNMI ? ASSERT_LINE : CLEAR_LINE);
} }
/* upd765 DRQ is connected to NMI of Z80 within a RNMI hardware authorization */ /* upd765 DRQ is connected to NMI of Z80 within a RNMI hardware authorization */
void hec2hrp_state::disc2_fdc_dma_irq(bool state) void hec2hrp_state::disc2_fdc_dma_irq(bool state)
{ {
m_NMI_current_state = state; m_NMI_current_state = state;
machine().device("disc2cpu")->execute().set_input_line(INPUT_LINE_NMI, state && m_hector_disc2_RNMI ? ASSERT_LINE : CLEAR_LINE); m_disc2cpu->set_input_line(INPUT_LINE_NMI, state && m_hector_disc2_RNMI ? ASSERT_LINE : CLEAR_LINE);
} }
// RESET the disc2 Unit ! // RESET the disc2 Unit !
@ -71,7 +71,7 @@ void hector_disc2_reset(running_machine &machine)
{ {
hec2hrp_state *state = machine.driver_data<hec2hrp_state>(); hec2hrp_state *state = machine.driver_data<hec2hrp_state>();
// Initialization Disc2 unit // Initialization Disc2 unit
machine.device("disc2cpu")->execute().set_input_line(INPUT_LINE_RESET, PULSE_LINE); state->m_disc2cpu->set_input_line(INPUT_LINE_RESET, PULSE_LINE);
machine.device<upd765a_device>("upd765")->reset(); machine.device<upd765a_device>("upd765")->reset();
// Select ROM memory to cold restart // Select ROM memory to cold restart
state->membank("bank3")->set_entry(DISCII_BANK_ROM); state->membank("bank3")->set_entry(DISCII_BANK_ROM);
@ -157,6 +157,6 @@ WRITE8_HANDLER( hector_disc2_io50_port_w) /* I/O Port to the stuff of Disc2*/
/* Authorization interrupt and NMI with RNMI signal*/ /* Authorization interrupt and NMI with RNMI signal*/
state->m_hector_disc2_RNMI = BIT(data, 5); state->m_hector_disc2_RNMI = BIT(data, 5);
space.machine().device("disc2cpu")->execute().set_input_line(INPUT_LINE_IRQ0, state->m_IRQ_current_state && state->m_hector_disc2_RNMI ? ASSERT_LINE : CLEAR_LINE); state->m_disc2cpu->set_input_line(INPUT_LINE_IRQ0, state->m_IRQ_current_state && state->m_hector_disc2_RNMI ? ASSERT_LINE : CLEAR_LINE);
space.machine().device("disc2cpu")->execute().set_input_line(INPUT_LINE_NMI, state->m_NMI_current_state && state->m_hector_disc2_RNMI ? ASSERT_LINE : CLEAR_LINE); state->m_disc2cpu->set_input_line(INPUT_LINE_NMI, state->m_NMI_current_state && state->m_hector_disc2_RNMI ? ASSERT_LINE : CLEAR_LINE);
} }

5
src/mess/machine/hp48.c
View File

@ -82,8 +82,9 @@ static const UINT8 hp48_module_addr_id[6] = { 0x19, 0xf4, 0xf6, 0xf8, 0xf2, 0x00
static void hp48_pulse_irq( running_machine &machine, int irq_line) static void hp48_pulse_irq( running_machine &machine, int irq_line)
{ {
machine.device("maincpu")->execute().set_input_line(irq_line, ASSERT_LINE ); hp48_state *state = machine.driver_data<hp48_state>();
machine.device("maincpu")->execute().set_input_line(irq_line, CLEAR_LINE ); state->m_maincpu->set_input_line(irq_line, ASSERT_LINE );
state->m_maincpu->set_input_line(irq_line, CLEAR_LINE );
} }

2
src/mess/machine/lisa.c
View File

@ -1004,7 +1004,7 @@ void lisa_state::machine_reset()
m_rom_ptr = memregion("maincpu")->base() + ROM_OFFSET; m_rom_ptr = memregion("maincpu")->base() + ROM_OFFSET;
m_videoROM_ptr = memregion("gfx1")->base(); m_videoROM_ptr = memregion("gfx1")->base();
// m_maincpu->memory().space(AS_PROGRAM).set_direct_update_handler(direct_update_delegate_create_static(lisa_OPbaseoverride, *machine())); // m_maincpu->space(AS_PROGRAM).set_direct_update_handler(direct_update_delegate_create_static(lisa_OPbaseoverride, *machine()));
// m68k_set_reset_callback(m_maincpu, /*lisa_reset_instr_callback*/NULL); // m68k_set_reset_callback(m_maincpu, /*lisa_reset_instr_callback*/NULL);
/* init MMU */ /* init MMU */

6
src/mess/machine/lynx.c
View File

@ -702,7 +702,7 @@ static void lynx_blitter(running_machine &machine)
int i; int colors; int i; int colors;
state->m_blitter.mem = (UINT8*)machine.device("maincpu")->memory().space(AS_PROGRAM).get_read_ptr(0x0000); state->m_blitter.mem = (UINT8*)state->m_maincpu->space(AS_PROGRAM).get_read_ptr(0x0000);
state->m_blitter.busy = 1; // blitter working state->m_blitter.busy = 1; // blitter working
state->m_blitter.memory_accesses = 0; state->m_blitter.memory_accesses = 0;
@ -1408,8 +1408,8 @@ static void lynx_timer_signal_irq(running_machine &machine, int which)
if ( ( state->m_timer[which].cntrl1 & 0x80 ) && ( which != 4 ) ) // if interrupts are enabled and timer != 4 if ( ( state->m_timer[which].cntrl1 & 0x80 ) && ( which != 4 ) ) // if interrupts are enabled and timer != 4
{ {
state->m_mikey.data[0x81] |= ( 1 << which ); // set interupt poll register state->m_mikey.data[0x81] |= ( 1 << which ); // set interupt poll register
machine.device("maincpu")->execute().set_input_line(INPUT_LINE_HALT, CLEAR_LINE); state->m_maincpu->set_input_line(INPUT_LINE_HALT, CLEAR_LINE);
machine.device("maincpu")->execute().set_input_line(M65SC02_IRQ_LINE, ASSERT_LINE); state->m_maincpu->set_input_line(M65SC02_IRQ_LINE, ASSERT_LINE);
} }
switch ( which ) // count down linked timers switch ( which ) // count down linked timers
{ {

2
src/mess/machine/mac.c
View File

@ -2063,7 +2063,7 @@ static void mac_driver_init(running_machine &machine, model_t model)
(model == MODEL_MAC_LC_II) || (model == MODEL_MAC_LC_III) || (model == MODEL_MAC_LC_III_PLUS) || ((mac->m_model >= MODEL_MAC_II) && (mac->m_model <= MODEL_MAC_SE30)) || (model == MODEL_MAC_LC_II) || (model == MODEL_MAC_LC_III) || (model == MODEL_MAC_LC_III_PLUS) || ((mac->m_model >= MODEL_MAC_II) && (mac->m_model <= MODEL_MAC_SE30)) ||
(model == MODEL_MAC_PORTABLE) || (model == MODEL_MAC_PB100) || (model == MODEL_MAC_PB140) || (model == MODEL_MAC_PB160) || (model == MODEL_MAC_PBDUO_210) || (model >= MODEL_MAC_QUADRA_700 && model <= MODEL_MAC_QUADRA_800)) (model == MODEL_MAC_PORTABLE) || (model == MODEL_MAC_PB100) || (model == MODEL_MAC_PB140) || (model == MODEL_MAC_PB160) || (model == MODEL_MAC_PBDUO_210) || (model >= MODEL_MAC_QUADRA_700 && model <= MODEL_MAC_QUADRA_800))
{ {
machine.device("maincpu")->memory().space(AS_PROGRAM).set_direct_update_handler(direct_update_delegate(FUNC(mac_state::overlay_opbaseoverride), mac)); mac->m_maincpu->space(AS_PROGRAM).set_direct_update_handler(direct_update_delegate(FUNC(mac_state::overlay_opbaseoverride), mac));
} }
/* setup keyboard */ /* setup keyboard */

4
src/mess/machine/mbc55x.c
View File

@ -338,7 +338,7 @@ WRITE8_MEMBER(mbc55x_state::mbc55x_kb_usart_w)
static void set_ram_size(running_machine &machine) static void set_ram_size(running_machine &machine)
{ {
mbc55x_state *state = machine.driver_data<mbc55x_state>(); mbc55x_state *state = machine.driver_data<mbc55x_state>();
address_space &space = machine.device( MAINCPU_TAG)->memory().space( AS_PROGRAM ); address_space &space = state->m_maincpu->space( AS_PROGRAM );
int ramsize = state->m_ram->size(); int ramsize = state->m_ram->size();
int nobanks = ramsize / RAM_BANK_SIZE; int nobanks = ramsize / RAM_BANK_SIZE;
char bank[10]; char bank[10];
@ -387,7 +387,7 @@ void mbc55x_state::machine_reset()
{ {
set_ram_size(machine()); set_ram_size(machine());
keyboard_reset(machine()); keyboard_reset(machine());
machine().device(MAINCPU_TAG)->execute().set_irq_acknowledge_callback(device_irq_acknowledge_delegate(FUNC(mbc55x_state::mbc55x_irq_callback),this)); m_maincpu->set_irq_acknowledge_callback(device_irq_acknowledge_delegate(FUNC(mbc55x_state::mbc55x_irq_callback),this));
} }
void mbc55x_state::machine_start() void mbc55x_state::machine_start()

4
src/mess/machine/microtan.c
View File

@ -150,7 +150,7 @@ static void microtan_set_irq_line(running_machine &machine)
/* The 6502 IRQ line is active low and probably driven /* The 6502 IRQ line is active low and probably driven
by open collector outputs (guess). Since MAME/MESS use by open collector outputs (guess). Since MAME/MESS use
a non-0 value for ASSERT_LINE we OR the signals here */ a non-0 value for ASSERT_LINE we OR the signals here */
machine.device("maincpu")->execute().set_input_line(0, state->m_via_0_irq_line | state->m_via_1_irq_line | state->m_kbd_irq_line); state->m_maincpu->set_input_line(0, state->m_via_0_irq_line | state->m_via_1_irq_line | state->m_kbd_irq_line);
} }
static cassette_image_device *cassette_device_image(running_machine &machine) static cassette_image_device *cassette_device_image(running_machine &machine)
@ -779,7 +779,7 @@ static void microtan_snapshot_copy(running_machine &machine, UINT8 *snapshot_buf
{ {
microtan_state *state = machine.driver_data<microtan_state>(); microtan_state *state = machine.driver_data<microtan_state>();
UINT8 *RAM = state->memregion("maincpu")->base(); UINT8 *RAM = state->memregion("maincpu")->base();
address_space &space = machine.device("maincpu")->memory().space(AS_PROGRAM); address_space &space = state->m_maincpu->space(AS_PROGRAM);
via6522_device *via_0 = machine.device<via6522_device>("via6522_0"); via6522_device *via_0 = machine.device<via6522_device>("via6522_0");
via6522_device *via_1 = machine.device<via6522_device>("via6522_1"); via6522_device *via_1 = machine.device<via6522_device>("via6522_1");
device_t *ay8910 = machine.device("ay8910.1"); device_t *ay8910 = machine.device("ay8910.1");

2
src/mess/machine/mtx.c
View File

@ -74,7 +74,7 @@ static void bankswitch(running_machine &machine, UINT8 data)
*/ */
mtx_state *state = machine.driver_data<mtx_state>(); mtx_state *state = machine.driver_data<mtx_state>();
address_space &program = machine.device(Z80_TAG)->memory().space(AS_PROGRAM); address_space &program = state->m_maincpu->space(AS_PROGRAM);
ram_device *messram = machine.device<ram_device>(RAM_TAG); ram_device *messram = machine.device<ram_device>(RAM_TAG);
// UINT8 cbm_mode = data >> 7 & 0x01; // UINT8 cbm_mode = data >> 7 & 0x01;

3
src/mess/machine/mz700.c
View File

@ -534,7 +534,8 @@ WRITE8_MEMBER(mz_state::pio_port_c_w)
static void mz800_z80pio_irq(device_t *device, int which) static void mz800_z80pio_irq(device_t *device, int which)
{ {
device->machine().device("maincpu")->execute().set_input_line(0, which); mz_state *state = device->machine().driver_data<mz_state>();
state->m_maincpu->set_input_line(0, which);
} }
READ8_MEMBER(mz_state::mz800_z80pio_port_a_r) READ8_MEMBER(mz_state::mz800_z80pio_port_a_r)

2
src/mess/machine/nes.c
View File

@ -33,7 +33,7 @@
void nes_state::init_nes_core() void nes_state::init_nes_core()
{ {
address_space &space = machine().device("maincpu")->memory().space(AS_PROGRAM); address_space &space = m_maincpu->space(AS_PROGRAM);
static const char *const bank_names[] = { "bank1", "bank2", "bank3", "bank4" }; static const char *const bank_names[] = { "bank1", "bank2", "bank3", "bank4" };
int i; int i;
m_prg_chunks = 0; m_prg_chunks = 0;

4
src/mess/machine/partner.c
View File

@ -126,7 +126,7 @@ WRITE8_MEMBER(partner_state::partner_floppy_w){
static void partner_iomap_bank(running_machine &machine,UINT8 *rom) static void partner_iomap_bank(running_machine &machine,UINT8 *rom)
{ {
partner_state *state = machine.driver_data<partner_state>(); partner_state *state = machine.driver_data<partner_state>();
address_space &space = machine.device("maincpu")->memory().space(AS_PROGRAM); address_space &space = state->m_maincpu->space(AS_PROGRAM);
switch(state->m_win_mem_page) { switch(state->m_win_mem_page) {
case 2 : case 2 :
// FDD // FDD
@ -144,7 +144,7 @@ static void partner_iomap_bank(running_machine &machine,UINT8 *rom)
static void partner_bank_switch(running_machine &machine) static void partner_bank_switch(running_machine &machine)
{ {
partner_state *state = machine.driver_data<partner_state>(); partner_state *state = machine.driver_data<partner_state>();
address_space &space = machine.device("maincpu")->memory().space(AS_PROGRAM); address_space &space = state->m_maincpu->space(AS_PROGRAM);
UINT8 *rom = state->memregion("maincpu")->base(); UINT8 *rom = state->memregion("maincpu")->base();
UINT8 *ram = machine.device<ram_device>(RAM_TAG)->pointer(); UINT8 *ram = machine.device<ram_device>(RAM_TAG)->pointer();

4
src/mess/machine/pce.c
View File

@ -1088,11 +1088,11 @@ static void pce_cd_set_irq_line( running_machine &machine, int num, int state )
if ( pce_cd.regs[0x02] & pce_cd.regs[0x03] & 0x7c ) if ( pce_cd.regs[0x02] & pce_cd.regs[0x03] & 0x7c )
{ {
//printf("IRQ PEND = %02x MASK = %02x IRQ ENABLE %02X\n",pce_cd.regs[0x02] & pce_cd.regs[0x03] & 0x7c,pce_cd.regs[0x02] & 0x7c,pce_cd.regs[0x03] & 0x7c); //printf("IRQ PEND = %02x MASK = %02x IRQ ENABLE %02X\n",pce_cd.regs[0x02] & pce_cd.regs[0x03] & 0x7c,pce_cd.regs[0x02] & 0x7c,pce_cd.regs[0x03] & 0x7c);
machine.device("maincpu")->execute().set_input_line(1, ASSERT_LINE ); drvstate->m_maincpu->set_input_line(1, ASSERT_LINE );
} }
else else
{ {
machine.device("maincpu")->execute().set_input_line(1, CLEAR_LINE ); drvstate->m_maincpu->set_input_line(1, CLEAR_LINE );
} }
} }

2
src/mess/machine/pp01.c
View File

@ -85,7 +85,7 @@ static void pp01_set_memory(running_machine &machine,UINT8 block, UINT8 data)
{ {
pp01_state *state = machine.driver_data<pp01_state>(); pp01_state *state = machine.driver_data<pp01_state>();
UINT8 *mem = state->memregion("maincpu")->base(); UINT8 *mem = state->memregion("maincpu")->base();
address_space &space = machine.device("maincpu")->memory().space(AS_PROGRAM); address_space &space = state->m_maincpu->space(AS_PROGRAM);
UINT16 startaddr = block*0x1000; UINT16 startaddr = block*0x1000;
UINT16 endaddr = ((block+1)*0x1000)-1; UINT16 endaddr = ((block+1)*0x1000)-1;
UINT8 blocknum = block + 1; UINT8 blocknum = block + 1;

38
src/mess/machine/primo.c
View File

@ -46,7 +46,7 @@ INTERRUPT_GEN_MEMBER(primo_state::primo_vblank_interrupt)
static void primo_update_memory(running_machine &machine) static void primo_update_memory(running_machine &machine)
{ {
primo_state *state = machine.driver_data<primo_state>(); primo_state *state = machine.driver_data<primo_state>();
address_space& space = machine.device("maincpu")->memory().space(AS_PROGRAM); address_space& space = state->m_maincpu->space(AS_PROGRAM);
switch (state->m_port_FD & 0x03) switch (state->m_port_FD & 0x03)
{ {
case 0x00: /* Original ROM */ case 0x00: /* Original ROM */
@ -269,20 +269,20 @@ static void primo_setup_pss (running_machine &machine, UINT8* snapshot_data, UIN
/* Z80 registers */ /* Z80 registers */
machine.device("maincpu")->state().set_state_int(Z80_BC, snapshot_data[4] + snapshot_data[5]*256); state->m_maincpu->set_state_int(Z80_BC, snapshot_data[4] + snapshot_data[5]*256);
machine.device("maincpu")->state().set_state_int(Z80_DE, snapshot_data[6] + snapshot_data[7]*256); state->m_maincpu->set_state_int(Z80_DE, snapshot_data[6] + snapshot_data[7]*256);
machine.device("maincpu")->state().set_state_int(Z80_HL, snapshot_data[8] + snapshot_data[9]*256); state->m_maincpu->set_state_int(Z80_HL, snapshot_data[8] + snapshot_data[9]*256);
machine.device("maincpu")->state().set_state_int(Z80_AF, snapshot_data[10] + snapshot_data[11]*256); state->m_maincpu->set_state_int(Z80_AF, snapshot_data[10] + snapshot_data[11]*256);
machine.device("maincpu")->state().set_state_int(Z80_BC2, snapshot_data[12] + snapshot_data[13]*256); state->m_maincpu->set_state_int(Z80_BC2, snapshot_data[12] + snapshot_data[13]*256);
machine.device("maincpu")->state().set_state_int(Z80_DE2, snapshot_data[14] + snapshot_data[15]*256); state->m_maincpu->set_state_int(Z80_DE2, snapshot_data[14] + snapshot_data[15]*256);
machine.device("maincpu")->state().set_state_int(Z80_HL2, snapshot_data[16] + snapshot_data[17]*256); state->m_maincpu->set_state_int(Z80_HL2, snapshot_data[16] + snapshot_data[17]*256);
machine.device("maincpu")->state().set_state_int(Z80_AF2, snapshot_data[18] + snapshot_data[19]*256); state->m_maincpu->set_state_int(Z80_AF2, snapshot_data[18] + snapshot_data[19]*256);
machine.device("maincpu")->state().set_state_int(Z80_PC, snapshot_data[20] + snapshot_data[21]*256); state->m_maincpu->set_state_int(Z80_PC, snapshot_data[20] + snapshot_data[21]*256);
machine.device("maincpu")->state().set_state_int(Z80_SP, snapshot_data[22] + snapshot_data[23]*256); state->m_maincpu->set_state_int(Z80_SP, snapshot_data[22] + snapshot_data[23]*256);
machine.device("maincpu")->state().set_state_int(Z80_I, snapshot_data[24]); state->m_maincpu->set_state_int(Z80_I, snapshot_data[24]);
machine.device("maincpu")->state().set_state_int(Z80_R, snapshot_data[25]); state->m_maincpu->set_state_int(Z80_R, snapshot_data[25]);
machine.device("maincpu")->state().set_state_int(Z80_IX, snapshot_data[26] + snapshot_data[27]*256); state->m_maincpu->set_state_int(Z80_IX, snapshot_data[26] + snapshot_data[27]*256);
machine.device("maincpu")->state().set_state_int(Z80_IY, snapshot_data[28] + snapshot_data[29]*256); state->m_maincpu->set_state_int(Z80_IY, snapshot_data[28] + snapshot_data[29]*256);
/* IO ports */ /* IO ports */
@ -297,7 +297,7 @@ static void primo_setup_pss (running_machine &machine, UINT8* snapshot_data, UIN
/* memory */ /* memory */
for (i=0; i<0xc000; i++) for (i=0; i<0xc000; i++)
machine.device("maincpu")->memory().space(AS_PROGRAM).write_byte( i+0x4000, snapshot_data[i+38]); state->m_maincpu->space(AS_PROGRAM).write_byte( i+0x4000, snapshot_data[i+38]);
} }
SNAPSHOT_LOAD( primo ) SNAPSHOT_LOAD( primo )
@ -336,6 +336,8 @@ static void primo_setup_pp (running_machine &machine,UINT8* quickload_data, UINT
{ {
int i; int i;
primo_state *state = machine.driver_data<primo_state>();
UINT16 load_addr; UINT16 load_addr;
UINT16 start_addr; UINT16 start_addr;
@ -343,9 +345,9 @@ static void primo_setup_pp (running_machine &machine,UINT8* quickload_data, UINT
start_addr = quickload_data[2] + quickload_data[3]*256; start_addr = quickload_data[2] + quickload_data[3]*256;
for (i=4; i<quickload_size; i++) for (i=4; i<quickload_size; i++)
machine.device("maincpu")->memory().space(AS_PROGRAM).write_byte(start_addr+i-4, quickload_data[i]); state->m_maincpu->space(AS_PROGRAM).write_byte(start_addr+i-4, quickload_data[i]);
machine.device("maincpu")->state().set_state_int(Z80_PC, start_addr); state->m_maincpu->set_state_int(Z80_PC, start_addr);
logerror ("Quickload .pp l: %04x r: %04x s: %04x\n", load_addr, start_addr, quickload_size-4); logerror ("Quickload .pp l: %04x r: %04x s: %04x\n", load_addr, start_addr, quickload_size-4);
} }

3
src/mess/machine/svi318.c
View File

@ -388,7 +388,8 @@ MACHINE_RESET_MEMBER(svi318_state,svi328_806)
void svi318_vdp_interrupt(running_machine &machine, int i) void svi318_vdp_interrupt(running_machine &machine, int i)
{ {
machine.device("maincpu")->execute().set_input_line(0, (i ? HOLD_LINE : CLEAR_LINE)); svi318_state *drvstate = machine.driver_data<svi318_state>();
drvstate->m_maincpu->set_input_line(0, (i ? HOLD_LINE : CLEAR_LINE));
} }

2
src/mess/machine/vtech2.c
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@ -89,7 +89,7 @@ static void laser_machine_init(running_machine &machine, int bank_mask, int vide
logerror("laser_machine_init(): bank mask $%04X, video %d [$%05X]\n", state->m_laser_bank_mask, state->m_laser_video_bank, state->m_laser_video_bank * 0x04000); logerror("laser_machine_init(): bank mask $%04X, video %d [$%05X]\n", state->m_laser_bank_mask, state->m_laser_video_bank, state->m_laser_video_bank * 0x04000);
for (i = 0; i < ARRAY_LENGTH(state->m_laser_bank); i++) for (i = 0; i < ARRAY_LENGTH(state->m_laser_bank); i++)
state->laser_bank_select_w(machine.device("maincpu")->memory().space(AS_PROGRAM), i, 0); state->laser_bank_select_w(state->m_maincpu->space(AS_PROGRAM), i, 0);
} }
void vtech2_state::machine_reset() void vtech2_state::machine_reset()

2
src/mess/machine/x1.c
View File

@ -53,7 +53,7 @@ int x1_keyboard_device::z80daisy_irq_ack()
{ {
x1_state *state = machine().driver_data<x1_state>(); x1_state *state = machine().driver_data<x1_state>();
state->m_key_irq_flag = 0; state->m_key_irq_flag = 0;
device().machine().device("x1_cpu")->execute().set_input_line(INPUT_LINE_IRQ0,CLEAR_LINE); state->m_x1_cpu->set_input_line(INPUT_LINE_IRQ0,CLEAR_LINE);
return state->m_key_irq_vector; return state->m_key_irq_vector;
} }

2
src/mess/video/apple3.c
View File

@ -40,7 +40,7 @@ static const UINT32 text_map[] =
void apple3_write_charmem(running_machine &machine) void apple3_write_charmem(running_machine &machine)
{ {
apple3_state *state = machine.driver_data<apple3_state>(); apple3_state *state = machine.driver_data<apple3_state>();
address_space& space = machine.device("maincpu")->memory().space(AS_PROGRAM); address_space& space = state->m_maincpu->space(AS_PROGRAM);
static const UINT32 screen_hole_map[] = static const UINT32 screen_hole_map[] =
{ {
0x478, 0x4f8, 0x578, 0x5f8, 0x678, 0x6f8, 0x778, 0x7f8 0x478, 0x4f8, 0x578, 0x5f8, 0x678, 0x6f8, 0x778, 0x7f8

8
src/mess/video/fm7.c
View File

@ -39,9 +39,9 @@ WRITE8_MEMBER(fm7_state::fm7_subintf_w)
if(data & 0x80) if(data & 0x80)
m_video.sub_busy = data & 0x80; m_video.sub_busy = data & 0x80;
machine().device("sub")->execute().set_input_line(INPUT_LINE_HALT,(data & 0x80) ? ASSERT_LINE : CLEAR_LINE); m_sub->set_input_line(INPUT_LINE_HALT,(data & 0x80) ? ASSERT_LINE : CLEAR_LINE);
if(data & 0x40) if(data & 0x40)
machine().device("sub")->execute().set_input_line(M6809_IRQ_LINE,ASSERT_LINE); m_sub->set_input_line(M6809_IRQ_LINE,ASSERT_LINE);
//popmessage("Sub CPU Interface write: %02x\n",data); //popmessage("Sub CPU Interface write: %02x\n",data);
} }
@ -63,7 +63,7 @@ WRITE8_MEMBER(fm7_state::fm7_sub_busyflag_w)
*/ */
READ8_MEMBER(fm7_state::fm7_cancel_ack) READ8_MEMBER(fm7_state::fm7_cancel_ack)
{ {
machine().device("sub")->execute().set_input_line(M6809_IRQ_LINE,CLEAR_LINE); m_sub->set_input_line(M6809_IRQ_LINE,CLEAR_LINE);
return 0x00; return 0x00;
} }
@ -1176,7 +1176,7 @@ WRITE8_MEMBER(fm7_state::fm77av_sub_bank_w)
break; break;
} }
// reset sub CPU, set busy flag, set reset flag // reset sub CPU, set busy flag, set reset flag
machine().device("sub")->execute().set_input_line(INPUT_LINE_RESET,PULSE_LINE); m_sub->set_input_line(INPUT_LINE_RESET,PULSE_LINE);
m_video.sub_busy = 0x80; m_video.sub_busy = 0x80;
m_video.sub_halt = 0; m_video.sub_halt = 0;
m_video.sub_reset = 1; m_video.sub_reset = 1;

2
src/mess/video/primo.c
View File

@ -23,7 +23,7 @@ static void primo_draw_scanline(running_machine &machine,bitmap_ind16 &bitmap, i
UINT16 *scanline = &bitmap.pix16(primo_scanline); UINT16 *scanline = &bitmap.pix16(primo_scanline);
/* address of current line in Primo video memory */ /* address of current line in Primo video memory */
const UINT8* primo_video_ram_line = (const UINT8*)machine.device("maincpu")->memory().space(AS_PROGRAM).get_read_ptr(state->m_video_memory_base + 32 * primo_scanline); const UINT8* primo_video_ram_line = (const UINT8*)state->m_maincpu->space(AS_PROGRAM).get_read_ptr(state->m_video_memory_base + 32 * primo_scanline);
for (x=0; x<256; x+=8) for (x=0; x<256; x+=8)
{ {