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Workaround for finlarch/sasissu/magzun ODD bit regression. (nw)
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@ -199,7 +199,7 @@ enum
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bit-> /----15----|----14----|----13----|----12----|----11----|----10----|----09----|----08----\
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bit-> /----15----|----14----|----13----|----12----|----11----|----10----|----09----|----08----\
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| -- | -- | -- | -- | -- | -- | EXLTFG | EXSYFG |
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| -- | -- | -- | -- | -- | -- | EXLTFG | EXSYFG |
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|----07----|----06----|----05----|----04----|----03----|----02----|----01----|----00----|
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|----07----|----06----|----05----|----04----|----03----|----02----|----01----|----00----|
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| -- | -- | -- | -- | VBLANK | HBLANK | ODD | EVEN |
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| -- | -- | -- | -- | VBLANK | HBLANK | ODD | PAL |
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\----------|----------|----------|----------|----------|----------|----------|---------*/
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\----------|----------|----------|----------|----------|----------|----------|---------*/
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/* 180006 - r/w - VRSIZE - VRAM Size
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/* 180006 - r/w - VRSIZE - VRAM Size
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@ -6001,14 +6001,20 @@ uint8_t saturn_state::get_vblank( void )
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}
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}
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// TODO: seabass explicitly wants this bit to be 0 when screen is disabled from bios to game transition, assume following disp bit.
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// TODO: seabass explicitly wants this bit to be 0 when screen is disabled from bios to game transition, assume following disp bit.
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// this is actually wrong for finlarch/sasissu/magzun so it needs to be tested on real HW.
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uint8_t saturn_state::get_odd_bit( void )
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uint8_t saturn_state::get_odd_bit( void )
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{
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{
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if(STV_VDP2_HRES & 4) //exclusive monitor mode makes this bit to be always 1
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if(STV_VDP2_HRES & 4) //exclusive monitor mode makes this bit to be always 1
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return STV_VDP2_DISP;
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return 1;
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if(STV_VDP2_LSMD == 0) // same for non-interlace mode
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if(STV_VDP2_LSMD == 0) // same for non-interlace mode
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return STV_VDP2_DISP;
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{
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if((STV_VDP2_HRES & 1) == 0)
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return STV_VDP2_DISP;
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return 1;
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}
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return machine().first_screen()->frame_number() & 1;
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return machine().first_screen()->frame_number() & 1;
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}
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}
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