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tms7000: Corrected two opcodes: typo in inv_b
and JPZ was wrong in official TI document. [Gilles Fetis] sent through MESS bugzilla and reviewed by Tim Lindner
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@ -18,6 +18,10 @@
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*****************************************************************************/
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//SJE: Changed all references to ICount to icount (to match MAME requirements)
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//TJL: (From Gilles Fetis) JPZ in TI documentation was wrong:
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// if ((pSR & SR_N) == 0 && (pSR & SR_Z) != 0)
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// should be:
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// if ((pSR & SR_N) == 0)
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#include "emu.h"
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@ -1871,8 +1875,8 @@ static void inv_b(tms7000_state *cpustate)
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{
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UINT16 t;
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t = ~(RDA);
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WRA(t);
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t = ~(RDB);
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WRB(t);
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CLR_NZC;
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SET_N8(t);
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@ -2013,7 +2017,7 @@ static void jp(tms7000_state *cpustate)
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static void jpz(tms7000_state *cpustate)
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{
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if ((pSR & SR_N) == 0 && (pSR & SR_Z) != 0)
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if ((pSR & SR_N) == 0)
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{
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INT8 s;
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