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https://github.com/holub/mame
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f8: change flag helper macros to inline functions, remove some unneeded commentary (nw)
This commit is contained in:
hap
parent
a72b3e4ae6
commit
29202d2cf1
@ -2,64 +2,67 @@
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// copyright-holders:Juergen Buchmueller
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/*****************************************************************************
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*
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* f8.c
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* Portable F8 emulator (Fairchild 3850)
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* Portable F8 emulator (Fairchild 3850)
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*
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* This work is based on Frank Palazzolo's F8 emulation in a standalone
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* Fairchild Channel F emulator and the 'Fairchild F3850 CPU' data sheets.
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*
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*****************************************************************************/
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/* PeT 25.June 2001
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added interrupt functionality
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*/
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#include "emu.h"
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#include "f8.h"
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#include "f8dasm.h"
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#include "debugger.h"
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#define S 0x01
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#define C 0x02
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#define Z 0x04
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#define O 0x08
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#define I 0x10
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#define cS 4
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#define cL 6
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/* status flags */
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static constexpr u8 S = 0x01;
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static constexpr u8 C = 0x02;
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static constexpr u8 Z = 0x04;
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static constexpr u8 O = 0x08;
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static constexpr u8 I = 0x10;
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/* cycle (short/long) */
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static constexpr int cS = 4;
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static constexpr int cL = 6;
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/* clear all flags */
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#define CLR_OZCS \
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m_w &= ~(O|Z|C|S)
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inline void f8_cpu_device::CLR_OZCS()
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{
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m_w &= ~(O|Z|C|S);
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}
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/* set sign and zero flags (note: the S flag is complementary) */
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#define SET_SZ(n) \
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if (n == 0) \
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m_w |= Z | S; \
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else \
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if (n < 128) \
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m_w |= S
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inline void f8_cpu_device::SET_SZ(u8 n)
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{
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if (n == 0)
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m_w |= Z;
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if (~n & 0x80)
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m_w |= S;
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}
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/* set overflow and carry flags */
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#define SET_OC(n,m) \
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if (n + m > 255) \
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m_w |= C; \
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if ((n&127)+(m&127) > 127) \
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{ \
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if (!(m_w & C)) \
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m_w |= O; \
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} \
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else \
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{ \
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if (m_w & C) \
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m_w |= O; \
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inline void f8_cpu_device::SET_OC(u16 n, u16 m)
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{
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if (n + m > 255)
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m_w |= C;
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if ((n&127)+(m&127) > 127)
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{
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if (!(m_w & C))
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m_w |= O;
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}
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else
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{
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if (m_w & C)
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m_w |= O;
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}
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}
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/* decimal add helper */
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uint8_t f8_cpu_device::do_ad(uint8_t augend, uint8_t addend)
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inline uint8_t f8_cpu_device::do_ad(uint8_t augend, uint8_t addend)
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{
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/* SKR from F8 Guide To programming description of AMD
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/* From F8 Guide To programming description of AMD
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* binary add the addend to the binary sum of the augend and $66
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* *NOTE* the binary addition of the augend to $66 is done before AMD is called
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* record the status of the carry and intermediate carry
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@ -81,7 +84,7 @@ uint8_t f8_cpu_device::do_ad(uint8_t augend, uint8_t addend)
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if ((augend & 0x0f) + (addend & 0x0f) > 0x0F)
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ic = 1;
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CLR_OZCS;
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CLR_OZCS();
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SET_OC(augend,addend);
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SET_SZ(tmp);
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@ -134,8 +137,7 @@ device_memory_interface::space_config_vector f8_cpu_device::memory_space_config(
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* Currently the emulation does not handle distinct PCs and DCs, but
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* only one instance inside the CPU context.
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******************************************************************************/
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void f8_cpu_device::ROMC_00(int insttim) /* SKR - added parameter to tell if */
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/* it is long or short based on inst */
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void f8_cpu_device::ROMC_00(int insttim)
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{
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/*
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* Instruction Fetch. The device whose address space includes the
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@ -146,8 +148,7 @@ void f8_cpu_device::ROMC_00(int insttim) /* SKR - added parameter to tell if */
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m_dbus = m_direct->read_byte(m_pc0);
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m_pc0 += 1;
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m_icount -= insttim; /* SKR - ROMC00 is usually short, not short+long, */
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/* but DS is long */
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m_icount -= insttim; /* ROMC00 is usually short, not short+long, but DS is long */
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}
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void f8_cpu_device::ROMC_01()
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@ -176,8 +177,8 @@ void f8_cpu_device::ROMC_02()
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m_icount -= cL;
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}
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void f8_cpu_device::ROMC_03(int insttim) /* SKR - added parameter to tell if */
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{ /* it is long or short based on inst */
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void f8_cpu_device::ROMC_03(int insttim)
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{
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/*
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* Similiar to 0x00, except that it is used for immediate operands
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* fetches (using PC0) instead of instruction fetches.
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@ -453,8 +454,7 @@ void f8_cpu_device::ROMC_1B()
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m_icount -= cL;
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}
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void f8_cpu_device::ROMC_1C(int insttim) /* SKR - added parameter to tell if */
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/* it is long or short based on inst */
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void f8_cpu_device::ROMC_1C(int insttim)
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{
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/*
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* None.
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@ -695,7 +695,7 @@ void f8_cpu_device::f8_lr_h_dc()
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void f8_cpu_device::f8_sr_1()
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{
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m_a >>= 1;
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CLR_OZCS;
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CLR_OZCS();
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SET_SZ(m_a);
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}
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@ -706,7 +706,7 @@ void f8_cpu_device::f8_sr_1()
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void f8_cpu_device::f8_sl_1()
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{
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m_a <<= 1;
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CLR_OZCS;
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CLR_OZCS();
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SET_SZ(m_a);
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}
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@ -717,7 +717,7 @@ void f8_cpu_device::f8_sl_1()
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void f8_cpu_device::f8_sr_4()
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{
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m_a >>= 4;
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CLR_OZCS;
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CLR_OZCS();
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SET_SZ(m_a);
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}
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@ -728,7 +728,7 @@ void f8_cpu_device::f8_sr_4()
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void f8_cpu_device::f8_sl_4()
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{
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m_a <<= 4;
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CLR_OZCS;
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CLR_OZCS();
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SET_SZ(m_a);
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}
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@ -759,7 +759,7 @@ void f8_cpu_device::f8_st()
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void f8_cpu_device::f8_com()
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{
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m_a = ~m_a;
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CLR_OZCS;
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CLR_OZCS();
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SET_SZ(m_a);
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}
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@ -769,15 +769,11 @@ void f8_cpu_device::f8_com()
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***************************************************/
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void f8_cpu_device::f8_lnk()
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{
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CLR_OZCS();
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if (m_w & C)
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{
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CLR_OZCS;
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SET_OC(m_a,1);
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m_a += 1;
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}
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else
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{
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CLR_OZCS;
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SET_OC(m_a,1);
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m_a += 1;
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}
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SET_SZ(m_a);
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}
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@ -836,7 +832,7 @@ void f8_cpu_device::f8_lr_j_w()
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***************************************************/
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void f8_cpu_device::f8_inc()
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{
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CLR_OZCS;
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CLR_OZCS();
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SET_OC(m_a,1);
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m_a += 1;
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SET_SZ(m_a);
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@ -859,7 +855,7 @@ void f8_cpu_device::f8_li()
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void f8_cpu_device::f8_ni()
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{
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ROMC_03(cL);
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CLR_OZCS;
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CLR_OZCS();
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m_a &= m_dbus;
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SET_SZ(m_a);
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}
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@ -871,7 +867,7 @@ void f8_cpu_device::f8_ni()
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void f8_cpu_device::f8_oi()
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{
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ROMC_03(cL);
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CLR_OZCS;
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CLR_OZCS();
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m_a |= m_dbus;
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SET_SZ(m_a);
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}
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@ -883,7 +879,7 @@ void f8_cpu_device::f8_oi()
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void f8_cpu_device::f8_xi()
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{
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ROMC_03(cL);
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CLR_OZCS;
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CLR_OZCS();
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m_a ^= m_dbus;
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SET_SZ(m_a);
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}
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@ -895,7 +891,7 @@ void f8_cpu_device::f8_xi()
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void f8_cpu_device::f8_ai()
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{
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ROMC_03(cL);
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CLR_OZCS;
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CLR_OZCS();
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SET_OC(m_a,m_dbus);
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m_a += m_dbus;
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SET_SZ(m_a);
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@ -909,10 +905,10 @@ void f8_cpu_device::f8_ci()
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{
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uint16_t tmp = ((uint8_t)~m_a) + 1;
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ROMC_03(cL);
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CLR_OZCS;
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CLR_OZCS();
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SET_OC(tmp,m_dbus);
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tmp += m_dbus;
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SET_SZ((uint8_t)tmp);
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SET_SZ(tmp);
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}
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/***************************************************
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@ -922,7 +918,7 @@ void f8_cpu_device::f8_ci()
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void f8_cpu_device::f8_in()
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{
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ROMC_03(cL);
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CLR_OZCS;
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CLR_OZCS();
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ROMC_1B();
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m_a = m_dbus;
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SET_SZ(m_a);
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@ -1001,7 +997,7 @@ void f8_cpu_device::f8_xdc()
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***************************************************/
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void f8_cpu_device::f8_ds_r(int r)
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{
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CLR_OZCS;
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CLR_OZCS();
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SET_OC(m_r[r], 0xff);
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m_r[r] = m_r[r] + 0xff;
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SET_SZ(m_r[r]);
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@ -1013,7 +1009,7 @@ void f8_cpu_device::f8_ds_r(int r)
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***************************************************/
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void f8_cpu_device::f8_ds_isar()
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{
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CLR_OZCS;
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CLR_OZCS();
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SET_OC(m_r[m_is], 0xff);
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m_r[m_is] = m_r[m_is] + 0xff;
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SET_SZ(m_r[m_is]);
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@ -1025,7 +1021,7 @@ void f8_cpu_device::f8_ds_isar()
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***************************************************/
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void f8_cpu_device::f8_ds_isar_i()
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{
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CLR_OZCS;
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CLR_OZCS();
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SET_OC(m_r[m_is], 0xff);
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m_r[m_is] = m_r[m_is] + 0xff;
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SET_SZ(m_r[m_is]);
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@ -1038,7 +1034,7 @@ void f8_cpu_device::f8_ds_isar_i()
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***************************************************/
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void f8_cpu_device::f8_ds_isar_d()
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{
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CLR_OZCS;
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CLR_OZCS();
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SET_OC(m_r[m_is], 0xff);
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m_r[m_is] = m_r[m_is] + 0xff;
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SET_SZ(m_r[m_is]);
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@ -1168,7 +1164,7 @@ void f8_cpu_device::f8_bt(int e)
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void f8_cpu_device::f8_am()
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{
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ROMC_02();
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CLR_OZCS;
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CLR_OZCS();
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SET_OC(m_a, m_dbus);
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m_a += m_dbus;
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SET_SZ(m_a);
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@ -1193,7 +1189,7 @@ void f8_cpu_device::f8_amd()
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void f8_cpu_device::f8_nm()
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{
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ROMC_02();
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CLR_OZCS;
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CLR_OZCS();
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m_a &= m_dbus;
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SET_SZ(m_a);
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}
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@ -1205,7 +1201,7 @@ void f8_cpu_device::f8_nm()
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void f8_cpu_device::f8_om()
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{
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ROMC_02();
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CLR_OZCS;
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CLR_OZCS();
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m_a |= m_dbus;
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SET_SZ(m_a);
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}
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@ -1217,7 +1213,7 @@ void f8_cpu_device::f8_om()
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void f8_cpu_device::f8_xm()
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{
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ROMC_02();
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CLR_OZCS;
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CLR_OZCS();
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m_a ^= m_dbus;
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SET_SZ(m_a);
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}
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@ -1226,14 +1222,14 @@ void f8_cpu_device::f8_xm()
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* O Z C S 1000 1101
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* x x x x CM
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***************************************************/
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void f8_cpu_device::f8_cm() /* SKR changed to match f8_ci() */
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void f8_cpu_device::f8_cm()
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{
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uint16_t tmp = ((uint8_t)~m_a) + 1;
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ROMC_02();
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CLR_OZCS;
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CLR_OZCS();
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SET_OC(tmp,m_dbus);
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tmp += m_dbus;
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SET_SZ((uint8_t)tmp);
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SET_SZ(tmp);
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}
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/***************************************************
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@ -1278,7 +1274,7 @@ void f8_cpu_device::f8_bf(int t)
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void f8_cpu_device::f8_ins_0(int n)
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{
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ROMC_1C(cS);
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CLR_OZCS;
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CLR_OZCS();
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m_a = m_iospace->read_byte(n);
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SET_SZ(m_a);
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}
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@ -1292,7 +1288,7 @@ void f8_cpu_device::f8_ins_1(int n)
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ROMC_1C(cL);
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m_io = n;
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ROMC_1B();
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CLR_OZCS;
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CLR_OZCS();
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m_a = m_dbus;
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SET_SZ(m_a);
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}
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@ -1325,7 +1321,7 @@ void f8_cpu_device::f8_outs_1(int n)
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***************************************************/
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void f8_cpu_device::f8_as(int r)
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{
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CLR_OZCS;
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CLR_OZCS();
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SET_OC(m_a, m_r[r]);
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m_a += m_r[r];
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SET_SZ(m_a);
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@ -1337,7 +1333,7 @@ void f8_cpu_device::f8_as(int r)
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***************************************************/
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void f8_cpu_device::f8_as_isar()
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{
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CLR_OZCS;
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CLR_OZCS();
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SET_OC(m_a, m_r[m_is]);
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m_a += m_r[m_is];
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SET_SZ(m_a);
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@ -1349,7 +1345,7 @@ void f8_cpu_device::f8_as_isar()
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***************************************************/
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void f8_cpu_device::f8_as_isar_i()
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{
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CLR_OZCS;
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CLR_OZCS();
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SET_OC(m_a, m_r[m_is]);
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m_a += m_r[m_is];
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SET_SZ(m_a);
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@ -1362,7 +1358,7 @@ void f8_cpu_device::f8_as_isar_i()
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***************************************************/
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void f8_cpu_device::f8_as_isar_d()
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{
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CLR_OZCS;
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CLR_OZCS();
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SET_OC(m_a, m_r[m_is]);
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m_a += m_r[m_is];
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SET_SZ(m_a);
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@ -1425,7 +1421,7 @@ void f8_cpu_device::f8_asd_isar_d()
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***************************************************/
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void f8_cpu_device::f8_xs(int r)
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{
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CLR_OZCS;
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CLR_OZCS();
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m_a ^= m_r[r];
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SET_SZ(m_a);
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}
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@ -1436,7 +1432,7 @@ void f8_cpu_device::f8_xs(int r)
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***************************************************/
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void f8_cpu_device::f8_xs_isar()
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{
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CLR_OZCS;
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CLR_OZCS();
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m_a ^= m_r[m_is];
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SET_SZ(m_a);
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}
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@ -1447,7 +1443,7 @@ void f8_cpu_device::f8_xs_isar()
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***************************************************/
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void f8_cpu_device::f8_xs_isar_i()
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{
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CLR_OZCS;
|
||||
CLR_OZCS();
|
||||
m_a ^= m_r[m_is];
|
||||
SET_SZ(m_a);
|
||||
m_is = (m_is & 0x38) | ((m_is + 1) & 0x07);
|
||||
@ -1459,7 +1455,7 @@ void f8_cpu_device::f8_xs_isar_i()
|
||||
***************************************************/
|
||||
void f8_cpu_device::f8_xs_isar_d()
|
||||
{
|
||||
CLR_OZCS;
|
||||
CLR_OZCS();
|
||||
m_a ^= m_r[m_is];
|
||||
SET_SZ(m_a);
|
||||
m_is = (m_is & 0x38) | ((m_is - 1) & 0x07);
|
||||
@ -1471,7 +1467,7 @@ void f8_cpu_device::f8_xs_isar_d()
|
||||
***************************************************/
|
||||
void f8_cpu_device::f8_ns(int r)
|
||||
{
|
||||
CLR_OZCS;
|
||||
CLR_OZCS();
|
||||
m_a &= m_r[r];
|
||||
SET_SZ(m_a);
|
||||
}
|
||||
@ -1482,7 +1478,7 @@ void f8_cpu_device::f8_ns(int r)
|
||||
***************************************************/
|
||||
void f8_cpu_device::f8_ns_isar()
|
||||
{
|
||||
CLR_OZCS;
|
||||
CLR_OZCS();
|
||||
m_a &= m_r[m_is];
|
||||
SET_SZ(m_a);
|
||||
}
|
||||
@ -1493,7 +1489,7 @@ void f8_cpu_device::f8_ns_isar()
|
||||
***************************************************/
|
||||
void f8_cpu_device::f8_ns_isar_i()
|
||||
{
|
||||
CLR_OZCS;
|
||||
CLR_OZCS();
|
||||
m_a &= m_r[m_is];
|
||||
SET_SZ(m_a);
|
||||
m_is = (m_is & 0x38) | ((m_is + 1) & 0x07);
|
||||
@ -1505,7 +1501,7 @@ void f8_cpu_device::f8_ns_isar_i()
|
||||
***************************************************/
|
||||
void f8_cpu_device::f8_ns_isar_d()
|
||||
{
|
||||
CLR_OZCS;
|
||||
CLR_OZCS();
|
||||
m_a &= m_r[m_is];
|
||||
SET_SZ(m_a);
|
||||
m_is = (m_is & 0x38) | ((m_is - 1) & 0x07);
|
||||
@ -1862,7 +1858,7 @@ void f8_cpu_device::execute_run()
|
||||
ROMC_0F();
|
||||
ROMC_13();
|
||||
}
|
||||
if( ( op >= 0x30 ) && ( op <= 0x3f) ) /* SKR - DS is a long cycle inst */
|
||||
if( ( op >= 0x30 ) && ( op <= 0x3f) ) /* DS is a long cycle inst */
|
||||
{
|
||||
ROMC_00(cL);
|
||||
}
|
||||
|
||||
@ -2,7 +2,6 @@
|
||||
// copyright-holders:Juergen Buchmueller
|
||||
/*****************************************************************************
|
||||
*
|
||||
* f8.h
|
||||
* Portable Fairchild F8 emulator interface
|
||||
*
|
||||
*****************************************************************************/
|
||||
@ -82,7 +81,10 @@ private:
|
||||
|
||||
uint16_t m_pc; // For the debugger
|
||||
|
||||
uint8_t do_ad(uint8_t augend, uint8_t addend);
|
||||
inline uint8_t do_ad(uint8_t augend, uint8_t addend);
|
||||
inline void CLR_OZCS();
|
||||
inline void SET_SZ(u8 n);
|
||||
inline void SET_OC(u16 n, u16 m);
|
||||
|
||||
void ROMC_00(int insttim);
|
||||
void ROMC_01();
|
||||
|
||||
@ -53,19 +53,11 @@ f3853_device::f3853_device(const machine_config &mconfig, const char *tag, devic
|
||||
|
||||
void f3853_device::device_start()
|
||||
{
|
||||
uint8_t reg = 0xfe;
|
||||
for(int32_t i=254 /* Known to get 0xfe after 255 cycles */; i >= 0; i--)
|
||||
uint8_t reg = 0xfe; // Known to get 0xfe after 255 cycles
|
||||
for(int i = reg; i >= 0; i--)
|
||||
{
|
||||
int32_t o7 = (reg & 0x80) ? true : false;
|
||||
int32_t o5 = (reg & 0x20) ? true : false;
|
||||
int32_t o4 = (reg & 0x10) ? true : false;
|
||||
int32_t o3 = (reg & 0x08) ? true : false;
|
||||
m_value_to_cycle[reg] = i;
|
||||
reg <<= 1;
|
||||
if (!((o7 != o5) != (o4 != o3)))
|
||||
{
|
||||
reg |= 1;
|
||||
}
|
||||
reg = reg << 1 | (BIT(reg,7) ^ BIT(reg,5) ^ BIT(reg,4) ^ BIT(reg,3) ^ 1);
|
||||
}
|
||||
|
||||
m_interrupt_req_cb.bind_relative_to(*owner());
|
||||
|
||||
Loading…
Reference in New Issue
Block a user